diff options
Diffstat (limited to 'contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp')
| -rw-r--r-- | contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp | 319 |
1 files changed, 254 insertions, 65 deletions
diff --git a/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp index a4c0ca8..3cad9fa 100644 --- a/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp +++ b/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp @@ -21,6 +21,92 @@ using namespace llvm; +/// \brief Extracts the src/dst types for a given zero extension instruction. +/// \note While the number of elements in DstVT type correct, the +/// number in the SrcVT type is expanded to fill the src xmm register and the +/// upper elements may not be included in the dst xmm/ymm register. +static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) { + switch (MI->getOpcode()) { + default: + llvm_unreachable("Unknown zero extension instruction"); + // i8 zero extension + case X86::PMOVZXBWrm: + case X86::PMOVZXBWrr: + case X86::VPMOVZXBWrm: + case X86::VPMOVZXBWrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v8i16; + break; + case X86::VPMOVZXBWYrm: + case X86::VPMOVZXBWYrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v16i16; + break; + case X86::PMOVZXBDrm: + case X86::PMOVZXBDrr: + case X86::VPMOVZXBDrm: + case X86::VPMOVZXBDrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v4i32; + break; + case X86::VPMOVZXBDYrm: + case X86::VPMOVZXBDYrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v8i32; + break; + case X86::PMOVZXBQrm: + case X86::PMOVZXBQrr: + case X86::VPMOVZXBQrm: + case X86::VPMOVZXBQrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v2i64; + break; + case X86::VPMOVZXBQYrm: + case X86::VPMOVZXBQYrr: + SrcVT = MVT::v16i8; + DstVT = MVT::v4i64; + break; + // i16 zero extension + case X86::PMOVZXWDrm: + case X86::PMOVZXWDrr: + case X86::VPMOVZXWDrm: + case X86::VPMOVZXWDrr: + SrcVT = MVT::v8i16; + DstVT = MVT::v4i32; + break; + case X86::VPMOVZXWDYrm: + case X86::VPMOVZXWDYrr: + SrcVT = MVT::v8i16; + DstVT = MVT::v8i32; + break; + case X86::PMOVZXWQrm: + case X86::PMOVZXWQrr: + case X86::VPMOVZXWQrm: + case X86::VPMOVZXWQrr: + SrcVT = MVT::v8i16; + DstVT = MVT::v2i64; + break; + case X86::VPMOVZXWQYrm: + case X86::VPMOVZXWQYrr: + SrcVT = MVT::v8i16; + DstVT = MVT::v4i64; + break; + // i32 zero extension + case X86::PMOVZXDQrm: + case X86::PMOVZXDQrr: + case X86::VPMOVZXDQrm: + case X86::VPMOVZXDQrr: + SrcVT = MVT::v4i32; + DstVT = MVT::v2i64; + break; + case X86::VPMOVZXDQYrm: + case X86::VPMOVZXDQYrr: + SrcVT = MVT::v4i32; + DstVT = MVT::v4i64; + break; + } +} + //===----------------------------------------------------------------------===// // Top Level Entrypoint //===----------------------------------------------------------------------===// @@ -45,9 +131,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::BLENDPDrmi: case X86::VBLENDPDrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v2f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -56,9 +142,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VBLENDPDYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v4f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -70,9 +156,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::BLENDPSrmi: case X86::VBLENDPSrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v4f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -81,9 +167,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VBLENDPSYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v8f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -95,9 +181,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::PBLENDWrmi: case X86::VPBLENDWrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v8i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -106,9 +192,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VPBLENDWYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v16i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -118,9 +204,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VPBLENDDrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v4i32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -130,9 +216,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VPBLENDDYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeBLENDMask(MVT::v8i32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -146,8 +232,8 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::VINSERTPSrm: DestName = getRegName(MI->getOperand(0).getReg()); Src1Name = getRegName(MI->getOperand(1).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) - DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands()-1).getImm(), + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) + DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; @@ -203,22 +289,40 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, DecodeMOVSHDUPMask(MVT::v4f32, ShuffleMask); break; + case X86::VMOVDDUPYrr: + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::VMOVDDUPYrm: + DestName = getRegName(MI->getOperand(0).getReg()); + DecodeMOVDDUPMask(MVT::v4f64, ShuffleMask); + break; + + case X86::MOVDDUPrr: + case X86::VMOVDDUPrr: + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::MOVDDUPrm: + case X86::VMOVDDUPrm: + DestName = getRegName(MI->getOperand(0).getReg()); + DecodeMOVDDUPMask(MVT::v2f64, ShuffleMask); + break; + case X86::PSLLDQri: case X86::VPSLLDQri: Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSLLDQMask(MVT::v16i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPSLLDQYri: Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSLLDQMask(MVT::v32i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; @@ -226,18 +330,18 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::VPSRLDQri: Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSRLDQMask(MVT::v16i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPSRLDQYri: Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSRLDQMask(MVT::v32i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; @@ -249,9 +353,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::VPALIGNR128rm: Src2Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePALIGNRMask(MVT::v16i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPALIGNR256rr: @@ -260,9 +364,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::VPALIGNR256rm: Src2Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePALIGNRMask(MVT::v32i8, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; @@ -273,9 +377,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::PSHUFDmi: case X86::VPSHUFDmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v4i32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPSHUFDYri: @@ -283,13 +387,12 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::VPSHUFDYmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v8i32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; - case X86::PSHUFHWri: case X86::VPSHUFHWri: Src1Name = getRegName(MI->getOperand(1).getReg()); @@ -297,9 +400,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::PSHUFHWmi: case X86::VPSHUFHWmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFHWMask(MVT::v8i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPSHUFHWYri: @@ -307,9 +410,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::VPSHUFHWYmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFHWMask(MVT::v16i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::PSHUFLWri: @@ -319,9 +422,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::PSHUFLWmi: case X86::VPSHUFLWmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFLWMask(MVT::v8i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; case X86::VPSHUFLWYri: @@ -329,9 +432,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::VPSHUFLWYmi: DestName = getRegName(MI->getOperand(0).getReg()); - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFLWMask(MVT::v16i16, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); break; @@ -519,9 +622,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::SHUFPDrmi: case X86::VSHUFPDrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeSHUFPMask(MVT::v2f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -530,9 +633,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VSHUFPDYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeSHUFPMask(MVT::v4f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -544,9 +647,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::SHUFPSrmi: case X86::VSHUFPSrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeSHUFPMask(MVT::v4f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -555,9 +658,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src2Name = getRegName(MI->getOperand(2).getReg()); // FALL THROUGH. case X86::VSHUFPSYrmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeSHUFPMask(MVT::v8f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -671,9 +774,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src1Name = getRegName(MI->getOperand(1).getReg()); // FALL THROUGH. case X86::VPERMILPSmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v4f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; @@ -681,9 +784,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src1Name = getRegName(MI->getOperand(1).getReg()); // FALL THROUGH. case X86::VPERMILPSYmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v8f32, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; @@ -691,9 +794,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src1Name = getRegName(MI->getOperand(1).getReg()); // FALL THROUGH. case X86::VPERMILPDmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v2f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; @@ -701,9 +804,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, Src1Name = getRegName(MI->getOperand(1).getReg()); // FALL THROUGH. case X86::VPERMILPDYmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodePSHUFMask(MVT::v4f64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; @@ -714,9 +817,9 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, case X86::VPERM2F128rm: case X86::VPERM2I128rm: // For instruction comments purpose, assume the 256-bit vector is v4i64. - if(MI->getOperand(MI->getNumOperands()-1).isImm()) + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) DecodeVPERM2X128Mask(MVT::v4i64, - MI->getOperand(MI->getNumOperands()-1).getImm(), + MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); Src1Name = getRegName(MI->getOperand(1).getReg()); DestName = getRegName(MI->getOperand(0).getReg()); @@ -727,11 +830,97 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, // FALL THROUGH. case X86::VPERMQYmi: case X86::VPERMPDYmi: - if(MI->getOperand(MI->getNumOperands()-1).isImm()) - DecodeVPERMMask(MI->getOperand(MI->getNumOperands()-1).getImm(), + if (MI->getOperand(MI->getNumOperands() - 1).isImm()) + DecodeVPERMMask(MI->getOperand(MI->getNumOperands() - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; + + case X86::MOVSDrr: + case X86::VMOVSDrr: + Src2Name = getRegName(MI->getOperand(2).getReg()); + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::MOVSDrm: + case X86::VMOVSDrm: + DecodeScalarMoveMask(MVT::v2f64, nullptr == Src2Name, ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + break; + case X86::MOVSSrr: + case X86::VMOVSSrr: + Src2Name = getRegName(MI->getOperand(2).getReg()); + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::MOVSSrm: + case X86::VMOVSSrm: + DecodeScalarMoveMask(MVT::v4f32, nullptr == Src2Name, ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + break; + + case X86::MOVPQI2QIrr: + case X86::MOVZPQILo2PQIrr: + case X86::VMOVPQI2QIrr: + case X86::VMOVZPQILo2PQIrr: + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::MOVQI2PQIrm: + case X86::MOVZQI2PQIrm: + case X86::MOVZPQILo2PQIrm: + case X86::VMOVQI2PQIrm: + case X86::VMOVZQI2PQIrm: + case X86::VMOVZPQILo2PQIrm: + DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + break; + case X86::MOVDI2PDIrm: + case X86::VMOVDI2PDIrm: + DecodeZeroMoveLowMask(MVT::v4i32, ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + break; + + case X86::PMOVZXBWrr: + case X86::PMOVZXBDrr: + case X86::PMOVZXBQrr: + case X86::PMOVZXWDrr: + case X86::PMOVZXWQrr: + case X86::PMOVZXDQrr: + case X86::VPMOVZXBWrr: + case X86::VPMOVZXBDrr: + case X86::VPMOVZXBQrr: + case X86::VPMOVZXWDrr: + case X86::VPMOVZXWQrr: + case X86::VPMOVZXDQrr: + case X86::VPMOVZXBWYrr: + case X86::VPMOVZXBDYrr: + case X86::VPMOVZXBQYrr: + case X86::VPMOVZXWDYrr: + case X86::VPMOVZXWQYrr: + case X86::VPMOVZXDQYrr: + Src1Name = getRegName(MI->getOperand(1).getReg()); + // FALL THROUGH. + case X86::PMOVZXBWrm: + case X86::PMOVZXBDrm: + case X86::PMOVZXBQrm: + case X86::PMOVZXWDrm: + case X86::PMOVZXWQrm: + case X86::PMOVZXDQrm: + case X86::VPMOVZXBWrm: + case X86::VPMOVZXBDrm: + case X86::VPMOVZXBQrm: + case X86::VPMOVZXWDrm: + case X86::VPMOVZXWQrm: + case X86::VPMOVZXDQrm: + case X86::VPMOVZXBWYrm: + case X86::VPMOVZXBDYrm: + case X86::VPMOVZXBQYrm: + case X86::VPMOVZXWDYrm: + case X86::VPMOVZXWQYrm: + case X86::VPMOVZXDQYrm: { + MVT SrcVT, DstVT; + getZeroExtensionTypes(MI, SrcVT, DstVT); + DecodeZeroExtendMask(SrcVT, DstVT, ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + } break; } // The only comments we decode are shuffles, so give up if we were unable to @@ -747,7 +936,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, if (Src1Name == Src2Name) { for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) { if ((int)ShuffleMask[i] >= 0 && // Not sentinel. - ShuffleMask[i] >= (int)e) // From second mask. + ShuffleMask[i] >= (int)e) // From second mask. ShuffleMask[i] -= e; } } @@ -782,7 +971,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, ++i; } OS << ']'; - --i; // For loop increments element #. + --i; // For loop increments element #. } //MI->print(OS, 0); OS << "\n"; |
