diff options
Diffstat (limited to 'contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h')
-rw-r--r-- | contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h b/contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h index 89f607d..756619b 100644 --- a/contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h +++ b/contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h @@ -27,6 +27,8 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo { MachineFunction &MF; std::vector<MVT> Params; + std::vector<MVT> Results; + std::vector<MVT> Locals; /// A mapping from CodeGen vreg index to WebAssembly register number. std::vector<unsigned> WARegs; @@ -44,6 +46,10 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo { // TLI::LowerVASTART unsigned VarargVreg = -1U; + // A virtual register holding the base pointer for functions that have + // overaligned values on the user stack. + unsigned BasePtrVreg = -1U; + public: explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {} ~WebAssemblyFunctionInfo() override; @@ -51,15 +57,28 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo { void addParam(MVT VT) { Params.push_back(VT); } const std::vector<MVT> &getParams() const { return Params; } + void addResult(MVT VT) { Results.push_back(VT); } + const std::vector<MVT> &getResults() const { return Results; } + + void addLocal(MVT VT) { Locals.push_back(VT); } + const std::vector<MVT> &getLocals() const { return Locals; } + unsigned getVarargBufferVreg() const { assert(VarargVreg != -1U && "Vararg vreg hasn't been set"); return VarargVreg; } void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } + unsigned getBasePointerVreg() const { + assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set"); + return BasePtrVreg; + } + void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; } + static const unsigned UnusedReg = -1u; void stackifyVReg(unsigned VReg) { + assert(MF.getRegInfo().getUniqueVRegDef(VReg)); if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1); VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg)); @@ -88,6 +107,13 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo { } }; +void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, + Type *Ty, SmallVectorImpl<MVT> &ValueVTs); + +void ComputeSignatureVTs(const Function &F, const TargetMachine &TM, + SmallVectorImpl<MVT> &Params, + SmallVectorImpl<MVT> &Results); + } // end namespace llvm #endif |