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-rw-r--r--contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp b/contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
index af53f3d..7ea5d05 100644
--- a/contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
+++ b/contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
@@ -29,7 +29,7 @@ using namespace llvm;
namespace {
class WebAssemblyLowerBrUnless final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Lower br_unless";
}
@@ -104,12 +104,12 @@ bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) {
}
// If we weren't able to invert the condition in place. Insert an
- // expression to invert it.
+ // instruction to invert it.
if (!Inverted) {
unsigned Tmp = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
- MFI.stackifyVReg(Tmp);
BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::EQZ_I32), Tmp)
.addReg(Cond);
+ MFI.stackifyVReg(Tmp);
Cond = Tmp;
Inverted = true;
}
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