summaryrefslogtreecommitdiffstats
path: root/contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp')
-rw-r--r--contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp b/contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp
index 9e94d2c..b084d00 100644
--- a/contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp
+++ b/contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp
@@ -59,11 +59,11 @@ static MCOperand LowerSymbolOperand(const MachineInstr *MI,
break;
}
- const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol,
+ const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol,
AP.OutContext);
- const SparcMCExpr *expr = SparcMCExpr::Create(Kind, MCSym,
+ const SparcMCExpr *expr = SparcMCExpr::create(Kind, MCSym,
AP.OutContext);
- return MCOperand::CreateExpr(expr);
+ return MCOperand::createExpr(expr);
}
static MCOperand LowerOperand(const MachineInstr *MI,
@@ -74,10 +74,10 @@ static MCOperand LowerOperand(const MachineInstr *MI,
case MachineOperand::MO_Register:
if (MO.isImplicit())
break;
- return MCOperand::CreateReg(MO.getReg());
+ return MCOperand::createReg(MO.getReg());
case MachineOperand::MO_Immediate:
- return MCOperand::CreateImm(MO.getImm());
+ return MCOperand::createImm(MO.getImm());
case MachineOperand::MO_MachineBasicBlock:
case MachineOperand::MO_GlobalAddress:
OpenPOWER on IntegriCloud