diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Sparc/Sparc.td')
| -rw-r--r-- | contrib/llvm/lib/Target/Sparc/Sparc.td | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/contrib/llvm/lib/Target/Sparc/Sparc.td b/contrib/llvm/lib/Target/Sparc/Sparc.td index 0df48f6..05ff996 100644 --- a/contrib/llvm/lib/Target/Sparc/Sparc.td +++ b/contrib/llvm/lib/Target/Sparc/Sparc.td @@ -34,6 +34,9 @@ def FeatureHardQuad : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true", "Enable quad-word floating point instructions">; +def UsePopc : SubtargetFeature<"popc", "UsePopc", "true", + "Use the popc (population count) instruction">; + //===----------------------------------------------------------------------===// // Register File, Calling Conv, Instruction Descriptions //===----------------------------------------------------------------------===// @@ -44,6 +47,10 @@ include "SparcInstrInfo.td" def SparcInstrInfo : InstrInfo; +def SparcAsmParser : AsmParser { + bit ShouldEmitMatchRegisterName = 0; +} + //===----------------------------------------------------------------------===// // SPARC processors supported. //===----------------------------------------------------------------------===// @@ -52,6 +59,7 @@ class Proc<string Name, list<SubtargetFeature> Features> : Processor<Name, NoItineraries, Features>; def : Proc<"generic", []>; +def : Proc<"v7", []>; def : Proc<"v8", []>; def : Proc<"supersparc", []>; def : Proc<"sparclite", []>; @@ -63,8 +71,15 @@ def : Proc<"tsc701", []>; def : Proc<"v9", [FeatureV9]>; def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>; def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>; -def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>; +def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated]>; +def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated, UsePopc]>; +def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated, UsePopc]>; +def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated, UsePopc]>; +def SparcAsmWriter : AsmWriter { + string AsmWriterClassName = "InstPrinter"; + bit isMCAsmWriter = 1; +} //===----------------------------------------------------------------------===// // Declare the target which we are implementing @@ -73,4 +88,7 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>; def Sparc : Target { // Pull in Instruction Info: let InstructionSet = SparcInstrInfo; + let AssemblyParsers = [SparcAsmParser]; + + let AssemblyWriters = [SparcAsmWriter]; } |
