diff options
Diffstat (limited to 'contrib/llvm/lib/Target/PowerPC/PPCSchedule.td')
| -rw-r--r-- | contrib/llvm/lib/Target/PowerPC/PPCSchedule.td | 71 |
1 files changed, 37 insertions, 34 deletions
diff --git a/contrib/llvm/lib/Target/PowerPC/PPCSchedule.td b/contrib/llvm/lib/Target/PowerPC/PPCSchedule.td index 9664f14..8c0a858 100644 --- a/contrib/llvm/lib/Target/PowerPC/PPCSchedule.td +++ b/contrib/llvm/lib/Target/PowerPC/PPCSchedule.td @@ -1,10 +1,10 @@ -//===- PPCSchedule.td - PowerPC Scheduling Definitions -----*- tablegen -*-===// -// +//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// @@ -50,7 +50,8 @@ def BrMCRX : InstrItinClass; def LdStDCBA : InstrItinClass; def LdStDCBF : InstrItinClass; def LdStDCBI : InstrItinClass; -def LdStGeneral : InstrItinClass; +def LdStLoad : InstrItinClass; +def LdStStore : InstrItinClass; def LdStDSS : InstrItinClass; def LdStICBI : InstrItinClass; def LdStUX : InstrItinClass; @@ -103,9 +104,11 @@ def VecVSR : InstrItinClass; // Processor instruction itineraries. include "PPCScheduleG3.td" +include "PPCSchedule440.td" include "PPCScheduleG4.td" include "PPCScheduleG4Plus.td" include "PPCScheduleG5.td" +include "PPCScheduleA2.td" //===----------------------------------------------------------------------===// // Instruction to itinerary class map - When add new opcodes to the supported @@ -149,8 +152,8 @@ include "PPCScheduleG5.td" // dcbf LdStDCBF // dcbi LdStDCBI // dcbst LdStDCBF -// dcbt LdStGeneral -// dcbtst LdStGeneral +// dcbt LdStLoad +// dcbtst LdStLoad // dcbz LdStDCBF // divd IntDivD // divdu IntDivD @@ -159,9 +162,9 @@ include "PPCScheduleG5.td" // dss LdStDSS // dst LdStDSS // dstst LdStDSS -// eciwx LdStGeneral -// ecowx LdStGeneral -// eieio LdStGeneral +// eciwx LdStLoad +// ecowx LdStLoad +// eieio LdStLoad // eqv IntGeneral // extsb IntGeneral // extsh IntGeneral @@ -201,10 +204,10 @@ include "PPCScheduleG5.td" // fsubs FPGeneral // icbi LdStICBI // isync SprISYNC -// lbz LdStGeneral -// lbzu LdStGeneral +// lbz LdStLoad +// lbzu LdStLoad // lbzux LdStUX -// lbzx LdStGeneral +// lbzx LdStLoad // ld LdStLD // ldarx LdStLDARX // ldu LdStLD @@ -222,11 +225,11 @@ include "PPCScheduleG5.td" // lhau LdStLHA // lhaux LdStLHA // lhax LdStLHA -// lhbrx LdStGeneral -// lhz LdStGeneral -// lhzu LdStGeneral +// lhbrx LdStLoad +// lhz LdStLoad +// lhzu LdStLoad // lhzux LdStUX -// lhzx LdStGeneral +// lhzx LdStLoad // lmw LdStLMW // lswi LdStLMW // lswx LdStLMW @@ -241,11 +244,11 @@ include "PPCScheduleG5.td" // lwarx LdStLWARX // lwaux LdStLHA // lwax LdStLHA -// lwbrx LdStGeneral -// lwz LdStGeneral -// lwzu LdStGeneral +// lwbrx LdStLoad +// lwz LdStLoad +// lwzu LdStLoad // lwzux LdStUX -// lwzx LdStGeneral +// lwzx LdStLoad // mcrf BrMCR // mcrfs FPGeneral // mcrxr BrMCRX @@ -306,10 +309,10 @@ include "PPCScheduleG5.td" // srawi IntShift // srd IntRotateD // srw IntGeneral -// stb LdStGeneral -// stbu LdStGeneral -// stbux LdStGeneral -// stbx LdStGeneral +// stb LdStStore +// stbu LdStStore +// stbux LdStStore +// stbx LdStStore // std LdStSTD // stdcx. LdStSTDCX // stdu LdStSTD @@ -324,11 +327,11 @@ include "PPCScheduleG5.td" // stfsu LdStUX // stfsux LdStUX // stfsx LdStUX -// sth LdStGeneral -// sthbrx LdStGeneral -// sthu LdStGeneral -// sthux LdStGeneral -// sthx LdStGeneral +// sth LdStStore +// sthbrx LdStStore +// sthu LdStStore +// sthux LdStStore +// sthx LdStStore // stmw LdStLMW // stswi LdStLMW // stswx LdStLMW @@ -337,12 +340,12 @@ include "PPCScheduleG5.td" // stvewx LdStSTVEBX // stvx LdStSTVEBX // stvxl LdStSTVEBX -// stw LdStGeneral -// stwbrx LdStGeneral +// stw LdStStore +// stwbrx LdStStore // stwcx. LdStSTWCX -// stwu LdStGeneral -// stwux LdStGeneral -// stwx LdStGeneral +// stwu LdStStore +// stwux LdStStore +// stwx LdStStore // subf IntGeneral // subfc IntGeneral // subfe IntGeneral |
