diff options
Diffstat (limited to 'contrib/llvm/lib/Target/MSP430')
18 files changed, 98 insertions, 103 deletions
diff --git a/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp b/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp index acf1214..be6d1a8 100644 --- a/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp +++ b/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp @@ -27,7 +27,7 @@ using namespace llvm; #include "MSP430GenAsmWriter.inc" void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O, - StringRef Annot) { + StringRef Annot, const MCSubtargetInfo &STI) { printInstruction(MI, O); printAnnotation(O, Annot); } @@ -39,7 +39,7 @@ void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, O << Op.getImm(); else { assert(Op.isExpr() && "unknown pcrel immediate operand"); - O << *Op.getExpr(); + Op.getExpr()->print(O, &MAI); } } @@ -53,7 +53,8 @@ void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo, O << '#' << Op.getImm(); } else { assert(Op.isExpr() && "unknown operand kind in printOperand"); - O << '#' << *Op.getExpr(); + O << '#'; + Op.getExpr()->print(O, &MAI); } } @@ -75,7 +76,7 @@ void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo, O << '&'; if (Disp.isExpr()) - O << *Disp.getExpr(); + Disp.getExpr()->print(O, &MAI); else { assert(Disp.isImm() && "Expected immediate in displacement field"); O << Disp.getImm(); diff --git a/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h b/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h index 7fae505..70141a9 100644 --- a/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h +++ b/contrib/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h @@ -25,7 +25,8 @@ namespace llvm { const MCRegisterInfo &MRI) : MCInstPrinter(MAI, MII, MRI) {} - void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override; + void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, + const MCSubtargetInfo &STI) override; // Autogenerated by tblgen. void printInstruction(const MCInst *MI, raw_ostream &O); diff --git a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp index df1aa1a..c26b308 100644 --- a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -12,12 +12,11 @@ //===----------------------------------------------------------------------===// #include "MSP430MCAsmInfo.h" -#include "llvm/ADT/StringRef.h" using namespace llvm; void MSP430MCAsmInfo::anchor() { } -MSP430MCAsmInfo::MSP430MCAsmInfo(StringRef TT) { +MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT) { PointerSize = CalleeSaveStackSlotSize = 2; CommentString = ";"; diff --git a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h index 2c9532d..ff5b0b6 100644 --- a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -17,12 +17,12 @@ #include "llvm/MC/MCAsmInfoELF.h" namespace llvm { - class StringRef; + class Triple; class MSP430MCAsmInfo : public MCAsmInfoELF { void anchor() override; public: - explicit MSP430MCAsmInfo(StringRef TT); + explicit MSP430MCAsmInfo(const Triple &TT); }; } // namespace llvm diff --git a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp index 4c70803..6bcfb32 100644 --- a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp +++ b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp @@ -54,16 +54,15 @@ static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) { MCCodeGenInfo *X = new MCCodeGenInfo(); - X->InitMCCodeGenInfo(RM, CM, OL); + X->initMCCodeGenInfo(RM, CM, OL); return X; } -static MCInstPrinter *createMSP430MCInstPrinter(const Target &T, +static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, - const MCRegisterInfo &MRI, - const MCSubtargetInfo &STI) { + const MCRegisterInfo &MRI) { if (SyntaxVariant == 0) return new MSP430InstPrinter(MAI, MII, MRI); return nullptr; diff --git a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h index 586f5d9..241f1d6 100644 --- a/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h +++ b/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h @@ -14,6 +14,8 @@ #ifndef LLVM_LIB_TARGET_MSP430_MCTARGETDESC_MSP430MCTARGETDESC_H #define LLVM_LIB_TARGET_MSP430_MCTARGETDESC_MSP430MCTARGETDESC_H +#include "llvm/Support/DataTypes.h" + namespace llvm { class Target; diff --git a/contrib/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp b/contrib/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp index 22a973e..4342c10a 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp @@ -39,8 +39,8 @@ using namespace llvm; namespace { class MSP430AsmPrinter : public AsmPrinter { public: - MSP430AsmPrinter(TargetMachine &TM, MCStreamer &Streamer) - : AsmPrinter(TM, Streamer) {} + MSP430AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) + : AsmPrinter(TM, std::move(Streamer)) {} const char *getPassName() const override { return "MSP430 Assembly Printer"; @@ -75,7 +75,7 @@ void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, O << MO.getImm(); return; case MachineOperand::MO_MachineBasicBlock: - O << *MO.getMBB()->getSymbol(); + MO.getMBB()->getSymbol()->print(O, MAI); return; case MachineOperand::MO_GlobalAddress: { bool isMemOp = Modifier && !strcmp(Modifier, "mem"); @@ -92,7 +92,7 @@ void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, if (Offset) O << '(' << Offset << '+'; - O << *getSymbol(MO.getGlobal()); + getSymbol(MO.getGlobal())->print(O, MAI); if (Offset) O << ')'; @@ -152,7 +152,7 @@ void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) { MCInst TmpInst; MCInstLowering.Lower(MI, TmpInst); - EmitToStreamer(OutStreamer, TmpInst); + EmitToStreamer(*OutStreamer, TmpInst); } // Force static initialization. diff --git a/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp index d6cb9f6..eb72080 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp @@ -39,8 +39,9 @@ bool MSP430FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const return !MF.getFrameInfo()->hasVarSizedObjects(); } -void MSP430FrameLowering::emitPrologue(MachineFunction &MF) const { - MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB +void MSP430FrameLowering::emitPrologue(MachineFunction &MF, + MachineBasicBlock &MBB) const { + assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); MachineFrameInfo *MFI = MF.getFrameInfo(); MSP430MachineFunctionInfo *MSP430FI = MF.getInfo<MSP430MachineFunctionInfo>(); const MSP430InstrInfo &TII = diff --git a/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.h b/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.h index 1941af2..48c4dc86 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.h +++ b/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.h @@ -27,7 +27,7 @@ public: /// emitProlog/emitEpilog - These methods insert prolog and epilog code into /// the function. - void emitPrologue(MachineFunction &MF) const override; + void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; void eliminateCallFramePseudoInstr(MachineFunction &MF, diff --git a/contrib/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/contrib/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp index 81c176b..5ce5013 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @@ -92,14 +92,9 @@ namespace { /// namespace { class MSP430DAGToDAGISel : public SelectionDAGISel { - const MSP430TargetLowering &Lowering; - const MSP430Subtarget &Subtarget; - public: MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel) - : SelectionDAGISel(TM, OptLevel), - Lowering(*TM.getSubtargetImpl()->getTargetLowering()), - Subtarget(*TM.getSubtargetImpl()) {} + : SelectionDAGISel(TM, OptLevel) {} const char *getPassName() const override { return "MSP430 DAG->DAG Pattern Instruction Selection"; @@ -109,7 +104,7 @@ namespace { bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM); bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM); - bool SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, + bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) override; // Include the pieces autogenerated from the target description. @@ -279,18 +274,18 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue N, Disp = CurDAG->getTargetBlockAddress(AM.BlockAddr, MVT::i32, 0, 0/*AM.SymbolFlags*/); else - Disp = CurDAG->getTargetConstant(AM.Disp, MVT::i16); + Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(N), MVT::i16); return true; } bool MSP430DAGToDAGISel:: -SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, +SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { SDValue Op0, Op1; - switch (ConstraintCode) { + switch (ConstraintID) { default: return true; - case 'm': // memory + case InlineAsm::Constraint_m: // memory if (!SelectAddr(Op, Op0, Op1)) return true; break; @@ -406,10 +401,10 @@ SDNode *MSP430DAGToDAGISel::Select(SDNode *Node) { int FI = cast<FrameIndexSDNode>(Node)->getIndex(); SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16); if (Node->hasOneUse()) - return CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16, - TFI, CurDAG->getTargetConstant(0, MVT::i16)); - return CurDAG->getMachineNode(MSP430::ADD16ri, dl, MVT::i16, - TFI, CurDAG->getTargetConstant(0, MVT::i16)); + return CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16, TFI, + CurDAG->getTargetConstant(0, dl, MVT::i16)); + return CurDAG->getMachineNode(MSP430::ADD16ri, dl, MVT::i16, TFI, + CurDAG->getTargetConstant(0, dl, MVT::i16)); } case ISD::LOAD: if (SDNode *ResNode = SelectIndexedLoad(Node)) diff --git a/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index 04bb6d0..bc51741 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -57,7 +57,8 @@ HWMultMode("msp430-hwmult-mode", cl::Hidden, "Assume hardware multiplier cannot be used inside interrupts"), clEnumValEnd)); -MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM) +MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM, + const MSP430Subtarget &STI) : TargetLowering(TM) { // Set up the register classes. @@ -65,7 +66,7 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM) addRegisterClass(MVT::i16, &MSP430::GR16RegClass); // Compute derived properties from the register classes - computeRegisterProperties(); + computeRegisterProperties(STI.getRegisterInfo()); // Provide all sorts of operation actions @@ -224,10 +225,10 @@ MSP430TargetLowering::getConstraintType(const std::string &Constraint) const { return TargetLowering::getConstraintType(Constraint); } -std::pair<unsigned, const TargetRegisterClass*> -MSP430TargetLowering:: -getRegForInlineAsmConstraint(const std::string &Constraint, - MVT VT) const { +std::pair<unsigned, const TargetRegisterClass *> +MSP430TargetLowering::getRegForInlineAsmConstraint( + const TargetRegisterInfo *TRI, const std::string &Constraint, + MVT VT) const { if (Constraint.size() == 1) { // GCC Constraint Letters switch (Constraint[0]) { @@ -240,7 +241,7 @@ getRegForInlineAsmConstraint(const std::string &Constraint, } } - return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); + return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT); } //===----------------------------------------------------------------------===// @@ -328,7 +329,7 @@ static void AnalyzeArguments(CCState &State, if (!UseStack && Parts <= RegsLeft) { unsigned FirstVal = ValNo; for (unsigned j = 0; j < Parts; j++) { - unsigned Reg = State.AllocateReg(RegList, NbRegs); + unsigned Reg = State.AllocateReg(RegList); State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo)); RegsLeft--; } @@ -592,7 +593,7 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); - Chain = DAG.getCALLSEQ_START(Chain ,DAG.getConstant(NumBytes, + Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes, dl, getPointerTy(), true), dl); @@ -633,17 +634,19 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, - DAG.getIntPtrConstant(VA.getLocMemOffset())); + DAG.getIntPtrConstant(VA.getLocMemOffset(), + dl)); SDValue MemOp; ISD::ArgFlagsTy Flags = Outs[i].Flags; if (Flags.isByVal()) { - SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i16); + SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), dl, MVT::i16); MemOp = DAG.getMemcpy(Chain, dl, PtrOff, Arg, SizeNode, Flags.getByValAlign(), /*isVolatile*/false, /*AlwaysInline=*/true, + /*isTailCall=*/false, MachinePointerInfo(), MachinePointerInfo()); } else { @@ -698,8 +701,9 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, // Create the CALLSEQ_END node. Chain = DAG.getCALLSEQ_END(Chain, - DAG.getConstant(NumBytes, getPointerTy(), true), - DAG.getConstant(0, getPointerTy(), true), + DAG.getConstant(NumBytes, dl, getPointerTy(), + true), + DAG.getConstant(0, dl, getPointerTy(), true), InFlag, dl); InFlag = Chain.getValue(1); @@ -841,7 +845,7 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, // fold constant into instruction. if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) { LHS = RHS; - RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); + RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); TCC = MSP430CC::COND_LO; break; } @@ -854,7 +858,7 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, // fold constant into instruction. if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) { LHS = RHS; - RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); + RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); TCC = MSP430CC::COND_HS; break; } @@ -867,7 +871,7 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, // fold constant into instruction. if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) { LHS = RHS; - RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); + RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); TCC = MSP430CC::COND_L; break; } @@ -880,7 +884,7 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, // fold constant into instruction. if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) { LHS = RHS; - RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); + RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); TCC = MSP430CC::COND_GE; break; } @@ -888,7 +892,7 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, break; } - TargetCC = DAG.getConstant(TCC, MVT::i8); + TargetCC = DAG.getConstant(TCC, dl, MVT::i8); return DAG.getNode(MSP430ISD::CMP, dl, MVT::Glue, LHS, RHS); } @@ -965,7 +969,7 @@ SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { break; } EVT VT = Op.getValueType(); - SDValue One = DAG.getConstant(1, VT); + SDValue One = DAG.getConstant(1, dl, VT); if (Convert) { SDValue SR = DAG.getCopyFromReg(DAG.getEntryNode(), dl, MSP430::SR, MVT::i16, Flag); @@ -977,13 +981,9 @@ SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { SR = DAG.getNode(ISD::XOR, dl, MVT::i16, SR, One); return SR; } else { - SDValue Zero = DAG.getConstant(0, VT); + SDValue Zero = DAG.getConstant(0, dl, VT); SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Glue); - SmallVector<SDValue, 4> Ops; - Ops.push_back(One); - Ops.push_back(Zero); - Ops.push_back(TargetCC); - Ops.push_back(Flag); + SDValue Ops[] = {One, Zero, TargetCC, Flag}; return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops); } } @@ -1001,11 +1001,7 @@ SDValue MSP430TargetLowering::LowerSELECT_CC(SDValue Op, SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG); SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Glue); - SmallVector<SDValue, 4> Ops; - Ops.push_back(TrueV); - Ops.push_back(FalseV); - Ops.push_back(TargetCC); - Ops.push_back(Flag); + SDValue Ops[] = {TrueV, FalseV, TargetCC, Flag}; return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops); } @@ -1054,7 +1050,7 @@ SDValue MSP430TargetLowering::LowerRETURNADDR(SDValue Op, if (Depth > 0) { SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); SDValue Offset = - DAG.getConstant(getDataLayout()->getPointerSize(), MVT::i16); + DAG.getConstant(getDataLayout()->getPointerSize(), dl, MVT::i16); return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), DAG.getNode(ISD::ADD, dl, getPointerTy(), FrameAddr, Offset), @@ -1135,7 +1131,7 @@ bool MSP430TargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op, return false; Base = Op->getOperand(0); - Offset = DAG.getConstant(RHSC, VT); + Offset = DAG.getConstant(RHSC, SDLoc(N), VT); AM = ISD::POST_INC; return true; } @@ -1145,8 +1141,8 @@ bool MSP430TargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op, const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const { - switch (Opcode) { - default: return nullptr; + switch ((MSP430ISD::NodeType)Opcode) { + case MSP430ISD::FIRST_NUMBER: break; case MSP430ISD::RET_FLAG: return "MSP430ISD::RET_FLAG"; case MSP430ISD::RETI_FLAG: return "MSP430ISD::RETI_FLAG"; case MSP430ISD::RRA: return "MSP430ISD::RRA"; @@ -1156,10 +1152,13 @@ const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const { case MSP430ISD::Wrapper: return "MSP430ISD::Wrapper"; case MSP430ISD::BR_CC: return "MSP430ISD::BR_CC"; case MSP430ISD::CMP: return "MSP430ISD::CMP"; + case MSP430ISD::SETCC: return "MSP430ISD::SETCC"; case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC"; case MSP430ISD::SHL: return "MSP430ISD::SHL"; case MSP430ISD::SRA: return "MSP430ISD::SRA"; + case MSP430ISD::SRL: return "MSP430ISD::SRL"; } + return nullptr; } bool MSP430TargetLowering::isTruncateFree(Type *Ty1, @@ -1201,8 +1200,7 @@ MSP430TargetLowering::EmitShiftInstr(MachineInstr *MI, MachineFunction *F = BB->getParent(); MachineRegisterInfo &RI = F->getRegInfo(); DebugLoc dl = MI->getDebugLoc(); - const TargetInstrInfo &TII = - *getTargetMachine().getSubtargetImpl()->getInstrInfo(); + const TargetInstrInfo &TII = *F->getSubtarget().getInstrInfo(); unsigned Opc; const TargetRegisterClass * RC; @@ -1313,8 +1311,7 @@ MSP430TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, Opc == MSP430::Srl8 || Opc == MSP430::Srl16) return EmitShiftInstr(MI, BB); - const TargetInstrInfo &TII = - *getTargetMachine().getSubtargetImpl()->getInstrInfo(); + const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo(); DebugLoc dl = MI->getDebugLoc(); assert((Opc == MSP430::Select16 || Opc == MSP430::Select8) && diff --git a/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h index 073ddc9..80d3ae1 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h +++ b/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h @@ -21,7 +21,7 @@ namespace llvm { namespace MSP430ISD { - enum { + enum NodeType : unsigned { FIRST_NUMBER = ISD::BUILTIN_OP_END, /// Return with a flag operand. Operand 0 is the chain operand. @@ -66,9 +66,11 @@ namespace llvm { }; } + class MSP430Subtarget; class MSP430TargetLowering : public TargetLowering { public: - explicit MSP430TargetLowering(const TargetMachine &TM); + explicit MSP430TargetLowering(const TargetMachine &TM, + const MSP430Subtarget &STI); MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i8; } @@ -95,8 +97,9 @@ namespace llvm { TargetLowering::ConstraintType getConstraintType(const std::string &Constraint) const override; - std::pair<unsigned, const TargetRegisterClass*> - getRegForInlineAsmConstraint(const std::string &Constraint, + std::pair<unsigned, const TargetRegisterClass *> + getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, + const std::string &Constraint, MVT VT) const override; /// isTruncateFree - Return true if it's free to truncate a value of type diff --git a/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp b/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp index 77b91b7..54154a8 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp @@ -26,7 +26,6 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetSubtargetInfo.h" using namespace llvm; MCSymbol *MSP430MCInstLower:: @@ -51,7 +50,7 @@ GetExternalSymbolSymbol(const MachineOperand &MO) const { MCSymbol *MSP430MCInstLower:: GetJumpTableSymbol(const MachineOperand &MO) const { - const DataLayout *DL = Printer.TM.getSubtargetImpl()->getDataLayout(); + const DataLayout *DL = Printer.TM.getDataLayout(); SmallString<256> Name; raw_svector_ostream(Name) << DL->getPrivateGlobalPrefix() << "JTI" << Printer.getFunctionNumber() << '_' @@ -63,12 +62,12 @@ GetJumpTableSymbol(const MachineOperand &MO) const { } // Create a symbol for the name. - return Ctx.GetOrCreateSymbol(Name.str()); + return Ctx.getOrCreateSymbol(Name); } MCSymbol *MSP430MCInstLower:: GetConstantPoolIndexSymbol(const MachineOperand &MO) const { - const DataLayout *DL = Printer.TM.getSubtargetImpl()->getDataLayout(); + const DataLayout *DL = Printer.TM.getDataLayout(); SmallString<256> Name; raw_svector_ostream(Name) << DL->getPrivateGlobalPrefix() << "CPI" << Printer.getFunctionNumber() << '_' @@ -80,7 +79,7 @@ GetConstantPoolIndexSymbol(const MachineOperand &MO) const { } // Create a symbol for the name. - return Ctx.GetOrCreateSymbol(Name.str()); + return Ctx.getOrCreateSymbol(Name); } MCSymbol *MSP430MCInstLower:: @@ -97,7 +96,7 @@ MCOperand MSP430MCInstLower:: LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const { // FIXME: We would like an efficient form for this, so we don't have to do a // lot of extra uniquing. - const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx); + const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx); switch (MO.getTargetFlags()) { default: llvm_unreachable("Unknown target flag on GV operand"); @@ -105,10 +104,10 @@ LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const { } if (!MO.isJTI() && MO.getOffset()) - Expr = MCBinaryExpr::CreateAdd(Expr, - MCConstantExpr::Create(MO.getOffset(), Ctx), + Expr = MCBinaryExpr::createAdd(Expr, + MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); - return MCOperand::CreateExpr(Expr); + return MCOperand::createExpr(Expr); } void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { @@ -125,13 +124,13 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; - MCOp = MCOperand::CreateReg(MO.getReg()); + MCOp = MCOperand::createReg(MO.getReg()); break; case MachineOperand::MO_Immediate: - MCOp = MCOperand::CreateImm(MO.getImm()); + MCOp = MCOperand::createImm(MO.getImm()); break; case MachineOperand::MO_MachineBasicBlock: - MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( + MCOp = MCOperand::createExpr(MCSymbolRefExpr::create( MO.getMBB()->getSymbol(), Ctx)); break; case MachineOperand::MO_GlobalAddress: diff --git a/contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.h b/contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.h index 3f88a69..0cfa4a4 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.h @@ -26,8 +26,7 @@ public: MSP430RegisterInfo(); /// Code Generation virtual methods... - const MCPhysReg * - getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; BitVector getReservedRegs(const MachineFunction &MF) const override; const TargetRegisterClass* diff --git a/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.cpp b/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.cpp index cb83b92..3dda3bf 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.cpp @@ -25,15 +25,14 @@ using namespace llvm; void MSP430Subtarget::anchor() { } -MSP430Subtarget &MSP430Subtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { +MSP430Subtarget & +MSP430Subtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { ParseSubtargetFeatures("generic", FS); return *this; } MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) - : MSP430GenSubtargetInfo(TT, CPU, FS), - // FIXME: Check DataLayout string. - DL("e-m:e-p:16:16-i32:16:32-a:16-n8:16"), FrameLowering(), - InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM), - TSInfo(DL) {} + : MSP430GenSubtargetInfo(TT, CPU, FS), FrameLowering(), + InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), + TSInfo(*TM.getDataLayout()) {} diff --git a/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h b/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h index 58eb07b..30d46d3 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h +++ b/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h @@ -32,7 +32,6 @@ class StringRef; class MSP430Subtarget : public MSP430GenSubtargetInfo { virtual void anchor(); bool ExtendedInsts; - const DataLayout DL; // Calculates type size & alignment MSP430FrameLowering FrameLowering; MSP430InstrInfo InstrInfo; MSP430TargetLowering TLInfo; @@ -55,7 +54,6 @@ public: return &FrameLowering; } const MSP430InstrInfo *getInstrInfo() const override { return &InstrInfo; } - const DataLayout *getDataLayout() const override { return &DL; } const TargetRegisterInfo *getRegisterInfo() const override { return &InstrInfo.getRegisterInfo(); } diff --git a/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp index 66e7503..d6cc4ae 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -15,8 +15,8 @@ #include "MSP430.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/IR/LegacyPassManager.h" #include "llvm/MC/MCAsmInfo.h" -#include "llvm/PassManager.h" #include "llvm/Support/TargetRegistry.h" using namespace llvm; @@ -30,8 +30,10 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, StringRef TT, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), + : LLVMTargetMachine(T, "e-m:e-p:16:16-i32:16:32-a:16-n8:16", TT, CPU, FS, + Options, RM, CM, OL), TLOF(make_unique<TargetLoweringObjectFileELF>()), + // FIXME: Check DataLayout string. Subtarget(TT, CPU, FS, *this) { initAsmInfo(); } diff --git a/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h b/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h index 0e54ed6..6ccd30d 100644 --- a/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h +++ b/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h @@ -34,7 +34,7 @@ public: CodeGenOpt::Level OL); ~MSP430TargetMachine() override; - const MSP430Subtarget *getSubtargetImpl() const override { + const MSP430Subtarget *getSubtargetImpl(const Function &F) const override { return &Subtarget; } TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
