diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h')
| -rw-r--r-- | contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h | 154 |
1 files changed, 132 insertions, 22 deletions
diff --git a/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h b/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h index 082c80d..09f305f 100644 --- a/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h +++ b/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h @@ -1,4 +1,4 @@ -//===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===// +//===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===// // // The LLVM Compiler Infrastructure // @@ -15,20 +15,47 @@ #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H #include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrInfo.h" - -#include <bitset> namespace llvm { +class MCContext; class MCInstrDesc; class MCInstrInfo; class MCInst; class MCOperand; +class MCSubtargetInfo; namespace HexagonII { enum class MemAccessSize; } +class DuplexCandidate { +public: + unsigned packetIndexI, packetIndexJ, iClass; + DuplexCandidate(unsigned i, unsigned j, unsigned iClass) + : packetIndexI(i), packetIndexJ(j), iClass(iClass) {} +}; namespace HexagonMCInstrInfo { -void AppendImplicitOperands(MCInst &MCI); +size_t const innerLoopOffset = 0; +int64_t const innerLoopMask = 1 << innerLoopOffset; + +size_t const outerLoopOffset = 1; +int64_t const outerLoopMask = 1 << outerLoopOffset; + +size_t const bundleInstructionsOffset = 1; + +// Returns the number of instructions in the bundle +size_t bundleSize(MCInst const &MCI); + +// Returns a iterator range of instructions in this bundle +iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI); + +// Return the extender for instruction at Index or nullptr if none +MCInst const *extenderForIndex(MCInst const &MCB, size_t Index); + +// Create a duplex instruction given the two subinsts +MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, + MCInst const &inst1); + +// Convert this instruction in to a duplex subinst +MCInst deriveSubInst(MCInst const &Inst); // Return memory access size HexagonII::MemAccessSize getAccessSize(MCInstrInfo const &MCII, @@ -42,14 +69,26 @@ unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI); MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI); +// Return which duplex group this instruction belongs to +unsigned getDuplexCandidateGroup(MCInst const &MI); + +// Return a list of all possible instruction duplex combinations +SmallVector<DuplexCandidate, 8> getDuplexPossibilties(MCInstrInfo const &MCII, + MCInst const &MCB); + +// Return the index of the extendable operand +unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI); + +// Return a reference to the extendable operand +MCOperand const &getExtendableOperand(MCInstrInfo const &MCII, + MCInst const &MCI); + // Return the implicit alignment of the extendable operand unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI); // Return the number of logical bits of the extendable operand unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI); -std::bitset<16> GetImplicitBits(MCInst const &MCI); - // Return the max value that a constant extendable operand can have // without being extended. int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI); @@ -61,27 +100,77 @@ int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI); // Return instruction name char const *getName(MCInstrInfo const &MCII, MCInst const &MCI); +// Return the operand index for the new value. +unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI); + // Return the operand that consumes or produces a new value. -MCOperand const &getNewValue(MCInstrInfo const &MCII, MCInst const &MCI); +MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI); + +int getSubTarget(MCInstrInfo const &MCII, MCInst const &MCI); // Return the Hexagon ISA class for the insn. unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI); +/// Return the slots used by the insn. +unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, + MCInst const &MCI); + +// Does the packet have an extender for the instruction at Index +bool hasExtenderForIndex(MCInst const &MCB, size_t Index); + +bool hasImmExt(MCInst const &MCI); + // Return whether the instruction is a legal new-value producer. bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI); +// Return the instruction at Index +MCInst const &instruction(MCInst const &MCB, size_t Index); + +// Returns whether this MCInst is a wellformed bundle +bool isBundle(MCInst const &MCI); + // Return whether the insn is an actual insn. bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI); +// Return the duplex iclass given the two duplex classes +unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb); + // Return whether the instruction needs to be constant extended. bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI); +// Is this double register suitable for use in a duplex subinst +bool isDblRegForSubInst(unsigned Reg); + +// Is this a duplex instruction +bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI); + +// Can these instructions be duplexed +bool isDuplexPair(MCInst const &MIa, MCInst const &MIb); + +// Can these duplex classes be combine in to a duplex instruction +bool isDuplexPairMatch(unsigned Ga, unsigned Gb); + // Return true if the insn may be extended based on the operand value. bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI); // Return whether the instruction must be always extended. bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI); +/// Return whether it is a floating-point insn. +bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI); + +// Returns whether this instruction is an immediate extender +bool isImmext(MCInst const &MCI); + +// Returns whether this bundle is an endloop0 +bool isInnerLoop(MCInst const &MCI); + +// Is this an integer register +bool isIntReg(unsigned Reg); + +// Is this register suitable for use in a duplex subinst +bool isIntRegForSubInst(unsigned Reg); + // Return whether the insn is a new-value consumer. bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI); @@ -89,9 +178,22 @@ bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI); bool isOperandExtended(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short OperandNum); -bool isPacketBegin(MCInst const &MCI); +// Can these two instructions be duplexed +bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa, + bool ExtendedA, MCInst const &MIb, bool ExtendedB, + bool bisReversable); + +// Returns whether this bundle is an endloop1 +bool isOuterLoop(MCInst const &MCI); + +// Return whether this instruction is predicated +bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI); + +// Return whether the predicate sense is true +bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI); -bool isPacketEnd(MCInst const &MCI); +// Is this a predicate register +bool isPredReg(unsigned Reg); // Return whether the insn is a prefix. bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI); @@ -99,23 +201,31 @@ bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI); // Return whether the insn is solo, i.e., cannot be in a packet. bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI); -static const size_t packetBeginIndex = 0; -static const size_t packetEndIndex = 1; +/// Return whether the insn can be packaged only with A and X-type insns. +bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI); -void resetPacket(MCInst &MCI); +/// Return whether the insn can be packaged only with an A-type insn in slot #1. +bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI); -inline void SanityCheckImplicitOperands(MCInst const &MCI) { - assert(MCI.getNumOperands() >= 2 && "At least the two implicit operands"); - assert(MCI.getOperand(MCI.getNumOperands() - 1).isInst() && - "Implicit bits and flags"); - assert(MCI.getOperand(MCI.getNumOperands() - 2).isImm() && "Parent pointer"); -} +// Pad the bundle with nops to satisfy endloop requirements +void padEndloop(MCInst &MCI); + +bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI); + +// Replace the instructions inside MCB, represented by Candidate +void replaceDuplex(MCContext &Context, MCInst &MCB, DuplexCandidate Candidate); + +// Marks a bundle as endloop0 +void setInnerLoop(MCInst &MCI); -void SetImplicitBits(MCInst &MCI, std::bitset<16> Bits); +// Marks a bundle as endloop1 +void setOuterLoop(MCInst &MCI); -void setPacketBegin(MCInst &MCI, bool Y); +// Would duplexing this instruction create a requirement to extend +bool subInstWouldBeExtended(MCInst const &potentialDuplex); -void setPacketEnd(MCInst &MCI, bool Y); +// Attempt to find and replace compound pairs +void tryCompound(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI); } } |
