diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Alpha')
16 files changed, 297 insertions, 796 deletions
diff --git a/contrib/llvm/lib/Target/Alpha/Alpha.h b/contrib/llvm/lib/Target/Alpha/Alpha.h index 5cf4866..2c359da 100644 --- a/contrib/llvm/lib/Target/Alpha/Alpha.h +++ b/contrib/llvm/lib/Target/Alpha/Alpha.h @@ -18,6 +18,13 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { + namespace Alpha { + // These describe LDAx + + static const int IMM_LOW = -32768; + static const int IMM_HIGH = 32767; + static const int IMM_MULT = 65536; + } class AlphaTargetMachine; class FunctionPass; diff --git a/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp index 5428cb9..46ae286 100644 --- a/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp @@ -91,7 +91,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, raw_ostream &O) { return; case MachineOperand::MO_Immediate: - llvm_unreachable("printOp() does not handle immediate values"); + assert(0 && "printOp() does not handle immediate values"); return; case MachineOperand::MO_MachineBasicBlock: diff --git a/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp b/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp deleted file mode 100644 index 3aec070..0000000 --- a/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ /dev/null @@ -1,222 +0,0 @@ -//===-- Alpha/AlphaCodeEmitter.cpp - Convert Alpha code to machine code ---===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the pass that transforms the Alpha machine instructions -// into relocatable machine code. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "alpha-emitter" -#include "AlphaTargetMachine.h" -#include "AlphaRelocations.h" -#include "Alpha.h" -#include "llvm/PassManager.h" -#include "llvm/CodeGen/JITCodeEmitter.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Function.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/raw_ostream.h" -using namespace llvm; - -namespace { - class AlphaCodeEmitter : public MachineFunctionPass { - JITCodeEmitter &MCE; - const AlphaInstrInfo *II; - public: - static char ID; - - AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(ID), - MCE(mce) {} - - /// getBinaryCodeForInstr - This function, generated by the - /// CodeEmitterGenerator using TableGen, produces the binary encoding for - /// machine instructions. - - unsigned getBinaryCodeForInstr(const MachineInstr &MI); - - /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr - - unsigned getMachineOpValue(const MachineInstr &MI, - const MachineOperand &MO); - - bool runOnMachineFunction(MachineFunction &MF); - - virtual const char *getPassName() const { - return "Alpha Machine Code Emitter"; - } - - private: - void emitBasicBlock(MachineBasicBlock &MBB); - }; -} - -char AlphaCodeEmitter::ID = 0; - - -/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha -/// code to the specified MCE object. - -FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM, - JITCodeEmitter &JCE) { - return new AlphaCodeEmitter(JCE); -} - -bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) { - II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo(); - - do { - MCE.startFunction(MF); - for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) - emitBasicBlock(*I); - } while (MCE.finishFunction(MF)); - - return false; -} - -void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { - MCE.StartMachineBasicBlock(&MBB); - for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); - I != E; ++I) { - const MachineInstr &MI = *I; - MCE.processDebugLoc(MI.getDebugLoc(), true); - switch(MI.getOpcode()) { - default: - MCE.emitWordLE(getBinaryCodeForInstr(*I)); - break; - case Alpha::ALTENT: - case Alpha::PCLABEL: - case Alpha::MEMLABEL: - case TargetOpcode::IMPLICIT_DEF: - case TargetOpcode::KILL: - break; //skip these - } - MCE.processDebugLoc(MI.getDebugLoc(), false); - } -} - -static unsigned getAlphaRegNumber(unsigned Reg) { - switch (Reg) { - case Alpha::R0 : case Alpha::F0 : return 0; - case Alpha::R1 : case Alpha::F1 : return 1; - case Alpha::R2 : case Alpha::F2 : return 2; - case Alpha::R3 : case Alpha::F3 : return 3; - case Alpha::R4 : case Alpha::F4 : return 4; - case Alpha::R5 : case Alpha::F5 : return 5; - case Alpha::R6 : case Alpha::F6 : return 6; - case Alpha::R7 : case Alpha::F7 : return 7; - case Alpha::R8 : case Alpha::F8 : return 8; - case Alpha::R9 : case Alpha::F9 : return 9; - case Alpha::R10 : case Alpha::F10 : return 10; - case Alpha::R11 : case Alpha::F11 : return 11; - case Alpha::R12 : case Alpha::F12 : return 12; - case Alpha::R13 : case Alpha::F13 : return 13; - case Alpha::R14 : case Alpha::F14 : return 14; - case Alpha::R15 : case Alpha::F15 : return 15; - case Alpha::R16 : case Alpha::F16 : return 16; - case Alpha::R17 : case Alpha::F17 : return 17; - case Alpha::R18 : case Alpha::F18 : return 18; - case Alpha::R19 : case Alpha::F19 : return 19; - case Alpha::R20 : case Alpha::F20 : return 20; - case Alpha::R21 : case Alpha::F21 : return 21; - case Alpha::R22 : case Alpha::F22 : return 22; - case Alpha::R23 : case Alpha::F23 : return 23; - case Alpha::R24 : case Alpha::F24 : return 24; - case Alpha::R25 : case Alpha::F25 : return 25; - case Alpha::R26 : case Alpha::F26 : return 26; - case Alpha::R27 : case Alpha::F27 : return 27; - case Alpha::R28 : case Alpha::F28 : return 28; - case Alpha::R29 : case Alpha::F29 : return 29; - case Alpha::R30 : case Alpha::F30 : return 30; - case Alpha::R31 : case Alpha::F31 : return 31; - default: - llvm_unreachable("Unhandled reg"); - } -} - -unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI, - const MachineOperand &MO) { - - unsigned rv = 0; // Return value; defaults to 0 for unhandled cases - // or things that get fixed up later by the JIT. - - if (MO.isReg()) { - rv = getAlphaRegNumber(MO.getReg()); - } else if (MO.isImm()) { - rv = MO.getImm(); - } else if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) { - DEBUG(errs() << MO << " is a relocated op for " << MI << "\n"); - unsigned Reloc = 0; - int Offset = 0; - bool useGOT = false; - switch (MI.getOpcode()) { - case Alpha::BSR: - Reloc = Alpha::reloc_bsr; - break; - case Alpha::LDLr: - case Alpha::LDQr: - case Alpha::LDBUr: - case Alpha::LDWUr: - case Alpha::LDSr: - case Alpha::LDTr: - case Alpha::LDAr: - case Alpha::STQr: - case Alpha::STLr: - case Alpha::STWr: - case Alpha::STBr: - case Alpha::STSr: - case Alpha::STTr: - Reloc = Alpha::reloc_gprellow; - break; - case Alpha::LDAHr: - Reloc = Alpha::reloc_gprelhigh; - break; - case Alpha::LDQl: - Reloc = Alpha::reloc_literal; - useGOT = true; - break; - case Alpha::LDAg: - case Alpha::LDAHg: - Reloc = Alpha::reloc_gpdist; - Offset = MI.getOperand(3).getImm(); - break; - default: - llvm_unreachable("unknown relocatable instruction"); - } - if (MO.isGlobal()) - MCE.addRelocation(MachineRelocation::getGV( - MCE.getCurrentPCOffset(), - Reloc, - const_cast<GlobalValue *>(MO.getGlobal()), - Offset, - isa<Function>(MO.getGlobal()), - useGOT)); - else if (MO.isSymbol()) - MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), - Reloc, MO.getSymbolName(), - Offset, true)); - else - MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), - Reloc, MO.getIndex(), Offset)); - } else if (MO.isMBB()) { - MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), - Alpha::reloc_bsr, MO.getMBB())); - } else { -#ifndef NDEBUG - errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n"; -#endif - llvm_unreachable(0); - } - - return rv; -} - -#include "AlphaGenCodeEmitter.inc" diff --git a/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp b/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp new file mode 100644 index 0000000..690cd1d --- /dev/null +++ b/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp @@ -0,0 +1,143 @@ +//=====- AlphaFrameLowering.cpp - Alpha Frame Information ------*- C++ -*-====// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the Alpha implementation of TargetFrameLowering class. +// +//===----------------------------------------------------------------------===// + +#include "AlphaFrameLowering.h" +#include "AlphaInstrInfo.h" +#include "AlphaMachineFunctionInfo.h" +#include "llvm/Function.h" +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/ADT/Twine.h" + +using namespace llvm; + +static long getUpper16(long l) { + long y = l / Alpha::IMM_MULT; + if (l % Alpha::IMM_MULT > Alpha::IMM_HIGH) + ++y; + return y; +} + +static long getLower16(long l) { + long h = getUpper16(l); + return l - h * Alpha::IMM_MULT; +} + +// hasFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +// +bool AlphaFrameLowering::hasFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + return MFI->hasVarSizedObjects(); +} + +void AlphaFrameLowering::emitPrologue(MachineFunction &MF) const { + MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB + MachineBasicBlock::iterator MBBI = MBB.begin(); + MachineFrameInfo *MFI = MF.getFrameInfo(); + const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); + + DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc()); + bool FP = hasFP(MF); + + // Handle GOP offset + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29) + .addGlobalAddress(MF.getFunction()).addReg(Alpha::R27).addImm(++curgpdist); + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29) + .addGlobalAddress(MF.getFunction()).addReg(Alpha::R29).addImm(curgpdist); + + BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT)) + .addGlobalAddress(MF.getFunction()); + + // Get the number of bytes to allocate from the FrameInfo + long NumBytes = MFI->getStackSize(); + + if (FP) + NumBytes += 8; //reserve space for the old FP + + // Do we need to allocate space on the stack? + if (NumBytes == 0) return; + + unsigned Align = getStackAlignment(); + NumBytes = (NumBytes+Align-1)/Align*Align; + + // Update frame info to pretend that this is part of the stack... + MFI->setStackSize(NumBytes); + + // adjust stack pointer: r30 -= numbytes + NumBytes = -NumBytes; + if (NumBytes >= Alpha::IMM_LOW) { + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes) + .addReg(Alpha::R30); + } else if (getUpper16(NumBytes) >= Alpha::IMM_LOW) { + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30) + .addImm(getUpper16(NumBytes)).addReg(Alpha::R30); + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30) + .addImm(getLower16(NumBytes)).addReg(Alpha::R30); + } else { + report_fatal_error("Too big a stack frame at " + Twine(NumBytes)); + } + + // Now if we need to, save the old FP and set the new + if (FP) { + BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ)) + .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30); + // This must be the last instr in the prolog + BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15) + .addReg(Alpha::R30).addReg(Alpha::R30); + } + +} + +void AlphaFrameLowering::emitEpilogue(MachineFunction &MF, + MachineBasicBlock &MBB) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); + MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); + const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); + + assert((MBBI->getOpcode() == Alpha::RETDAG || + MBBI->getOpcode() == Alpha::RETDAGp) + && "Can only insert epilog into returning blocks"); + DebugLoc dl = MBBI->getDebugLoc(); + + bool FP = hasFP(MF); + + // Get the number of bytes allocated from the FrameInfo... + long NumBytes = MFI->getStackSize(); + + //now if we need to, restore the old FP + if (FP) { + //copy the FP into the SP (discards allocas) + BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R30).addReg(Alpha::R15) + .addReg(Alpha::R15); + //restore the FP + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDQ), Alpha::R15) + .addImm(0).addReg(Alpha::R15); + } + + if (NumBytes != 0) { + if (NumBytes <= Alpha::IMM_HIGH) { + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes) + .addReg(Alpha::R30); + } else if (getUpper16(NumBytes) <= Alpha::IMM_HIGH) { + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30) + .addImm(getUpper16(NumBytes)).addReg(Alpha::R30); + BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30) + .addImm(getLower16(NumBytes)).addReg(Alpha::R30); + } else { + report_fatal_error("Too big a stack frame at " + Twine(NumBytes)); + } + } +} diff --git a/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.h b/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.h new file mode 100644 index 0000000..ebd9e1b --- /dev/null +++ b/contrib/llvm/lib/Target/Alpha/AlphaFrameLowering.h @@ -0,0 +1,43 @@ +//==-- AlphaFrameLowering.h - Define frame lowering for Alpha --*- C++ -*---==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// +// +//===----------------------------------------------------------------------===// + +#ifndef ALPHA_FRAMEINFO_H +#define ALPHA_FRAMEINFO_H + +#include "Alpha.h" +#include "AlphaSubtarget.h" +#include "llvm/Target/TargetFrameLowering.h" + +namespace llvm { + class AlphaSubtarget; + +class AlphaFrameLowering : public TargetFrameLowering { + const AlphaSubtarget &STI; + // FIXME: This should end in MachineFunctionInfo, not here! + mutable int curgpdist; +public: + explicit AlphaFrameLowering(const AlphaSubtarget &sti) + : TargetFrameLowering(StackGrowsDown, 16, 0), STI(sti), curgpdist(0) { + } + + /// emitProlog/emitEpilog - These methods insert prolog and epilog code into + /// the function. + void emitPrologue(MachineFunction &MF) const; + void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; + + bool hasFP(const MachineFunction &MF) const; +}; + +} // End llvm namespace + +#endif diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index d197bd1..7b91fea 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -130,19 +130,6 @@ namespace { return (x - y) == r; } - static bool isFPZ(SDValue N) { - ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N); - return (CN && (CN->getValueAPF().isZero())); - } - static bool isFPZn(SDValue N) { - ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N); - return (CN && CN->getValueAPF().isNegZero()); - } - static bool isFPZp(SDValue N) { - ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N); - return (CN && CN->getValueAPF().isPosZero()); - } - public: explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM) : SelectionDAGISel(TM) @@ -253,7 +240,7 @@ SDNode *AlphaDAGToDAGISel::Select(SDNode *N) { Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R27, N0, Chain.getValue(1)); SDNode *CNode = - CurDAG->getMachineNode(Alpha::JSRs, dl, MVT::Other, MVT::Flag, + CurDAG->getMachineNode(Alpha::JSRs, dl, MVT::Other, MVT::Glue, Chain, Chain.getValue(1)); Chain = CurDAG->getCopyFromReg(Chain, dl, Alpha::R27, MVT::i64, SDValue(CNode, 1)); @@ -416,13 +403,13 @@ void AlphaDAGToDAGISel::SelectCALL(SDNode *N) { Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R29, GOT, InFlag); InFlag = Chain.getValue(1); Chain = SDValue(CurDAG->getMachineNode(Alpha::BSR, dl, MVT::Other, - MVT::Flag, Addr.getOperand(0), + MVT::Glue, Addr.getOperand(0), Chain, InFlag), 0); } else { Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R27, Addr, InFlag); InFlag = Chain.getValue(1); Chain = SDValue(CurDAG->getMachineNode(Alpha::JSR, dl, MVT::Other, - MVT::Flag, Chain, InFlag), 0); + MVT::Glue, Chain, InFlag), 0); } InFlag = Chain.getValue(1); diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index ea78bf3..9137d65 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -27,6 +27,7 @@ #include "llvm/Function.h" #include "llvm/Module.h" #include "llvm/Intrinsics.h" +#include "llvm/Type.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" @@ -124,7 +125,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setOperationAction(ISD::SETCC, MVT::f32, Promote); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Promote); + setOperationAction(ISD::BITCAST, MVT::f32, Promote); setOperationAction(ISD::EH_LABEL, MVT::Other, Expand); @@ -284,8 +285,7 @@ AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee, DAG.getIntPtrConstant(VA.getLocMemOffset())); MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, - PseudoSourceValue::getStack(), 0, - false, false, 0)); + MachinePointerInfo(),false, false, 0)); } } @@ -306,7 +306,7 @@ AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee, } // Returns a chain & a flag for retval copy to use. - SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); + SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); SmallVector<SDValue, 8> Ops; Ops.push_back(Chain); Ops.push_back(Callee); @@ -431,7 +431,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain, // Create the SelectionDAG nodes corresponding to a load //from this parameter SDValue FIN = DAG.getFrameIndex(FI, MVT::i64); - ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0, + ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, MachinePointerInfo(), false, false, 0); } InVals.push_back(ArgVal); @@ -448,7 +448,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain, int FI = MFI->CreateFixedObject(8, -8 * (6 - i), true); if (i == 0) FuncInfo->setVarArgsBase(FI); SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64); - LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0, + LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, MachinePointerInfo(), false, false, 0)); if (TargetRegisterInfo::isPhysicalRegister(args_float[i])) @@ -456,7 +456,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain, argt = DAG.getCopyFromReg(Chain, dl, args_float[i], MVT::f64); FI = MFI->CreateFixedObject(8, - 8 * (12 - i), true); SDFI = DAG.getFrameIndex(FI, MVT::i64); - LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0, + LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, MachinePointerInfo(), false, false, 0)); } @@ -537,12 +537,14 @@ void AlphaTargetLowering::LowerVAARG(SDNode *N, SDValue &Chain, const Value *VAListS = cast<SrcValueSDNode>(N->getOperand(2))->getValue(); DebugLoc dl = N->getDebugLoc(); - SDValue Base = DAG.getLoad(MVT::i64, dl, Chain, VAListP, VAListS, 0, + SDValue Base = DAG.getLoad(MVT::i64, dl, Chain, VAListP, + MachinePointerInfo(VAListS), false, false, 0); SDValue Tmp = DAG.getNode(ISD::ADD, dl, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); - SDValue Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, dl, Base.getValue(1), - Tmp, NULL, 0, MVT::i32, false, false, 0); + SDValue Offset = DAG.getExtLoad(ISD::SEXTLOAD, dl, MVT::i64, Base.getValue(1), + Tmp, MachinePointerInfo(), + MVT::i32, false, false, 0); DataPtr = DAG.getNode(ISD::ADD, dl, MVT::i64, Base, Offset); if (N->getValueType(0).isFloatingPoint()) { @@ -556,7 +558,8 @@ void AlphaTargetLowering::LowerVAARG(SDNode *N, SDValue &Chain, SDValue NewOffset = DAG.getNode(ISD::ADD, dl, MVT::i64, Offset, DAG.getConstant(8, MVT::i64)); - Chain = DAG.getTruncStore(Offset.getValue(1), dl, NewOffset, Tmp, NULL, 0, + Chain = DAG.getTruncStore(Offset.getValue(1), dl, NewOffset, Tmp, + MachinePointerInfo(), MVT::i32, false, false, 0); } @@ -613,7 +616,7 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, "Unhandled SINT_TO_FP type in custom expander!"); SDValue LD; bool isDouble = Op.getValueType() == MVT::f64; - LD = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op.getOperand(0)); + LD = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op.getOperand(0)); SDValue FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_, dl, isDouble?MVT::f64:MVT::f32, LD); return FP; @@ -627,7 +630,7 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, src = DAG.getNode(AlphaISD::CVTTQ_, dl, MVT::f64, src); - return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, src); + return DAG.getNode(ISD::BITCAST, dl, MVT::i64, src); } case ISD::ConstantPool: { ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); @@ -645,11 +648,11 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, case ISD::GlobalAddress: { GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op); const GlobalValue *GV = GSDN->getGlobal(); - SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i64, + SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i64, GSDN->getOffset()); // FIXME there isn't really any debug info here - // if (!GV->hasWeakLinkage() && !GV->isDeclaration() + // if (!GV->hasWeakLinkage() && !GV->isDeclaration() // && !GV->hasLinkOnceLinkage()) { if (GV->hasLocalLinkage()) { SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, GA, @@ -706,10 +709,11 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, SDValue Result; if (Op.getValueType() == MVT::i32) - Result = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, dl, Chain, DataPtr, - NULL, 0, MVT::i32, false, false, 0); + Result = DAG.getExtLoad(ISD::SEXTLOAD, dl, MVT::i64, Chain, DataPtr, + MachinePointerInfo(), MVT::i32, false, false, 0); else - Result = DAG.getLoad(Op.getValueType(), dl, Chain, DataPtr, NULL, 0, + Result = DAG.getLoad(Op.getValueType(), dl, Chain, DataPtr, + MachinePointerInfo(), false, false, 0); return Result; } @@ -720,17 +724,20 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, const Value *DestS = cast<SrcValueSDNode>(Op.getOperand(3))->getValue(); const Value *SrcS = cast<SrcValueSDNode>(Op.getOperand(4))->getValue(); - SDValue Val = DAG.getLoad(getPointerTy(), dl, Chain, SrcP, SrcS, 0, + SDValue Val = DAG.getLoad(getPointerTy(), dl, Chain, SrcP, + MachinePointerInfo(SrcS), false, false, 0); - SDValue Result = DAG.getStore(Val.getValue(1), dl, Val, DestP, DestS, 0, + SDValue Result = DAG.getStore(Val.getValue(1), dl, Val, DestP, + MachinePointerInfo(DestS), false, false, 0); SDValue NP = DAG.getNode(ISD::ADD, dl, MVT::i64, SrcP, DAG.getConstant(8, MVT::i64)); - Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, dl, Result, - NP, NULL,0, MVT::i32, false, false, 0); + Val = DAG.getExtLoad(ISD::SEXTLOAD, dl, MVT::i64, Result, + NP, MachinePointerInfo(), MVT::i32, false, false, 0); SDValue NPD = DAG.getNode(ISD::ADD, dl, MVT::i64, DestP, DAG.getConstant(8, MVT::i64)); - return DAG.getTruncStore(Val.getValue(1), dl, Val, NPD, NULL, 0, MVT::i32, + return DAG.getTruncStore(Val.getValue(1), dl, Val, NPD, + MachinePointerInfo(), MVT::i32, false, false, 0); } case ISD::VASTART: { @@ -743,14 +750,15 @@ SDValue AlphaTargetLowering::LowerOperation(SDValue Op, // vastart stores the address of the VarArgsBase and VarArgsOffset SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsBase(), MVT::i64); - SDValue S1 = DAG.getStore(Chain, dl, FR, VAListP, VAListS, 0, - false, false, 0); + SDValue S1 = DAG.getStore(Chain, dl, FR, VAListP, + MachinePointerInfo(VAListS), false, false, 0); SDValue SA2 = DAG.getNode(ISD::ADD, dl, MVT::i64, VAListP, DAG.getConstant(8, MVT::i64)); return DAG.getTruncStore(S1, dl, DAG.getConstant(FuncInfo->getVarArgsOffset(), MVT::i64), - SA2, NULL, 0, MVT::i32, false, false, 0); + SA2, MachinePointerInfo(), + MVT::i32, false, false, 0); } case ISD::RETURNADDR: return DAG.getNode(AlphaISD::GlobalRetAddr, DebugLoc(), MVT::i64); @@ -771,7 +779,8 @@ void AlphaTargetLowering::ReplaceNodeResults(SDNode *N, SDValue Chain, DataPtr; LowerVAARG(N, Chain, DataPtr, DAG); - SDValue Res = DAG.getLoad(N->getValueType(0), dl, Chain, DataPtr, NULL, 0, + SDValue Res = DAG.getLoad(N->getValueType(0), dl, Chain, DataPtr, + MachinePointerInfo(), false, false, 0); Results.push_back(Res); Results.push_back(SDValue(Res.getNode(), 1)); @@ -795,6 +804,30 @@ AlphaTargetLowering::getConstraintType(const std::string &Constraint) const { return TargetLowering::getConstraintType(Constraint); } +/// Examine constraint type and operand type and determine a weight value. +/// This object must already have been set up with the operand type +/// and the current alternative constraint selected. +TargetLowering::ConstraintWeight +AlphaTargetLowering::getSingleConstraintMatchWeight( + AsmOperandInfo &info, const char *constraint) const { + ConstraintWeight weight = CW_Invalid; + Value *CallOperandVal = info.CallOperandVal; + // If we don't have a value, we can't do a match, + // but allow it at the lowest weight. + if (CallOperandVal == NULL) + return CW_Default; + // Look at the constraint type. + switch (*constraint) { + default: + weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); + break; + case 'f': + weight = CW_Register; + break; + } + return weight; +} + std::vector<unsigned> AlphaTargetLowering:: getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const { diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h index 46e0c7d..b429e9f 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h @@ -87,6 +87,11 @@ namespace llvm { ConstraintType getConstraintType(const std::string &Constraint) const; + /// Examine constraint string and operand type and determine a weight value. + /// The operand object must already have been set up with the operand type. + ConstraintWeight getSingleConstraintMatchWeight( + AsmOperandInfo &info, const char *constraint) const; + std::vector<unsigned> getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td index 92de78a..099d715 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td +++ b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td @@ -27,7 +27,7 @@ def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi", SDTIntBinOp, []>; def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, [SDNPMayLoad]>; def retflag : SDNode<"AlphaISD::RET_FLAG", SDTNone, - [SDNPHasChain, SDNPOptInFlag]>; + [SDNPHasChain, SDNPOptInGlue]>; // These are target-independent nodes, but have target-specific formats. def SDT_AlphaCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64> ]>; @@ -35,9 +35,9 @@ def SDT_AlphaCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i64>, SDTCisVT<1, i64> ]>; def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeqStart, - [SDNPHasChain, SDNPOutFlag]>; + [SDNPHasChain, SDNPOutGlue]>; def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeqEnd, - [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; + [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; //******************** //Paterns for matching diff --git a/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.cpp deleted file mode 100644 index 12685ed..0000000 --- a/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.cpp +++ /dev/null @@ -1,310 +0,0 @@ -//===-- AlphaJITInfo.cpp - Implement the JIT interfaces for the Alpha ---===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements the JIT interfaces for the Alpha target. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "jit" -#include "AlphaJITInfo.h" -#include "AlphaRelocations.h" -#include "llvm/Function.h" -#include "llvm/CodeGen/JITCodeEmitter.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/raw_ostream.h" -#include <cstdlib> -using namespace llvm; - -#define BUILD_OFormatI(Op, RA, LIT, FUN, RC) \ - ((Op << 26) | (RA << 21) | (LIT << 13) | (1 << 12) | (FUN << 5) | (RC)) -#define BUILD_OFormat(Op, RA, RB, FUN, RC) \ - ((Op << 26) | (RA << 21) | (RB << 16) | (FUN << 5) | (RC)) - -#define BUILD_LDA(RD, RS, IMM16) \ - ((0x08 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535)) -#define BUILD_LDAH(RD, RS, IMM16) \ - ((0x09 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535)) - -#define BUILD_LDQ(RD, RS, IMM16) \ - ((0x29 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 0xFFFF)) - -#define BUILD_JMP(RD, RS, IMM16) \ - ((0x1A << 26) | ((RD) << 21) | ((RS) << 16) | (0x00 << 14) | ((IMM16) & 0x3FFF)) -#define BUILD_JSR(RD, RS, IMM16) \ - ((0x1A << 26) | ((RD) << 21) | ((RS) << 16) | (0x01 << 14) | ((IMM16) & 0x3FFF)) - -#define BUILD_SLLi(RD, RS, IMM8) \ - (BUILD_OFormatI(0x12, RS, IMM8, 0x39, RD)) - -#define BUILD_ORi(RD, RS, IMM8) \ - (BUILD_OFormatI(0x11, RS, IMM8, 0x20, RD)) - -#define BUILD_OR(RD, RS, RT) \ - (BUILD_OFormat(0x11, RS, RT, 0x20, RD)) - - - -static void EmitBranchToAt(void *At, void *To) { - unsigned long Fn = (unsigned long)To; - - unsigned *AtI = (unsigned*)At; - - AtI[0] = BUILD_OR(0, 27, 27); - - DEBUG(errs() << "Stub targeting " << To << "\n"); - - for (int x = 1; x <= 8; ++x) { - AtI[2*x - 1] = BUILD_SLLi(27,27,8); - unsigned d = (Fn >> (64 - 8 * x)) & 0x00FF; - //DEBUG(errs() << "outputing " << hex << d << dec << "\n"); - AtI[2*x] = BUILD_ORi(27, 27, d); - } - AtI[17] = BUILD_JMP(31,27,0); //jump, preserving ra, and setting pv - AtI[18] = 0x00FFFFFF; //mark this as a stub -} - -void AlphaJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { - //FIXME - llvm_unreachable(0); -} - -static TargetJITInfo::JITCompilerFn JITCompilerFunction; -//static AlphaJITInfo* AlphaJTI; - -extern "C" { -#ifdef __alpha - - void AlphaCompilationCallbackC(long* oldpv, void* CameFromStub) - { - void* Target = JITCompilerFunction(CameFromStub); - - //rewrite the stub to an unconditional branch - if (((unsigned*)CameFromStub)[18] == 0x00FFFFFF) { - DEBUG(errs() << "Came from a stub, rewriting\n"); - EmitBranchToAt(CameFromStub, Target); - } else { - DEBUG(errs() << "confused, didn't come from stub at " << CameFromStub - << " old jump vector " << oldpv - << " new jump vector " << Target << "\n"); - } - - //Change pv to new Target - *oldpv = (long)Target; - } - - void AlphaCompilationCallback(void); - - asm( - ".text\n" - ".globl AlphaCompilationCallbackC\n" - ".align 4\n" - ".globl AlphaCompilationCallback\n" - ".ent AlphaCompilationCallback\n" -"AlphaCompilationCallback:\n" - // //get JIT's GOT - "ldgp $29, 0($27)\n" - //Save args, callee saved, and perhaps others? - //args: $16-$21 $f16-$f21 (12) - //callee: $9-$14 $f2-$f9 (14) - //others: fp:$15 ra:$26 pv:$27 (3) - "lda $30, -232($30)\n" - "stq $16, 0($30)\n" - "stq $17, 8($30)\n" - "stq $18, 16($30)\n" - "stq $19, 24($30)\n" - "stq $20, 32($30)\n" - "stq $21, 40($30)\n" - "stt $f16, 48($30)\n" - "stt $f17, 56($30)\n" - "stt $f18, 64($30)\n" - "stt $f19, 72($30)\n" - "stt $f20, 80($30)\n" - "stt $f21, 88($30)\n" - "stq $9, 96($30)\n" - "stq $10, 104($30)\n" - "stq $11, 112($30)\n" - "stq $12, 120($30)\n" - "stq $13, 128($30)\n" - "stq $14, 136($30)\n" - "stt $f2, 144($30)\n" - "stt $f3, 152($30)\n" - "stt $f4, 160($30)\n" - "stt $f5, 168($30)\n" - "stt $f6, 176($30)\n" - "stt $f7, 184($30)\n" - "stt $f8, 192($30)\n" - "stt $f9, 200($30)\n" - "stq $15, 208($30)\n" - "stq $26, 216($30)\n" - "stq $27, 224($30)\n" - - "addq $30, 224, $16\n" //pass the addr of saved pv as the first arg - "bis $0, $0, $17\n" //pass the roughly stub addr in second arg - "jsr $26, AlphaCompilationCallbackC\n" //call without saving ra - - "ldq $16, 0($30)\n" - "ldq $17, 8($30)\n" - "ldq $18, 16($30)\n" - "ldq $19, 24($30)\n" - "ldq $20, 32($30)\n" - "ldq $21, 40($30)\n" - "ldt $f16, 48($30)\n" - "ldt $f17, 56($30)\n" - "ldt $f18, 64($30)\n" - "ldt $f19, 72($30)\n" - "ldt $f20, 80($30)\n" - "ldt $f21, 88($30)\n" - "ldq $9, 96($30)\n" - "ldq $10, 104($30)\n" - "ldq $11, 112($30)\n" - "ldq $12, 120($30)\n" - "ldq $13, 128($30)\n" - "ldq $14, 136($30)\n" - "ldt $f2, 144($30)\n" - "ldt $f3, 152($30)\n" - "ldt $f4, 160($30)\n" - "ldt $f5, 168($30)\n" - "ldt $f6, 176($30)\n" - "ldt $f7, 184($30)\n" - "ldt $f8, 192($30)\n" - "ldt $f9, 200($30)\n" - "ldq $15, 208($30)\n" - "ldq $26, 216($30)\n" - "ldq $27, 224($30)\n" //this was updated in the callback with the target - - "lda $30, 232($30)\n" //restore sp - "jmp $31, ($27)\n" //jump to the new function - ".end AlphaCompilationCallback\n" - ); -#else - void AlphaCompilationCallback() { - llvm_unreachable("Cannot call AlphaCompilationCallback() on a non-Alpha arch!"); - } -#endif -} - -TargetJITInfo::StubLayout AlphaJITInfo::getStubLayout() { - // The stub contains 19 4-byte instructions, aligned at 4 bytes: - // R0 = R27 - // 8 x "R27 <<= 8; R27 |= 8-bits-of-Target" == 16 instructions - // JMP R27 - // Magic number so the compilation callback can recognize the stub. - StubLayout Result = {19 * 4, 4}; - return Result; -} - -void *AlphaJITInfo::emitFunctionStub(const Function* F, void *Fn, - JITCodeEmitter &JCE) { - //assert(Fn == AlphaCompilationCallback && "Where are you going?\n"); - //Do things in a stupid slow way! - void* Addr = (void*)(intptr_t)JCE.getCurrentPCValue(); - for (int x = 0; x < 19; ++ x) - JCE.emitWordLE(0); - EmitBranchToAt(Addr, Fn); - DEBUG(errs() << "Emitting Stub to " << Fn << " at [" << Addr << "]\n"); - return Addr; -} - -TargetJITInfo::LazyResolverFn -AlphaJITInfo::getLazyResolverFunction(JITCompilerFn F) { - JITCompilerFunction = F; - // setZerothGOTEntry((void*)AlphaCompilationCallback); - return AlphaCompilationCallback; -} - -//These describe LDAx -static const int IMM_LOW = -32768; -static const int IMM_HIGH = 32767; -static const int IMM_MULT = 65536; - -static long getUpper16(long l) -{ - long y = l / IMM_MULT; - if (l % IMM_MULT > IMM_HIGH) - ++y; - if (l % IMM_MULT < IMM_LOW) - --y; - assert((short)y == y && "displacement out of range"); - return y; -} - -static long getLower16(long l) -{ - long h = getUpper16(l); - long y = l - h * IMM_MULT; - assert(y == (short)y && "Displacement out of range"); - return y; -} - -void AlphaJITInfo::relocate(void *Function, MachineRelocation *MR, - unsigned NumRelocs, unsigned char* GOTBase) { - for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { - unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4; - long idx = 0; - bool doCommon = true; - switch ((Alpha::RelocationType)MR->getRelocationType()) { - default: llvm_unreachable("Unknown relocation type!"); - case Alpha::reloc_literal: - //This is a LDQl - idx = MR->getGOTIndex(); - DEBUG(errs() << "Literal relocation to slot " << idx); - idx = (idx - GOToffset) * 8; - DEBUG(errs() << " offset " << idx << "\n"); - break; - case Alpha::reloc_gprellow: - idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8]; - idx = getLower16(idx); - DEBUG(errs() << "gprellow relocation offset " << idx << "\n"); - DEBUG(errs() << " Pointer is " << (void*)MR->getResultPointer() - << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n"); - break; - case Alpha::reloc_gprelhigh: - idx = (unsigned char*)MR->getResultPointer() - &GOTBase[GOToffset * 8]; - idx = getUpper16(idx); - DEBUG(errs() << "gprelhigh relocation offset " << idx << "\n"); - DEBUG(errs() << " Pointer is " << (void*)MR->getResultPointer() - << " GOT is " << (void*)&GOTBase[GOToffset * 8] << "\n"); - break; - case Alpha::reloc_gpdist: - switch (*RelocPos >> 26) { - case 0x09: //LDAH - idx = &GOTBase[GOToffset * 8] - (unsigned char*)RelocPos; - idx = getUpper16(idx); - DEBUG(errs() << "LDAH: " << idx << "\n"); - //add the relocation to the map - gpdistmap[std::make_pair(Function, MR->getConstantVal())] = RelocPos; - break; - case 0x08: //LDA - assert(gpdistmap[std::make_pair(Function, MR->getConstantVal())] && - "LDAg without seeing LDAHg"); - idx = &GOTBase[GOToffset * 8] - - (unsigned char*)gpdistmap[std::make_pair(Function, MR->getConstantVal())]; - idx = getLower16(idx); - DEBUG(errs() << "LDA: " << idx << "\n"); - break; - default: - llvm_unreachable("Cannot handle gpdist yet"); - } - break; - case Alpha::reloc_bsr: { - idx = (((unsigned char*)MR->getResultPointer() - - (unsigned char*)RelocPos) >> 2) + 1; //skip first 2 inst of fun - *RelocPos |= (idx & ((1 << 21)-1)); - doCommon = false; - break; - } - } - if (doCommon) { - short x = (short)idx; - assert(x == idx); - *(short*)RelocPos = x; - } - } -} diff --git a/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.h b/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.h deleted file mode 100644 index bd358a4..0000000 --- a/contrib/llvm/lib/Target/Alpha/AlphaJITInfo.h +++ /dev/null @@ -1,53 +0,0 @@ -//===- AlphaJITInfo.h - Alpha impl. of the JIT interface ----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the Alpha implementation of the TargetJITInfo class. -// -//===----------------------------------------------------------------------===// - -#ifndef ALPHA_JITINFO_H -#define ALPHA_JITINFO_H - -#include "llvm/Target/TargetJITInfo.h" -#include <map> - -namespace llvm { - class TargetMachine; - - class AlphaJITInfo : public TargetJITInfo { - protected: - TargetMachine &TM; - - //because gpdist are paired and relative to the pc of the first inst, - //we need to have some state - std::map<std::pair<void*, int>, void*> gpdistmap; - public: - explicit AlphaJITInfo(TargetMachine &tm) : TM(tm) - { useGOT = true; } - - virtual StubLayout getStubLayout(); - virtual void *emitFunctionStub(const Function* F, void *Fn, - JITCodeEmitter &JCE); - virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn); - virtual void relocate(void *Function, MachineRelocation *MR, - unsigned NumRelocs, unsigned char* GOTBase); - - /// replaceMachineCodeForFunction - Make it so that calling the function - /// whose machine code is at OLD turns into a call to NEW, perhaps by - /// overwriting OLD with a branch to NEW. This is used for self-modifying - /// code. - /// - virtual void replaceMachineCodeForFunction(void *Old, void *New); - private: - static const unsigned GOToffset = 4096; - - }; -} - -#endif diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp index 327ddb4..7667fd8 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -22,7 +22,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineLocation.h" -#include "llvm/Target/TargetFrameInfo.h" +#include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetInstrInfo.h" @@ -35,29 +35,21 @@ #include <cstdlib> using namespace llvm; -//These describe LDAx -static const int IMM_LOW = -32768; -static const int IMM_HIGH = 32767; -static const int IMM_MULT = 65536; +AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii) + : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP), + TII(tii) { +} -static long getUpper16(long l) -{ - long y = l / IMM_MULT; - if (l % IMM_MULT > IMM_HIGH) +static long getUpper16(long l) { + long y = l / Alpha::IMM_MULT; + if (l % Alpha::IMM_MULT > Alpha::IMM_HIGH) ++y; return y; } -static long getLower16(long l) -{ +static long getLower16(long l) { long h = getUpper16(l); - return l - h * IMM_MULT; -} - -AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii) - : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP), - TII(tii), curgpdist(0) -{ + return l - h * Alpha::IMM_MULT; } const unsigned* AlphaRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) @@ -86,19 +78,12 @@ BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const { // Stack Frame Processing methods //===----------------------------------------------------------------------===// -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas or -// if frame pointer elimination is disabled. -// -bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - return MFI->hasVarSizedObjects(); -} - void AlphaRegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (hasFP(MF)) { + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + + if (TFI->hasFP(MF)) { // If we have a frame pointer, turn the adjcallstackup instruction into a // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP, // <amt>' @@ -108,7 +93,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, // We need to keep the stack aligned properly. To do this, we round the // amount of space needed for the outgoing arguments up to the next // alignment boundary. - unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); + unsigned Align = TFI->getStackAlignment(); Amount = (Amount+Align-1)/Align*Align; MachineInstr *New; @@ -146,7 +131,9 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); - bool FP = hasFP(MF); + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + + bool FP = TFI->hasFP(MF); while (!MI.getOperand(i).isFI()) { ++i; @@ -168,7 +155,7 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, DEBUG(errs() << "Corrected Offset " << Offset << " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n"); - if (Offset > IMM_HIGH || Offset < IMM_LOW) { + if (Offset > Alpha::IMM_HIGH || Offset < Alpha::IMM_LOW) { DEBUG(errs() << "Unconditionally using R28 for evil purposes Offset: " << Offset << "\n"); //so in this case, we need to use a temporary register, and move the @@ -186,111 +173,14 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, } } - -void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const { - MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB - MachineBasicBlock::iterator MBBI = MBB.begin(); - MachineFrameInfo *MFI = MF.getFrameInfo(); - DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc()); - bool FP = hasFP(MF); - - //handle GOP offset - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29) - .addGlobalAddress(MF.getFunction()) - .addReg(Alpha::R27).addImm(++curgpdist); - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29) - .addGlobalAddress(MF.getFunction()) - .addReg(Alpha::R29).addImm(curgpdist); - - BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT)) - .addGlobalAddress(MF.getFunction()); - - // Get the number of bytes to allocate from the FrameInfo - long NumBytes = MFI->getStackSize(); - - if (FP) - NumBytes += 8; //reserve space for the old FP - - // Do we need to allocate space on the stack? - if (NumBytes == 0) return; - - unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); - NumBytes = (NumBytes+Align-1)/Align*Align; - - // Update frame info to pretend that this is part of the stack... - MFI->setStackSize(NumBytes); - - // adjust stack pointer: r30 -= numbytes - NumBytes = -NumBytes; - if (NumBytes >= IMM_LOW) { - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes) - .addReg(Alpha::R30); - } else if (getUpper16(NumBytes) >= IMM_LOW) { - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30) - .addImm(getUpper16(NumBytes)).addReg(Alpha::R30); - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30) - .addImm(getLower16(NumBytes)).addReg(Alpha::R30); - } else { - report_fatal_error("Too big a stack frame at " + Twine(NumBytes)); - } - - //now if we need to, save the old FP and set the new - if (FP) - { - BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ)) - .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30); - //this must be the last instr in the prolog - BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15) - .addReg(Alpha::R30).addReg(Alpha::R30); - } - -} - -void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF, - MachineBasicBlock &MBB) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - MachineBasicBlock::iterator MBBI = prior(MBB.end()); - assert((MBBI->getOpcode() == Alpha::RETDAG || - MBBI->getOpcode() == Alpha::RETDAGp) - && "Can only insert epilog into returning blocks"); - DebugLoc dl = MBBI->getDebugLoc(); - - bool FP = hasFP(MF); - - // Get the number of bytes allocated from the FrameInfo... - long NumBytes = MFI->getStackSize(); - - //now if we need to, restore the old FP - if (FP) { - //copy the FP into the SP (discards allocas) - BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R30).addReg(Alpha::R15) - .addReg(Alpha::R15); - //restore the FP - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDQ), Alpha::R15) - .addImm(0).addReg(Alpha::R15); - } - - if (NumBytes != 0) { - if (NumBytes <= IMM_HIGH) { - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes) - .addReg(Alpha::R30); - } else if (getUpper16(NumBytes) <= IMM_HIGH) { - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30) - .addImm(getUpper16(NumBytes)).addReg(Alpha::R30); - BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30) - .addImm(getLower16(NumBytes)).addReg(Alpha::R30); - } else { - report_fatal_error("Too big a stack frame at " + Twine(NumBytes)); - } - } -} - unsigned AlphaRegisterInfo::getRARegister() const { return Alpha::R26; } unsigned AlphaRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - return hasFP(MF) ? Alpha::R15 : Alpha::R30; + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + + return TFI->hasFP(MF) ? Alpha::R15 : Alpha::R30; } unsigned AlphaRegisterInfo::getEHExceptionRegister() const { diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h index b164979..b0d4dd0 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h @@ -32,8 +32,6 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; @@ -41,11 +39,6 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS = NULL) const; - //void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; - - void emitPrologue(MachineFunction &MF) const; - void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; - // Debug information queries. unsigned getRARegister() const; unsigned getFrameRegister(const MachineFunction &MF) const; @@ -57,9 +50,6 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { int getDwarfRegNum(unsigned RegNum, bool isEH) const; static std::string getPrettyName(unsigned reg); - -private: - mutable int curgpdist; }; } // end namespace llvm diff --git a/contrib/llvm/lib/Target/Alpha/AlphaSchedule.td b/contrib/llvm/lib/Target/Alpha/AlphaSchedule.td index 4dc04b8..3703dd4 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaSchedule.td +++ b/contrib/llvm/lib/Target/Alpha/AlphaSchedule.td @@ -50,11 +50,11 @@ def s_ftoi : InstrItinClass; def s_itof : InstrItinClass; def s_pseudo : InstrItinClass; -//Table 24 Instruction Class Latency in Cycles +//Table 2-4 Instruction Class Latency in Cycles //modified some def Alpha21264Itineraries : ProcessorItineraries< - [L0, L1, FST0, FST1, U0, U1, FA, FM], [ + [L0, L1, FST0, FST1, U0, U1, FA, FM], [], [ InstrItinData<s_ild , [InstrStage<3, [L0, L1]>]>, InstrItinData<s_fld , [InstrStage<4, [L0, L1]>]>, InstrItinData<s_ist , [InstrStage<0, [L0, L1]>]>, diff --git a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp index fc9be03..b53533b 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -11,7 +11,6 @@ //===----------------------------------------------------------------------===// #include "Alpha.h" -#include "AlphaJITInfo.h" #include "AlphaMCAsmInfo.h" #include "AlphaTargetMachine.h" #include "llvm/PassManager.h" @@ -29,8 +28,7 @@ AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT, const std::string &FS) : LLVMTargetMachine(T, TT), DataLayout("e-f128:128:128-n64"), - FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0), - JITInfo(*this), + FrameLowering(Subtarget), Subtarget(TT, FS), TLInfo(*this), TSInfo(*this) { @@ -54,9 +52,3 @@ bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, PM.add(createAlphaLLRPPass(*this)); return false; } -bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - JITCodeEmitter &JCE) { - PM.add(createAlphaJITCodeEmitterPass(*this, JCE)); - return false; -} diff --git a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h index 153944e..26238fb 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h @@ -14,14 +14,14 @@ #ifndef ALPHA_TARGETMACHINE_H #define ALPHA_TARGETMACHINE_H -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetFrameInfo.h" #include "AlphaInstrInfo.h" -#include "AlphaJITInfo.h" #include "AlphaISelLowering.h" +#include "AlphaFrameLowering.h" #include "AlphaSelectionDAGInfo.h" #include "AlphaSubtarget.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetFrameLowering.h" namespace llvm { @@ -30,8 +30,7 @@ class GlobalValue; class AlphaTargetMachine : public LLVMTargetMachine { const TargetData DataLayout; // Calculates type size & alignment AlphaInstrInfo InstrInfo; - TargetFrameInfo FrameInfo; - AlphaJITInfo JITInfo; + AlphaFrameLowering FrameLowering; AlphaSubtarget Subtarget; AlphaTargetLowering TLInfo; AlphaSelectionDAGInfo TSInfo; @@ -41,7 +40,9 @@ public: const std::string &FS); virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; } - virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; } + virtual const TargetFrameLowering *getFrameLowering() const { + return &FrameLowering; + } virtual const AlphaSubtarget *getSubtargetImpl() const{ return &Subtarget; } virtual const AlphaRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); @@ -53,15 +54,10 @@ public: return &TSInfo; } virtual const TargetData *getTargetData() const { return &DataLayout; } - virtual AlphaJITInfo* getJITInfo() { - return &JITInfo; - } // Pass Pipeline Configuration virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); - virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - JITCodeEmitter &JCE); }; } // end namespace llvm |
