diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Alpha')
15 files changed, 52 insertions, 67 deletions
diff --git a/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp index 46ae286..5dce06a 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp @@ -26,8 +26,8 @@ #include "llvm/Target/Mangler.h" #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetRegistry.h" #include "llvm/ADT/SmallString.h" +#include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 7b91fea..f877c65 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -80,7 +80,7 @@ namespace { // Otherwise we don't know that the it's okay to zapnot this entire // byte. Only do this iff we can prove that the missing bits are // already null, so the bytezap doesn't need to really null them. - BitsToCheck |= ~Constant & (0xFF << 8*i); + BitsToCheck |= ~Constant & (0xFFULL << 8*i); } } } @@ -114,9 +114,8 @@ namespace { if (!x) return 0; unsigned at = CountLeadingZeros_64(x); uint64_t complow = 1ULL << (63 - at); - uint64_t comphigh = 1ULL << (64 - at); - //cerr << x << ":" << complow << ":" << comphigh << "\n"; - if (abs64(complow - x) <= abs64(comphigh - x)) + uint64_t comphigh = complow << 1; + if (x - complow <= comphigh - x) return complow; else return comphigh; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index de003fb..3057eb8 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -49,6 +49,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) // Set up the TargetLowering object. //I am having problems with shr n i8 1 setBooleanContents(ZeroOrOneBooleanContent); + setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass); addRegisterClass(MVT::f64, Alpha::F8RCRegisterClass); @@ -153,6 +154,9 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setOperationAction(ISD::JumpTable, MVT::i64, Custom); setOperationAction(ISD::JumpTable, MVT::i32, Custom); + setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); + setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); + setStackPointerRegisterToSaveRestore(Alpha::R30); setJumpBufSize(272); @@ -160,10 +164,12 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setMinFunctionAlignment(4); + setInsertFencesForAtomic(true); + computeRegisterProperties(); } -MVT::SimpleValueType AlphaTargetLowering::getSetCCResultType(EVT VT) const { +EVT AlphaTargetLowering::getSetCCResultType(EVT VT) const { return MVT::i64; } diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h index 13383f4..80f8efa 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelLowering.h @@ -66,7 +66,7 @@ namespace llvm { virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i64; } /// getSetCCResultType - Get the SETCC result ValueType - virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const; + virtual EVT getSetCCResultType(EVT VT) const; /// LowerOperation - Provide custom lowering hooks for some operations. /// diff --git a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index 4dcec8f..8df2ed7 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -16,7 +16,6 @@ #include "AlphaMachineFunctionInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/Target/TargetRegistry.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/Support/ErrorHandling.h" diff --git a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td index b201712..c8c9377 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td +++ b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.td @@ -607,6 +607,8 @@ def : Pat<(membarrier (i64 imm), (i64 imm), (i64 imm), (i64 1), (i64 imm)), def : Pat<(membarrier (i64 imm), (i64 imm), (i64 imm), (i64 imm), (i64 imm)), (MB)>; +def : Pat<(atomic_fence (imm), (imm)), (MB)>; + //Basic Floating point ops //Floats diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp index df8f157..8b6230f 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -21,7 +21,6 @@ #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineLocation.h" #include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" @@ -40,8 +39,7 @@ using namespace llvm; AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii) - : AlphaGenRegisterInfo(), - TII(tii) { + : AlphaGenRegisterInfo(Alpha::R26), TII(tii) { } static long getUpper16(long l) { @@ -178,10 +176,6 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, } } -unsigned AlphaRegisterInfo::getRARegister() const { - return Alpha::R26; -} - unsigned AlphaRegisterInfo::getFrameRegister(const MachineFunction &MF) const { const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); @@ -198,16 +192,6 @@ unsigned AlphaRegisterInfo::getEHHandlerRegister() const { return 0; } -int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { - llvm_unreachable("What is the dwarf register number"); - return -1; -} - -int AlphaRegisterInfo::getLLVMRegNum(unsigned DwarfRegNum, bool isEH) const { - llvm_unreachable("What is the dwarf register number"); - return -1; -} - std::string AlphaRegisterInfo::getPrettyName(unsigned reg) { std::string s(AlphaRegDesc[reg].Name); diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h index 1072bf7..e35be27 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h @@ -42,16 +42,12 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { int SPAdj, RegScavenger *RS = NULL) const; // Debug information queries. - unsigned getRARegister() const; unsigned getFrameRegister(const MachineFunction &MF) const; // Exception handling queries. unsigned getEHExceptionRegister() const; unsigned getEHHandlerRegister() const; - int getDwarfRegNum(unsigned RegNum, bool isEH) const; - int getLLVMRegNum(unsigned RegNum, bool isEH) const; - static std::string getPrettyName(unsigned reg); }; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaSubtarget.cpp b/contrib/llvm/lib/Target/Alpha/AlphaSubtarget.cpp index 624a5e2..bd55ce9 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaSubtarget.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaSubtarget.cpp @@ -13,7 +13,6 @@ #include "AlphaSubtarget.h" #include "Alpha.h" -#include "llvm/Target/TargetRegistry.h" #define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_CTOR diff --git a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp index 3b65d41..fc9a677 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -14,7 +14,7 @@ #include "AlphaTargetMachine.h" #include "llvm/PassManager.h" #include "llvm/Support/FormattedStream.h" -#include "llvm/Target/TargetRegistry.h" +#include "llvm/Support/TargetRegistry.h" using namespace llvm; extern "C" void LLVMInitializeAlphaTarget() { @@ -22,19 +22,17 @@ extern "C" void LLVMInitializeAlphaTarget() { RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget); } -AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +AlphaTargetMachine::AlphaTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM) + : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), DataLayout("e-f128:128:128-n64"), FrameLowering(Subtarget), Subtarget(TT, CPU, FS), TLInfo(*this), TSInfo(*this) { - setRelocationModel(Reloc::PIC_); } - //===----------------------------------------------------------------------===// // Pass Pipeline Configuration //===----------------------------------------------------------------------===// diff --git a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h index cf00e58..48bb948 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaTargetMachine.h @@ -36,8 +36,9 @@ class AlphaTargetMachine : public LLVMTargetMachine { AlphaSelectionDAGInfo TSInfo; public: - AlphaTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + AlphaTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, CodeModel::Model CM); virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const TargetFrameLowering *getFrameLowering() const { diff --git a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp b/contrib/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp index 562052b..4ad021c 100644 --- a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp +++ b/contrib/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp @@ -13,10 +13,11 @@ #include "AlphaMCTargetDesc.h" #include "AlphaMCAsmInfo.h" +#include "llvm/MC/MCCodeGenInfo.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Target/TargetRegistry.h" +#include "llvm/Support/TargetRegistry.h" #define GET_INSTRINFO_MC_DESC #include "AlphaGenInstrInfo.inc" @@ -36,8 +37,10 @@ static MCInstrInfo *createAlphaMCInstrInfo() { return X; } -extern "C" void LLVMInitializeAlphaMCInstrInfo() { - TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo); +static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) { + MCRegisterInfo *X = new MCRegisterInfo(); + InitAlphaMCRegisterInfo(X, Alpha::R26); + return X; } static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU, @@ -47,11 +50,29 @@ static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU, return X; } -extern "C" void LLVMInitializeAlphaMCSubtargetInfo() { - TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget, - createAlphaMCSubtargetInfo); +static MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM, + CodeModel::Model CM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(Reloc::PIC_, CM); + return X; } -extern "C" void LLVMInitializeAlphaMCAsmInfo() { +// Force static initialization. +extern "C" void LLVMInitializeAlphaTargetMC() { + // Register the MC asm info. RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget); + + // Register the MC codegen info. + TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget, + createAlphaMCCodeGenInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget, + createAlphaMCSubtargetInfo); } diff --git a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/CMakeLists.txt b/contrib/llvm/lib/Target/Alpha/MCTargetDesc/CMakeLists.txt deleted file mode 100644 index ad0dd26..0000000 --- a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/CMakeLists.txt +++ /dev/null @@ -1,4 +0,0 @@ -add_llvm_library(LLVMAlphaDesc - AlphaMCTargetDesc.cpp - AlphaMCAsmInfo.cpp - ) diff --git a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/Makefile b/contrib/llvm/lib/Target/Alpha/MCTargetDesc/Makefile deleted file mode 100644 index d55175f..0000000 --- a/contrib/llvm/lib/Target/Alpha/MCTargetDesc/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -##===- lib/Target/Alpha/TargetDesc/Makefile ----------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. -LIBRARYNAME = LLVMAlphaDesc - -# Hack: we need to include 'main' target directory to grab private headers -CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. - -include $(LEVEL)/Makefile.common diff --git a/contrib/llvm/lib/Target/Alpha/TargetInfo/AlphaTargetInfo.cpp b/contrib/llvm/lib/Target/Alpha/TargetInfo/AlphaTargetInfo.cpp index f7099b9..bdc69e7 100644 --- a/contrib/llvm/lib/Target/Alpha/TargetInfo/AlphaTargetInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/TargetInfo/AlphaTargetInfo.cpp @@ -9,7 +9,7 @@ #include "Alpha.h" #include "llvm/Module.h" -#include "llvm/Target/TargetRegistry.h" +#include "llvm/Support/TargetRegistry.h" using namespace llvm; llvm::Target llvm::TheAlphaTarget; |
