diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Alpha')
9 files changed, 9 insertions, 46 deletions
diff --git a/contrib/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp b/contrib/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp index 001656e..3768117 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp @@ -22,7 +22,7 @@ using namespace llvm; namespace { struct AlphaBSel : public MachineFunctionPass { static char ID; - AlphaBSel() : MachineFunctionPass(&ID) {} + AlphaBSel() : MachineFunctionPass(ID) {} virtual bool runOnMachineFunction(MachineFunction &Fn); diff --git a/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp b/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp index a6c6f52..3aec070 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp @@ -34,7 +34,7 @@ namespace { public: static char ID; - AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(&ID), + AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(ID), MCE(mce) {} /// getBinaryCodeForInstr - This function, generated by the diff --git a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index d526dc0..d197bd1 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -113,8 +113,8 @@ namespace { static uint64_t getNearPower2(uint64_t x) { if (!x) return 0; unsigned at = CountLeadingZeros_64(x); - uint64_t complow = 1 << (63 - at); - uint64_t comphigh = 1 << (64 - at); + uint64_t complow = 1ULL << (63 - at); + uint64_t comphigh = 1ULL << (64 - at); //cerr << x << ":" << complow << ":" << comphigh << "\n"; if (abs64(complow - x) <= abs64(comphigh - x)) return complow; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index ad625a2..5a2f561 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -27,32 +27,6 @@ AlphaInstrInfo::AlphaInstrInfo() RI(*this) { } -bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI, - unsigned& sourceReg, unsigned& destReg, - unsigned& SrcSR, unsigned& DstSR) const { - unsigned oc = MI.getOpcode(); - if (oc == Alpha::BISr || - oc == Alpha::CPYSS || - oc == Alpha::CPYST || - oc == Alpha::CPYSSt || - oc == Alpha::CPYSTs) { - // or r1, r2, r2 - // cpys(s|t) r1 r2 r2 - assert(MI.getNumOperands() >= 3 && - MI.getOperand(0).isReg() && - MI.getOperand(1).isReg() && - MI.getOperand(2).isReg() && - "invalid Alpha BIS instruction!"); - if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { - sourceReg = MI.getOperand(1).getReg(); - destReg = MI.getOperand(0).getReg(); - SrcSR = DstSR = 0; - return true; - } - } - return false; -} - unsigned AlphaInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const { diff --git a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.h b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.h index e20e832..ee6077a 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaInstrInfo.h @@ -30,12 +30,6 @@ public: /// virtual const AlphaRegisterInfo &getRegisterInfo() const { return RI; } - /// Return true if the instruction is a register to register move and return - /// the source and dest operands and their sub-register indices by reference. - virtual bool isMoveInstr(const MachineInstr &MI, - unsigned &SrcReg, unsigned &DstReg, - unsigned &SrcSubIdx, unsigned &DstSubIdx) const; - virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; virtual unsigned isStoreToStackSlot(const MachineInstr *MI, diff --git a/contrib/llvm/lib/Target/Alpha/AlphaLLRP.cpp b/contrib/llvm/lib/Target/Alpha/AlphaLLRP.cpp index 34be470..85fbfd1 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaLLRP.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaLLRP.cpp @@ -39,7 +39,7 @@ namespace { static char ID; AlphaLLRPPass(AlphaTargetMachine &tm) - : MachineFunctionPass(&ID), TM(tm) { } + : MachineFunctionPass(ID), TM(tm) { } virtual const char *getPassName() const { return "Alpha NOP inserter"; diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp index dc9d935..327ddb4 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -137,10 +137,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, //variable locals //<- SP -unsigned +void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); unsigned i = 0; @@ -185,7 +184,6 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, } else { MI.getOperand(i).ChangeToImmediate(Offset); } - return 0; } diff --git a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h index f9fd87a..b164979 100644 --- a/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/contrib/llvm/lib/Target/Alpha/AlphaRegisterInfo.h @@ -38,9 +38,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; //void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; diff --git a/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp index 9f4aff6..5428cb9 100644 --- a/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp +++ b/contrib/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp @@ -53,8 +53,6 @@ namespace { void printOp(const MachineOperand &MO, raw_ostream &O); void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); - void printBaseOffsetPair(const MachineInstr *MI, int i, raw_ostream &O, - bool brackets=true); virtual void EmitFunctionBodyStart(); virtual void EmitFunctionBodyEnd(); void EmitStartOfAsmFile(Module &M); |
