summaryrefslogtreecommitdiffstats
path: root/contrib/llvm/lib/Target/ARM/Disassembler
diff options
context:
space:
mode:
Diffstat (limited to 'contrib/llvm/lib/Target/ARM/Disassembler')
-rw-r--r--contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 3196a57..ac3d8c7 100644
--- a/contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -861,13 +861,13 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
extern "C" void LLVMInitializeARMDisassembler() {
- TargetRegistry::RegisterMCDisassembler(TheARMLETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
createARMDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheARMBETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),
createARMDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheThumbLETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheThumbLETarget(),
createThumbDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheThumbBETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheThumbBETarget(),
createThumbDisassembler);
}
@@ -1432,7 +1432,7 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
case ARM::STC_POST:
case ARM::STCL_POST:
imm |= U << 8;
- // fall through.
+ LLVM_FALLTHROUGH;
default:
// The 'option' variant doesn't encode 'U' in the immediate since
// the immediate is unsigned [0,255].
@@ -2555,6 +2555,7 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
break;
}
// Fall through to handle the register offset variant.
+ LLVM_FALLTHROUGH;
case ARM::VLD1d8wb_fixed:
case ARM::VLD1d16wb_fixed:
case ARM::VLD1d32wb_fixed:
@@ -4157,7 +4158,7 @@ static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val,
case 0x93: // faultmask_ns
if (!(FeatureBits[ARM::HasV8MMainlineOps]))
return MCDisassembler::Fail;
- // fall through
+ LLVM_FALLTHROUGH;
case 10: // msplim
case 11: // psplim
case 0x88: // msp_ns
@@ -5310,4 +5311,3 @@ static DecodeStatus DecoderForMRRC2AndMCRR2(llvm::MCInst &Inst, unsigned Val,
return S;
}
-
OpenPOWER on IntegriCloud