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-rw-r--r--contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp b/contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp
index f0d4dbe..ff585b4 100644
--- a/contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp
+++ b/contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp
@@ -615,7 +615,7 @@ bool A15SDOptimizer::runOnInstruction(MachineInstr *MI) {
SmallVector<unsigned, 8> Defs = getReadDPRs(MI);
bool Modified = false;
- for (SmallVector<unsigned, 8>::iterator I = Defs.begin(), E = Defs.end();
+ for (SmallVectorImpl<unsigned>::iterator I = Defs.begin(), E = Defs.end();
I != E; ++I) {
// Follow the def-use chain for this DPR through COPYs, and also through
// PHIs (which are essentially multi-way COPYs). It is because of PHIs that
@@ -630,7 +630,7 @@ bool A15SDOptimizer::runOnInstruction(MachineInstr *MI) {
elideCopiesAndPHIs(Def, DefSrcs);
- for (SmallVector<MachineInstr*, 8>::iterator II = DefSrcs.begin(),
+ for (SmallVectorImpl<MachineInstr *>::iterator II = DefSrcs.begin(),
EE = DefSrcs.end(); II != EE; ++II) {
MachineInstr *MI = *II;
@@ -655,8 +655,15 @@ bool A15SDOptimizer::runOnInstruction(MachineInstr *MI) {
if (NewReg != 0) {
Modified = true;
- for (SmallVector<MachineOperand*, 8>::const_iterator I = Uses.begin(),
+ for (SmallVectorImpl<MachineOperand *>::const_iterator I = Uses.begin(),
E = Uses.end(); I != E; ++I) {
+ // Make sure to constrain the register class of the new register to
+ // match what we're replacing. Otherwise we can optimize a DPR_VFP2
+ // reference into a plain DPR, and that will end poorly. NewReg is
+ // always virtual here, so there will always be a matching subclass
+ // to find.
+ MRI->constrainRegClass(NewReg, MRI->getRegClass((*I)->getReg()));
+
DEBUG(dbgs() << "Replacing operand "
<< **I << " with "
<< PrintReg(NewReg) << "\n");
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