diff options
Diffstat (limited to 'contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h')
| -rw-r--r-- | contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h index 39414cc0..615d7da 100644 --- a/contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h +++ b/contrib/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h @@ -27,6 +27,7 @@ class MCRegisterInfo; class MCObjectWriter; class MCStreamer; class MCSubtargetInfo; +class MCTargetOptions; class MCTargetStreamer; class StringRef; class Target; @@ -34,23 +35,26 @@ class Triple; class raw_ostream; class raw_pwrite_stream; -extern Target TheAArch64leTarget; -extern Target TheAArch64beTarget; -extern Target TheARM64Target; +Target &getTheAArch64leTarget(); +Target &getTheAArch64beTarget(); +Target &getTheARM64Target(); MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx); MCAsmBackend *createAArch64leAsmBackend(const Target &T, const MCRegisterInfo &MRI, - const Triple &TT, StringRef CPU); + const Triple &TT, StringRef CPU, + const MCTargetOptions &Options); MCAsmBackend *createAArch64beAsmBackend(const Target &T, const MCRegisterInfo &MRI, - const Triple &TT, StringRef CPU); + const Triple &TT, StringRef CPU, + const MCTargetOptions &Options); MCObjectWriter *createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool IsLittleEndian); + bool IsLittleEndian, + bool IsILP32); MCObjectWriter *createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType, |
