diff options
Diffstat (limited to 'contrib/llvm/lib/MC/MCSubtargetInfo.cpp')
-rw-r--r-- | contrib/llvm/lib/MC/MCSubtargetInfo.cpp | 39 |
1 files changed, 23 insertions, 16 deletions
diff --git a/contrib/llvm/lib/MC/MCSubtargetInfo.cpp b/contrib/llvm/lib/MC/MCSubtargetInfo.cpp index b8e42bd..ece775c 100644 --- a/contrib/llvm/lib/MC/MCSubtargetInfo.cpp +++ b/contrib/llvm/lib/MC/MCSubtargetInfo.cpp @@ -34,18 +34,14 @@ MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) { CPUSchedModel = MCSchedModel::GetDefaultSchedModel(); } -void -MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, - ArrayRef<SubtargetFeatureKV> PF, - ArrayRef<SubtargetFeatureKV> PD, - const SubtargetInfoKV *ProcSched, - const MCWriteProcResEntry *WPR, - const MCWriteLatencyEntry *WL, - const MCReadAdvanceEntry *RA, - const InstrStage *IS, - const unsigned *OC, - const unsigned *FP) { +void MCSubtargetInfo::InitMCSubtargetInfo( + const Triple &TT, StringRef C, StringRef FS, + ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, + const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, + const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, + const InstrStage *IS, const unsigned *OC, const unsigned *FP) { TargetTriple = TT; + CPU = C; ProcFeatures = PF; ProcDesc = PD; ProcSchedModels = ProcSched; @@ -62,19 +58,29 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, /// ToggleFeature - Toggle a feature and returns the re-computed feature /// bits. This version does not change the implied bits. -uint64_t MCSubtargetInfo::ToggleFeature(uint64_t FB) { +FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) { + FeatureBits.flip(FB); + return FeatureBits; +} + +FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) { FeatureBits ^= FB; return FeatureBits; } /// ToggleFeature - Toggle a feature and returns the re-computed feature /// bits. This version will also change all implied bits. -uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { +FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) { SubtargetFeatures Features; FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures); return FeatureBits; } +FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) { + SubtargetFeatures Features; + FeatureBits = Features.ApplyFeatureFlag(FeatureBits, FS, ProcFeatures); + return FeatureBits; +} MCSchedModel MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { @@ -92,9 +98,10 @@ MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { const SubtargetInfoKV *Found = std::lower_bound(ProcSchedModels, ProcSchedModels+NumProcs, CPU); if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) { - errs() << "'" << CPU - << "' is not a recognized processor for this target" - << " (ignoring processor)\n"; + if (CPU != "help") // Don't error if the user asked for help. + errs() << "'" << CPU + << "' is not a recognized processor for this target" + << " (ignoring processor)\n"; return MCSchedModel::GetDefaultSchedModel(); } assert(Found->Value && "Missing processor SchedModel value"); |