summaryrefslogtreecommitdiffstats
path: root/contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp')
-rw-r--r--contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp29
1 files changed, 18 insertions, 11 deletions
diff --git a/contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp b/contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 5447df0..c470632 100644
--- a/contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -16,7 +16,6 @@
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "early-ifcvt"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SetVector.h"
@@ -40,6 +39,8 @@
using namespace llvm;
+#define DEBUG_TYPE "early-ifcvt"
+
// Absolute maximum number of instructions allowed per speculated block.
// This bypasses all other heuristics, so it should be set fairly high.
static cl::opt<unsigned>
@@ -219,7 +220,7 @@ bool SSAIfConv::canSpeculateInstrs(MachineBasicBlock *MBB) {
// We never speculate stores, so an AA pointer isn't necessary.
bool DontMoveAcrossStore = true;
- if (!I->isSafeToMove(TII, 0, DontMoveAcrossStore)) {
+ if (!I->isSafeToMove(TII, nullptr, DontMoveAcrossStore)) {
DEBUG(dbgs() << "Can't speculate: " << *I);
return false;
}
@@ -338,7 +339,7 @@ bool SSAIfConv::findInsertionPoint() {
///
bool SSAIfConv::canConvertIf(MachineBasicBlock *MBB) {
Head = MBB;
- TBB = FBB = Tail = 0;
+ TBB = FBB = Tail = nullptr;
if (Head->succ_size() != 2)
return false;
@@ -461,9 +462,9 @@ void SSAIfConv::replacePHIInstrs() {
DEBUG(dbgs() << "If-converting " << *PI.PHI);
unsigned DstReg = PI.PHI->getOperand(0).getReg();
TII->insertSelect(*Head, FirstTerm, HeadDL, DstReg, Cond, PI.TReg, PI.FReg);
- DEBUG(dbgs() << " --> " << *llvm::prior(FirstTerm));
+ DEBUG(dbgs() << " --> " << *std::prev(FirstTerm));
PI.PHI->eraseFromParent();
- PI.PHI = 0;
+ PI.PHI = nullptr;
}
}
@@ -482,7 +483,7 @@ void SSAIfConv::rewritePHIOperands() {
unsigned PHIDst = PI.PHI->getOperand(0).getReg();
unsigned DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst));
TII->insertSelect(*Head, FirstTerm, HeadDL, DstReg, Cond, PI.TReg, PI.FReg);
- DEBUG(dbgs() << " --> " << *llvm::prior(FirstTerm));
+ DEBUG(dbgs() << " --> " << *std::prev(FirstTerm));
// Rewrite PHI operands TPred -> (DstReg, Head), remove FPred.
for (unsigned i = PI.PHI->getNumOperands(); i != 1; i -= 2) {
@@ -564,7 +565,7 @@ void SSAIfConv::convertIf(SmallVectorImpl<MachineBasicBlock*> &RemovedBlocks) {
// We need a branch to Tail, let code placement work it out later.
DEBUG(dbgs() << "Converting to unconditional branch.\n");
SmallVector<MachineOperand, 0> EmptyCond;
- TII->InsertBranch(*Head, Tail, 0, EmptyCond, HeadDL);
+ TII->InsertBranch(*Head, Tail, nullptr, EmptyCond, HeadDL);
Head->addSuccessor(Tail);
}
DEBUG(dbgs() << *Head);
@@ -590,9 +591,9 @@ class EarlyIfConverter : public MachineFunctionPass {
public:
static char ID;
EarlyIfConverter() : MachineFunctionPass(ID) {}
- void getAnalysisUsage(AnalysisUsage &AU) const;
- bool runOnMachineFunction(MachineFunction &MF);
- const char *getPassName() const { return "Early If-Conversion"; }
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ const char *getPassName() const override { return "Early If-Conversion"; }
private:
bool tryConvertIf(MachineBasicBlock*);
@@ -775,6 +776,12 @@ bool EarlyIfConverter::tryConvertIf(MachineBasicBlock *MBB) {
bool EarlyIfConverter::runOnMachineFunction(MachineFunction &MF) {
DEBUG(dbgs() << "********** EARLY IF-CONVERSION **********\n"
<< "********** Function: " << MF.getName() << '\n');
+ // Only run if conversion if the target wants it.
+ if (!MF.getTarget()
+ .getSubtarget<TargetSubtargetInfo>()
+ .enableEarlyIfConversion())
+ return false;
+
TII = MF.getTarget().getInstrInfo();
TRI = MF.getTarget().getRegisterInfo();
SchedModel =
@@ -783,7 +790,7 @@ bool EarlyIfConverter::runOnMachineFunction(MachineFunction &MF) {
DomTree = &getAnalysis<MachineDominatorTree>();
Loops = getAnalysisIfAvailable<MachineLoopInfo>();
Traces = &getAnalysis<MachineTraceMetrics>();
- MinInstr = 0;
+ MinInstr = nullptr;
bool Changed = false;
IfConv.runOnMachineFunction(MF);
OpenPOWER on IntegriCloud