diff options
Diffstat (limited to 'contrib/llvm/lib/CodeGen/AllocationOrder.h')
-rw-r--r-- | contrib/llvm/lib/CodeGen/AllocationOrder.h | 65 |
1 files changed, 39 insertions, 26 deletions
diff --git a/contrib/llvm/lib/CodeGen/AllocationOrder.h b/contrib/llvm/lib/CodeGen/AllocationOrder.h index 0ce7e0c..aed461a 100644 --- a/contrib/llvm/lib/CodeGen/AllocationOrder.h +++ b/contrib/llvm/lib/CodeGen/AllocationOrder.h @@ -17,21 +17,21 @@ #ifndef LLVM_CODEGEN_ALLOCATIONORDER_H #define LLVM_CODEGEN_ALLOCATIONORDER_H +#include "llvm/ADT/ArrayRef.h" +#include "llvm/MC/MCRegisterInfo.h" + namespace llvm { class RegisterClassInfo; class VirtRegMap; class AllocationOrder { - const unsigned *Begin; - const unsigned *End; - const unsigned *Pos; - const RegisterClassInfo &RCI; - unsigned Hint; - bool OwnedBegin; -public: + SmallVector<MCPhysReg, 16> Hints; + ArrayRef<MCPhysReg> Order; + int Pos; - /// AllocationOrder - Create a new AllocationOrder for VirtReg. +public: + /// Create a new AllocationOrder for VirtReg. /// @param VirtReg Virtual register to allocate for. /// @param VRM Virtual register map for function. /// @param RegClassInfo Information about reserved and allocatable registers. @@ -39,32 +39,45 @@ public: const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo); - ~AllocationOrder(); + /// Get the allocation order without reordered hints. + ArrayRef<MCPhysReg> getOrder() const { return Order; } - /// next - Return the next physical register in the allocation order, or 0. - /// It is safe to call next again after it returned 0. - /// It will keep returning 0 until rewind() is called. + /// Return the next physical register in the allocation order, or 0. + /// It is safe to call next() again after it returned 0, it will keep + /// returning 0 until rewind() is called. unsigned next() { - // First take the hint. - if (!Pos) { - Pos = Begin; - if (Hint) - return Hint; - } - // Then look at the order from TRI. - while (Pos != End) { - unsigned Reg = *Pos++; - if (Reg != Hint) + if (Pos < 0) + return Hints.end()[Pos++]; + while (Pos < int(Order.size())) { + unsigned Reg = Order[Pos++]; + if (!isHint(Reg)) return Reg; } return 0; } - /// rewind - Start over from the beginning. - void rewind() { Pos = 0; } + /// As next(), but allow duplicates to be returned, and stop before the + /// Limit'th register in the RegisterClassInfo allocation order. + /// + /// This can produce more than Limit registers if there are hints. + unsigned nextWithDups(unsigned Limit) { + if (Pos < 0) + return Hints.end()[Pos++]; + if (Pos < int(Limit)) + return Order[Pos++]; + return 0; + } + + /// Start over from the beginning. + void rewind() { Pos = -int(Hints.size()); } - /// isHint - Return true if PhysReg is a preferred register. - bool isHint(unsigned PhysReg) const { return PhysReg == Hint; } + /// Return true if the last register returned from next() was a preferred register. + bool isHint() const { return Pos <= 0; } + + /// Return true if PhysReg is a preferred register. + bool isHint(unsigned PhysReg) const { + return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end(); + } }; } // end namespace llvm |