diff options
Diffstat (limited to 'contrib/gcc/config')
| -rw-r--r-- | contrib/gcc/config/alpha/alpha.c | 4638 | ||||
| -rw-r--r-- | contrib/gcc/config/alpha/elf.h | 2 | ||||
| -rw-r--r-- | contrib/gcc/config/alpha/freebsd.h | 589 | ||||
| -rw-r--r-- | contrib/gcc/config/alpha/x-alpha | 1 | ||||
| -rw-r--r-- | contrib/gcc/config/alpha/xm-alpha.h | 18 | ||||
| -rw-r--r-- | contrib/gcc/config/alpha/xm-freebsd.h | 4 | ||||
| -rw-r--r-- | contrib/gcc/config/freebsd.h | 110 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/freebsd-elf.h | 257 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/freebsd.h | 480 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/freebsd.h.fixed | 480 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/i386.c | 24 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/i386.h | 2 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/i386.md | 2 | ||||
| -rw-r--r-- | contrib/gcc/config/i386/x-freebsd | 3 | ||||
| -rw-r--r-- | contrib/gcc/config/xm-freebsd.h | 13 |
15 files changed, 1923 insertions, 4700 deletions
diff --git a/contrib/gcc/config/alpha/alpha.c b/contrib/gcc/config/alpha/alpha.c index 2d62693..f7428c3 100644 --- a/contrib/gcc/config/alpha/alpha.c +++ b/contrib/gcc/config/alpha/alpha.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on the DEC Alpha. - Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc. + Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -20,8 +20,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#include <stdio.h> #include "config.h" -#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -34,44 +34,9 @@ Boston, MA 02111-1307, USA. */ #include "flags.h" #include "recog.h" #include "reload.h" -#include "tree.h" #include "expr.h" #include "obstack.h" -#include "except.h" -#include "function.h" -#include "toplev.h" - -/* External data. */ -extern char *version_string; -extern int rtx_equal_function_value_matters; - -/* Specify which cpu to schedule for. */ - -enum processor_type alpha_cpu; -static const char * const alpha_cpu_name[] = -{ - "ev4", "ev5", "ev6" -}; - -/* Specify how accurate floating-point traps need to be. */ - -enum alpha_trap_precision alpha_tp; - -/* Specify the floating-point rounding mode. */ - -enum alpha_fp_rounding_mode alpha_fprm; - -/* Specify which things cause traps. */ - -enum alpha_fp_trap_mode alpha_fptm; - -/* Strings decoded into the above options. */ - -const char *alpha_cpu_string; /* -mcpu= */ -const char *alpha_tp_string; /* -mtrap-precision=[p|s|i] */ -const char *alpha_fprm_string; /* -mfp-rounding-mode=[n|m|c|d] */ -const char *alpha_fptm_string; /* -mfp-trap-mode=[n|u|su|sui] */ -const char *alpha_mlat_string; /* -mmemory-latency= */ +#include "tree.h" /* Save information from a "cmpxx" operation until the branch or scc is emitted. */ @@ -79,238 +44,26 @@ const char *alpha_mlat_string; /* -mmemory-latency= */ rtx alpha_compare_op0, alpha_compare_op1; int alpha_compare_fp_p; -/* Define the information needed to modify the epilogue for EH. */ +/* Save the name of the current function as used by the assembler. This + is used by the epilogue. */ -rtx alpha_eh_epilogue_sp_ofs; +char *alpha_function_name; /* Non-zero if inside of a function, because the Alpha asm can't handle .files inside of functions. */ static int inside_function = FALSE; -/* If non-null, this rtx holds the return address for the function. */ - -static rtx alpha_return_addr_rtx; +/* Nonzero if the current function needs gp. */ -/* The number of cycles of latency we should assume on memory reads. */ +int alpha_function_needs_gp; -int alpha_memory_latency = 3; - -/* Whether the function needs the GP. */ - -static int alpha_function_needs_gp; - -/* The alias set for prologue/epilogue register save/restore. */ - -static int alpha_sr_alias_set; +extern char *version_string; +extern int rtx_equal_function_value_matters; /* Declarations of static functions. */ -static void alpha_set_memflags_1 - PROTO((rtx, int, int, int)); -static rtx alpha_emit_set_const_1 - PROTO((rtx, enum machine_mode, HOST_WIDE_INT, int)); -static void alpha_expand_unaligned_load_words - PROTO((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs)); -static void alpha_expand_unaligned_store_words - PROTO((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs)); -static void alpha_sa_mask - PROTO((unsigned long *imaskP, unsigned long *fmaskP)); -static int alpha_does_function_need_gp - PROTO((void)); - - -/* Get the number of args of a function in one of two ways. */ -#ifdef OPEN_VMS -#define NUM_ARGS current_function_args_info.num_args -#else -#define NUM_ARGS current_function_args_info -#endif - -#define REG_PV 27 -#define REG_RA 26 - -/* Parse target option strings. */ - -void -override_options () -{ - alpha_tp = ALPHA_TP_PROG; - alpha_fprm = ALPHA_FPRM_NORM; - alpha_fptm = ALPHA_FPTM_N; - - if (TARGET_IEEE) - { - alpha_tp = ALPHA_TP_INSN; - alpha_fptm = ALPHA_FPTM_SU; - } - - if (TARGET_IEEE_WITH_INEXACT) - { - alpha_tp = ALPHA_TP_INSN; - alpha_fptm = ALPHA_FPTM_SUI; - } - - if (alpha_tp_string) - { - if (! strcmp (alpha_tp_string, "p")) - alpha_tp = ALPHA_TP_PROG; - else if (! strcmp (alpha_tp_string, "f")) - alpha_tp = ALPHA_TP_FUNC; - else if (! strcmp (alpha_tp_string, "i")) - alpha_tp = ALPHA_TP_INSN; - else - error ("bad value `%s' for -mtrap-precision switch", alpha_tp_string); - } - - if (alpha_fprm_string) - { - if (! strcmp (alpha_fprm_string, "n")) - alpha_fprm = ALPHA_FPRM_NORM; - else if (! strcmp (alpha_fprm_string, "m")) - alpha_fprm = ALPHA_FPRM_MINF; - else if (! strcmp (alpha_fprm_string, "c")) - alpha_fprm = ALPHA_FPRM_CHOP; - else if (! strcmp (alpha_fprm_string,"d")) - alpha_fprm = ALPHA_FPRM_DYN; - else - error ("bad value `%s' for -mfp-rounding-mode switch", - alpha_fprm_string); - } - - if (alpha_fptm_string) - { - if (strcmp (alpha_fptm_string, "n") == 0) - alpha_fptm = ALPHA_FPTM_N; - else if (strcmp (alpha_fptm_string, "u") == 0) - alpha_fptm = ALPHA_FPTM_U; - else if (strcmp (alpha_fptm_string, "su") == 0) - alpha_fptm = ALPHA_FPTM_SU; - else if (strcmp (alpha_fptm_string, "sui") == 0) - alpha_fptm = ALPHA_FPTM_SUI; - else - error ("bad value `%s' for -mfp-trap-mode switch", alpha_fptm_string); - } - - alpha_cpu - = TARGET_CPU_DEFAULT & MASK_CPU_EV6 ? PROCESSOR_EV6 - : (TARGET_CPU_DEFAULT & MASK_CPU_EV5 ? PROCESSOR_EV5 : PROCESSOR_EV4); - - if (alpha_cpu_string) - { - if (! strcmp (alpha_cpu_string, "ev4") - || ! strcmp (alpha_cpu_string, "21064")) - { - alpha_cpu = PROCESSOR_EV4; - target_flags &= ~ (MASK_BWX | MASK_MAX | MASK_FIX | MASK_CIX); - } - else if (! strcmp (alpha_cpu_string, "ev5") - || ! strcmp (alpha_cpu_string, "21164")) - { - alpha_cpu = PROCESSOR_EV5; - target_flags &= ~ (MASK_BWX | MASK_MAX | MASK_FIX | MASK_CIX); - } - else if (! strcmp (alpha_cpu_string, "ev56") - || ! strcmp (alpha_cpu_string, "21164a")) - { - alpha_cpu = PROCESSOR_EV5; - target_flags |= MASK_BWX; - target_flags &= ~ (MASK_MAX | MASK_FIX | MASK_CIX); - } - else if (! strcmp (alpha_cpu_string, "pca56") - || ! strcmp (alpha_cpu_string, "21164PC") - || ! strcmp (alpha_cpu_string, "21164pc")) - { - alpha_cpu = PROCESSOR_EV5; - target_flags |= MASK_BWX | MASK_MAX; - target_flags &= ~ (MASK_FIX | MASK_CIX); - } - else if (! strcmp (alpha_cpu_string, "ev6") - || ! strcmp (alpha_cpu_string, "21264")) - { - alpha_cpu = PROCESSOR_EV6; - target_flags |= MASK_BWX | MASK_MAX | MASK_FIX; - target_flags &= ~ (MASK_CIX); - } - else - error ("bad value `%s' for -mcpu switch", alpha_cpu_string); - } - - /* Do some sanity checks on the above options. */ - - if ((alpha_fptm == ALPHA_FPTM_SU || alpha_fptm == ALPHA_FPTM_SUI) - && alpha_tp != ALPHA_TP_INSN && alpha_cpu != PROCESSOR_EV6) - { - warning ("fp software completion requires -mtrap-precision=i"); - alpha_tp = ALPHA_TP_INSN; - } - - if (TARGET_FLOAT_VAX) - { - if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN) - { - warning ("rounding mode not supported for VAX floats"); - alpha_fprm = ALPHA_FPRM_NORM; - } - if (alpha_fptm == ALPHA_FPTM_SUI) - { - warning ("trap mode not supported for VAX floats"); - alpha_fptm = ALPHA_FPTM_SU; - } - } - - { - char *end; - int lat; - - if (!alpha_mlat_string) - alpha_mlat_string = "L1"; - - if (ISDIGIT ((unsigned char)alpha_mlat_string[0]) - && (lat = strtol (alpha_mlat_string, &end, 10), *end == '\0')) - ; - else if ((alpha_mlat_string[0] == 'L' || alpha_mlat_string[0] == 'l') - && ISDIGIT ((unsigned char)alpha_mlat_string[1]) - && alpha_mlat_string[2] == '\0') - { - static int const cache_latency[][4] = - { - { 3, 30, -1 }, /* ev4 -- Bcache is a guess */ - { 2, 12, 38 }, /* ev5 -- Bcache from PC164 LMbench numbers */ - { 3, 13, -1 }, /* ev6 -- Ho hum, doesn't exist yet */ - }; - - lat = alpha_mlat_string[1] - '0'; - if (lat < 0 || lat > 3 || cache_latency[alpha_cpu][lat-1] == -1) - { - warning ("L%d cache latency unknown for %s", - lat, alpha_cpu_name[alpha_cpu]); - lat = 3; - } - else - lat = cache_latency[alpha_cpu][lat-1]; - } - else if (! strcmp (alpha_mlat_string, "main")) - { - /* Most current memories have about 370ns latency. This is - a reasonable guess for a fast cpu. */ - lat = 150; - } - else - { - warning ("bad value `%s' for -mmemory-latency", alpha_mlat_string); - lat = 3; - } - - alpha_memory_latency = lat; - } - - /* Default the definition of "small data" to 8 bytes. */ - if (!g_switch_set) - g_switch_value = 8; - - /* Acquire a unique set number for our register saves and restores. */ - alpha_sr_alias_set = new_alias_set (); -} +static void alpha_set_memflags_1 PROTO((rtx, int, int, int)); +static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int)); /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */ @@ -370,10 +123,10 @@ reg_or_8bit_operand (op, mode) int cint8_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { - return ((GET_CODE (op) == CONST_INT - && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)); + return (GET_CODE (op) == CONST_INT + && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100); } /* Return 1 if the operand is a valid second operand to an add insn. */ @@ -384,9 +137,9 @@ add_operand (op, mode) enum machine_mode mode; { if (GET_CODE (op) == CONST_INT) - /* Constraints I, J, O and P are covered by K. */ return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K') - || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')); + || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L') + || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')); return register_operand (op, mode); } @@ -400,8 +153,8 @@ sext_add_operand (op, mode) enum machine_mode mode; { if (GET_CODE (op) == CONST_INT) - return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'I') - || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')); + return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255 + || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255); return register_operand (op, mode); } @@ -411,7 +164,7 @@ sext_add_operand (op, mode) int const48_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { return (GET_CODE (op) == CONST_INT && (INTVAL (op) == 4 || INTVAL (op) == 8)); @@ -456,11 +209,10 @@ or_operand (op, mode) int mode_width_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { return (GET_CODE (op) == CONST_INT - && (INTVAL (op) == 8 || INTVAL (op) == 16 - || INTVAL (op) == 32 || INTVAL (op) == 64)); + && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32)); } /* Return 1 if OP is a constant that is the width of an integral machine mode @@ -469,24 +221,18 @@ mode_width_operand (op, mode) int mode_mask_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { #if HOST_BITS_PER_WIDE_INT == 32 if (GET_CODE (op) == CONST_DOUBLE) - return (CONST_DOUBLE_LOW (op) == -1 - && (CONST_DOUBLE_HIGH (op) == -1 - || CONST_DOUBLE_HIGH (op) == 0)); -#else - if (GET_CODE (op) == CONST_DOUBLE) - return (CONST_DOUBLE_LOW (op) == -1 && CONST_DOUBLE_HIGH (op) == 0); + return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1; #endif return (GET_CODE (op) == CONST_INT && (INTVAL (op) == 0xff || INTVAL (op) == 0xffff - || INTVAL (op) == (HOST_WIDE_INT)0xffffffff #if HOST_BITS_PER_WIDE_INT == 64 - || INTVAL (op) == -1 + || INTVAL (op) == 0xffffffff #endif )); } @@ -496,7 +242,7 @@ mode_mask_operand (op, mode) int mul8_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { return (GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 64 @@ -524,18 +270,6 @@ reg_or_fp0_operand (op, mode) return fp0_operand (op, mode) || register_operand (op, mode); } -/* Return 1 if OP is a hard floating-point register. */ - -int -hard_fp_register_operand (op, mode) - register rtx op; - enum machine_mode mode; -{ - return ((GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS) - || (GET_CODE (op) == SUBREG - && hard_fp_register_operand (SUBREG_REG (op), mode))); -} - /* Return 1 if OP is a register or a constant integer. */ @@ -544,8 +278,7 @@ reg_or_cint_operand (op, mode) register rtx op; enum machine_mode mode; { - return (GET_CODE (op) == CONST_INT - || register_operand (op, mode)); + return GET_CODE (op) == CONST_INT || register_operand (op, mode); } /* Return 1 if OP is something that can be reloaded into a register; @@ -561,15 +294,12 @@ some_operand (op, mode) switch (GET_CODE (op)) { - case REG: case MEM: case CONST_DOUBLE: case CONST_INT: case LABEL_REF: - case SYMBOL_REF: case CONST: + case REG: case MEM: case CONST_DOUBLE: + case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST: return 1; case SUBREG: return some_operand (SUBREG_REG (op), VOIDmode); - - default: - break; } return 0; @@ -593,7 +323,7 @@ input_operand (op, mode) case LABEL_REF: case SYMBOL_REF: case CONST: - /* This handles both the Windows/NT and OSF cases. */ + /* This handles both the Windows/NT and OSF cases. */ return mode == ptr_mode || mode == DImode; case REG: @@ -604,20 +334,13 @@ input_operand (op, mode) return 1; /* ... fall through ... */ case MEM: - return ((TARGET_BWX || (mode != HImode && mode != QImode)) - && general_operand (op, mode)); + return mode != HImode && mode != QImode && general_operand (op, mode); case CONST_DOUBLE: return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode); case CONST_INT: return mode == QImode || mode == HImode || add_operand (op, mode); - - case CONSTANT_P_RTX: - return 1; - - default: - break; } return 0; @@ -629,7 +352,7 @@ input_operand (op, mode) int current_file_function_operand (op, mode) rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { return (GET_CODE (op) == SYMBOL_REF && ! profile_flag && ! profile_block_flag @@ -647,9 +370,7 @@ call_operand (op, mode) if (mode != Pmode) return 0; - return (GET_CODE (op) == SYMBOL_REF - || (GET_CODE (op) == REG - && (TARGET_OPEN_VMS || TARGET_WINDOWS_NT || REGNO (op) == 27))); + return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG); } /* Return 1 if OP is a valid Alpha comparison operator. Here we know which @@ -669,37 +390,17 @@ alpha_comparison_operator (op, mode) || (mode == DImode && (code == LEU || code == LTU))); } -/* Return 1 if OP is a valid Alpha swapped comparison operator. */ - -int -alpha_swapped_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode; -{ - enum rtx_code code = GET_CODE (op); - - if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<') - return 0; - - code = swap_condition (code); - return (code == EQ || code == LE || code == LT - || (mode == DImode && (code == LEU || code == LTU))); -} - /* Return 1 if OP is a signed comparison operation. */ int signed_comparison_operator (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { switch (GET_CODE (op)) { case EQ: case NE: case LE: case LT: case GE: case GT: return 1; - - default: - break; } return 0; @@ -710,15 +411,12 @@ signed_comparison_operator (op, mode) int divmod_operator (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { switch (GET_CODE (op)) { case DIV: case MOD: case UDIV: case UMOD: return 1; - - default: - break; } return 0; @@ -728,49 +426,43 @@ divmod_operator (op, mode) a constant. It must be a valid address. This means that we can do this as an aligned reference plus some offset. - Take into account what reload will do. */ + Take into account what reload will do. + + We could say that out-of-range stack slots are alignable, but that would + complicate get_aligned_mem and it isn't worth the trouble since few + functions have large stack space. */ int aligned_memory_operand (op, mode) register rtx op; enum machine_mode mode; { - rtx base; - - if (reload_in_progress) + if (GET_CODE (op) == SUBREG) { - rtx tmp = op; - if (GET_CODE (tmp) == SUBREG) - tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG - && REGNO (tmp) >= FIRST_PSEUDO_REGISTER) - { - op = reg_equiv_memory_loc[REGNO (tmp)]; - if (op == 0) - return 0; - } + if (GET_MODE (op) != mode) + return 0; + op = SUBREG_REG (op); + mode = GET_MODE (op); } - if (GET_CODE (op) != MEM - || GET_MODE (op) != mode) + if (reload_in_progress && GET_CODE (op) == REG + && REGNO (op) >= FIRST_PSEUDO_REGISTER) + op = reg_equiv_mem[REGNO (op)]; + + if (GET_CODE (op) != MEM || GET_MODE (op) != mode + || ! memory_address_p (mode, XEXP (op, 0))) return 0; + op = XEXP (op, 0); - /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) - sorts of constructs. Dig for the real base register. */ - if (reload_in_progress - && GET_CODE (op) == PLUS - && GET_CODE (XEXP (op, 0)) == PLUS) - base = XEXP (XEXP (op, 0), 0); - else - { - if (! memory_address_p (mode, op)) - return 0; - base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op); - } + if (GET_CODE (op) == PLUS) + op = XEXP (op, 0); - return (GET_CODE (base) == REG - && REGNO_POINTER_ALIGN (REGNO (base)) >= 4); + return (GET_CODE (op) == REG + && (REGNO (op) == STACK_POINTER_REGNUM + || op == hard_frame_pointer_rtx + || (REGNO (op) >= FIRST_VIRTUAL_REGISTER + && REGNO (op) <= LAST_VIRTUAL_REGISTER))); } /* Similar, but return 1 if OP is a MEM which is not alignable. */ @@ -780,52 +472,34 @@ unaligned_memory_operand (op, mode) register rtx op; enum machine_mode mode; { - rtx base; - - if (reload_in_progress) + if (GET_CODE (op) == SUBREG) { - rtx tmp = op; - if (GET_CODE (tmp) == SUBREG) - tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG - && REGNO (tmp) >= FIRST_PSEUDO_REGISTER) - { - op = reg_equiv_memory_loc[REGNO (tmp)]; - if (op == 0) - return 0; - } + if (GET_MODE (op) != mode) + return 0; + op = SUBREG_REG (op); + mode = GET_MODE (op); } - if (GET_CODE (op) != MEM - || GET_MODE (op) != mode) + if (reload_in_progress && GET_CODE (op) == REG + && REGNO (op) >= FIRST_PSEUDO_REGISTER) + op = reg_equiv_mem[REGNO (op)]; + + if (GET_CODE (op) != MEM || GET_MODE (op) != mode) return 0; - op = XEXP (op, 0); - /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) - sorts of constructs. Dig for the real base register. */ - if (reload_in_progress - && GET_CODE (op) == PLUS - && GET_CODE (XEXP (op, 0)) == PLUS) - base = XEXP (XEXP (op, 0), 0); - else - { - if (! memory_address_p (mode, op)) - return 0; - base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op); - } + op = XEXP (op, 0); - return (GET_CODE (base) == REG - && REGNO_POINTER_ALIGN (REGNO (base)) < 4); -} + if (! memory_address_p (mode, op)) + return 1; -/* Return 1 if OP is either a register or an unaligned memory location. */ + if (GET_CODE (op) == PLUS) + op = XEXP (op, 0); -int -reg_or_unaligned_mem_operand (op, mode) - rtx op; - enum machine_mode mode; -{ - return register_operand (op, mode) || unaligned_memory_operand (op, mode); + return (GET_CODE (op) != REG + || (REGNO (op) != STACK_POINTER_REGNUM + && op != hard_frame_pointer_rtx + && (REGNO (op) < FIRST_VIRTUAL_REGISTER + || REGNO (op) > LAST_VIRTUAL_REGISTER))); } /* Return 1 if OP is any memory location. During reload a pseudo matches. */ @@ -833,7 +507,7 @@ reg_or_unaligned_mem_operand (op, mode) int any_memory_operand (op, mode) register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; + enum machine_mode mode; { return (GET_CODE (op) == MEM || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG) @@ -844,89 +518,9 @@ any_memory_operand (op, mode) && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER)); } -/* Returns 1 if OP is not an eliminable register. - - This exists to cure a pathological abort in the s8addq (et al) patterns, - - long foo () { long t; bar(); return (long) &t * 26107; } - - which run afoul of a hack in reload to cure a (presumably) similar - problem with lea-type instructions on other targets. But there is - one of us and many of them, so work around the problem by selectively - preventing combine from making the optimization. */ - -int -reg_not_elim_operand (op, mode) - register rtx op; - enum machine_mode mode; -{ - rtx inner = op; - if (GET_CODE (op) == SUBREG) - inner = SUBREG_REG (op); - if (inner == frame_pointer_rtx || inner == arg_pointer_rtx) - return 0; - - return register_operand (op, mode); -} - -/* Return 1 is OP is a memory location that is not a reference (using - an AND) to an unaligned location. Take into account what reload - will do. */ - -int -normal_memory_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; -{ - if (reload_in_progress) - { - rtx tmp = op; - if (GET_CODE (tmp) == SUBREG) - tmp = SUBREG_REG (tmp); - if (GET_CODE (tmp) == REG - && REGNO (tmp) >= FIRST_PSEUDO_REGISTER) - { - op = reg_equiv_memory_loc[REGNO (tmp)]; - - /* This may not have been assigned an equivalent address if it will - be eliminated. In that case, it doesn't matter what we do. */ - if (op == 0) - return 1; - } - } - - return GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) != AND; -} - -/* Accept a register, but not a subreg of any kind. This allows us to - avoid pathological cases in reload wrt data movement common in - int->fp conversion. */ - -int -reg_no_subreg_operand (op, mode) - register rtx op; - enum machine_mode mode; -{ - if (GET_CODE (op) == SUBREG) - return 0; - return register_operand (op, mode); -} - -/* Return 1 if this function can directly return via $26. */ - -int -direct_return () -{ - return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0 - && get_frame_size () == 0 - && current_function_outgoing_args_size == 0 - && current_function_pretend_args_size == 0); -} - /* REF is an alignable memory location. Place an aligned SImode reference into *PALIGNED_MEM and the number of bits to shift into - *PBITNUM. SCRATCH is a free register for use in reloading out - of range stack slots. */ + *PBITNUM. */ void get_aligned_mem (ref, paligned_mem, pbitnum) @@ -936,67 +530,67 @@ get_aligned_mem (ref, paligned_mem, pbitnum) rtx base; HOST_WIDE_INT offset = 0; - if (GET_CODE (ref) != MEM) - abort (); - - if (reload_in_progress - && ! memory_address_p (GET_MODE (ref), XEXP (ref, 0))) + if (GET_CODE (ref) == SUBREG) { - base = find_replacement (&XEXP (ref, 0)); - - if (! memory_address_p (GET_MODE (ref), base)) - abort (); + offset = SUBREG_WORD (ref) * UNITS_PER_WORD; + if (BYTES_BIG_ENDIAN) + offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref))) + - MIN (UNITS_PER_WORD, + GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref))))); + ref = SUBREG_REG (ref); } + + if (GET_CODE (ref) == REG) + ref = reg_equiv_mem[REGNO (ref)]; + + if (reload_in_progress) + base = find_replacement (&XEXP (ref, 0)); else - { - base = XEXP (ref, 0); - } + base = XEXP (ref, 0); if (GET_CODE (base) == PLUS) offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0); - *paligned_mem = gen_rtx_MEM (SImode, plus_constant (base, offset & ~3)); - MEM_COPY_ATTRIBUTES (*paligned_mem, ref); + *paligned_mem = gen_rtx (MEM, SImode, + plus_constant (base, offset & ~3)); + MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref); + MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref); RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref); - /* Sadly, we cannot use alias sets here because we may overlap other - data in a different alias set. */ - /* MEM_ALIAS_SET (*paligned_mem) = MEM_ALIAS_SET (ref); */ - *pbitnum = GEN_INT ((offset & 3) * 8); } -/* Similar, but just get the address. Handle the two reload cases. - Add EXTRA_OFFSET to the address we return. */ +/* Similar, but just get the address. Handle the two reload cases. */ rtx -get_unaligned_address (ref, extra_offset) +get_unaligned_address (ref) rtx ref; - int extra_offset; { rtx base; HOST_WIDE_INT offset = 0; - if (GET_CODE (ref) != MEM) - abort (); - - if (reload_in_progress - && ! memory_address_p (GET_MODE (ref), XEXP (ref, 0))) + if (GET_CODE (ref) == SUBREG) { - base = find_replacement (&XEXP (ref, 0)); - - if (! memory_address_p (GET_MODE (ref), base)) - abort (); + offset = SUBREG_WORD (ref) * UNITS_PER_WORD; + if (BYTES_BIG_ENDIAN) + offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref))) + - MIN (UNITS_PER_WORD, + GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref))))); + ref = SUBREG_REG (ref); } + + if (GET_CODE (ref) == REG) + ref = reg_equiv_mem[REGNO (ref)]; + + if (reload_in_progress) + base = find_replacement (&XEXP (ref, 0)); else - { - base = XEXP (ref, 0); - } + base = XEXP (ref, 0); if (GET_CODE (base) == PLUS) offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0); - return plus_constant (base, offset + extra_offset); + return plus_constant (base, offset); } /* Subfunction of the following function. Update the flags of any MEM @@ -1034,15 +628,6 @@ alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p) MEM_IN_STRUCT_P (x) = in_struct_p; MEM_VOLATILE_P (x) = volatile_p; RTX_UNCHANGING_P (x) = unchanging_p; - /* Sadly, we cannot use alias sets because the extra aliasing - produced by the AND interferes. Given that two-byte quantities - are the only thing we would be able to differentiate anyway, - there does not seem to be any point in convoluting the early - out of the alias check. */ - /* MEM_ALIAS_SET (x) = alias_set; */ - break; - - default: break; } } @@ -1058,19 +643,14 @@ alpha_set_memflags (insn, ref) rtx insn; rtx ref; { - int in_struct_p, volatile_p, unchanging_p; + /* Note that it is always safe to get these flags, though they won't + be what we think if REF is not a MEM. */ + int in_struct_p = MEM_IN_STRUCT_P (ref); + int volatile_p = MEM_VOLATILE_P (ref); + int unchanging_p = RTX_UNCHANGING_P (ref); - if (GET_CODE (ref) != MEM) - return; - - in_struct_p = MEM_IN_STRUCT_P (ref); - volatile_p = MEM_VOLATILE_P (ref); - unchanging_p = RTX_UNCHANGING_P (ref); - - /* This is only called from alpha.md, after having had something - generated from one of the insn patterns. So if everything is - zero, the pattern is already up-to-date. */ - if (! in_struct_p && ! volatile_p && ! unchanging_p) + if (GET_CODE (ref) != MEM + || (! in_struct_p && ! volatile_p && ! unchanging_p)) return; alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p); @@ -1089,26 +669,6 @@ alpha_emit_set_const (target, mode, c, n) HOST_WIDE_INT c; int n; { - rtx pat; - int i; - - /* Try 1 insn, then 2, then up to N. */ - for (i = 1; i <= n; i++) - if ((pat = alpha_emit_set_const_1 (target, mode, c, i)) != 0) - return pat; - - return 0; -} - -/* Internal routine for the above to check for N or below insns. */ - -static rtx -alpha_emit_set_const_1 (target, mode, c, n) - rtx target; - enum machine_mode mode; - HOST_WIDE_INT c; - int n; -{ HOST_WIDE_INT new = c; int i, bits; /* Use a pseudo if highly optimizing and still generating RTL. */ @@ -1128,10 +688,12 @@ alpha_emit_set_const_1 (target, mode, c, n) /* If this is a sign-extended 32-bit constant, we can do this in at most three insns, so do it if we have enough insns left. We always have - a sign-extended 32-bit constant when compiling on a narrow machine. */ + a sign-extended 32-bit constant when compiling on a narrow machine. + Note that we cannot handle the constant 0x80000000. */ - if (HOST_BITS_PER_WIDE_INT != 64 - || c >> 31 == -1 || c >> 31 == 0) + if ((HOST_BITS_PER_WIDE_INT != 64 + || c >> 31 == -1 || c >> 31 == 0) + && c != 0x80000000U) { HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000); HOST_WIDE_INT tmp1 = c - low; @@ -1150,19 +712,13 @@ alpha_emit_set_const_1 (target, mode, c, n) } if (c == low || (low == 0 && extra == 0)) - { - /* We used to use copy_to_suggested_reg (GEN_INT (c), target, mode) - but that meant that we can't handle INT_MIN on 32-bit machines - (like NT/Alpha), because we recurse indefinitely through - emit_move_insn to gen_movdi. So instead, since we know exactly - what we want, create it explicitly. */ - - if (target == NULL) - target = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (c))); - return target; - } - else if (n >= 2 + (extra != 0)) + return copy_to_suggested_reg (GEN_INT (c), target, mode); + else if (n >= 2 + (extra != 0) + /* We can't do this when SImode if HIGH required adjustment. + This is because the code relies on an implicit overflow + which is invisible to the RTL. We can thus get incorrect + code if the two ldah instructions are combined. */ + && ! (mode == SImode && extra != 0)) { temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode); @@ -1228,7 +784,7 @@ alpha_emit_set_const_1 (target, mode, c, n) for (; bits > 0; bits--) if ((temp = (alpha_emit_set_const (subtarget, mode, - (unsigned HOST_WIDE_INT) (c >> bits), i))) != 0 + (unsigned HOST_WIDE_INT) c >> bits, i))) != 0 || ((temp = (alpha_emit_set_const (subtarget, mode, ((unsigned HOST_WIDE_INT) c) >> bits, i))) @@ -1239,11 +795,9 @@ alpha_emit_set_const_1 (target, mode, c, n) /* Now try high-order zero bits. Here we try the shifted-in bits as all zero and all ones. Be careful to avoid shifting outside the mode and to avoid shifting outside the host wide int size. */ - /* On narrow hosts, don't shift a 1 into the high bit, since we'll - confuse the recursive call and set all of the high 32 bits. */ if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8) - - floor_log2 (c) - 1 - (HOST_BITS_PER_WIDE_INT < 64))) > 0) + - floor_log2 (c) - 1)) > 0) for (; bits > 0; bits--) if ((temp = alpha_emit_set_const (subtarget, mode, c << bits, i)) != 0 @@ -1275,1132 +829,6 @@ alpha_emit_set_const_1 (target, mode, c, n) return 0; } - -/* Having failed to find a 3 insn sequence in alpha_emit_set_const, - fall back to a straight forward decomposition. We do this to avoid - exponential run times encountered when looking for longer sequences - with alpha_emit_set_const. */ - -rtx -alpha_emit_set_long_const (target, c1, c2) - rtx target; - HOST_WIDE_INT c1, c2; -{ - HOST_WIDE_INT d1, d2, d3, d4; - - /* Decompose the entire word */ -#if HOST_BITS_PER_WIDE_INT >= 64 - if (c2 != -(c1 < 0)) - abort (); - d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000; - c1 -= d1; - d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000; - c1 = (c1 - d2) >> 32; - d3 = ((c1 & 0xffff) ^ 0x8000) - 0x8000; - c1 -= d3; - d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000; - if (c1 != d4) - abort (); -#else - d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000; - c1 -= d1; - d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000; - if (c1 != d2) - abort (); - c2 += (d2 < 0); - d3 = ((c2 & 0xffff) ^ 0x8000) - 0x8000; - c2 -= d3; - d4 = ((c2 & 0xffffffff) ^ 0x80000000) - 0x80000000; - if (c2 != d4) - abort (); -#endif - - /* Construct the high word */ - if (d4) - { - emit_move_insn (target, GEN_INT (d4)); - if (d3) - emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d3))); - } - else - emit_move_insn (target, GEN_INT (d3)); - - /* Shift it into place */ - emit_move_insn (target, gen_rtx_ASHIFT (DImode, target, GEN_INT (32))); - - /* Add in the low bits. */ - if (d2) - emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d2))); - if (d1) - emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1))); - - return target; -} - -/* Generate the comparison for a conditional branch. */ - -rtx -alpha_emit_conditional_branch (code) - enum rtx_code code; -{ - enum rtx_code cmp_code, branch_code; - enum machine_mode cmp_mode, branch_mode = VOIDmode; - rtx op0 = alpha_compare_op0, op1 = alpha_compare_op1; - rtx tem; - - /* The general case: fold the comparison code to the types of compares - that we have, choosing the branch as necessary. */ - switch (code) - { - case EQ: case LE: case LT: case LEU: case LTU: - /* We have these compares: */ - cmp_code = code, branch_code = NE; - break; - - case NE: - /* This must be reversed. */ - cmp_code = EQ, branch_code = EQ; - break; - - case GE: case GT: case GEU: case GTU: - /* For FP, we swap them, for INT, we reverse them. */ - if (alpha_compare_fp_p) - { - cmp_code = swap_condition (code); - branch_code = NE; - tem = op0, op0 = op1, op1 = tem; - } - else - { - cmp_code = reverse_condition (code); - branch_code = EQ; - } - break; - - default: - abort (); - } - - if (alpha_compare_fp_p) - { - cmp_mode = DFmode; - if (flag_fast_math) - { - /* When we are not as concerned about non-finite values, and we - are comparing against zero, we can branch directly. */ - if (op1 == CONST0_RTX (DFmode)) - cmp_code = NIL, branch_code = code; - else if (op0 == CONST0_RTX (DFmode)) - { - /* Undo the swap we probably did just above. */ - tem = op0, op0 = op1, op1 = tem; - branch_code = swap_condition (cmp_code); - cmp_code = NIL; - } - } - else - { - /* ??? We mark the the branch mode to be CCmode to prevent the - compare and branch from being combined, since the compare - insn follows IEEE rules that the branch does not. */ - branch_mode = CCmode; - } - } - else - { - cmp_mode = DImode; - - /* The following optimizations are only for signed compares. */ - if (code != LEU && code != LTU && code != GEU && code != GTU) - { - /* Whee. Compare and branch against 0 directly. */ - if (op1 == const0_rtx) - cmp_code = NIL, branch_code = code; - - /* We want to use cmpcc/bcc when we can, since there is a zero delay - bypass between logicals and br/cmov on EV5. But we don't want to - force valid immediate constants into registers needlessly. */ - else if (GET_CODE (op1) == CONST_INT) - { - HOST_WIDE_INT v = INTVAL (op1), n = -v; - - if (! CONST_OK_FOR_LETTER_P (v, 'I') - && (CONST_OK_FOR_LETTER_P (n, 'K') - || CONST_OK_FOR_LETTER_P (n, 'L'))) - { - cmp_code = PLUS, branch_code = code; - op1 = GEN_INT (n); - } - } - } - } - - /* Force op0 into a register. */ - if (GET_CODE (op0) != REG) - op0 = force_reg (cmp_mode, op0); - - /* Emit an initial compare instruction, if necessary. */ - tem = op0; - if (cmp_code != NIL) - { - tem = gen_reg_rtx (cmp_mode); - emit_move_insn (tem, gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1)); - } - - /* Return the branch comparison. */ - return gen_rtx_fmt_ee (branch_code, branch_mode, tem, CONST0_RTX (cmp_mode)); -} - - -/* Rewrite a comparison against zero CMP of the form - (CODE (cc0) (const_int 0)) so it can be written validly in - a conditional move (if_then_else CMP ...). - If both of the operands that set cc0 are non-zero we must emit - an insn to perform the compare (it can't be done within - the conditional move). */ -rtx -alpha_emit_conditional_move (cmp, mode) - rtx cmp; - enum machine_mode mode; -{ - enum rtx_code code = GET_CODE (cmp); - enum rtx_code cmov_code = NE; - rtx op0 = alpha_compare_op0; - rtx op1 = alpha_compare_op1; - enum machine_mode cmp_mode - = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0)); - enum machine_mode cmp_op_mode = alpha_compare_fp_p ? DFmode : DImode; - enum machine_mode cmov_mode = VOIDmode; - rtx tem; - - if (alpha_compare_fp_p != FLOAT_MODE_P (mode)) - return 0; - - /* We may be able to use a conditional move directly. - This avoids emitting spurious compares. */ - if (signed_comparison_operator (cmp, cmp_op_mode) - && (!alpha_compare_fp_p || flag_fast_math) - && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode))) - return gen_rtx_fmt_ee (code, VOIDmode, op0, op1); - - /* We can't put the comparison insides a conditional move; - emit a compare instruction and put that inside the - conditional move. Make sure we emit only comparisons we have; - swap or reverse as necessary. */ - - switch (code) - { - case EQ: case LE: case LT: case LEU: case LTU: - /* We have these compares: */ - break; - - case NE: - /* This must be reversed. */ - code = reverse_condition (code); - cmov_code = EQ; - break; - - case GE: case GT: case GEU: case GTU: - /* These must be swapped. Make sure the new first operand is in - a register. */ - code = swap_condition (code); - tem = op0, op0 = op1, op1 = tem; - op0 = force_reg (cmp_mode, op0); - break; - - default: - abort (); - } - - /* ??? We mark the branch mode to be CCmode to prevent the compare - and cmov from being combined, since the compare insn follows IEEE - rules that the cmov does not. */ - if (alpha_compare_fp_p && !flag_fast_math) - cmov_mode = CCmode; - - tem = gen_reg_rtx (cmp_op_mode); - emit_move_insn (tem, gen_rtx_fmt_ee (code, cmp_op_mode, op0, op1)); - return gen_rtx_fmt_ee (cmov_code, cmov_mode, tem, CONST0_RTX (cmp_op_mode)); -} - -/* Use ext[wlq][lh] as the Architecture Handbook describes for extracting - unaligned data: - - unsigned: signed: - word: ldq_u r1,X(r11) ldq_u r1,X(r11) - ldq_u r2,X+1(r11) ldq_u r2,X+1(r11) - lda r3,X(r11) lda r3,X+2(r11) - extwl r1,r3,r1 extql r1,r3,r1 - extwh r2,r3,r2 extqh r2,r3,r2 - or r1.r2.r1 or r1,r2,r1 - sra r1,48,r1 - - long: ldq_u r1,X(r11) ldq_u r1,X(r11) - ldq_u r2,X+3(r11) ldq_u r2,X+3(r11) - lda r3,X(r11) lda r3,X(r11) - extll r1,r3,r1 extll r1,r3,r1 - extlh r2,r3,r2 extlh r2,r3,r2 - or r1.r2.r1 addl r1,r2,r1 - - quad: ldq_u r1,X(r11) - ldq_u r2,X+7(r11) - lda r3,X(r11) - extql r1,r3,r1 - extqh r2,r3,r2 - or r1.r2.r1 -*/ - -void -alpha_expand_unaligned_load (tgt, mem, size, ofs, sign) - rtx tgt, mem; - HOST_WIDE_INT size, ofs; - int sign; -{ - rtx meml, memh, addr, extl, exth; - enum machine_mode mode; - - meml = gen_reg_rtx (DImode); - memh = gen_reg_rtx (DImode); - addr = gen_reg_rtx (DImode); - extl = gen_reg_rtx (DImode); - exth = gen_reg_rtx (DImode); - - emit_move_insn (meml, - change_address (mem, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP (mem, 0), - ofs), - GEN_INT (-8)))); - - emit_move_insn (memh, - change_address (mem, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP (mem, 0), - ofs + size - 1), - GEN_INT (-8)))); - - if (sign && size == 2) - { - emit_move_insn (addr, plus_constant (XEXP (mem, 0), ofs+2)); - - emit_insn (gen_extxl (extl, meml, GEN_INT (64), addr)); - emit_insn (gen_extqh (exth, memh, addr)); - - /* We must use tgt here for the target. Alpha-vms port fails if we use - addr for the target, because addr is marked as a pointer and combine - knows that pointers are always sign-extended 32 bit values. */ - addr = expand_binop (DImode, ior_optab, extl, exth, tgt, 1, OPTAB_WIDEN); - addr = expand_binop (DImode, ashr_optab, addr, GEN_INT (48), - addr, 1, OPTAB_WIDEN); - } - else - { - emit_move_insn (addr, plus_constant (XEXP (mem, 0), ofs)); - emit_insn (gen_extxl (extl, meml, GEN_INT (size*8), addr)); - switch (size) - { - case 2: - emit_insn (gen_extwh (exth, memh, addr)); - mode = HImode; - break; - - case 4: - emit_insn (gen_extlh (exth, memh, addr)); - mode = SImode; - break; - - case 8: - emit_insn (gen_extqh (exth, memh, addr)); - mode = DImode; - break; - default: - abort(); - } - - addr = expand_binop (mode, ior_optab, gen_lowpart (mode, extl), - gen_lowpart (mode, exth), gen_lowpart (mode, tgt), - sign, OPTAB_WIDEN); - } - - if (addr != tgt) - emit_move_insn (tgt, gen_lowpart(GET_MODE (tgt), addr)); -} - -/* Similarly, use ins and msk instructions to perform unaligned stores. */ - -void -alpha_expand_unaligned_store (dst, src, size, ofs) - rtx dst, src; - HOST_WIDE_INT size, ofs; -{ - rtx dstl, dsth, addr, insl, insh, meml, memh; - - dstl = gen_reg_rtx (DImode); - dsth = gen_reg_rtx (DImode); - insl = gen_reg_rtx (DImode); - insh = gen_reg_rtx (DImode); - - meml = change_address (dst, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP (dst, 0), ofs), - GEN_INT (-8))); - memh = change_address (dst, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP (dst, 0), - ofs+size-1), - GEN_INT (-8))); - - emit_move_insn (dsth, memh); - emit_move_insn (dstl, meml); - addr = copy_addr_to_reg (plus_constant (XEXP (dst, 0), ofs)); - - if (src != const0_rtx) - { - emit_insn (gen_insxh (insh, gen_lowpart (DImode, src), - GEN_INT (size*8), addr)); - - switch (size) - { - case 2: - emit_insn (gen_inswl (insl, gen_lowpart (HImode, src), addr)); - break; - case 4: - emit_insn (gen_insll (insl, gen_lowpart (SImode, src), addr)); - break; - case 8: - emit_insn (gen_insql (insl, src, addr)); - break; - } - } - - emit_insn (gen_mskxh (dsth, dsth, GEN_INT (size*8), addr)); - - switch (size) - { - case 2: - emit_insn (gen_mskxl (dstl, dstl, GEN_INT (0xffff), addr)); - break; - case 4: - emit_insn (gen_mskxl (dstl, dstl, GEN_INT (0xffffffff), addr)); - break; - case 8: - { -#if HOST_BITS_PER_WIDE_INT == 32 - rtx msk = immed_double_const (0xffffffff, 0xffffffff, DImode); -#else - rtx msk = immed_double_const (0xffffffffffffffff, 0, DImode); -#endif - emit_insn (gen_mskxl (dstl, dstl, msk, addr)); - } - break; - } - - if (src != const0_rtx) - { - dsth = expand_binop (DImode, ior_optab, insh, dsth, dsth, 0, OPTAB_WIDEN); - dstl = expand_binop (DImode, ior_optab, insl, dstl, dstl, 0, OPTAB_WIDEN); - } - - /* Must store high before low for degenerate case of aligned. */ - emit_move_insn (memh, dsth); - emit_move_insn (meml, dstl); -} - -/* The block move code tries to maximize speed by separating loads and - stores at the expense of register pressure: we load all of the data - before we store it back out. There are two secondary effects worth - mentioning, that this speeds copying to/from aligned and unaligned - buffers, and that it makes the code significantly easier to write. */ - -#define MAX_MOVE_WORDS 8 - -/* Load an integral number of consecutive unaligned quadwords. */ - -static void -alpha_expand_unaligned_load_words (out_regs, smem, words, ofs) - rtx *out_regs; - rtx smem; - HOST_WIDE_INT words, ofs; -{ - rtx const im8 = GEN_INT (-8); - rtx const i64 = GEN_INT (64); - rtx ext_tmps[MAX_MOVE_WORDS], data_regs[MAX_MOVE_WORDS+1]; - rtx sreg, areg; - HOST_WIDE_INT i; - - /* Generate all the tmp registers we need. */ - for (i = 0; i < words; ++i) - { - data_regs[i] = out_regs[i]; - ext_tmps[i] = gen_reg_rtx (DImode); - } - data_regs[words] = gen_reg_rtx (DImode); - - if (ofs != 0) - smem = change_address (smem, GET_MODE (smem), - plus_constant (XEXP (smem, 0), ofs)); - - /* Load up all of the source data. */ - for (i = 0; i < words; ++i) - { - emit_move_insn (data_regs[i], - change_address (smem, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP(smem,0), - 8*i), - im8))); - } - emit_move_insn (data_regs[words], - change_address (smem, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP(smem,0), - 8*words - 1), - im8))); - - /* Extract the half-word fragments. Unfortunately DEC decided to make - extxh with offset zero a noop instead of zeroing the register, so - we must take care of that edge condition ourselves with cmov. */ - - sreg = copy_addr_to_reg (XEXP (smem, 0)); - areg = expand_binop (DImode, and_optab, sreg, GEN_INT (7), NULL, - 1, OPTAB_WIDEN); - for (i = 0; i < words; ++i) - { - emit_insn (gen_extxl (data_regs[i], data_regs[i], i64, sreg)); - - emit_insn (gen_extqh (ext_tmps[i], data_regs[i+1], sreg)); - emit_insn (gen_rtx_SET (VOIDmode, ext_tmps[i], - gen_rtx_IF_THEN_ELSE (DImode, - gen_rtx_EQ (DImode, areg, - const0_rtx), - const0_rtx, ext_tmps[i]))); - } - - /* Merge the half-words into whole words. */ - for (i = 0; i < words; ++i) - { - out_regs[i] = expand_binop (DImode, ior_optab, data_regs[i], - ext_tmps[i], data_regs[i], 1, OPTAB_WIDEN); - } -} - -/* Store an integral number of consecutive unaligned quadwords. DATA_REGS - may be NULL to store zeros. */ - -static void -alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs) - rtx *data_regs; - rtx dmem; - HOST_WIDE_INT words, ofs; -{ - rtx const im8 = GEN_INT (-8); - rtx const i64 = GEN_INT (64); -#if HOST_BITS_PER_WIDE_INT == 32 - rtx const im1 = immed_double_const (0xffffffff, 0xffffffff, DImode); -#else - rtx const im1 = immed_double_const (0xffffffffffffffff, 0, DImode); -#endif - rtx ins_tmps[MAX_MOVE_WORDS]; - rtx st_tmp_1, st_tmp_2, dreg; - rtx st_addr_1, st_addr_2; - HOST_WIDE_INT i; - - /* Generate all the tmp registers we need. */ - if (data_regs != NULL) - for (i = 0; i < words; ++i) - ins_tmps[i] = gen_reg_rtx(DImode); - st_tmp_1 = gen_reg_rtx(DImode); - st_tmp_2 = gen_reg_rtx(DImode); - - if (ofs != 0) - dmem = change_address (dmem, GET_MODE (dmem), - plus_constant (XEXP (dmem, 0), ofs)); - - - st_addr_2 = change_address (dmem, DImode, - gen_rtx_AND (DImode, - plus_constant (XEXP(dmem,0), - words*8 - 1), - im8)); - st_addr_1 = change_address (dmem, DImode, - gen_rtx_AND (DImode, - XEXP (dmem, 0), - im8)); - - /* Load up the destination end bits. */ - emit_move_insn (st_tmp_2, st_addr_2); - emit_move_insn (st_tmp_1, st_addr_1); - - /* Shift the input data into place. */ - dreg = copy_addr_to_reg (XEXP (dmem, 0)); - if (data_regs != NULL) - { - for (i = words-1; i >= 0; --i) - { - emit_insn (gen_insxh (ins_tmps[i], data_regs[i], i64, dreg)); - emit_insn (gen_insql (data_regs[i], data_regs[i], dreg)); - } - for (i = words-1; i > 0; --i) - { - ins_tmps[i-1] = expand_binop (DImode, ior_optab, data_regs[i], - ins_tmps[i-1], ins_tmps[i-1], 1, - OPTAB_WIDEN); - } - } - - /* Split and merge the ends with the destination data. */ - emit_insn (gen_mskxh (st_tmp_2, st_tmp_2, i64, dreg)); - emit_insn (gen_mskxl (st_tmp_1, st_tmp_1, im1, dreg)); - - if (data_regs != NULL) - { - st_tmp_2 = expand_binop (DImode, ior_optab, st_tmp_2, ins_tmps[words-1], - st_tmp_2, 1, OPTAB_WIDEN); - st_tmp_1 = expand_binop (DImode, ior_optab, st_tmp_1, data_regs[0], - st_tmp_1, 1, OPTAB_WIDEN); - } - - /* Store it all. */ - emit_move_insn (st_addr_2, st_tmp_2); - for (i = words-1; i > 0; --i) - { - emit_move_insn (change_address (dmem, DImode, - gen_rtx_AND (DImode, - plus_constant(XEXP (dmem,0), - i*8), - im8)), - data_regs ? ins_tmps[i-1] : const0_rtx); - } - emit_move_insn (st_addr_1, st_tmp_1); -} - - -/* Expand string/block move operations. - - operands[0] is the pointer to the destination. - operands[1] is the pointer to the source. - operands[2] is the number of bytes to move. - operands[3] is the alignment. */ - -int -alpha_expand_block_move (operands) - rtx operands[]; -{ - rtx bytes_rtx = operands[2]; - rtx align_rtx = operands[3]; - HOST_WIDE_INT orig_bytes = INTVAL (bytes_rtx); - HOST_WIDE_INT bytes = orig_bytes; - HOST_WIDE_INT src_align = INTVAL (align_rtx); - HOST_WIDE_INT dst_align = src_align; - rtx orig_src = operands[1]; - rtx orig_dst = operands[0]; - rtx data_regs[2*MAX_MOVE_WORDS+16]; - rtx tmp; - int i, words, ofs, nregs = 0; - - if (bytes <= 0) - return 1; - if (bytes > MAX_MOVE_WORDS*8) - return 0; - - /* Look for additional alignment information from recorded register info. */ - - tmp = XEXP (orig_src, 0); - if (GET_CODE (tmp) == REG) - { - if (REGNO_POINTER_ALIGN (REGNO (tmp)) > src_align) - src_align = REGNO_POINTER_ALIGN (REGNO (tmp)); - } - else if (GET_CODE (tmp) == PLUS - && GET_CODE (XEXP (tmp, 0)) == REG - && GET_CODE (XEXP (tmp, 1)) == CONST_INT) - { - HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1)); - int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0))); - - if (a > src_align) - { - if (a >= 8 && c % 8 == 0) - src_align = 8; - else if (a >= 4 && c % 4 == 0) - src_align = 4; - else if (a >= 2 && c % 2 == 0) - src_align = 2; - } - } - - tmp = XEXP (orig_dst, 0); - if (GET_CODE (tmp) == REG) - { - if (REGNO_POINTER_ALIGN (REGNO (tmp)) > dst_align) - dst_align = REGNO_POINTER_ALIGN (REGNO (tmp)); - } - else if (GET_CODE (tmp) == PLUS - && GET_CODE (XEXP (tmp, 0)) == REG - && GET_CODE (XEXP (tmp, 1)) == CONST_INT) - { - HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1)); - int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0))); - - if (a > dst_align) - { - if (a >= 8 && c % 8 == 0) - dst_align = 8; - else if (a >= 4 && c % 4 == 0) - dst_align = 4; - else if (a >= 2 && c % 2 == 0) - dst_align = 2; - } - } - - /* - * Load the entire block into registers. - */ - - if (GET_CODE (XEXP (orig_src, 0)) == ADDRESSOF) - { - enum machine_mode mode; - tmp = XEXP (XEXP (orig_src, 0), 0); - - /* Don't use the existing register if we're reading more than - is held in the register. Nor if there is not a mode that - handles the exact size. */ - mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 1); - if (mode != BLKmode - && GET_MODE_SIZE (GET_MODE (tmp)) >= bytes) - { - if (mode == TImode) - { - data_regs[nregs] = gen_lowpart (DImode, tmp); - data_regs[nregs+1] = gen_highpart (DImode, tmp); - nregs += 2; - } - else - data_regs[nregs++] = gen_lowpart (mode, tmp); - goto src_done; - } - - /* No appropriate mode; fall back on memory. */ - orig_src = change_address (orig_src, GET_MODE (orig_src), - copy_addr_to_reg (XEXP (orig_src, 0))); - } - - ofs = 0; - if (src_align >= 8 && bytes >= 8) - { - words = bytes / 8; - - for (i = 0; i < words; ++i) - data_regs[nregs+i] = gen_reg_rtx(DImode); - - for (i = 0; i < words; ++i) - { - emit_move_insn (data_regs[nregs+i], - change_address (orig_src, DImode, - plus_constant (XEXP (orig_src, 0), - ofs + i*8))); - } - - nregs += words; - bytes -= words * 8; - ofs += words * 8; - } - if (src_align >= 4 && bytes >= 4) - { - words = bytes / 4; - - for (i = 0; i < words; ++i) - data_regs[nregs+i] = gen_reg_rtx(SImode); - - for (i = 0; i < words; ++i) - { - emit_move_insn (data_regs[nregs+i], - change_address (orig_src, SImode, - plus_constant (XEXP (orig_src, 0), - ofs + i*4))); - } - - nregs += words; - bytes -= words * 4; - ofs += words * 4; - } - if (bytes >= 16) - { - words = bytes / 8; - - for (i = 0; i < words+1; ++i) - data_regs[nregs+i] = gen_reg_rtx(DImode); - - alpha_expand_unaligned_load_words (data_regs + nregs, orig_src, - words, ofs); - - nregs += words; - bytes -= words * 8; - ofs += words * 8; - } - if (!TARGET_BWX && bytes >= 8) - { - data_regs[nregs++] = tmp = gen_reg_rtx (DImode); - alpha_expand_unaligned_load (tmp, orig_src, 8, ofs, 0); - bytes -= 8; - ofs += 8; - } - if (!TARGET_BWX && bytes >= 4) - { - data_regs[nregs++] = tmp = gen_reg_rtx (SImode); - alpha_expand_unaligned_load (tmp, orig_src, 4, ofs, 0); - bytes -= 4; - ofs += 4; - } - if (bytes >= 2) - { - if (src_align >= 2) - { - do { - data_regs[nregs++] = tmp = gen_reg_rtx (HImode); - emit_move_insn (tmp, - change_address (orig_src, HImode, - plus_constant (XEXP (orig_src, 0), - ofs))); - bytes -= 2; - ofs += 2; - } while (bytes >= 2); - } - else if (!TARGET_BWX) - { - data_regs[nregs++] = tmp = gen_reg_rtx (HImode); - alpha_expand_unaligned_load (tmp, orig_src, 2, ofs, 0); - bytes -= 2; - ofs += 2; - } - } - while (bytes > 0) - { - data_regs[nregs++] = tmp = gen_reg_rtx (QImode); - emit_move_insn (tmp, - change_address (orig_src, QImode, - plus_constant (XEXP (orig_src, 0), - ofs))); - bytes -= 1; - ofs += 1; - } - src_done: - - if (nregs > (int)(sizeof(data_regs)/sizeof(*data_regs))) - abort(); - - /* - * Now save it back out again. - */ - - i = 0, ofs = 0; - - if (GET_CODE (XEXP (orig_dst, 0)) == ADDRESSOF) - { - enum machine_mode mode; - tmp = XEXP (XEXP (orig_dst, 0), 0); - - mode = mode_for_size (orig_bytes * BITS_PER_UNIT, MODE_INT, 1); - if (GET_MODE (tmp) == mode) - { - if (nregs == 1) - { - emit_move_insn (tmp, data_regs[0]); - i = 1; - goto dst_done; - } - else if (nregs == 2 && mode == TImode) - { - /* Undo the subregging done above when copying between - two TImode registers. */ - if (GET_CODE (data_regs[0]) == SUBREG - && GET_MODE (SUBREG_REG (data_regs[0])) == TImode) - { - emit_move_insn (tmp, SUBREG_REG (data_regs[0])); - } - else - { - rtx seq; - - start_sequence (); - emit_move_insn (gen_lowpart (DImode, tmp), data_regs[0]); - emit_move_insn (gen_highpart (DImode, tmp), data_regs[1]); - seq = get_insns (); - end_sequence (); - - emit_no_conflict_block (seq, tmp, data_regs[0], - data_regs[1], NULL_RTX); - } - - i = 2; - goto dst_done; - } - } - - /* ??? If nregs > 1, consider reconstructing the word in regs. */ - /* ??? Optimize mode < dst_mode with strict_low_part. */ - - /* No appropriate mode; fall back on memory. We can speed things - up by recognizing extra alignment information. */ - orig_dst = change_address (orig_dst, GET_MODE (orig_dst), - copy_addr_to_reg (XEXP (orig_dst, 0))); - dst_align = GET_MODE_SIZE (GET_MODE (tmp)); - } - - /* Write out the data in whatever chunks reading the source allowed. */ - if (dst_align >= 8) - { - while (i < nregs && GET_MODE (data_regs[i]) == DImode) - { - emit_move_insn (change_address (orig_dst, DImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - data_regs[i]); - ofs += 8; - i++; - } - } - if (dst_align >= 4) - { - /* If the source has remaining DImode regs, write them out in - two pieces. */ - while (i < nregs && GET_MODE (data_regs[i]) == DImode) - { - tmp = expand_binop (DImode, lshr_optab, data_regs[i], GEN_INT (32), - NULL_RTX, 1, OPTAB_WIDEN); - - emit_move_insn (change_address (orig_dst, SImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - gen_lowpart (SImode, data_regs[i])); - emit_move_insn (change_address (orig_dst, SImode, - plus_constant (XEXP (orig_dst, 0), - ofs+4)), - gen_lowpart (SImode, tmp)); - ofs += 8; - i++; - } - - while (i < nregs && GET_MODE (data_regs[i]) == SImode) - { - emit_move_insn (change_address(orig_dst, SImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - data_regs[i]); - ofs += 4; - i++; - } - } - if (i < nregs && GET_MODE (data_regs[i]) == DImode) - { - /* Write out a remaining block of words using unaligned methods. */ - - for (words = 1; i+words < nregs ; ++words) - if (GET_MODE (data_regs[i+words]) != DImode) - break; - - if (words == 1) - alpha_expand_unaligned_store (orig_dst, data_regs[i], 8, ofs); - else - alpha_expand_unaligned_store_words (data_regs+i, orig_dst, words, ofs); - - i += words; - ofs += words * 8; - } - - /* Due to the above, this won't be aligned. */ - /* ??? If we have more than one of these, consider constructing full - words in registers and using alpha_expand_unaligned_store_words. */ - while (i < nregs && GET_MODE (data_regs[i]) == SImode) - { - alpha_expand_unaligned_store (orig_dst, data_regs[i], 4, ofs); - ofs += 4; - i++; - } - - if (dst_align >= 2) - while (i < nregs && GET_MODE (data_regs[i]) == HImode) - { - emit_move_insn (change_address (orig_dst, HImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - data_regs[i]); - i++; - ofs += 2; - } - else - while (i < nregs && GET_MODE (data_regs[i]) == HImode) - { - alpha_expand_unaligned_store (orig_dst, data_regs[i], 2, ofs); - i++; - ofs += 2; - } - while (i < nregs && GET_MODE (data_regs[i]) == QImode) - { - emit_move_insn (change_address (orig_dst, QImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - data_regs[i]); - i++; - ofs += 1; - } - dst_done: - - if (i != nregs) - abort(); - - return 1; -} - -int -alpha_expand_block_clear (operands) - rtx operands[]; -{ - rtx bytes_rtx = operands[1]; - rtx align_rtx = operands[2]; - HOST_WIDE_INT bytes = INTVAL (bytes_rtx); - HOST_WIDE_INT align = INTVAL (align_rtx); - rtx orig_dst = operands[0]; - rtx tmp; - HOST_WIDE_INT i, words, ofs = 0; - - if (bytes <= 0) - return 1; - if (bytes > MAX_MOVE_WORDS*8) - return 0; - - /* Look for stricter alignment. */ - - tmp = XEXP (orig_dst, 0); - if (GET_CODE (tmp) == REG) - { - if (REGNO_POINTER_ALIGN (REGNO (tmp)) > align) - align = REGNO_POINTER_ALIGN (REGNO (tmp)); - } - else if (GET_CODE (tmp) == PLUS - && GET_CODE (XEXP (tmp, 0)) == REG - && GET_CODE (XEXP (tmp, 1)) == CONST_INT) - { - HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1)); - int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0))); - - if (a > align) - { - if (a >= 8 && c % 8 == 0) - align = 8; - else if (a >= 4 && c % 4 == 0) - align = 4; - else if (a >= 2 && c % 2 == 0) - align = 2; - } - } - else if (GET_CODE (tmp) == ADDRESSOF) - { - enum machine_mode mode; - - mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 1); - if (GET_MODE (XEXP (tmp, 0)) == mode) - { - emit_move_insn (XEXP (tmp, 0), const0_rtx); - return 1; - } - - /* No appropriate mode; fall back on memory. */ - orig_dst = change_address (orig_dst, GET_MODE (orig_dst), - copy_addr_to_reg (tmp)); - align = GET_MODE_SIZE (GET_MODE (XEXP (tmp, 0))); - } - - /* Handle a block of contiguous words first. */ - - if (align >= 8 && bytes >= 8) - { - words = bytes / 8; - - for (i = 0; i < words; ++i) - { - emit_move_insn (change_address(orig_dst, DImode, - plus_constant (XEXP (orig_dst, 0), - ofs + i*8)), - const0_rtx); - } - - bytes -= words * 8; - ofs += words * 8; - } - if (align >= 4 && bytes >= 4) - { - words = bytes / 4; - - for (i = 0; i < words; ++i) - { - emit_move_insn (change_address (orig_dst, SImode, - plus_constant (XEXP (orig_dst, 0), - ofs + i*4)), - const0_rtx); - } - - bytes -= words * 4; - ofs += words * 4; - } - if (bytes >= 16) - { - words = bytes / 8; - - alpha_expand_unaligned_store_words (NULL, orig_dst, words, ofs); - - bytes -= words * 8; - ofs += words * 8; - } - - /* Next clean up any trailing pieces. We know from the contiguous - block move that there are no aligned SImode or DImode hunks left. */ - - if (!TARGET_BWX && bytes >= 8) - { - alpha_expand_unaligned_store (orig_dst, const0_rtx, 8, ofs); - bytes -= 8; - ofs += 8; - } - if (!TARGET_BWX && bytes >= 4) - { - alpha_expand_unaligned_store (orig_dst, const0_rtx, 4, ofs); - bytes -= 4; - ofs += 4; - } - if (bytes >= 2) - { - if (align >= 2) - { - do { - emit_move_insn (change_address (orig_dst, HImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - const0_rtx); - bytes -= 2; - ofs += 2; - } while (bytes >= 2); - } - else if (!TARGET_BWX) - { - alpha_expand_unaligned_store (orig_dst, const0_rtx, 2, ofs); - bytes -= 2; - ofs += 2; - } - } - while (bytes > 0) - { - emit_move_insn (change_address (orig_dst, QImode, - plus_constant (XEXP (orig_dst, 0), - ofs)), - const0_rtx); - bytes -= 1; - ofs += 1; - } - - return 1; -} - /* Adjust the cost of a scheduling dependency. Return the new cost of a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ @@ -2412,8 +840,7 @@ alpha_adjust_cost (insn, link, dep_insn, cost) rtx dep_insn; int cost; { - rtx set, set_src; - enum attr_type insn_type, dep_insn_type; + rtx set; /* If the dependence is an anti-dependence, there is no cost. For an output dependence, there is sometimes a cost, but it doesn't seem @@ -2422,224 +849,59 @@ alpha_adjust_cost (insn, link, dep_insn, cost) if (REG_NOTE_KIND (link) != 0) return 0; - /* If we can't recognize the insns, we can't really do anything. */ - if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0) - return cost; - - insn_type = get_attr_type (insn); - dep_insn_type = get_attr_type (dep_insn); - - /* Bring in the user-defined memory latency. */ - if (dep_insn_type == TYPE_ILD - || dep_insn_type == TYPE_FLD - || dep_insn_type == TYPE_LDSYM) - cost += alpha_memory_latency-1; - - switch (alpha_cpu) - { - case PROCESSOR_EV4: - /* On EV4, if INSN is a store insn and DEP_INSN is setting the data - being stored, we can sometimes lower the cost. */ - - if ((insn_type == TYPE_IST || insn_type == TYPE_FST) - && (set = single_set (dep_insn)) != 0 - && GET_CODE (PATTERN (insn)) == SET - && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn)))) - { - switch (dep_insn_type) - { - case TYPE_ILD: - case TYPE_FLD: - /* No savings here. */ - return cost; - - case TYPE_IMUL: - /* In these cases, we save one cycle. */ - return cost - 1; - - default: - /* In all other cases, we save two cycles. */ - return MAX (0, cost - 2); - } - } - - /* Another case that needs adjustment is an arithmetic or logical - operation. It's cost is usually one cycle, but we default it to - two in the MD file. The only case that it is actually two is - for the address in loads, stores, and jumps. */ - - if (dep_insn_type == TYPE_IADD || dep_insn_type == TYPE_ILOG) - { - switch (insn_type) - { - case TYPE_ILD: - case TYPE_IST: - case TYPE_FLD: - case TYPE_FST: - case TYPE_JSR: - return cost; - default: - return 1; - } - } - - /* The final case is when a compare feeds into an integer branch; - the cost is only one cycle in that case. */ - - if (dep_insn_type == TYPE_ICMP && insn_type == TYPE_IBR) - return 1; - break; - - case PROCESSOR_EV5: - /* And the lord DEC saith: "A special bypass provides an effective - latency of 0 cycles for an ICMP or ILOG insn producing the test - operand of an IBR or ICMOV insn." */ + /* If INSN is a store insn and DEP_INSN is setting the data being stored, + we can sometimes lower the cost. */ - if ((dep_insn_type == TYPE_ICMP || dep_insn_type == TYPE_ILOG) - && (set = single_set (dep_insn)) != 0) - { - /* A branch only has one input. This must be it. */ - if (insn_type == TYPE_IBR) - return 0; - /* A conditional move has three, make sure it is the test. */ - if (insn_type == TYPE_ICMOV - && GET_CODE (set_src = PATTERN (insn)) == SET - && GET_CODE (set_src = SET_SRC (set_src)) == IF_THEN_ELSE - && rtx_equal_p (SET_DEST (set), XEXP (set_src, 0))) - return 0; - } + if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST + && (set = single_set (dep_insn)) != 0 + && GET_CODE (PATTERN (insn)) == SET + && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn)))) + switch (get_attr_type (dep_insn)) + { + case TYPE_LD: + /* No savings here. */ + return cost; + + case TYPE_IMULL: + case TYPE_IMULQ: + /* In these cases, we save one cycle. */ + return cost - 2; + + default: + /* In all other cases, we save two cycles. */ + return MAX (0, cost - 4); + } - /* "The multiplier is unable to receive data from IEU bypass paths. - The instruction issues at the expected time, but its latency is - increased by the time it takes for the input data to become - available to the multiplier" -- which happens in pipeline stage - six, when results are comitted to the register file. */ + /* Another case that needs adjustment is an arithmetic or logical + operation. It's cost is usually one cycle, but we default it to + two in the MD file. The only case that it is actually two is + for the address in loads and stores. */ - if (insn_type == TYPE_IMUL) - { - switch (dep_insn_type) - { - /* These insns produce their results in pipeline stage five. */ - case TYPE_ILD: - case TYPE_ICMOV: - case TYPE_IMUL: - case TYPE_MVI: - return cost + 1; - - /* Other integer insns produce results in pipeline stage four. */ - default: - return cost + 2; - } - } - break; + if (recog_memoized (dep_insn) >= 0 + && get_attr_type (dep_insn) == TYPE_IADDLOG) + switch (get_attr_type (insn)) + { + case TYPE_LD: + case TYPE_ST: + return cost; - case PROCESSOR_EV6: - /* There is additional latency to move the result of (most) FP - operations anywhere but the FP register file. */ + default: + return 2; + } - if ((insn_type == TYPE_FST || insn_type == TYPE_FTOI) - && (dep_insn_type == TYPE_FADD || - dep_insn_type == TYPE_FMUL || - dep_insn_type == TYPE_FCMOV)) - return cost + 2; + /* The final case is when a compare feeds into an integer branch. The cost + is only one cycle in that case. */ - break; - } + if (recog_memoized (dep_insn) >= 0 + && get_attr_type (dep_insn) == TYPE_ICMP + && recog_memoized (insn) >= 0 + && get_attr_type (insn) == TYPE_IBR) + return 2; /* Otherwise, return the default cost. */ - return cost; -} - -/* Functions to save and restore alpha_return_addr_rtx. */ - -struct machine_function -{ - rtx ra_rtx; -}; - -static void -alpha_save_machine_status (p) - struct function *p; -{ - struct machine_function *machine = - (struct machine_function *) xmalloc (sizeof (struct machine_function)); - - p->machine = machine; - machine->ra_rtx = alpha_return_addr_rtx; -} - -static void -alpha_restore_machine_status (p) - struct function *p; -{ - struct machine_function *machine = p->machine; - - alpha_return_addr_rtx = machine->ra_rtx; - - free (machine); - p->machine = (struct machine_function *)0; -} -/* Do anything needed before RTL is emitted for each function. */ - -void -alpha_init_expanders () -{ - alpha_return_addr_rtx = NULL_RTX; - alpha_eh_epilogue_sp_ofs = NULL_RTX; - - /* Arrange to save and restore machine status around nested functions. */ - save_machine_status = alpha_save_machine_status; - restore_machine_status = alpha_restore_machine_status; -} - -/* Start the ball rolling with RETURN_ADDR_RTX. */ - -rtx -alpha_return_addr (count, frame) - int count; - rtx frame ATTRIBUTE_UNUSED; -{ - rtx init; - - if (count != 0) - return const0_rtx; - - if (alpha_return_addr_rtx) - return alpha_return_addr_rtx; - - /* No rtx yet. Invent one, and initialize it from $26 in the prologue. */ - alpha_return_addr_rtx = gen_reg_rtx (Pmode); - init = gen_rtx_SET (VOIDmode, alpha_return_addr_rtx, - gen_rtx_REG (Pmode, REG_RA)); - - /* Emit the insn to the prologue with the other argument copies. */ - push_topmost_sequence (); - emit_insn_after (init, get_insns ()); - pop_topmost_sequence (); - - return alpha_return_addr_rtx; -} - -static int -alpha_ra_ever_killed () -{ - rtx top; - -#ifdef ASM_OUTPUT_MI_THUNK - if (current_function_is_thunk) - return 0; -#endif - if (!alpha_return_addr_rtx) - return regs_ever_live[REG_RA]; - - push_topmost_sequence (); - top = get_insns (); - pop_topmost_sequence (); - - return reg_set_between_p (gen_rtx_REG (Pmode, REG_RA), top, NULL_RTX); + return cost; } - /* Print an operand. Recognize special options, documented below. */ @@ -2653,115 +915,6 @@ print_operand (file, x, code) switch (code) { - case '&': - /* Generates fp-rounding mode suffix: nothing for normal, 'c' for - chopped, 'm' for minus-infinity, and 'd' for dynamic rounding - mode. alpha_fprm controls which suffix is generated. */ - switch (alpha_fprm) - { - case ALPHA_FPRM_NORM: - break; - case ALPHA_FPRM_MINF: - fputc ('m', file); - break; - case ALPHA_FPRM_CHOP: - fputc ('c', file); - break; - case ALPHA_FPRM_DYN: - fputc ('d', file); - break; - } - break; - - case '\'': - /* Generates trap-mode suffix for instructions that accept the su - suffix only (cmpt et al). */ - if (alpha_tp == ALPHA_TP_INSN) - fputs ("su", file); - break; - - case '`': - /* Generates trap-mode suffix for instructions that accept the - v and sv suffix. The only instruction that needs this is cvtql. */ - switch (alpha_fptm) - { - case ALPHA_FPTM_N: - break; - case ALPHA_FPTM_U: - fputs ("v", file); - break; - case ALPHA_FPTM_SU: - case ALPHA_FPTM_SUI: - fputs ("sv", file); - break; - } - break; - - case '(': - /* Generates trap-mode suffix for instructions that accept the - v, sv, and svi suffix. The only instruction that needs this - is cvttq. */ - switch (alpha_fptm) - { - case ALPHA_FPTM_N: - break; - case ALPHA_FPTM_U: - fputs ("v", file); - break; - case ALPHA_FPTM_SU: - fputs ("sv", file); - break; - case ALPHA_FPTM_SUI: - fputs ("svi", file); - break; - } - break; - - case ')': - /* Generates trap-mode suffix for instructions that accept the u, su, - and sui suffix. This is the bulk of the IEEE floating point - instructions (addt et al). */ - switch (alpha_fptm) - { - case ALPHA_FPTM_N: - break; - case ALPHA_FPTM_U: - fputc ('u', file); - break; - case ALPHA_FPTM_SU: - fputs ("su", file); - break; - case ALPHA_FPTM_SUI: - fputs ("sui", file); - break; - } - break; - - case '+': - /* Generates trap-mode suffix for instructions that accept the sui - suffix (cvtqt and cvtqs). */ - switch (alpha_fptm) - { - case ALPHA_FPTM_N: - case ALPHA_FPTM_U: - case ALPHA_FPTM_SU: /* cvtqt/cvtqs can't cause underflow */ - break; - case ALPHA_FPTM_SUI: - fputs ("sui", file); - break; - } - break; - - case ',': - /* Generates single precision instruction suffix. */ - fprintf (file, "%c", (TARGET_FLOAT_VAX ? 'f' : 's')); - break; - - case '-': - /* Generates double precision instruction suffix. */ - fprintf (file, "%c", (TARGET_FLOAT_VAX ? 'g' : 't')); - break; - case 'r': /* If this operand is the constant zero, write it as "$31". */ if (GET_CODE (x) == REG) @@ -2789,7 +942,7 @@ print_operand (file, x, code) if (GET_CODE (x) != CONST_INT) output_operand_lossage ("invalid %%N value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x)); + fprintf (file, "%ld", ~ INTVAL (x)); break; case 'P': @@ -2797,7 +950,7 @@ print_operand (file, x, code) if (GET_CODE (x) != CONST_INT) output_operand_lossage ("invalid %%P value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x)); + fprintf (file, "%ld", (HOST_WIDE_INT) 1 << INTVAL (x)); break; case 'h': @@ -2805,7 +958,7 @@ print_operand (file, x, code) if (GET_CODE (x) != CONST_INT) output_operand_lossage ("invalid %%h value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16); + fprintf (file, "%ld", INTVAL (x) >> 16); break; case 'L': @@ -2813,8 +966,7 @@ print_operand (file, x, code) if (GET_CODE (x) != CONST_INT) output_operand_lossage ("invalid %%L value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000)); + fprintf (file, "%ld", (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000)); break; case 'm': @@ -2836,7 +988,7 @@ print_operand (file, x, code) if (value & 0xff) mask |= (1 << (i + sizeof (int))); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff); + fprintf (file, "%ld", mask & 0xff); } else if (GET_CODE (x) == CONST_INT) @@ -2847,24 +999,20 @@ print_operand (file, x, code) if (value & 0xff) mask |= (1 << i); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask); + fprintf (file, "%ld", mask); } else output_operand_lossage ("invalid %%m value"); break; case 'M': - /* 'b', 'w', 'l', or 'q' as the value of the constant. */ + /* 'b', 'w', or 'l' as the value of the constant. */ if (GET_CODE (x) != CONST_INT - || (INTVAL (x) != 8 && INTVAL (x) != 16 - && INTVAL (x) != 32 && INTVAL (x) != 64)) + || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32)) output_operand_lossage ("invalid %%M value"); fprintf (file, "%s", - (INTVAL (x) == 8 ? "b" - : INTVAL (x) == 16 ? "w" - : INTVAL (x) == 32 ? "l" - : "q")); + INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l"); break; case 'U': @@ -2873,24 +1021,14 @@ print_operand (file, x, code) fprintf (file, "b"); else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff) fprintf (file, "w"); - else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff) - fprintf (file, "l"); #if HOST_BITS_PER_WIDE_INT == 32 else if (GET_CODE (x) == CONST_DOUBLE && CONST_DOUBLE_HIGH (x) == 0 && CONST_DOUBLE_LOW (x) == -1) fprintf (file, "l"); - else if (GET_CODE (x) == CONST_DOUBLE - && CONST_DOUBLE_HIGH (x) == -1 - && CONST_DOUBLE_LOW (x) == -1) - fprintf (file, "q"); #else - else if (GET_CODE (x) == CONST_INT && INTVAL (x) == -1) - fprintf (file, "q"); - else if (GET_CODE (x) == CONST_DOUBLE - && CONST_DOUBLE_HIGH (x) == 0 - && CONST_DOUBLE_LOW (x) == -1) - fprintf (file, "q"); + else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff) + fprintf (file, "l"); #endif else output_operand_lossage ("invalid %%U value"); @@ -2903,7 +1041,7 @@ print_operand (file, x, code) && (INTVAL (x) & 7) != 8) output_operand_lossage ("invalid %%s value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) / 8); + fprintf (file, "%ld", INTVAL (x) / 8); break; case 'S': @@ -2914,31 +1052,46 @@ print_operand (file, x, code) && (INTVAL (x) & 7) != 8) output_operand_lossage ("invalid %%s value"); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, (64 - INTVAL (x)) / 8); + fprintf (file, "%ld", (64 - INTVAL (x)) / 8); break; - case 'C': case 'D': case 'c': case 'd': + case 'C': /* Write out comparison name. */ - { - enum rtx_code c = GET_CODE (x); - - if (GET_RTX_CLASS (c) != '<') - output_operand_lossage ("invalid %%C value"); - - if (code == 'D') - c = reverse_condition (c); - else if (code == 'c') - c = swap_condition (c); - else if (code == 'd') - c = swap_condition (reverse_condition (c)); - - if (c == LEU) - fprintf (file, "ule"); - else if (c == LTU) - fprintf (file, "ult"); - else - fprintf (file, "%s", GET_RTX_NAME (c)); - } + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%C value"); + + if (GET_CODE (x) == LEU) + fprintf (file, "ule"); + else if (GET_CODE (x) == LTU) + fprintf (file, "ult"); + else + fprintf (file, "%s", GET_RTX_NAME (GET_CODE (x))); + break; + + case 'D': + /* Similar, but write reversed code. We can't get an unsigned code + here. */ + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%D value"); + + fprintf (file, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x)))); + break; + + case 'c': + /* Similar to `c', but swap. We can't get unsigned here either. */ + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%D value"); + + fprintf (file, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x)))); + break; + + case 'd': + /* Similar, but reverse and swap. We can't get unsigned here either. */ + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%D value"); + + fprintf (file, "%s", + GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x)))))); break; case 'E': @@ -2982,100 +1135,6 @@ print_operand (file, x, code) output_operand_lossage ("invalid %%xn code"); } } - -void -print_operand_address (file, addr) - FILE *file; - rtx addr; -{ - int basereg = 31; - HOST_WIDE_INT offset = 0; - - if (GET_CODE (addr) == AND) - addr = XEXP (addr, 0); - - if (GET_CODE (addr) == PLUS - && GET_CODE (XEXP (addr, 1)) == CONST_INT) - { - offset = INTVAL (XEXP (addr, 1)); - addr = XEXP (addr, 0); - } - if (GET_CODE (addr) == REG) - basereg = REGNO (addr); - else if (GET_CODE (addr) == SUBREG - && GET_CODE (SUBREG_REG (addr)) == REG) - basereg = REGNO (SUBREG_REG (addr)) + SUBREG_WORD (addr); - else if (GET_CODE (addr) == CONST_INT) - offset = INTVAL (addr); - else - abort (); - - fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset); - fprintf (file, "($%d)", basereg); -} - -/* Emit RTL insns to initialize the variable parts of a trampoline at - TRAMP. FNADDR is an RTX for the address of the function's pure - code. CXT is an RTX for the static chain value for the function. - - The three offset parameters are for the individual template's - layout. A JMPOFS < 0 indicates that the trampoline does not - contain instructions at all. - - We assume here that a function will be called many more times than - its address is taken (e.g., it might be passed to qsort), so we - take the trouble to initialize the "hint" field in the JMP insn. - Note that the hint field is PC (new) + 4 * bits 13:0. */ - -void -alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) - rtx tramp, fnaddr, cxt; - int fnofs, cxtofs, jmpofs; -{ - rtx temp, temp1, addr; - /* VMS really uses DImode pointers in memory at this point. */ - enum machine_mode mode = TARGET_OPEN_VMS ? Pmode : ptr_mode; - -#ifdef POINTERS_EXTEND_UNSIGNED - fnaddr = convert_memory_address (mode, fnaddr); - cxt = convert_memory_address (mode, cxt); -#endif - - /* Store function address and CXT. */ - addr = memory_address (mode, plus_constant (tramp, fnofs)); - emit_move_insn (gen_rtx (MEM, mode, addr), fnaddr); - addr = memory_address (mode, plus_constant (tramp, cxtofs)); - emit_move_insn (gen_rtx (MEM, mode, addr), cxt); - - /* This has been disabled since the hint only has a 32k range, and in - no existing OS is the stack within 32k of the text segment. */ - if (0 && jmpofs >= 0) - { - /* Compute hint value. */ - temp = force_operand (plus_constant (tramp, jmpofs+4), NULL_RTX); - temp = expand_binop (DImode, sub_optab, fnaddr, temp, temp, 1, - OPTAB_WIDEN); - temp = expand_shift (RSHIFT_EXPR, Pmode, temp, - build_int_2 (2, 0), NULL_RTX, 1); - temp = expand_and (gen_lowpart (SImode, temp), GEN_INT (0x3fff), 0); - - /* Merge in the hint. */ - addr = memory_address (SImode, plus_constant (tramp, jmpofs)); - temp1 = force_reg (SImode, gen_rtx (MEM, SImode, addr)); - temp1 = expand_and (temp1, GEN_INT (0xffffc000), NULL_RTX); - temp1 = expand_binop (SImode, ior_optab, temp1, temp, temp1, 1, - OPTAB_WIDEN); - emit_move_insn (gen_rtx (MEM, SImode, addr), temp1); - } - -#ifdef TRANSFER_FROM_TRAMPOLINE - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), - 0, VOIDmode, 1, addr, Pmode); -#endif - - if (jmpofs >= 0) - emit_insn (gen_imb ()); -} /* Do what is necessary for `va_start'. The argument is ignored; We look at the current function to determine if stdarg or varargs @@ -3084,9 +1143,9 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) struct rtx_def * alpha_builtin_saveregs (arglist) - tree arglist ATTRIBUTE_UNUSED; + tree arglist; { - rtx block, addr, dest, argsize; + rtx block, addr, argsize; tree fntype = TREE_TYPE (current_function_decl); int stdarg = (TYPE_ARG_TYPES (fntype) != 0 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) @@ -3094,11 +1153,11 @@ alpha_builtin_saveregs (arglist) /* Compute the current position into the args, taking into account both registers and memory. Both of these are already included in - NUM_ARGS. */ + current_function_args_info. */ - argsize = GEN_INT (NUM_ARGS * UNITS_PER_WORD); + argsize = GEN_INT (current_function_args_info * UNITS_PER_WORD); - /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base up by 48, + /* SETUP_INCOMING_VARARGS moves the starting address base up by 48, storing fp arg registers in the first 48 bytes, and the integer arg registers in the next 48 bytes. This is only done, however, if any integer registers need to be stored. @@ -3107,71 +1166,35 @@ alpha_builtin_saveregs (arglist) order to account for the integer arg registers which are counted in argsize above, but which are not actually stored on the stack. */ - if (TARGET_OPEN_VMS) - addr = plus_constant (virtual_incoming_args_rtx, - NUM_ARGS <= 5 + stdarg - ? UNITS_PER_WORD : - 6 * UNITS_PER_WORD); - else - addr = (NUM_ARGS <= 5 + stdarg - ? plus_constant (virtual_incoming_args_rtx, - 6 * UNITS_PER_WORD) - : plus_constant (virtual_incoming_args_rtx, - - (6 * UNITS_PER_WORD))); - - /* For VMS, we include the argsize, while on Unix, it's handled as - a separate field. */ - if (TARGET_OPEN_VMS) - addr = plus_constant (addr, INTVAL (argsize)); + addr = (current_function_args_info <= 5 + stdarg + ? plus_constant (virtual_incoming_args_rtx, 6 * UNITS_PER_WORD) + : plus_constant (virtual_incoming_args_rtx, - (6 * UNITS_PER_WORD))); addr = force_operand (addr, NULL_RTX); + /* Allocate the va_list constructor */ + block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD); + RTX_UNCHANGING_P (block) = 1; + RTX_UNCHANGING_P (XEXP (block, 0)) = 1; + + /* Store the address of the first integer register in the __base member. */ + #ifdef POINTERS_EXTEND_UNSIGNED addr = convert_memory_address (ptr_mode, addr); #endif - if (TARGET_OPEN_VMS) - return addr; - else - { - /* Allocate the va_list constructor */ - block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD); - RTX_UNCHANGING_P (block) = 1; - RTX_UNCHANGING_P (XEXP (block, 0)) = 1; - - /* Store the address of the first integer register in the __base - member. */ - - dest = change_address (block, ptr_mode, XEXP (block, 0)); - emit_move_insn (dest, addr); - - if (current_function_check_memory_usage) - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, - dest, ptr_mode, - GEN_INT (GET_MODE_SIZE (ptr_mode)), - TYPE_MODE (sizetype), - GEN_INT (MEMORY_USE_RW), - TYPE_MODE (integer_type_node)); - - /* Store the argsize as the __va_offset member. */ - dest = change_address (block, TYPE_MODE (integer_type_node), - plus_constant (XEXP (block, 0), - POINTER_SIZE/BITS_PER_UNIT)); - emit_move_insn (dest, argsize); - - if (current_function_check_memory_usage) - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, - dest, ptr_mode, - GEN_INT (GET_MODE_SIZE - (TYPE_MODE (integer_type_node))), - TYPE_MODE (sizetype), - GEN_INT (MEMORY_USE_RW), - TYPE_MODE (integer_type_node)); - - /* Return the address of the va_list constructor, but don't put it in a - register. Doing so would fail when not optimizing and produce worse - code when optimizing. */ - return XEXP (block, 0); - } + emit_move_insn (change_address (block, ptr_mode, XEXP (block, 0)), addr); + + /* Store the argsize as the __va_offset member. */ + emit_move_insn (change_address (block, TYPE_MODE (integer_type_node), + plus_constant (XEXP (block, 0), + POINTER_SIZE/BITS_PER_UNIT)), + argsize); + + /* Return the address of the va_list constructor, but don't put it in a + register. Doing so would fail when not optimizing and produce worse + code when optimizing. */ + return XEXP (block, 0); } /* This page contains routines that are used to determine what the function @@ -3179,293 +1202,195 @@ alpha_builtin_saveregs (arglist) /* Compute the size of the save area in the stack. */ -/* These variables are used for communication between the following functions. - They indicate various things about the current function being compiled - that are used to tell what kind of prologue, epilogue and procedure - descriptior to generate. */ - -/* Nonzero if we need a stack procedure. */ -static int vms_is_stack_procedure; - -/* Register number (either FP or SP) that is used to unwind the frame. */ -static int vms_unwind_regno; - -/* Register number used to save FP. We need not have one for RA since - we don't modify it for register procedures. This is only defined - for register frame procedures. */ -static int vms_save_fp_regno; - -/* Register number used to reference objects off our PV. */ -static int vms_base_regno; - -/* Compute register masks for saved registers. */ - -static void -alpha_sa_mask (imaskP, fmaskP) - unsigned long *imaskP; - unsigned long *fmaskP; -{ - unsigned long imask = 0; - unsigned long fmask = 0; - int i; - -#ifdef ASM_OUTPUT_MI_THUNK - if (!current_function_is_thunk) -#endif - { - if (TARGET_OPEN_VMS && vms_is_stack_procedure) - imask |= (1L << HARD_FRAME_POINTER_REGNUM); - - /* One for every register we have to save. */ - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) - if (! fixed_regs[i] && ! call_used_regs[i] - && regs_ever_live[i] && i != REG_RA) - { - if (i < 32) - imask |= (1L << i); - else - fmask |= (1L << (i - 32)); - } - - if (imask || fmask || alpha_ra_ever_killed ()) - imask |= (1L << REG_RA); - } - - *imaskP = imask; - *fmaskP = fmask; -} - int alpha_sa_size () { - int sa_size = 0; + int size = 0; int i; -#ifdef ASM_OUTPUT_MI_THUNK - if (current_function_is_thunk) - sa_size = 0; - else -#endif - { - /* One for every register we have to save. */ - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) - if (! fixed_regs[i] && ! call_used_regs[i] - && regs_ever_live[i] && i != REG_RA) - sa_size++; - } + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]) + size++; - if (TARGET_OPEN_VMS) - { - /* Start by assuming we can use a register procedure if we don't - make any calls (REG_RA not used) or need to save any - registers and a stack procedure if we do. */ - vms_is_stack_procedure = sa_size != 0 || alpha_ra_ever_killed (); - - /* Decide whether to refer to objects off our PV via FP or PV. - If we need FP for something else or if we receive a nonlocal - goto (which expects PV to contain the value), we must use PV. - Otherwise, start by assuming we can use FP. */ - vms_base_regno = (frame_pointer_needed - || current_function_has_nonlocal_label - || vms_is_stack_procedure - || current_function_outgoing_args_size - ? REG_PV : HARD_FRAME_POINTER_REGNUM); - - /* If we want to copy PV into FP, we need to find some register - in which to save FP. */ - - vms_save_fp_regno = -1; - if (vms_base_regno == HARD_FRAME_POINTER_REGNUM) - for (i = 0; i < 32; i++) - if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i]) - vms_save_fp_regno = i; - - if (vms_save_fp_regno == -1) - vms_base_regno = REG_PV, vms_is_stack_procedure = 1; - - /* Stack unwinding should be done via FP unless we use it for PV. */ - vms_unwind_regno = (vms_base_regno == REG_PV - ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM); - - /* If this is a stack procedure, allow space for saving FP and RA. */ - if (vms_is_stack_procedure) - sa_size += 2; - } - else - { - /* If some registers were saved but not RA, RA must also be saved, - so leave space for it. */ - if (sa_size != 0 || alpha_ra_ever_killed ()) - sa_size++; - - /* Our size must be even (multiple of 16 bytes). */ - if (sa_size & 1) - sa_size++; - } + /* If some registers were saved but not reg 26, reg 26 must also + be saved, so leave space for it. */ + if (size != 0 && ! regs_ever_live[26]) + size++; - return sa_size * 8; -} + /* Our size must be even (multiple of 16 bytes). */ + if (size & 1) + size ++; -int -alpha_pv_save_size () -{ - alpha_sa_size (); - return vms_is_stack_procedure ? 8 : 0; + return size * 8; } -int -alpha_using_fp () -{ - alpha_sa_size (); - return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM; -} +/* Return 1 if this function can directly return via $26. */ int -vms_valid_decl_attribute_p (decl, attributes, identifier, args) - tree decl ATTRIBUTE_UNUSED; - tree attributes ATTRIBUTE_UNUSED; - tree identifier; - tree args; -{ - if (is_attribute_p ("overlaid", identifier)) - return (args == NULL_TREE); - return 0; -} - -static int -alpha_does_function_need_gp () +direct_return () { - rtx insn; - - /* We never need a GP for Windows/NT or VMS. */ - if (TARGET_WINDOWS_NT || TARGET_OPEN_VMS) - return 0; - -#ifdef TARGET_PROFILING_NEEDS_GP - if (profile_flag) - return 1; -#endif - -#ifdef ASM_OUTPUT_MI_THUNK - if (current_function_is_thunk) - return 1; -#endif - - /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. - Even if we are a static function, we still need to do this in case - our address is taken and passed to something like qsort. */ - - push_topmost_sequence (); - insn = get_insns (); - pop_topmost_sequence (); - - for (; insn; insn = NEXT_INSN (insn)) - if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' - && GET_CODE (PATTERN (insn)) != USE - && GET_CODE (PATTERN (insn)) != CLOBBER) - { - enum attr_type type = get_attr_type (insn); - if (type == TYPE_LDSYM || type == TYPE_JSR) - return 1; - } - - return 0; + return (reload_completed && alpha_sa_size () == 0 + && get_frame_size () == 0 + && current_function_outgoing_args_size == 0 + && current_function_pretend_args_size == 0); } /* Write a version stamp. Don't write anything if we are running as a cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */ -#ifdef HAVE_STAMP_H +#if !defined(CROSS_COMPILE) && !defined(_WIN32) && \ + !defined(__NetBSD__) && !defined(__FreeBSD__) #include <stamp.h> #endif void alpha_write_verstamp (file) - FILE *file ATTRIBUTE_UNUSED; + FILE *file; { #ifdef MS_STAMP fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP); #endif } -/* Helper function to set RTX_FRAME_RELATED_P on instructions, including - sequences. */ +/* Write code to add constant C to register number IN_REG (possibly 31) + and put the result into OUT_REG. Use TEMP_REG as a scratch register; + usually this will be OUT_REG, but should not be if OUT_REG is + STACK_POINTER_REGNUM, since it must be updated in a single instruction. + Write the code to FILE. */ -static rtx -set_frame_related_p () +static void +add_long_const (file, c, in_reg, out_reg, temp_reg) + FILE *file; + HOST_WIDE_INT c; + int in_reg, out_reg, temp_reg; { - rtx seq = gen_sequence (); - end_sequence (); + HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000); + HOST_WIDE_INT tmp1 = c - low; + HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000); + HOST_WIDE_INT extra = 0; - if (GET_CODE (seq) == SEQUENCE) + /* We don't have code to write out constants larger than 32 bits. */ +#if HOST_BITS_PER_LONG_INT == 64 + if ((unsigned HOST_WIDE_INT) c >> 32 != 0) + abort (); +#endif + + /* If HIGH will be interpreted as negative, we must adjust it to do two + ldha insns. Note that we will never be building a negative constant + here. */ + + if (high & 0x8000) { - int i = XVECLEN (seq, 0); - while (--i >= 0) - RTX_FRAME_RELATED_P (XVECEXP (seq, 0, i)) = 1; - return emit_insn (seq); + extra = 0x4000; + tmp1 -= 0x40000000; + high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000); } - else + + if (low != 0) { - seq = emit_insn (seq); - RTX_FRAME_RELATED_P (seq) = 1; - return seq; - } -} + int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg; -#define FRP(exp) (start_sequence (), exp, set_frame_related_p ()) + if (low >= 0 && low < 255) + fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg); + else + fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg); -/* Write function prologue. */ + in_reg = result_reg; + } -/* On vms we have two kinds of functions: + if (extra) + { + int result_reg = (high == 0) ? out_reg : temp_reg; - - stack frame (PROC_STACK) - these are 'normal' functions with local vars and which are - calling other functions - - register frame (PROC_REGISTER) - keeps all data in registers, needs no stack + fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg); + in_reg = result_reg; + } - We must pass this to the assembler so it can generate the - proper pdsc (procedure descriptor) - This is done with the '.pdesc' command. + if (high) + fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg); +} - On not-vms, we don't really differentiate between the two, as we can - simply allocate stack without saving registers. */ +/* Write function prologue. */ void -alpha_expand_prologue () -{ - /* Registers to save. */ - unsigned long imask = 0; - unsigned long fmask = 0; - /* Stack space needed for pushing registers clobbered by us. */ - HOST_WIDE_INT sa_size; - /* Complete stack size needed. */ - HOST_WIDE_INT frame_size; - /* Offset from base reg to register save area. */ - HOST_WIDE_INT reg_offset; - rtx sa_reg, mem; +output_prolog (file, size) + FILE *file; + int size; +{ + HOST_WIDE_INT out_args_size + = ALPHA_ROUND (current_function_outgoing_args_size); + HOST_WIDE_INT sa_size = alpha_sa_size (); + HOST_WIDE_INT frame_size + = (out_args_size + sa_size + + ALPHA_ROUND (size + current_function_pretend_args_size)); + HOST_WIDE_INT reg_offset = out_args_size; + HOST_WIDE_INT start_reg_offset = reg_offset; + HOST_WIDE_INT actual_start_reg_offset = start_reg_offset; + int int_reg_save_area_size = 0; + rtx insn; + unsigned reg_mask = 0; int i; - sa_size = alpha_sa_size (); + /* Ecoff can handle multiple .file directives, so put out file and lineno. + We have to do that before the .ent directive as we cannot switch + files within procedures with native ecoff because line numbers are + linked to procedure descriptors. + Outputting the lineno helps debugging of one line functions as they + would otherwise get no line number at all. Please note that we would + like to put out last_linenum from final.c, but it is not accessible. */ - frame_size = get_frame_size (); - if (TARGET_OPEN_VMS) - frame_size = ALPHA_ROUND (sa_size - + (vms_is_stack_procedure ? 8 : 0) - + frame_size - + current_function_pretend_args_size); - else - frame_size = (ALPHA_ROUND (current_function_outgoing_args_size) - + sa_size - + ALPHA_ROUND (frame_size - + current_function_pretend_args_size)); + if (write_symbols == SDB_DEBUG) + { + ASM_OUTPUT_SOURCE_FILENAME (file, + DECL_SOURCE_FILE (current_function_decl)); + if (debug_info_level != DINFO_LEVEL_TERSE) + ASM_OUTPUT_SOURCE_LINE (file, + DECL_SOURCE_LINE (current_function_decl)); + } - if (TARGET_OPEN_VMS) - reg_offset = 8; - else - reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); + /* The assembly language programmer's guide states that the second argument + to the .ent directive, the lex_level, is ignored by the assembler, + so we might as well omit it. */ + + fprintf (file, "\t.ent "); + assemble_name (file, alpha_function_name); + fprintf (file, "\n"); + ASM_OUTPUT_LABEL (file, alpha_function_name); + inside_function = TRUE; - alpha_sa_mask (&imask, &fmask); + /* Set up offsets to alpha virtual arg/local debugging pointer. */ + + alpha_auto_offset = -frame_size + current_function_pretend_args_size; + alpha_arg_offset = -frame_size + 48; + + /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. + Even if we are a static function, we still need to do this in case + our address is taken and passed to something like qsort. + + We never need a GP for Windows/NT. */ + + alpha_function_needs_gp = 0; + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if ((GET_CODE (insn) == CALL_INSN) + || (GET_RTX_CLASS (GET_CODE (insn)) == 'i' + && GET_CODE (PATTERN (insn)) != USE + && GET_CODE (PATTERN (insn)) != CLOBBER + && (get_attr_type (insn) == TYPE_LDSYM + || get_attr_type (insn) == TYPE_ISUBR))) + { + alpha_function_needs_gp = 1; + break; + } + + if (WINDOWS_NT == 0) + { + if (alpha_function_needs_gp) + fprintf (file, "\tldgp $29,0($27)\n"); + + /* Put a label after the GP load so we can enter the function at it. */ + assemble_name (file, alpha_function_name); + fprintf (file, "..ng:\n"); + } /* Adjust the stack by the frame size. If the frame size is > 4096 bytes, we need to be sure we probe somewhere in the first and last @@ -3476,30 +1401,28 @@ alpha_expand_prologue () Note that we are only allowed to adjust sp once in the prologue. */ - if (frame_size <= 32768) + if (frame_size < 32768) { if (frame_size > 4096) { int probed = 4096; - do - emit_insn (gen_probe_stack (GEN_INT (-probed))); - while ((probed += 8192) < frame_size); + fprintf (file, "\tstq $31,-%d($30)\n", probed); + + while (probed + 8192 < frame_size) + fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192); /* We only have to do this probe if we aren't saving registers. */ if (sa_size == 0 && probed + 4096 < frame_size) - emit_insn (gen_probe_stack (GEN_INT (-frame_size))); + fprintf (file, "\tstq $31,-%d($30)\n", frame_size); } if (frame_size != 0) - { - FRP (emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, - GEN_INT (-frame_size)))); - } + fprintf (file, "\tlda $30,-%d($30)\n", frame_size); } else { - /* Here we generate code to set R22 to SP + 4096 and set R23 to the + /* Here we generate code to set R4 to SP + 4096 and set R5 to the number of 8192 byte blocks to probe. We then probe each block in the loop and then set SP to the proper location. If the amount remaining is > 4096, we have to do one more probe if we @@ -3507,588 +1430,182 @@ alpha_expand_prologue () HOST_WIDE_INT blocks = (frame_size + 4096) / 8192; HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192; - rtx ptr = gen_rtx_REG (DImode, 22); - rtx count = gen_rtx_REG (DImode, 23); - rtx seq; - emit_move_insn (count, GEN_INT (blocks)); - emit_insn (gen_adddi3 (ptr, stack_pointer_rtx, GEN_INT (4096))); + add_long_const (file, blocks, 31, 5, 5); - /* Because of the difficulty in emitting a new basic block this - late in the compilation, generate the loop as a single insn. */ - emit_insn (gen_prologue_stack_probe_loop (count, ptr)); + fprintf (file, "\tlda $4,4096($30)\n"); - if (leftover > 4096 && sa_size == 0) - { - rtx last = gen_rtx_MEM (DImode, plus_constant (ptr, -leftover)); - MEM_VOLATILE_P (last) = 1; - emit_move_insn (last, const0_rtx); - } + assemble_name (file, alpha_function_name); + fprintf (file, "..sc:\n"); - if (TARGET_WINDOWS_NT) - { - /* For NT stack unwind (done by 'reverse execution'), it's - not OK to take the result of a loop, even though the value - is already in ptr, so we reload it via a single operation - and subtract it to sp. - - Yes, that's correct -- we have to reload the whole constant - into a temporary via ldah+lda then subtract from sp. To - ensure we get ldah+lda, we use a special pattern. */ - - HOST_WIDE_INT lo, hi; - lo = ((frame_size & 0xffff) ^ 0x8000) - 0x8000; - hi = frame_size - lo; - - emit_move_insn (ptr, GEN_INT (hi)); - emit_insn (gen_nt_lda (ptr, GEN_INT (lo))); - seq = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx, - ptr)); - } - else - { - seq = emit_insn (gen_adddi3 (stack_pointer_rtx, ptr, - GEN_INT (-leftover))); - } + fprintf (file, "\tstq $31,-8192($4)\n"); + fprintf (file, "\tsubq $5,1,$5\n"); + fprintf (file, "\tlda $4,-8192($4)\n"); - /* This alternative is special, because the DWARF code cannot - possibly intuit through the loop above. So we invent this - note it looks at instead. */ - RTX_FRAME_RELATED_P (seq) = 1; - REG_NOTES (seq) - = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, - gen_rtx_SET (VOIDmode, stack_pointer_rtx, - gen_rtx_PLUS (Pmode, stack_pointer_rtx, - GEN_INT (-frame_size))), - REG_NOTES (seq)); - } - - /* Cope with very large offsets to the register save area. */ - sa_reg = stack_pointer_rtx; - if (reg_offset + sa_size > 0x8000) - { - int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000; - HOST_WIDE_INT bias; + fprintf (file, "\tbne $5,"); + assemble_name (file, alpha_function_name); + fprintf (file, "..sc\n"); - if (low + sa_size <= 0x8000) - bias = reg_offset - low, reg_offset = low; - else - bias = reg_offset, reg_offset = 0; + if (leftover > 4096 && sa_size == 0) + fprintf (file, "\tstq $31,-%d($4)\n", leftover); - sa_reg = gen_rtx_REG (DImode, 24); - FRP (emit_insn (gen_adddi3 (sa_reg, stack_pointer_rtx, GEN_INT (bias)))); - } - - /* Save regs in stack order. Beginning with VMS PV. */ - if (TARGET_OPEN_VMS && vms_is_stack_procedure) - { - mem = gen_rtx_MEM (DImode, stack_pointer_rtx); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_PV))); + fprintf (file, "\tlda $30,-%d($4)\n", leftover); } - /* Save register RA next. */ - if (imask & (1L << REG_RA)) + /* Describe our frame. */ + fprintf (file, "\t.frame $%d,%d,$26,%d\n", + (frame_pointer_needed + ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM), + frame_size, current_function_pretend_args_size); + + /* Save register 26 if any other register needs to be saved. */ + if (sa_size != 0) { - mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_RA))); - imask &= ~(1L << REG_RA); + reg_mask |= 1 << 26; + fprintf (file, "\tstq $26,%d($30)\n", reg_offset); reg_offset += 8; + int_reg_save_area_size += 8; } - /* Now save any other registers required to be saved. */ + /* Now save any other used integer registers required to be saved. */ for (i = 0; i < 32; i++) - if (imask & (1L << i)) + if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26) { - mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (mem, gen_rtx_REG (DImode, i))); + reg_mask |= 1 << i; + fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset); reg_offset += 8; + int_reg_save_area_size += 8; } + /* Print the register mask and do floating-point saves. */ + if (reg_mask) + fprintf (file, "\t.mask 0x%x,%d\n", reg_mask, + actual_start_reg_offset - frame_size); + + start_reg_offset = reg_offset; + reg_mask = 0; + for (i = 0; i < 32; i++) - if (fmask & (1L << i)) + if (! fixed_regs[i + 32] && ! call_used_regs[i + 32] + && regs_ever_live[i + 32]) { - mem = gen_rtx_MEM (DFmode, plus_constant (sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (mem, gen_rtx_REG (DFmode, i+32))); + reg_mask |= 1 << i; + fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset); reg_offset += 8; } - if (TARGET_OPEN_VMS) - { - if (!vms_is_stack_procedure) - { - /* Register frame procedures fave the fp. */ - FRP (emit_move_insn (gen_rtx_REG (DImode, vms_save_fp_regno), - hard_frame_pointer_rtx)); - } - - if (vms_base_regno != REG_PV) - FRP (emit_move_insn (gen_rtx_REG (DImode, vms_base_regno), - gen_rtx_REG (DImode, REG_PV))); - - if (vms_unwind_regno == HARD_FRAME_POINTER_REGNUM) - { - FRP (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx)); - } - - /* If we have to allocate space for outgoing args, do it now. */ - if (current_function_outgoing_args_size != 0) - { - FRP (emit_move_insn (stack_pointer_rtx, - plus_constant (hard_frame_pointer_rtx, - - ALPHA_ROUND (current_function_outgoing_args_size)))); - } - } - else - { - /* If we need a frame pointer, set it from the stack pointer. */ - if (frame_pointer_needed) - { - if (TARGET_CAN_FAULT_IN_PROLOGUE) - FRP (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx)); - else - { - /* This must always be the last instruction in the - prologue, thus we emit a special move + clobber. */ - FRP (emit_insn (gen_init_fp (hard_frame_pointer_rtx, - stack_pointer_rtx, sa_reg))); - } - } - } + /* Print the floating-point mask, if we've saved any fp register. */ + if (reg_mask) + fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask, + actual_start_reg_offset - frame_size + int_reg_save_area_size); - /* The ABIs for VMS and OSF/1 say that while we can schedule insns into - the prologue, for exception handling reasons, we cannot do this for - any insn that might fault. We could prevent this for mems with a - (clobber:BLK (scratch)), but this doesn't work for fp insns. So we - have to prevent all such scheduling with a blockage. + /* If we need a frame pointer, set it from the stack pointer. Note that + this must always be the last instruction in the prologue. */ + if (frame_pointer_needed) + fprintf (file, "\tbis $30,$30,$15\n"); - Linux, on the other hand, never bothered to implement OSF/1's - exception handling, and so doesn't care about such things. Anyone - planning to use dwarf2 frame-unwind info can also omit the blockage. */ - - if (! TARGET_CAN_FAULT_IN_PROLOGUE) - emit_insn (gen_blockage ()); + /* End the prologue and say if we used gp. */ + fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp); } -/* Output the textual info surrounding the prologue. */ +/* Write function epilogue. */ void -alpha_start_function (file, fnname, decl) +output_epilog (file, size) FILE *file; - char *fnname; - tree decl ATTRIBUTE_UNUSED; -{ - unsigned long imask = 0; - unsigned long fmask = 0; - /* Stack space needed for pushing registers clobbered by us. */ - HOST_WIDE_INT sa_size; - /* Complete stack size needed. */ - HOST_WIDE_INT frame_size; - /* Offset from base reg to register save area. */ - HOST_WIDE_INT reg_offset; - char *entry_label = (char *) alloca (strlen (fnname) + 6); + int size; +{ + rtx insn = get_last_insn (); + HOST_WIDE_INT out_args_size + = ALPHA_ROUND (current_function_outgoing_args_size); + HOST_WIDE_INT sa_size = alpha_sa_size (); + HOST_WIDE_INT frame_size + = (out_args_size + sa_size + + ALPHA_ROUND (size + current_function_pretend_args_size)); + HOST_WIDE_INT reg_offset = out_args_size; + HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset; + int restore_fp + = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM]; int i; - sa_size = alpha_sa_size (); - - frame_size = get_frame_size (); - if (TARGET_OPEN_VMS) - frame_size = ALPHA_ROUND (sa_size - + (vms_is_stack_procedure ? 8 : 0) - + frame_size - + current_function_pretend_args_size); - else - frame_size = (ALPHA_ROUND (current_function_outgoing_args_size) - + sa_size - + ALPHA_ROUND (frame_size - + current_function_pretend_args_size)); - - if (TARGET_OPEN_VMS) - reg_offset = 8; - else - reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); - - alpha_sa_mask (&imask, &fmask); - - /* Ecoff can handle multiple .file directives, so put out file and lineno. - We have to do that before the .ent directive as we cannot switch - files within procedures with native ecoff because line numbers are - linked to procedure descriptors. - Outputting the lineno helps debugging of one line functions as they - would otherwise get no line number at all. Please note that we would - like to put out last_linenum from final.c, but it is not accessible. */ - - if (write_symbols == SDB_DEBUG) - { - ASM_OUTPUT_SOURCE_FILENAME (file, - DECL_SOURCE_FILE (current_function_decl)); - if (debug_info_level != DINFO_LEVEL_TERSE) - ASM_OUTPUT_SOURCE_LINE (file, - DECL_SOURCE_LINE (current_function_decl)); - } - - /* Issue function start and label. */ - if (TARGET_OPEN_VMS || !flag_inhibit_size_directive) + /* If the last insn was a BARRIER, we don't have to write anything except + the .end pseudo-op. */ + if (GET_CODE (insn) == NOTE) + insn = prev_nonnote_insn (insn); + if (insn == 0 || GET_CODE (insn) != BARRIER) { - fputs ("\t.ent ", file); - assemble_name (file, fnname); - putc ('\n', file); - } - - strcpy (entry_label, fnname); - if (TARGET_OPEN_VMS) - strcat (entry_label, "..en"); - ASM_OUTPUT_LABEL (file, entry_label); - inside_function = TRUE; - - if (TARGET_OPEN_VMS) - fprintf (file, "\t.base $%d\n", vms_base_regno); - - if (!TARGET_OPEN_VMS && TARGET_IEEE_CONFORMANT - && !flag_inhibit_size_directive) - { - /* Set flags in procedure descriptor to request IEEE-conformant - math-library routines. The value we set it to is PDSC_EXC_IEEE - (/usr/include/pdsc.h). */ - fputs ("\t.eflag 48\n", file); - } - - /* Set up offsets to alpha virtual arg/local debugging pointer. */ - alpha_auto_offset = -frame_size + current_function_pretend_args_size; - alpha_arg_offset = -frame_size + 48; - - /* Describe our frame. If the frame size is larger than an integer, - print it as zero to avoid an assembler error. We won't be - properly describing such a frame, but that's the best we can do. */ - if (TARGET_OPEN_VMS) - { - fprintf (file, "\t.frame $%d,", vms_unwind_regno); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : frame_size); - fputs (",$26,", file); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, reg_offset); - fputs ("\n", file); - } - else if (!flag_inhibit_size_directive) - { - fprintf (file, "\t.frame $%d,", - (frame_pointer_needed - ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM)); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : frame_size); - fprintf (file, ",$26,%d\n", current_function_pretend_args_size); - } - - /* Describe which registers were spilled. */ - if (TARGET_OPEN_VMS) - { - if (imask) - /* ??? Does VMS care if mask contains ra? The old code did'nt - set it, so I don't here. */ - fprintf (file, "\t.mask 0x%lx,0\n", imask & ~(1L << REG_RA)); - if (fmask) - fprintf (file, "\t.fmask 0x%lx,0\n", fmask); - if (!vms_is_stack_procedure) - fprintf (file, "\t.fp_save $%d\n", vms_save_fp_regno); - } - else if (!flag_inhibit_size_directive) - { - if (imask) - { - fprintf (file, "\t.mask 0x%lx,", imask); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : reg_offset - frame_size); - putc ('\n', file); - - for (i = 0; i < 32; ++i) - if (imask & (1L << i)) - reg_offset += 8; - } - - if (fmask) - { - fprintf (file, "\t.fmask 0x%lx,", fmask); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : reg_offset - frame_size); - putc ('\n', file); - } - } - - /* Emit GP related things. It is rather unfortunate about the alignment - issues surrounding a CODE_LABEL that forces us to do the label in - plain text. */ - if (!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT) - { - alpha_function_needs_gp = alpha_does_function_need_gp (); - if (alpha_function_needs_gp) - fputs ("\tldgp $29,0($27)\n", file); + int fp_offset = 0; - putc ('$', file); - assemble_name (file, fnname); - fputs ("..ng:\n", file); - } - -#ifdef OPEN_VMS - /* Ifdef'ed cause readonly_section and link_section are only - available then. */ - readonly_section (); - fprintf (file, "\t.align 3\n"); - assemble_name (file, fnname); fputs ("..na:\n", file); - fputs ("\t.ascii \"", file); - assemble_name (file, fnname); - fputs ("\\0\"\n", file); - - link_section (); - fprintf (file, "\t.align 3\n"); - fputs ("\t.name ", file); - assemble_name (file, fnname); - fputs ("..na\n", file); - ASM_OUTPUT_LABEL (file, fnname); - fprintf (file, "\t.pdesc "); - assemble_name (file, fnname); - fprintf (file, "..en,%s\n", vms_is_stack_procedure ? "stack" : "reg"); - alpha_need_linkage (fnname, 1); - text_section (); -#endif -} - -/* Emit the .prologue note at the scheduled end of the prologue. */ - -void -output_end_prologue (file) - FILE *file; -{ - if (TARGET_OPEN_VMS) - fputs ("\t.prologue\n", file); - else if (TARGET_WINDOWS_NT) - fputs ("\t.prologue 0\n", file); - else if (!flag_inhibit_size_directive) - fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp); -} - -/* Write function epilogue. */ - -/* ??? At some point we will want to support full unwind, and so will - need to mark the epilogue as well. At the moment, we just confuse - dwarf2out. */ -#undef FRP -#define FRP(exp) exp - -void -alpha_expand_epilogue () -{ - /* Registers to save. */ - unsigned long imask = 0; - unsigned long fmask = 0; - /* Stack space needed for pushing registers clobbered by us. */ - HOST_WIDE_INT sa_size; - /* Complete stack size needed. */ - HOST_WIDE_INT frame_size; - /* Offset from base reg to register save area. */ - HOST_WIDE_INT reg_offset; - int fp_is_frame_pointer, fp_offset; - rtx sa_reg, sa_reg_exp = NULL; - rtx sp_adj1, sp_adj2, mem; - int i; - - sa_size = alpha_sa_size (); - - frame_size = get_frame_size (); - if (TARGET_OPEN_VMS) - frame_size = ALPHA_ROUND (sa_size - + (vms_is_stack_procedure ? 8 : 0) - + frame_size - + current_function_pretend_args_size); - else - frame_size = (ALPHA_ROUND (current_function_outgoing_args_size) - + sa_size - + ALPHA_ROUND (frame_size - + current_function_pretend_args_size)); - - if (TARGET_OPEN_VMS) - reg_offset = 8; - else - reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); - - alpha_sa_mask (&imask, &fmask); - - fp_is_frame_pointer = ((TARGET_OPEN_VMS && vms_is_stack_procedure) - || (!TARGET_OPEN_VMS && frame_pointer_needed)); - - if (sa_size) - { /* If we have a frame pointer, restore SP from it. */ - if ((TARGET_OPEN_VMS - && vms_unwind_regno == HARD_FRAME_POINTER_REGNUM) - || (!TARGET_OPEN_VMS && frame_pointer_needed)) - { - FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx)); - } + if (frame_pointer_needed) + fprintf (file, "\tbis $15,$15,$30\n"); - /* Cope with very large offsets to the register save area. */ - sa_reg = stack_pointer_rtx; - if (reg_offset + sa_size > 0x8000) + /* Restore all the registers, starting with the return address + register. */ + if (sa_size != 0) { - int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000; - HOST_WIDE_INT bias; - - if (low + sa_size <= 0x8000) - bias = reg_offset - low, reg_offset = low; - else - bias = reg_offset, reg_offset = 0; - - sa_reg = gen_rtx_REG (DImode, 22); - sa_reg_exp = plus_constant (stack_pointer_rtx, bias); - - FRP (emit_move_insn (sa_reg, sa_reg_exp)); + fprintf (file, "\tldq $26,%d($30)\n", reg_offset); + reg_offset += 8; } - - /* Restore registers in order, excepting a true frame pointer. */ - if (! alpha_eh_epilogue_sp_ofs) - { - mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (gen_rtx_REG (DImode, REG_RA), mem)); - } - reg_offset += 8; - imask &= ~(1L << REG_RA); + /* Now restore any other used integer registers that that we saved, + except for FP if it is being used as FP, since it must be + restored last. */ - for (i = 0; i < 32; ++i) - if (imask & (1L << i)) + for (i = 0; i < 32; i++) + if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] + && i != 26) { - if (i == HARD_FRAME_POINTER_REGNUM && fp_is_frame_pointer) + if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) fp_offset = reg_offset; else - { - mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (gen_rtx_REG (DImode, i), mem)); - } + fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset); reg_offset += 8; } - for (i = 0; i < 32; ++i) - if (fmask & (1L << i)) + for (i = 0; i < 32; i++) + if (! fixed_regs[i + 32] && ! call_used_regs[i + 32] + && regs_ever_live[i + 32]) { - mem = gen_rtx_MEM (DFmode, plus_constant(sa_reg, reg_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (gen_rtx_REG (DFmode, i+32), mem)); + fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset); reg_offset += 8; } - } - - if (frame_size || alpha_eh_epilogue_sp_ofs) - { - sp_adj1 = stack_pointer_rtx; - - if (alpha_eh_epilogue_sp_ofs) - { - sp_adj1 = gen_rtx_REG (DImode, 23); - emit_move_insn (sp_adj1, - gen_rtx_PLUS (Pmode, stack_pointer_rtx, - alpha_eh_epilogue_sp_ofs)); - } - /* If the stack size is large, begin computation into a temporary - register so as not to interfere with a potential fp restore, - which must be consecutive with an SP restore. */ - if (frame_size < 32768) - sp_adj2 = GEN_INT (frame_size); - else if (frame_size < 0x40007fffL) - { - int low = ((frame_size & 0xffff) ^ 0x8000) - 0x8000; - - sp_adj2 = plus_constant (sp_adj1, frame_size - low); - if (sa_reg_exp && rtx_equal_p (sa_reg_exp, sp_adj2)) - sp_adj1 = sa_reg; - else - { - sp_adj1 = gen_rtx_REG (DImode, 23); - FRP (emit_move_insn (sp_adj1, sp_adj2)); - } - sp_adj2 = GEN_INT (low); - } + /* If the stack size is large and we have a frame pointer, compute the + size of the stack into a register because the old FP restore, stack + pointer adjust, and return are required to be consecutive + instructions. */ + if (frame_size > 32767 && restore_fp) + add_long_const (file, frame_size, 31, 1, 1); + + /* If we needed a frame pointer and we have to restore it, do it + now. This must be done in one instruction immediately + before the SP update. */ + if (restore_fp && fp_offset) + fprintf (file, "\tldq $15,%d($30)\n", fp_offset); + + /* Now update the stack pointer, if needed. Only one instruction must + modify the stack pointer. It must be the last instruction in the + sequence and must be an ADDQ or LDA instruction. If the frame + pointer was loaded above, we may only put one instruction here. */ + + if (frame_size > 32768 && restore_fp) + fprintf (file, "\taddq $1,$30,$30\n"); else - { - rtx tmp = gen_rtx_REG (DImode, 23); - FRP (sp_adj2 = alpha_emit_set_const (tmp, DImode, frame_size, 3)); - if (!sp_adj2) - { - /* We can't drop new things to memory this late, afaik, - so build it up by pieces. */ - FRP (sp_adj2 = alpha_emit_set_long_const (tmp, frame_size, - -(frame_size < 0))); - if (!sp_adj2) - abort (); - } - } - - /* From now on, things must be in order. So emit blockages. */ + add_long_const (file, frame_size, 30, 30, 1); - /* Restore the frame pointer. */ - if (fp_is_frame_pointer) - { - emit_insn (gen_blockage ()); - mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, fp_offset)); - MEM_ALIAS_SET (mem) = alpha_sr_alias_set; - FRP (emit_move_insn (hard_frame_pointer_rtx, mem)); - } - else if (TARGET_OPEN_VMS) - { - emit_insn (gen_blockage ()); - FRP (emit_move_insn (hard_frame_pointer_rtx, - gen_rtx_REG (DImode, vms_save_fp_regno))); - } - - /* Restore the stack pointer. */ - emit_insn (gen_blockage ()); - FRP (emit_move_insn (stack_pointer_rtx, - gen_rtx_PLUS (DImode, sp_adj1, sp_adj2))); - } - else - { - if (TARGET_OPEN_VMS && !vms_is_stack_procedure) - { - emit_insn (gen_blockage ()); - FRP (emit_move_insn (hard_frame_pointer_rtx, - gen_rtx_REG (DImode, vms_save_fp_regno))); - } + /* Finally return to the caller. */ + fprintf (file, "\tret $31,($26),1\n"); } - /* Return. */ - emit_jump_insn (gen_return_internal ()); -} - -/* Output the rest of the textual info surrounding the epilogue. */ - -void -alpha_end_function (file, fnname, decl) - FILE *file; - char *fnname; - tree decl ATTRIBUTE_UNUSED; -{ /* End the function. */ - if (!flag_inhibit_size_directive) - { - fputs ("\t.end ", file); - assemble_name (file, fnname); - putc ('\n', file); - } + fprintf (file, "\t.end "); + assemble_name (file, alpha_function_name); + fprintf (file, "\n"); inside_function = FALSE; - /* Show that we know this function if it is called again. - - Don't do this for global functions in object files destined for a - shared library because the function may be overridden by the application - or other libraries. Similarly, don't do this for weak functions. */ - - if (!DECL_WEAK (current_function_decl) - && (!flag_pic || !TREE_PUBLIC (current_function_decl))) - SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1; + /* Show that we know this function if it is called again. */ + SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1; } /* Debugging support. */ @@ -4110,7 +1627,7 @@ static int num_source_filenames = 0; /* Name of the file containing the current function. */ -static const char *current_function_file = ""; +static char *current_function_file = ""; /* Offsets to alpha virtual arg/local debugging pointers. */ @@ -4139,7 +1656,7 @@ alpha_output_filename (stream, name) fprintf (stream, "\t#@stabs\n"); } - else if (write_symbols == DBX_DEBUG) + else if (!TARGET_GAS && write_symbols == DBX_DEBUG) { ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0); fprintf (stream, "%s ", ASM_STABS_OP); @@ -4148,7 +1665,7 @@ alpha_output_filename (stream, name) } else if (name != current_function_file - && strcmp (name, current_function_file) != 0) + && strcmp (name, current_function_file) != 0) { if (inside_function && ! TARGET_GAS) fprintf (stream, "\t#.file\t%d ", num_source_filenames); @@ -4171,7 +1688,7 @@ alpha_output_lineno (stream, line) FILE *stream; int line; { - if (write_symbols == DBX_DEBUG) + if (! TARGET_GAS && write_symbols == DBX_DEBUG) { /* mips-tfile doesn't understand .stabd directives. */ ++sym_lineno; @@ -4181,1100 +1698,3 @@ alpha_output_lineno (stream, line) else fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line); } - -/* Structure to show the current status of registers and memory. */ - -struct shadow_summary -{ - struct { - unsigned long i : 31; /* Mask of int regs */ - unsigned long fp : 31; /* Mask of fp regs */ - unsigned long mem : 1; /* mem == imem | fpmem */ - } used, defd; -}; - -static void summarize_insn PROTO((rtx, struct shadow_summary *, int)); -static void alpha_handle_trap_shadows PROTO((rtx)); - -/* Summary the effects of expression X on the machine. Update SUM, a pointer - to the summary structure. SET is nonzero if the insn is setting the - object, otherwise zero. */ - -static void -summarize_insn (x, sum, set) - rtx x; - struct shadow_summary *sum; - int set; -{ - char *format_ptr; - int i, j; - - if (x == 0) - return; - - switch (GET_CODE (x)) - { - /* ??? Note that this case would be incorrect if the Alpha had a - ZERO_EXTRACT in SET_DEST. */ - case SET: - summarize_insn (SET_SRC (x), sum, 0); - summarize_insn (SET_DEST (x), sum, 1); - break; - - case CLOBBER: - summarize_insn (XEXP (x, 0), sum, 1); - break; - - case USE: - summarize_insn (XEXP (x, 0), sum, 0); - break; - - case ASM_OPERANDS: - for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) - summarize_insn (ASM_OPERANDS_INPUT (x, i), sum, 0); - break; - - case PARALLEL: - for (i = XVECLEN (x, 0) - 1; i >= 0; i--) - summarize_insn (XVECEXP (x, 0, i), sum, 0); - break; - - case SUBREG: - summarize_insn (SUBREG_REG (x), sum, 0); - break; - - case REG: - { - int regno = REGNO (x); - unsigned long mask = 1UL << (regno % 32); - - if (regno == 31 || regno == 63) - break; - - if (set) - { - if (regno < 32) - sum->defd.i |= mask; - else - sum->defd.fp |= mask; - } - else - { - if (regno < 32) - sum->used.i |= mask; - else - sum->used.fp |= mask; - } - } - break; - - case MEM: - if (set) - sum->defd.mem = 1; - else - sum->used.mem = 1; - - /* Find the regs used in memory address computation: */ - summarize_insn (XEXP (x, 0), sum, 0); - break; - - case CONST_INT: case CONST_DOUBLE: - case SYMBOL_REF: case LABEL_REF: case CONST: - break; - - /* Handle common unary and binary ops for efficiency. */ - case COMPARE: case PLUS: case MINUS: case MULT: case DIV: - case MOD: case UDIV: case UMOD: case AND: case IOR: - case XOR: case ASHIFT: case ROTATE: case ASHIFTRT: case LSHIFTRT: - case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX: - case NE: case EQ: case GE: case GT: case LE: - case LT: case GEU: case GTU: case LEU: case LTU: - summarize_insn (XEXP (x, 0), sum, 0); - summarize_insn (XEXP (x, 1), sum, 0); - break; - - case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND: - case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT: - case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS: - case SQRT: case FFS: - summarize_insn (XEXP (x, 0), sum, 0); - break; - - default: - format_ptr = GET_RTX_FORMAT (GET_CODE (x)); - for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) - switch (format_ptr[i]) - { - case 'e': - summarize_insn (XEXP (x, i), sum, 0); - break; - - case 'E': - for (j = XVECLEN (x, i) - 1; j >= 0; j--) - summarize_insn (XVECEXP (x, i, j), sum, 0); - break; - - case 'i': - break; - - default: - abort (); - } - } -} - -/* Ensure a sufficient number of `trapb' insns are in the code when - the user requests code with a trap precision of functions or - instructions. - - In naive mode, when the user requests a trap-precision of - "instruction", a trapb is needed after every instruction that may - generate a trap. This ensures that the code is resumption safe but - it is also slow. - - When optimizations are turned on, we delay issuing a trapb as long - as possible. In this context, a trap shadow is the sequence of - instructions that starts with a (potentially) trap generating - instruction and extends to the next trapb or call_pal instruction - (but GCC never generates call_pal by itself). We can delay (and - therefore sometimes omit) a trapb subject to the following - conditions: - - (a) On entry to the trap shadow, if any Alpha register or memory - location contains a value that is used as an operand value by some - instruction in the trap shadow (live on entry), then no instruction - in the trap shadow may modify the register or memory location. - - (b) Within the trap shadow, the computation of the base register - for a memory load or store instruction may not involve using the - result of an instruction that might generate an UNPREDICTABLE - result. - - (c) Within the trap shadow, no register may be used more than once - as a destination register. (This is to make life easier for the - trap-handler.) - - (d) The trap shadow may not include any branch instructions. */ - -static void -alpha_handle_trap_shadows (insns) - rtx insns; -{ - struct shadow_summary shadow; - int trap_pending, exception_nesting; - rtx i, n; - - trap_pending = 0; - exception_nesting = 0; - shadow.used.i = 0; - shadow.used.fp = 0; - shadow.used.mem = 0; - shadow.defd = shadow.used; - - for (i = insns; i ; i = NEXT_INSN (i)) - { - if (GET_CODE (i) == NOTE) - { - switch (NOTE_LINE_NUMBER (i)) - { - case NOTE_INSN_EH_REGION_BEG: - exception_nesting++; - if (trap_pending) - goto close_shadow; - break; - - case NOTE_INSN_EH_REGION_END: - exception_nesting--; - if (trap_pending) - goto close_shadow; - break; - - case NOTE_INSN_EPILOGUE_BEG: - if (trap_pending && alpha_tp >= ALPHA_TP_FUNC) - goto close_shadow; - break; - } - } - else if (trap_pending) - { - if (alpha_tp == ALPHA_TP_FUNC) - { - if (GET_CODE (i) == JUMP_INSN - && GET_CODE (PATTERN (i)) == RETURN) - goto close_shadow; - } - else if (alpha_tp == ALPHA_TP_INSN) - { - if (optimize > 0) - { - struct shadow_summary sum; - - sum.used.i = 0; - sum.used.fp = 0; - sum.used.mem = 0; - sum.defd = sum.used; - - switch (GET_CODE (i)) - { - case INSN: - /* Annoyingly, get_attr_trap will abort on these. */ - if (GET_CODE (PATTERN (i)) == USE - || GET_CODE (PATTERN (i)) == CLOBBER) - break; - - summarize_insn (PATTERN (i), &sum, 0); - - if ((sum.defd.i & shadow.defd.i) - || (sum.defd.fp & shadow.defd.fp)) - { - /* (c) would be violated */ - goto close_shadow; - } - - /* Combine shadow with summary of current insn: */ - shadow.used.i |= sum.used.i; - shadow.used.fp |= sum.used.fp; - shadow.used.mem |= sum.used.mem; - shadow.defd.i |= sum.defd.i; - shadow.defd.fp |= sum.defd.fp; - shadow.defd.mem |= sum.defd.mem; - - if ((sum.defd.i & shadow.used.i) - || (sum.defd.fp & shadow.used.fp) - || (sum.defd.mem & shadow.used.mem)) - { - /* (a) would be violated (also takes care of (b)) */ - if (get_attr_trap (i) == TRAP_YES - && ((sum.defd.i & sum.used.i) - || (sum.defd.fp & sum.used.fp))) - abort (); - - goto close_shadow; - } - break; - - case JUMP_INSN: - case CALL_INSN: - case CODE_LABEL: - goto close_shadow; - - default: - abort (); - } - } - else - { - close_shadow: - n = emit_insn_before (gen_trapb (), i); - PUT_MODE (n, TImode); - PUT_MODE (i, TImode); - trap_pending = 0; - shadow.used.i = 0; - shadow.used.fp = 0; - shadow.used.mem = 0; - shadow.defd = shadow.used; - } - } - } - - if ((exception_nesting > 0 || alpha_tp >= ALPHA_TP_FUNC) - && GET_CODE (i) == INSN - && GET_CODE (PATTERN (i)) != USE - && GET_CODE (PATTERN (i)) != CLOBBER - && get_attr_trap (i) == TRAP_YES) - { - if (optimize && !trap_pending) - summarize_insn (PATTERN (i), &shadow, 0); - trap_pending = 1; - } - } -} - -#ifdef HAIFA -/* Alpha can only issue instruction groups simultaneously if they are - suitibly aligned. This is very processor-specific. */ - -enum alphaev4_pipe { - EV4_STOP = 0, - EV4_IB0 = 1, - EV4_IB1 = 2, - EV4_IBX = 4 -}; - -enum alphaev5_pipe { - EV5_STOP = 0, - EV5_NONE = 1, - EV5_E01 = 2, - EV5_E0 = 4, - EV5_E1 = 8, - EV5_FAM = 16, - EV5_FA = 32, - EV5_FM = 64 -}; - -static enum alphaev4_pipe alphaev4_insn_pipe PROTO((rtx)); -static enum alphaev5_pipe alphaev5_insn_pipe PROTO((rtx)); -static rtx alphaev4_next_group PROTO((rtx, int*, int*)); -static rtx alphaev5_next_group PROTO((rtx, int*, int*)); -static rtx alphaev4_next_nop PROTO((int*)); -static rtx alphaev5_next_nop PROTO((int*)); - -static void alpha_align_insns - PROTO((rtx, int, rtx (*)(rtx, int*, int*), rtx (*)(int*), int)); - -static enum alphaev4_pipe -alphaev4_insn_pipe (insn) - rtx insn; -{ - if (recog_memoized (insn) < 0) - return EV4_STOP; - if (get_attr_length (insn) != 4) - return EV4_STOP; - - switch (get_attr_type (insn)) - { - case TYPE_ILD: - case TYPE_FLD: - return EV4_IBX; - - case TYPE_LDSYM: - case TYPE_IADD: - case TYPE_ILOG: - case TYPE_ICMOV: - case TYPE_ICMP: - case TYPE_IST: - case TYPE_FST: - case TYPE_SHIFT: - case TYPE_IMUL: - case TYPE_FBR: - return EV4_IB0; - - case TYPE_MISC: - case TYPE_IBR: - case TYPE_JSR: - case TYPE_FCPYS: - case TYPE_FCMOV: - case TYPE_FADD: - case TYPE_FDIV: - case TYPE_FMUL: - return EV4_IB1; - - default: - abort(); - } -} - -static enum alphaev5_pipe -alphaev5_insn_pipe (insn) - rtx insn; -{ - if (recog_memoized (insn) < 0) - return EV5_STOP; - if (get_attr_length (insn) != 4) - return EV5_STOP; - - switch (get_attr_type (insn)) - { - case TYPE_ILD: - case TYPE_FLD: - case TYPE_LDSYM: - case TYPE_IADD: - case TYPE_ILOG: - case TYPE_ICMOV: - case TYPE_ICMP: - return EV5_E01; - - case TYPE_IST: - case TYPE_FST: - case TYPE_SHIFT: - case TYPE_IMUL: - case TYPE_MISC: - case TYPE_MVI: - return EV5_E0; - - case TYPE_IBR: - case TYPE_JSR: - return EV5_E1; - - case TYPE_FCPYS: - return EV5_FAM; - - case TYPE_FBR: - case TYPE_FCMOV: - case TYPE_FADD: - case TYPE_FDIV: - return EV5_FA; - - case TYPE_FMUL: - return EV5_FM; - - default: - abort(); - } -} - -/* IN_USE is a mask of the slots currently filled within the insn group. - The mask bits come from alphaev4_pipe above. If EV4_IBX is set, then - the insn in EV4_IB0 can be swapped by the hardware into EV4_IB1. - - LEN is, of course, the length of the group in bytes. */ - -static rtx -alphaev4_next_group (insn, pin_use, plen) - rtx insn; - int *pin_use, *plen; -{ - int len, in_use; - - len = in_use = 0; - - if (GET_RTX_CLASS (GET_CODE (insn)) != 'i' - || GET_CODE (PATTERN (insn)) == CLOBBER - || GET_CODE (PATTERN (insn)) == USE) - goto next_and_done; - - while (1) - { - enum alphaev4_pipe pipe; - - pipe = alphaev4_insn_pipe (insn); - switch (pipe) - { - case EV4_STOP: - /* Force complex instructions to start new groups. */ - if (in_use) - goto done; - - /* If this is a completely unrecognized insn, its an asm. - We don't know how long it is, so record length as -1 to - signal a needed realignment. */ - if (recog_memoized (insn) < 0) - len = -1; - else - len = get_attr_length (insn); - goto next_and_done; - - case EV4_IBX: - if (in_use & EV4_IB0) - { - if (in_use & EV4_IB1) - goto done; - in_use |= EV4_IB1; - } - else - in_use |= EV4_IB0 | EV4_IBX; - break; - - case EV4_IB0: - if (in_use & EV4_IB0) - { - if (!(in_use & EV4_IBX) || (in_use & EV4_IB1)) - goto done; - in_use |= EV4_IB1; - } - in_use |= EV4_IB0; - break; - - case EV4_IB1: - if (in_use & EV4_IB1) - goto done; - in_use |= EV4_IB1; - break; - - default: - abort(); - } - len += 4; - - /* Haifa doesn't do well scheduling branches. */ - if (GET_CODE (insn) == JUMP_INSN) - goto next_and_done; - - next: - insn = next_nonnote_insn (insn); - - if (!insn || GET_RTX_CLASS (GET_CODE (insn)) != 'i') - goto done; - - /* Let Haifa tell us where it thinks insn group boundaries are. */ - if (GET_MODE (insn) == TImode) - goto done; - - if (GET_CODE (insn) == CLOBBER || GET_CODE (insn) == USE) - goto next; - } - - next_and_done: - insn = next_nonnote_insn (insn); - - done: - *plen = len; - *pin_use = in_use; - return insn; -} - -/* IN_USE is a mask of the slots currently filled within the insn group. - The mask bits come from alphaev5_pipe above. If EV5_E01 is set, then - the insn in EV5_E0 can be swapped by the hardware into EV5_E1. - - LEN is, of course, the length of the group in bytes. */ - -static rtx -alphaev5_next_group (insn, pin_use, plen) - rtx insn; - int *pin_use, *plen; -{ - int len, in_use; - - len = in_use = 0; - - if (GET_RTX_CLASS (GET_CODE (insn)) != 'i' - || GET_CODE (PATTERN (insn)) == CLOBBER - || GET_CODE (PATTERN (insn)) == USE) - goto next_and_done; - - while (1) - { - enum alphaev5_pipe pipe; - - pipe = alphaev5_insn_pipe (insn); - switch (pipe) - { - case EV5_STOP: - /* Force complex instructions to start new groups. */ - if (in_use) - goto done; - - /* If this is a completely unrecognized insn, its an asm. - We don't know how long it is, so record length as -1 to - signal a needed realignment. */ - if (recog_memoized (insn) < 0) - len = -1; - else - len = get_attr_length (insn); - goto next_and_done; - - /* ??? Most of the places below, we would like to abort, as - it would indicate an error either in Haifa, or in the - scheduling description. Unfortunately, Haifa never - schedules the last instruction of the BB, so we don't - have an accurate TI bit to go off. */ - case EV5_E01: - if (in_use & EV5_E0) - { - if (in_use & EV5_E1) - goto done; - in_use |= EV5_E1; - } - else - in_use |= EV5_E0 | EV5_E01; - break; - - case EV5_E0: - if (in_use & EV5_E0) - { - if (!(in_use & EV5_E01) || (in_use & EV5_E1)) - goto done; - in_use |= EV5_E1; - } - in_use |= EV5_E0; - break; - - case EV5_E1: - if (in_use & EV5_E1) - goto done; - in_use |= EV5_E1; - break; - - case EV5_FAM: - if (in_use & EV5_FA) - { - if (in_use & EV5_FM) - goto done; - in_use |= EV5_FM; - } - else - in_use |= EV5_FA | EV5_FAM; - break; - - case EV5_FA: - if (in_use & EV5_FA) - goto done; - in_use |= EV5_FA; - break; - - case EV5_FM: - if (in_use & EV5_FM) - goto done; - in_use |= EV5_FM; - break; - - case EV5_NONE: - break; - - default: - abort(); - } - len += 4; - - /* Haifa doesn't do well scheduling branches. */ - /* ??? If this is predicted not-taken, slotting continues, except - that no more IBR, FBR, or JSR insns may be slotted. */ - if (GET_CODE (insn) == JUMP_INSN) - goto next_and_done; - - next: - insn = next_nonnote_insn (insn); - - if (!insn || GET_RTX_CLASS (GET_CODE (insn)) != 'i') - goto done; - - /* Let Haifa tell us where it thinks insn group boundaries are. */ - if (GET_MODE (insn) == TImode) - goto done; - - if (GET_CODE (insn) == CLOBBER || GET_CODE (insn) == USE) - goto next; - } - - next_and_done: - insn = next_nonnote_insn (insn); - - done: - *plen = len; - *pin_use = in_use; - return insn; -} - -static rtx -alphaev4_next_nop (pin_use) - int *pin_use; -{ - int in_use = *pin_use; - rtx nop; - - if (!(in_use & EV4_IB0)) - { - in_use |= EV4_IB0; - nop = gen_nop (); - } - else if ((in_use & (EV4_IBX|EV4_IB1)) == EV4_IBX) - { - in_use |= EV4_IB1; - nop = gen_nop (); - } - else if (TARGET_FP && !(in_use & EV4_IB1)) - { - in_use |= EV4_IB1; - nop = gen_fnop (); - } - else - nop = gen_unop (); - - *pin_use = in_use; - return nop; -} - -static rtx -alphaev5_next_nop (pin_use) - int *pin_use; -{ - int in_use = *pin_use; - rtx nop; - - if (!(in_use & EV5_E1)) - { - in_use |= EV5_E1; - nop = gen_nop (); - } - else if (TARGET_FP && !(in_use & EV5_FA)) - { - in_use |= EV5_FA; - nop = gen_fnop (); - } - else if (TARGET_FP && !(in_use & EV5_FM)) - { - in_use |= EV5_FM; - nop = gen_fnop (); - } - else - nop = gen_unop (); - - *pin_use = in_use; - return nop; -} - -/* The instruction group alignment main loop. */ - -static void -alpha_align_insns (insns, max_align, next_group, next_nop, gp_in_use) - rtx insns; - int max_align; - rtx (*next_group) PROTO((rtx, int*, int*)); - rtx (*next_nop) PROTO((int*)); - int gp_in_use; -{ - /* ALIGN is the known alignment for the insn group. */ - int align; - /* OFS is the offset of the current insn in the insn group. */ - int ofs; - int prev_in_use, in_use, len; - rtx i, next; - - /* Let shorten branches care for assigning alignments to code labels. */ - shorten_branches (insns); - - align = (FUNCTION_BOUNDARY/BITS_PER_UNIT < max_align - ? FUNCTION_BOUNDARY/BITS_PER_UNIT : max_align); - - /* Account for the initial GP load, which happens before the scheduled - prologue we emitted as RTL. */ - ofs = prev_in_use = 0; - if (alpha_does_function_need_gp()) - { - ofs = 8 & (align - 1); - prev_in_use = gp_in_use; - } - - i = insns; - if (GET_CODE (i) == NOTE) - i = next_nonnote_insn (i); - - while (i) - { - next = (*next_group)(i, &in_use, &len); - - /* When we see a label, resync alignment etc. */ - if (GET_CODE (i) == CODE_LABEL) - { - int new_align = 1 << label_to_alignment (i); - if (new_align >= align) - { - align = new_align < max_align ? new_align : max_align; - ofs = 0; - } - else if (ofs & (new_align-1)) - ofs = (ofs | (new_align-1)) + 1; - if (len != 0) - abort(); - } - - /* Handle complex instructions special. */ - else if (in_use == 0) - { - /* Asms will have length < 0. This is a signal that we have - lost alignment knowledge. Assume, however, that the asm - will not mis-align instructions. */ - if (len < 0) - { - ofs = 0; - align = 4; - len = 0; - } - } - - /* If the known alignment is smaller than the recognized insn group, - realign the output. */ - else if (align < len) - { - int new_log_align = len > 8 ? 4 : 3; - rtx where; - - where = prev_nonnote_insn (i); - if (!where || GET_CODE (where) != CODE_LABEL) - where = i; - - emit_insn_before (gen_realign (GEN_INT (new_log_align)), where); - align = 1 << new_log_align; - ofs = 0; - } - - /* If the group won't fit in the same INT16 as the previous, - we need to add padding to keep the group together. Rather - than simply leaving the insn filling to the assembler, we - can make use of the knowledge of what sorts of instructions - were issued in the previous group to make sure that all of - the added nops are really free. */ - else if (ofs + len > align) - { - int nop_count = (align - ofs) / 4; - rtx where; - - /* Insert nops before labels and branches to truely merge the - execution of the nops with the previous instruction group. */ - where = prev_nonnote_insn (i); - if (where) - { - if (GET_CODE (where) == CODE_LABEL) - { - rtx where2 = prev_nonnote_insn (where); - if (where2 && GET_CODE (where2) == JUMP_INSN) - where = where2; - } - else if (GET_CODE (where) != JUMP_INSN) - where = i; - } - else - where = i; - - do - emit_insn_before ((*next_nop)(&prev_in_use), where); - while (--nop_count); - ofs = 0; - } - - ofs = (ofs + len) & (align - 1); - prev_in_use = in_use; - i = next; - } -} -#endif /* HAIFA */ - -/* Machine dependant reorg pass. */ - -void -alpha_reorg (insns) - rtx insns; -{ - if (alpha_tp != ALPHA_TP_PROG || flag_exceptions) - alpha_handle_trap_shadows (insns); - -#ifdef HAIFA - /* Due to the number of extra trapb insns, don't bother fixing up - alignment when trap precision is instruction. Moreover, we can - only do our job when sched2 is run and Haifa is our scheduler. */ - if (optimize && !optimize_size - && alpha_tp != ALPHA_TP_INSN - && flag_schedule_insns_after_reload) - { - if (alpha_cpu == PROCESSOR_EV4) - alpha_align_insns (insns, 8, alphaev4_next_group, - alphaev4_next_nop, EV4_IB0); - else if (alpha_cpu == PROCESSOR_EV5) - alpha_align_insns (insns, 16, alphaev5_next_group, - alphaev5_next_nop, EV5_E01 | EV5_E0); - } -#endif -} - - -/* Check a floating-point value for validity for a particular machine mode. */ - -static char * const float_strings[] = -{ - /* These are for FLOAT_VAX. */ - "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */ - "-1.70141173319264430e+38", - "2.93873587705571877e-39", /* 2^-128 */ - "-2.93873587705571877e-39", - /* These are for the default broken IEEE mode, which traps - on infinity or denormal numbers. */ - "3.402823466385288598117e+38", /* 2^128 (1 - 2^-24) */ - "-3.402823466385288598117e+38", - "1.1754943508222875079687e-38", /* 2^-126 */ - "-1.1754943508222875079687e-38", -}; - -static REAL_VALUE_TYPE float_values[8]; -static int inited_float_values = 0; - -int -check_float_value (mode, d, overflow) - enum machine_mode mode; - REAL_VALUE_TYPE *d; - int overflow ATTRIBUTE_UNUSED; -{ - - if (TARGET_IEEE || TARGET_IEEE_CONFORMANT || TARGET_IEEE_WITH_INEXACT) - return 0; - - if (inited_float_values == 0) - { - int i; - for (i = 0; i < 8; i++) - float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode); - - inited_float_values = 1; - } - - if (mode == SFmode) - { - REAL_VALUE_TYPE r; - REAL_VALUE_TYPE *fvptr; - - if (TARGET_FLOAT_VAX) - fvptr = &float_values[0]; - else - fvptr = &float_values[4]; - - bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE)); - if (REAL_VALUES_LESS (fvptr[0], r)) - { - bcopy ((char *) &fvptr[0], (char *) d, - sizeof (REAL_VALUE_TYPE)); - return 1; - } - else if (REAL_VALUES_LESS (r, fvptr[1])) - { - bcopy ((char *) &fvptr[1], (char *) d, - sizeof (REAL_VALUE_TYPE)); - return 1; - } - else if (REAL_VALUES_LESS (dconst0, r) - && REAL_VALUES_LESS (r, fvptr[2])) - { - bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE)); - return 1; - } - else if (REAL_VALUES_LESS (r, dconst0) - && REAL_VALUES_LESS (fvptr[3], r)) - { - bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE)); - return 1; - } - } - - return 0; -} - -#if OPEN_VMS - -/* Return the VMS argument type corresponding to MODE. */ - -enum avms_arg_type -alpha_arg_type (mode) - enum machine_mode mode; -{ - switch (mode) - { - case SFmode: - return TARGET_FLOAT_VAX ? FF : FS; - case DFmode: - return TARGET_FLOAT_VAX ? FD : FT; - default: - return I64; - } -} - -/* Return an rtx for an integer representing the VMS Argument Information - register value. */ - -struct rtx_def * -alpha_arg_info_reg_val (cum) - CUMULATIVE_ARGS cum; -{ - unsigned HOST_WIDE_INT regval = cum.num_args; - int i; - - for (i = 0; i < 6; i++) - regval |= ((int) cum.atypes[i]) << (i * 3 + 8); - - return GEN_INT (regval); -} - -/* Structure to collect function names for final output - in link section. */ - -enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN}; - - -struct alpha_links { - struct alpha_links *next; - char *name; - enum links_kind kind; -}; - -static struct alpha_links *alpha_links_base = 0; - -/* Make (or fake) .linkage entry for function call. - - IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ - -void -alpha_need_linkage (name, is_local) - char *name; - int is_local; -{ - rtx x; - struct alpha_links *lptr, *nptr; - - if (name[0] == '*') - name++; - - /* Is this name already defined ? */ - - for (lptr = alpha_links_base; lptr; lptr = lptr->next) - if (strcmp (lptr->name, name) == 0) - { - if (is_local) - { - /* Defined here but external assumed. */ - if (lptr->kind == KIND_EXTERN) - lptr->kind = KIND_LOCAL; - } - else - { - /* Used here but unused assumed. */ - if (lptr->kind == KIND_UNUSED) - lptr->kind = KIND_LOCAL; - } - return; - } - - nptr = (struct alpha_links *) xmalloc (sizeof (struct alpha_links)); - nptr->next = alpha_links_base; - nptr->name = xstrdup (name); - - /* Assume external if no definition. */ - nptr->kind = (is_local ? KIND_UNUSED : KIND_EXTERN); - - /* Ensure we have an IDENTIFIER so assemble_name can mark is used. */ - get_identifier (name); - - alpha_links_base = nptr; - - return; -} - - -void -alpha_write_linkage (stream) - FILE *stream; -{ - struct alpha_links *lptr, *nptr; - - readonly_section (); - - fprintf (stream, "\t.align 3\n"); - - for (lptr = alpha_links_base; lptr; lptr = nptr) - { - nptr = lptr->next; - - if (lptr->kind == KIND_UNUSED - || ! TREE_SYMBOL_REFERENCED (get_identifier (lptr->name))) - continue; - - fprintf (stream, "$%s..lk:\n", lptr->name); - if (lptr->kind == KIND_LOCAL) - { - /* Local and used, build linkage pair. */ - fprintf (stream, "\t.quad %s..en\n", lptr->name); - fprintf (stream, "\t.quad %s\n", lptr->name); - } - else - /* External and used, request linkage pair. */ - fprintf (stream, "\t.linkage %s\n", lptr->name); - } -} - -#else - -void -alpha_need_linkage (name, is_local) - char *name ATTRIBUTE_UNUSED; - int is_local ATTRIBUTE_UNUSED; -{ -} - -#endif /* OPEN_VMS */ diff --git a/contrib/gcc/config/alpha/elf.h b/contrib/gcc/config/alpha/elf.h index 6cea3da..24af9d3 100644 --- a/contrib/gcc/config/alpha/elf.h +++ b/contrib/gcc/config/alpha/elf.h @@ -19,6 +19,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* $FreeBSD$ */ + #undef OBJECT_FORMAT_COFF #undef EXTENDED_COFF #define OBJECT_FORMAT_ELF diff --git a/contrib/gcc/config/alpha/freebsd.h b/contrib/gcc/config/alpha/freebsd.h index 24567a6..a258c64 100644 --- a/contrib/gcc/config/alpha/freebsd.h +++ b/contrib/gcc/config/alpha/freebsd.h @@ -1,63 +1,40 @@ -/* XXX */ -/* - * This file was derived from source obtained from NetBSD/Alpha which - * is publicly available for ftp. The patch was developed by cgd@netbsd.org - * during the time he worked at CMU. He claims that CMU own this patch - * to gcc and that they have not (and will not) release the patch for - * incorporation in FSF sources. We are supposedly able to use the patch, - * but we are not allowed to forward it back to FSF for inclusion in - * their source releases. - * - * This all has me (jb@freebsd.org) confused because (a) I see no copyright - * messages that tell me that use is restricted; and (b) I expected that - * the patch was originally developed from other files which are subject - * to GPL. - * - * Use of this file is restricted until its CMU ownership is tested. - */ - -#include "alpha/alpha.h" - -#undef WCHAR_TYPE -#define WCHAR_TYPE "int" - -#undef WCHAR_TYPE_SIZE -#define WCHAR_TYPE_SIZE 32 - -/* FreeBSD-specific things: */ +/* Definitions of target machine for GNU compiler, + for Alpha FreeBSD systems. + Copyright (C) 1998 Free Software Foundation, Inc. -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-D__FreeBSD__ -D__alpha__ -D__alpha" +This file is part of GNU CC. -/* Look for the include files in the system-defined places. */ +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. -#undef GPLUSPLUS_INCLUDE_DIR -#define GPLUSPLUS_INCLUDE_DIR "/usr/include/g++" +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. -#undef GCC_INCLUDE_DIR -#define GCC_INCLUDE_DIR "/usr/include" +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ -#undef INCLUDE_DEFAULTS -#define INCLUDE_DEFAULTS \ - { \ - { GPLUSPLUS_INCLUDE_DIR, 1, 1 }, \ - { GCC_INCLUDE_DIR, 0, 0 }, \ - { 0, 0, 0 } \ - } +/* This is used on Alpha platforms that use the ELF format. + This was taken from the NetBSD configuration, and modified + for FreeBSD/Alpha by Hidetoshi Shimokawa <simokawa@FreeBSD.ORG> */ +/* $FreeBSD$ */ -/* Under FreeBSD, the normal location of the `ld' and `as' programs is the - /usr/bin directory. */ -#undef MD_EXEC_PREFIX -#define MD_EXEC_PREFIX "/usr/bin/" +/* Make gcc agree with <machine/ansi.h> */ -/* Under FreeBSD, the normal location of the various *crt*.o files is the - /usr/lib directory. */ +#undef WCHAR_TYPE +#define WCHAR_TYPE "int" -#undef MD_STARTFILE_PREFIX -#define MD_STARTFILE_PREFIX "/usr/lib/" +#undef WCHAR_TYPE_SIZE +#define WCHAR_TYPE_SIZE 32 +#undef WCHAR_UNSIGNED +#define WCHAR_UNSIGNED 0 /* Provide a CPP_SPEC appropriate for FreeBSD. Current we just deal with the GCC option `-posix'. */ @@ -65,39 +42,515 @@ #undef CPP_SPEC #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}" -/* Provide an ASM_SPEC appropriate for FreeBSD. */ +/* Provide an ASM_SPEC appropriate for a FreeBSD/Alpha target. This differs + from the generic FreeBSD ASM_SPEC in that no special handling of PIC is + necessary on the Alpha. */ #undef ASM_SPEC -#define ASM_SPEC " %|" +#define ASM_SPEC " %| %{mcpu=*:-m%*}" #undef ASM_FINAL_SPEC -/* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate - libc, depending on whether we're doing profiling. */ - -#undef LIB_SPEC -#define LIB_SPEC "%{!shared:%{!pg:%{!pthread:-lc}%{pthread:-lpthread -lc}}%{pg:%{!pthread:-lc_p}%{pthread:-lpthread_p -lc_p}}}" - -/* Provide a LINK_SPEC appropriate for FreeBSD. Here we provide support - for the special GCC options -static, -assert, and -nostdlib. */ - -#undef LINK_SPEC -#define LINK_SPEC \ - "%{!nostdlib:%{!r*:%{!e*:-e __start}}} -dc -dp %{static:-Bstatic} %{assert*}" - /* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. Under FreeBSD/Alpha, the assembler does - nothing special with -pg. */ + nothing special with -pg. */ #undef FUNCTION_PROFILER -#define FUNCTION_PROFILER(FILE, LABELNO) \ - fputs ("\tjsr $28,_mcount\n", (FILE)); /* at */ +#define FUNCTION_PROFILER(FILE, LABELNO) \ + fputs ("\tjsr $28,_mcount\n", (FILE)) /* at */ /* Show that we need a GP when profiling. */ #define TARGET_PROFILING_NEEDS_GP -#define bsd4_4 #undef HAS_INIT_SECTION #undef PREFERRED_DEBUGGING_TYPE #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG + +#undef TARGET_VERSION +#define TARGET_VERSION fprintf (stderr, " (FreeBSD/Alpha ELF)"); + +/* Names to predefine in the preprocessor for this target machine. + XXX FreeBSD, by convention, shouldn't do __alpha, but lots of applications + expect it because that's what OSF/1 does. */ + +#undef CPP_PREDEFINES +#define CPP_PREDEFINES \ + "-D__alpha__ -D__alpha -D__ELF__ -Acpu(alpha) -Amachine(alpha)" \ + CPP_FBSD_PREDEFINES + +#undef LINK_SPEC +#define LINK_SPEC "-m elf64alpha \ + %{p:%e`-p' not supported; use `-pg' and gprof(1)} \ + %{Wl,*:%*} \ + %{assert*} %{R*} %{rpath*} %{defsym*} \ + %{shared:-Bshareable %{h*} %{soname*}} \ + %{symbolic:-Bsymbolic} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ + %{!dynamic-linker:-dynamic-linker /usr/libexec/ld-elf.so.1}} \ + %{static:-Bstatic}}" + +/* Provide a STARTFILE_SPEC for FreeBSD that is compatible with the + non-aout version used on i386. */ + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC \ + "%{!shared: %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}} \ + %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" + +/* Provide a ENDFILE_SPEC appropriate for ELF. Here we tack on the + magical crtend.o file which provides part of the support for + getting C++ file-scope static object constructed before entering + `main', followed by a normal ELF "finalizer" file, `crtn.o'. */ + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC \ + "%{!shared:crtend.o%s} %{shared:crtendS.o%s}" + +/* Handle #pragma weak and #pragma pack. */ + +#define HANDLE_SYSV_PRAGMA + +#undef OBJECT_FORMAT_COFF +#undef EXTENDED_COFF +#define OBJECT_FORMAT_ELF + +/* This is the char to use for continuation (in case we need to turn + continuation back on). */ + +#undef DBX_CONTIN_CHAR +#define DBX_CONTIN_CHAR '?' + +#undef TARGET_DEFAULT +#define TARGET_DEFAULT (MASK_FP | MASK_FPREGS | MASK_GAS) + +/* Output at beginning of assembler file. */ + +#undef ASM_FILE_START +#define ASM_FILE_START(FILE) \ +{ \ + alpha_write_verstamp (FILE); \ + output_file_directive ((FILE), main_input_filename); \ + fprintf ((FILE), "\t.version\t\"01.01\"\n"); \ + fprintf ((FILE), "\t.set noat\n"); \ +} + +#undef ASM_OUTPUT_SOURCE_LINE +#define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ + alpha_output_lineno ((STREAM), (LINE)) +extern void alpha_output_lineno (); + +extern void output_file_directive (); + +/* Attach a special .ident directive to the end of the file to identify + the version of GCC which compiled this code. The format of the + .ident string is patterned after the ones produced by native svr4 + C compilers. */ + +#undef IDENT_ASM_OP +#define IDENT_ASM_OP ".ident" + +#ifdef IDENTIFY_WITH_IDENT +#undef ASM_IDENTIFY_GCC +#define ASM_IDENTIFY_GCC(FILE) /* nothing */ +#undef ASM_IDENTIFY_LANGUAGE +#define ASM_IDENTIFY_LANGUAGE(FILE) \ + fprintf((FILE), "\t%s \"GCC (%s) %s\"\n", IDENT_ASM_OP, \ + lang_identify(), version_string) +#else +#undef ASM_FILE_END +#define ASM_FILE_END(FILE) \ +do { \ + fprintf ((FILE), "\t%s\t\"GCC: (GNU) %s\"\n", \ + IDENT_ASM_OP, version_string); \ + } while (0) +#endif + +/* Allow #sccs in preprocessor. */ + +#define SCCS_DIRECTIVE + +/* Output #ident as a .ident. */ + +#undef ASM_OUTPUT_IDENT +#define ASM_OUTPUT_IDENT(FILE, NAME) \ + fprintf ((FILE), "\t%s\t\"%s\"\n", IDENT_ASM_OP, (NAME)); + +/* This is how to allocate empty space in some section. The .zero + pseudo-op is used for this on most svr4 assemblers. */ + +#undef SKIP_ASM_OP +#define SKIP_ASM_OP ".zero" + +#undef ASM_OUTPUT_SKIP +#define ASM_OUTPUT_SKIP(FILE, SIZE) \ + fprintf ((FILE), "\t%s\t%u\n", SKIP_ASM_OP, (SIZE)) + +/* Output the label which precedes a jumptable. Note that for all svr4 + systems where we actually generate jumptables (which is to say every + svr4 target except i386, where we use casesi instead) we put the jump- + tables into the .rodata section and since other stuff could have been + put into the .rodata section prior to any given jumptable, we have to + make sure that the location counter for the .rodata section gets pro- + perly re-aligned prior to the actual beginning of the jump table. */ + +#undef ALIGN_ASM_OP +#define ALIGN_ASM_OP ".align" + +#ifndef ASM_OUTPUT_BEFORE_CASE_LABEL +#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \ + ASM_OUTPUT_ALIGN ((FILE), 2); +#endif + +#undef ASM_OUTPUT_CASE_LABEL +#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ + do { \ + ASM_OUTPUT_BEFORE_CASE_LABEL ((FILE), (PREFIX), (NUM), (JUMPTABLE)) \ + ASM_OUTPUT_INTERNAL_LABEL ((FILE), (PREFIX), (NUM)); \ + } while (0) + +/* The standard SVR4 assembler seems to require that certain builtin + library routines (e.g. .udiv) be explicitly declared as .globl + in each assembly file where they are referenced. */ + +#undef ASM_OUTPUT_EXTERNAL_LIBCALL +#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ + ASM_GLOBALIZE_LABEL ((FILE), XSTR ((FUN), 0)) + +/* This says how to output assembler code to declare an + uninitialized external linkage data object. Under SVR4, + the linker seems to want the alignment of data objects + to depend on their types. We do exactly that here. */ + +#undef COMMON_ASM_OP +#define COMMON_ASM_OP ".comm" + +#undef ASM_OUTPUT_ALIGNED_COMMON +#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ +do { \ + fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ +} while (0) + +/* This says how to output assembler code to declare an + uninitialized internal linkage data object. Under SVR4, + the linker seems to want the alignment of data objects + to depend on their types. We do exactly that here. */ + +#undef LOCAL_ASM_OP +#define LOCAL_ASM_OP ".local" + +#undef ASM_OUTPUT_ALIGNED_LOCAL +#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ +do { \ + fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + ASM_OUTPUT_ALIGNED_COMMON ((FILE), (NAME), (SIZE), (ALIGN)); \ +} while (0) + +/* This is the pseudo-op used to generate a 64-bit word of data with a + specific value in some section. */ + +#undef INT_ASM_OP +#define INT_ASM_OP ".quad" + +/* This is the pseudo-op used to generate a contiguous sequence of byte + values from a double-quoted string WITHOUT HAVING A TERMINATING NUL + AUTOMATICALLY APPENDED. This is the same for most svr4 assemblers. */ + +#undef ASCII_DATA_ASM_OP +#define ASCII_DATA_ASM_OP ".ascii" + +/* Support const sections and the ctors and dtors sections for g++. + Note that there appears to be two different ways to support const + sections at the moment. You can either #define the symbol + READONLY_DATA_SECTION (giving it some code which switches to the + readonly data section) or else you can #define the symbols + EXTRA_SECTIONS, EXTRA_SECTION_FUNCTIONS, SELECT_SECTION, and + SELECT_RTX_SECTION. We do both here just to be on the safe side. */ + +#undef USE_CONST_SECTION +#define USE_CONST_SECTION 1 + +#undef CONST_SECTION_ASM_OP +#define CONST_SECTION_ASM_OP ".section\t.rodata" + +/* Define the pseudo-ops used to switch to the .ctors and .dtors sections. + + Note that we want to give these sections the SHF_WRITE attribute + because these sections will actually contain data (i.e. tables of + addresses of functions in the current root executable or shared library + file) and, in the case of a shared library, the relocatable addresses + will have to be properly resolved/relocated (and then written into) by + the dynamic linker when it actually attaches the given shared library + to the executing process. (Note that on SVR4, you may wish to use the + `-z text' option to the ELF linker, when building a shared library, as + an additional check that you are doing everything right. But if you do + use the `-z text' option when building a shared library, you will get + errors unless the .ctors and .dtors sections are marked as writable + via the SHF_WRITE attribute.) */ + +#undef CTORS_SECTION_ASM_OP +#define CTORS_SECTION_ASM_OP ".section\t.ctors,\"aw\"" +#undef DTORS_SECTION_ASM_OP +#define DTORS_SECTION_ASM_OP ".section\t.dtors,\"aw\"" + +/* On svr4, we *do* have support for the .init and .fini sections, and we + can put stuff in there to be executed before and after `main'. We let + crtstuff.c and other files know this by defining the following symbols. + The definitions say how to change sections to the .init and .fini + sections. This is the same for all known svr4 assemblers. */ + +#undef INIT_SECTION_ASM_OP +#define INIT_SECTION_ASM_OP ".section\t.init" +#undef FINI_SECTION_ASM_OP +#define FINI_SECTION_ASM_OP ".section\t.fini" + +/* A default list of other sections which we might be "in" at any given + time. For targets that use additional sections (e.g. .tdesc) you + should override this definition in the target-specific file which + includes this file. */ + +#undef EXTRA_SECTIONS +#define EXTRA_SECTIONS in_const, in_ctors, in_dtors + +/* A default list of extra section function definitions. For targets + that use additional sections (e.g. .tdesc) you should override this + definition in the target-specific file which includes this file. */ + +#undef EXTRA_SECTION_FUNCTIONS +#define EXTRA_SECTION_FUNCTIONS \ + CONST_SECTION_FUNCTION \ + CTORS_SECTION_FUNCTION \ + DTORS_SECTION_FUNCTION + +#undef READONLY_DATA_SECTION +#define READONLY_DATA_SECTION() const_section () + +extern void text_section (); + +#undef CONST_SECTION_FUNCTION +#define CONST_SECTION_FUNCTION \ +void \ +const_section () \ +{ \ + if (!USE_CONST_SECTION) \ + text_section(); \ + else if (in_section != in_const) \ + { \ + fprintf (asm_out_file, "%s\n", CONST_SECTION_ASM_OP); \ + in_section = in_const; \ + } \ +} + +#undef CTORS_SECTION_FUNCTION +#define CTORS_SECTION_FUNCTION \ +void \ +ctors_section () \ +{ \ + if (in_section != in_ctors) \ + { \ + fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \ + in_section = in_ctors; \ + } \ +} + +#undef DTORS_SECTION_FUNCTION +#define DTORS_SECTION_FUNCTION \ +void \ +dtors_section () \ +{ \ + if (in_section != in_dtors) \ + { \ + fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \ + in_section = in_dtors; \ + } \ +} + +/* Switch into a generic section. + This is currently only used to support section attributes. + + We make the section read-only and executable for a function decl, + read-only for a const data decl, and writable for a non-const data decl. */ +#undef ASM_OUTPUT_SECTION_NAME +#define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME, RELOC) \ + fprintf ((FILE), ".section\t%s,\"%s\",@progbits\n", (NAME), \ + (DECL) && TREE_CODE (DECL) == FUNCTION_DECL ? "ax" : \ + (DECL) && DECL_READONLY_SECTION ((DECL), (RELOC)) ? "a" : "aw") + + +/* A C statement (sans semicolon) to output an element in the table of + global constructors. */ +#undef ASM_OUTPUT_CONSTRUCTOR +#define ASM_OUTPUT_CONSTRUCTOR(FILE, NAME) \ + do { \ + ctors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } while (0) + +/* A C statement (sans semicolon) to output an element in the table of + global destructors. */ +#undef ASM_OUTPUT_DESTRUCTOR +#define ASM_OUTPUT_DESTRUCTOR(FILE, NAME) \ + do { \ + dtors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } while (0) + +/* A C statement or statements to switch to the appropriate + section for output of DECL. DECL is either a `VAR_DECL' node + or a constant of some sort. RELOC indicates whether forming + the initial value of DECL requires link-time relocations. */ + +#undef SELECT_SECTION +#define SELECT_SECTION(DECL, RELOC) \ +{ \ + if (TREE_CODE (DECL) == STRING_CST) \ + { \ + if (! flag_writable_strings) \ + const_section (); \ + else \ + data_section (); \ + } \ + else if (TREE_CODE (DECL) == VAR_DECL) \ + { \ + if ((flag_pic && (RELOC)) \ + || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \ + || !DECL_INITIAL (DECL) \ + || (DECL_INITIAL (DECL) != error_mark_node \ + && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \ + data_section (); \ + else \ + const_section (); \ + } \ + else \ + const_section (); \ +} + +/* A C statement or statements to switch to the appropriate + section for output of RTX in mode MODE. RTX is some kind + of constant in RTL. The argument MODE is redundant except + in the case of a `const_int' rtx. Currently, these always + go into the const section. */ + +#undef SELECT_RTX_SECTION +#define SELECT_RTX_SECTION(MODE,RTX) const_section() + +/* Define the strings used for the .type, .size and .set directives. + These strings generally do not vary from one system running svr4 to + another, but if a given system (e.g. m88k running svr) needs to use + different pseudo-op names for these, they may be overridden in the + file which includes this one. */ + +#undef TYPE_ASM_OP +#define TYPE_ASM_OP ".type" +#undef SIZE_ASM_OP +#define SIZE_ASM_OP ".size" + +/* This is how we tell the assembler that two symbols have the same value. */ + +#undef ASM_OUTPUT_DEF +#define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ + do { assemble_name((FILE), (NAME1)); \ + fputs(" = ", (FILE)); \ + assemble_name((FILE), (NAME2)); \ + fputc('\n', (FILE)); } while (0) + +/* A table of bytes codes used by the ASM_OUTPUT_ASCII and + ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table + corresponds to a particular byte value [0..255]. For any + given byte value, if the value in the corresponding table + position is zero, the given character can be output directly. + If the table value is 1, the byte must be output as a \ooo + octal escape. If the tables value is anything else, then the + byte value should be output as a \ followed by the value + in the table. Note that we can use standard UN*X escape + sequences for many control characters, but we don't use + \a to represent BEL because some svr4 assemblers (e.g. on + the i386) don't know about that. Also, we don't use \v + since some versions of gas, such as 2.2 did not accept it. */ + +#undef ESCAPES +#define ESCAPES \ +"\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ +\0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ +\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\ +\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\ +\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ +\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ +\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ +\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1" + +/* Some svr4 assemblers have a limit on the number of characters which + can appear in the operand of a .string directive. If your assembler + has such a limitation, you should define STRING_LIMIT to reflect that + limit. Note that at least some svr4 assemblers have a limit on the + actual number of bytes in the double-quoted string, and that they + count each character in an escape sequence as one byte. Thus, an + escape sequence like \377 would count as four bytes. + + If your target assembler doesn't support the .string directive, you + should define this to zero. */ + +#undef STRING_LIMIT +#define STRING_LIMIT ((unsigned) 256) + +#undef STRING_ASM_OP +#define STRING_ASM_OP ".string" + +/* We always use gas here, so we don't worry about ECOFF assembler problems. */ +#undef TARGET_GAS +#define TARGET_GAS 1 + +/* Implicit library calls should use memcpy, not bcopy, etc. */ + +#define TARGET_MEM_FUNCTIONS + +/* Some imports from svr4.h in support of shared libraries. Currently, we + need the DECLARE_OBJECT_SIZE stuff. */ + +/* This is how we tell the assembler that a symbol is weak. */ + +#undef ASM_WEAKEN_LABEL +#define ASM_WEAKEN_LABEL(FILE, NAME) \ + do { fputs ("\t.globl\t", (FILE)); assemble_name ((FILE), (NAME)); \ + fputc ('\n', (FILE)); \ + fputs ("\t.weak\t", (FILE)); assemble_name ((FILE), (NAME)); \ + fputc ('\n', (FILE)); } while (0) + +/* The following macro defines the format used to output the second + operand of the .type assembler directive. Different svr4 assemblers + expect various different forms for this operand. The one given here + is just a default. You may need to override it in your machine- + specific tm.h file (depending upon the particulars of your assembler). */ + +#undef TYPE_OPERAND_FMT +#define TYPE_OPERAND_FMT "@%s" + +/* Write the extra assembler code needed to declare a function's result. + Most svr4 assemblers don't require any special declaration of the + result value, but there are exceptions. */ + +#ifndef ASM_DECLARE_RESULT +#define ASM_DECLARE_RESULT(FILE, RESULT) +#endif + +/* Handle cross-compilation on 32-bits machines (such as i386) for 64-bits + machines (Alpha in this case). */ + +#if defined(__i386__) +#undef HOST_BITS_PER_LONG +#define HOST_BITS_PER_LONG 32 +#undef HOST_WIDE_INT +#define HOST_WIDE_INT long long +#undef HOST_BITS_PER_WIDE_INT +#define HOST_BITS_PER_WIDE_INT 64 +#endif diff --git a/contrib/gcc/config/alpha/x-alpha b/contrib/gcc/config/alpha/x-alpha index 9686ab9..9919747 100644 --- a/contrib/gcc/config/alpha/x-alpha +++ b/contrib/gcc/config/alpha/x-alpha @@ -1,2 +1 @@ CLIB=-lmld -EXTRA_HEADERS = $(srcdir)/config/alpha/va_list.h diff --git a/contrib/gcc/config/alpha/xm-alpha.h b/contrib/gcc/config/alpha/xm-alpha.h index c04844f..642e1cf 100644 --- a/contrib/gcc/config/alpha/xm-alpha.h +++ b/contrib/gcc/config/alpha/xm-alpha.h @@ -41,18 +41,12 @@ Boston, MA 02111-1307, USA. */ #define SUCCESS_EXIT_CODE 0 #define FATAL_EXIT_CODE 33 -/* If compiled with GNU C, use the builtin alloca. */ -#ifndef alloca -#if defined(__GNUC__) && !defined(USE_C_ALLOCA) -#define alloca __builtin_alloca -#else -#if !defined(_WIN32) && !defined(USE_C_ALLOCA) && !defined(OPEN_VMS) && !defined(__INTERIX) +/* If not compiled with GNU C, use the builtin alloca. */ +#if !defined(__GNUC__) && !defined(_WIN32) #include <alloca.h> #else extern void *alloca (); #endif -#endif -#endif /* The host compiler has problems with enum bitfields since it makes them signed so we can't fit all our codes in. */ @@ -71,6 +65,14 @@ extern void *malloc (), *realloc (), *calloc (); #include "string.h" #endif +/* OSF/1 has vprintf. */ + +#define HAVE_VPRINTF + +/* OSF/1 has putenv. */ + +#define HAVE_PUTENV + /* OSF/1 is POSIX.1 compliant. */ #define POSIX diff --git a/contrib/gcc/config/alpha/xm-freebsd.h b/contrib/gcc/config/alpha/xm-freebsd.h new file mode 100644 index 0000000..13bc6b7 --- /dev/null +++ b/contrib/gcc/config/alpha/xm-freebsd.h @@ -0,0 +1,4 @@ +/* Configuration for GCC for Intel i386 running FreeBSD as host. */ + +#include <alpha/xm-alpha.h> +#include <xm-freebsd.h> diff --git a/contrib/gcc/config/freebsd.h b/contrib/gcc/config/freebsd.h index dc16976..a96dac6 100644 --- a/contrib/gcc/config/freebsd.h +++ b/contrib/gcc/config/freebsd.h @@ -24,97 +24,75 @@ Boston, MA 02111-1307, USA. */ Adapted from /usr/src/contrib/gcc/config/i386/freebsd.h & egcs/gcc/config/i386/freebsd-elf.h version by David O'Brien */ +/* $FreeBSD$ */ -/* Don't assume anything about the header files. */ + +/* Don't assume anything about the header files. */ +#undef NO_IMPLICIT_EXTERN_C #define NO_IMPLICIT_EXTERN_C -/* This defines which switch letters take arguments. On svr4, most of +/* This defines which switch letters take arguments. On FreeBSD, most of the normal cases (defined in gcc.c) apply, and we also have -h* and - -z* options (for the linker). We have a slightly different mix. We - have -R (alias --rpath), no -z, --soname (-h), --assert etc. */ + -z* options (for the linker) (comming from svr4). + We also have -R (alias --rpath), no -z, --soname (-h), --assert etc. */ -#undef SWITCH_TAKES_ARG -#define SWITCH_TAKES_ARG(CHAR) \ - ( (CHAR) == 'D' \ - || (CHAR) == 'U' \ - || (CHAR) == 'o' \ - || (CHAR) == 'e' \ - || (CHAR) == 'T' \ - || (CHAR) == 'u' \ - || (CHAR) == 'I' \ - || (CHAR) == 'm' \ - || (CHAR) == 'x' \ - || (CHAR) == 'L' \ - || (CHAR) == 'A' \ - || (CHAR) == 'V' \ - || (CHAR) == 'B' \ - || (CHAR) == 'b' \ +#define FBSD_SWITCH_TAKES_ARG(CHAR) \ + (DEFAULT_SWITCH_TAKES_ARG (CHAR) \ || (CHAR) == 'h' \ || (CHAR) == 'z' /* ignored by ld */ \ || (CHAR) == 'R') -#undef WORD_SWITCH_TAKES_ARG -#define WORD_SWITCH_TAKES_ARG(STR) \ +#undef SWITCH_TAKES_ARG +#define SWITCH_TAKES_ARG(CHAR) (FBSD_SWITCH_TAKES_ARG(CHAR)) + +#define FBSD_WORD_SWITCH_TAKES_ARG(STR) \ (DEFAULT_WORD_SWITCH_TAKES_ARG (STR) \ - || !strcmp (STR, "rpath") || !strcmp (STR, "rpath-link") \ - || !strcmp (STR, "soname") || !strcmp (STR, "defsym") \ - || !strcmp (STR, "assert") || !strcmp (STR, "dynamic-linker")) + || !strcmp ((STR), "rpath") || !strcmp ((STR), "rpath-link") \ + || !strcmp ((STR), "soname") || !strcmp ((STR), "defsym") \ + || !strcmp ((STR), "assert") || !strcmp ((STR), "dynamic-linker")) +#undef WORD_SWITCH_TAKES_ARG +#define WORD_SWITCH_TAKES_ARG(STR) (FBSD_WORD_SWITCH_TAKES_ARG(STR)) -#define CPP_FBSD_PREDEFINES "-Dunix -D__ELF__ -D__FreeBSD__=4 -D__FreeBSD_cc_version=400001 -Asystem(unix) -Asystem(FreeBSD)" +/* Place spaces around this string. We depend on string splicing to produce + the final CPP_PREDEFINES value. */ +#define CPP_FBSD_PREDEFINES " -Dunix -D__FreeBSD__=4 -D__FreeBSD_cc_version=400003 -Asystem(unix) -Asystem(FreeBSD) " + +/* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate + libc, depending on whether we're doing profiling. + (like the default, except no -lg, and no -p). */ +#undef LIB_SPEC +#define LIB_SPEC "%{!shared:%{!pg:%{!pthread:%{!kthread:-lc}%{kthread:-lpthread -lc}}%{pthread:-lc_r}}%{pg:%{!pthread:%{!kthread:-lc_p}%{kthread:-lpthread_p -lc_p}}%{pthread:-lc_r_p}}}" /* Code generation parameters. */ /* Don't default to pcc-struct-return, because gcc is the only compiler, and - we want to retain compatibility with older gcc versions. + we want to retain compatibility with older gcc versions (even though the svr4 ABI for the i386 says that records and unions are - returned in memory) */ + returned in memory). */ +#undef DEFAULT_PCC_STRUCT_RETURN #define DEFAULT_PCC_STRUCT_RETURN 0 /* Ensure we the configuration knows our system correctly so we can link with - libraries compiled with the native cc. */ + libraries compiled with the native cc. */ #undef NO_DOLLAR_IN_LABEL +/* Use more efficient ``thunks'' to implement C++ vtables. XXX note that + this setting is claimed to have a few bugs by the EGCS maintainers. They + believe the bugs will be worked out in EGCS 1.2. */ +#undef DEFAULT_VTABLE_THUNKS +#define DEFAULT_VTABLE_THUNKS 1 -/* Miscellaneous parameters. */ - -/* Tell libgcc2.c that FreeBSD targets support atexit(3). */ -#define HAVE_ATEXIT - - -/* FREEBSD_NATIVE is defined when gcc is integrated into the FreeBSD - source tree so it can be configured appropriately without using - the GNU configure/build mechanism. */ - -#ifdef FREEBSD_NATIVE - -/* Look for the include files in the system-defined places. */ - -#define GPLUSPLUS_INCLUDE_DIR "/usr/include/g++" -#define GCC_INCLUDE_DIR "/usr/include" - -/* Now that GCC knows what the include path applies to, put the G++ one first. - C++ can now have include files that override the default C ones. */ -#define INCLUDE_DEFAULTS \ - { \ - { GPLUSPLUS_INCLUDE_DIR, "C++", 1, 1 }, \ - { GCC_INCLUDE_DIR, "GCC", 0, 0 }, \ - { 0, 0, 0, 0 } \ - } +/* This is BSD, so we want the DBX format. */ +#define DBX_DEBUGGING_INFO -/* Under FreeBSD, the normal location of the compiler back ends is the - /usr/libexec directory. */ +/* Use stabs instead of DWARF debug format. */ +#undef PREFERRED_DEBUGGING_TYPE +#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG -#define STANDARD_EXEC_PREFIX "/usr/libexec/" -#define TOOLDIR_BASE_PREFIX "/usr/libexec/" -/* Under FreeBSD, the normal location of the various *crt*.o files is the - /usr/lib directory. */ - -#define STANDARD_STARTFILE_PREFIX "/usr/lib/" - -/* FreeBSD is 4.4BSD derived */ -#define bsd4_4 +/* Miscellaneous parameters. */ -#endif /* FREEBSD_NATIVE */ +/* Tell libgcc2.c that FreeBSD targets support atexit(3). */ +#define HAVE_ATEXIT diff --git a/contrib/gcc/config/i386/freebsd-elf.h b/contrib/gcc/config/i386/freebsd-elf.h deleted file mode 100644 index e97d4ca..0000000 --- a/contrib/gcc/config/i386/freebsd-elf.h +++ /dev/null @@ -1,257 +0,0 @@ -/* Definitions for Intel 386 running FreeBSD with ELF format - Copyright (C) 1996 Free Software Foundation, Inc. - Contributed by Eric Youngdale. - Modified for stabs-in-ELF by H.J. Lu. - Adapted from GNU/Linux version by John Polstra. - Continued development by David O'Brien <obrien@freebsd.org> - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#undef TARGET_VERSION -#define TARGET_VERSION fprintf (stderr, " (i386 FreeBSD/ELF)"); - -/* The svr4 ABI for the i386 says that records and unions are returned - in memory. */ -/* On FreeBSD, we do not. */ -#undef DEFAULT_PCC_STRUCT_RETURN -#define DEFAULT_PCC_STRUCT_RETURN 0 - -/* This gets defined in tm.h->linux.h->svr4.h, and keeps us from using - libraries compiled with the native cc, so undef it. */ -#undef NO_DOLLAR_IN_LABEL - -/* Use more efficient ``thunks'' to implement C++ vtables. */ -#undef DEFAULT_VTABLE_THUNKS -#define DEFAULT_VTABLE_THUNKS 1 - -/* Override the default comment-starter of "/". */ -#undef ASM_COMMENT_START -#define ASM_COMMENT_START "#" - -#undef ASM_APP_ON -#define ASM_APP_ON "#APP\n" - -#undef ASM_APP_OFF -#define ASM_APP_OFF "#NO_APP\n" - -#undef SET_ASM_OP -#define SET_ASM_OP ".set" - -/* This is how to output an element of a case-vector that is relative. - This is only used for PIC code. See comments by the `casesi' insn in - i386.md for an explanation of the expression this outputs. */ -#undef ASM_OUTPUT_ADDR_DIFF_ELT -#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ - fprintf (FILE, "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, VALUE) - -/* Indicate that jump tables go in the text section. This is - necessary when compiling PIC code. */ -#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) - -/* Use stabs instead of DWARF debug format. */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG - -/* Copy this from the svr4 specifications... */ -/* Define the register numbers to be used in Dwarf debugging information. - The SVR4 reference port C compiler uses the following register numbers - in its Dwarf output code: - 0 for %eax (gnu regno = 0) - 1 for %ecx (gnu regno = 2) - 2 for %edx (gnu regno = 1) - 3 for %ebx (gnu regno = 3) - 4 for %esp (gnu regno = 7) - 5 for %ebp (gnu regno = 6) - 6 for %esi (gnu regno = 4) - 7 for %edi (gnu regno = 5) - The following three DWARF register numbers are never generated by - the SVR4 C compiler or by the GNU compilers, but SDB on x86/svr4 - believes these numbers have these meanings. - 8 for %eip (no gnu equivalent) - 9 for %eflags (no gnu equivalent) - 10 for %trapno (no gnu equivalent) - It is not at all clear how we should number the FP stack registers - for the x86 architecture. If the version of SDB on x86/svr4 were - a bit less brain dead with respect to floating-point then we would - have a precedent to follow with respect to DWARF register numbers - for x86 FP registers, but the SDB on x86/svr4 is so completely - broken with respect to FP registers that it is hardly worth thinking - of it as something to strive for compatibility with. - The version of x86/svr4 SDB I have at the moment does (partially) - seem to believe that DWARF register number 11 is associated with - the x86 register %st(0), but that's about all. Higher DWARF - register numbers don't seem to be associated with anything in - particular, and even for DWARF regno 11, SDB only seems to under- - stand that it should say that a variable lives in %st(0) (when - asked via an `=' command) if we said it was in DWARF regno 11, - but SDB still prints garbage when asked for the value of the - variable in question (via a `/' command). - (Also note that the labels SDB prints for various FP stack regs - when doing an `x' command are all wrong.) - Note that these problems generally don't affect the native SVR4 - C compiler because it doesn't allow the use of -O with -g and - because when it is *not* optimizing, it allocates a memory - location for each floating-point variable, and the memory - location is what gets described in the DWARF AT_location - attribute for the variable in question. - Regardless of the severe mental illness of the x86/svr4 SDB, we - do something sensible here and we use the following DWARF - register numbers. Note that these are all stack-top-relative - numbers. - 11 for %st(0) (gnu regno = 8) - 12 for %st(1) (gnu regno = 9) - 13 for %st(2) (gnu regno = 10) - 14 for %st(3) (gnu regno = 11) - 15 for %st(4) (gnu regno = 12) - 16 for %st(5) (gnu regno = 13) - 17 for %st(6) (gnu regno = 14) - 18 for %st(7) (gnu regno = 15) -*/ -#undef DBX_REGISTER_NUMBER -#define DBX_REGISTER_NUMBER(n) \ -((n) == 0 ? 0 \ - : (n) == 1 ? 2 \ - : (n) == 2 ? 1 \ - : (n) == 3 ? 3 \ - : (n) == 4 ? 6 \ - : (n) == 5 ? 7 \ - : (n) == 6 ? 5 \ - : (n) == 7 ? 4 \ - : ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) ? (n)+3 \ - : (-1)) - -/* Tell final.c that we don't need a label passed to mcount. */ - -#undef FUNCTION_PROFILER -#define FUNCTION_PROFILER(FILE, LABELNO) \ -{ \ - if (flag_pic) \ - fprintf (FILE, "\tcall *.mcount@GOT(%%ebx)\n"); \ - else \ - fprintf (FILE, "\tcall .mcount\n"); \ -} - -#undef SIZE_TYPE -#define SIZE_TYPE "unsigned int" - -#undef PTRDIFF_TYPE -#define PTRDIFF_TYPE "int" - -#undef WCHAR_TYPE -#define WCHAR_TYPE "int" - -#undef WCHAR_UNSIGNED -#define WCHAR_UNSIGNED 0 - -#undef WCHAR_TYPE_SIZE -#define WCHAR_TYPE_SIZE BITS_PER_WORD - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Di386 -Dunix -D__ELF__ -D__FreeBSD__ -Asystem(unix) -Asystem(FreeBSD) -Acpu(i386) -Amachine(i386)" - -#undef CPP_SPEC -#define CPP_SPEC "%(cpp_cpu) %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{posix:-D_POSIX_SOURCE}" - -/* This defines which switch letters take arguments. On FreeBSD, most of - the normal cases (defined in gcc.c) apply, and we also have -h* and - -z* options (for the linker) (comming from svr4). - We also have -R (alias --rpath), no -z, --soname (-h), --assert etc. */ - -#undef SWITCH_TAKES_ARG -#define SWITCH_TAKES_ARG(CHAR) \ - (DEFAULT_SWITCH_TAKES_ARG (CHAR) \ - || (CHAR) == 'h' \ - || (CHAR) == 'z' \ - || (CHAR) == 'R') - -/* Provide a STARTFILE_SPEC appropriate for FreeBSD. Here we add - the magical crtbegin.o file (see crtstuff.c) which provides part - of the support for getting C++ file-scope static object constructed - before entering `main'. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC \ - "%{!shared: \ - %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \ - %{!p:%{profile:gcrt1.o%s} \ - %{!profile:crt1.o%s}}}} \ - crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" - -/* Provide a ENDFILE_SPEC appropriate for FreeBSD. Here we tack on - the magical crtend.o file (see crtstuff.c) which provides part of - the support for getting C++ file-scope static object constructed - before entering `main', followed by a normal "finalizer" file, - `crtn.o'. */ - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC \ - "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s" - -/* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate - libc, depending on whether we're doing profiling or need threads support. - (simular to the default, except no -lg, and no -p. */ - -#undef LIB_SPEC -#define LIB_SPEC "%{!shared: \ - %{!pg:%{!pthread:%{!kthread:-lc} \ - %{kthread:-lpthread -lc}} \ - %{pthread:-lc_r}} \ - %{pg:%{!pthread:%{!kthread:-lc_p} \ - %{kthread:-lpthread_p -lc_p}} \ - %{pthread:-lc_r_p}}}" - -/* Provide a LINK_SPEC appropriate for FreeBSD. Here we provide support - for the special GCC options -static and -shared, which allow us to - link things in one of these three modes by applying the appropriate - combinations of options at link-time. We like to support here for - as many of the other GNU linker options as possible. But I don't - have the time to search for those flags. I am sure how to add - support for -soname shared_object_name. H.J. - - I took out %{v:%{!V:-V}}. It is too much :-(. They can use - -Wl,-V. - - When the -shared link option is used a final link is not being - done. */ - -#undef LINK_SPEC -#define LINK_SPEC "-m elf_i386 \ - %{Wl,*:%*} \ - %{v:-V} \ - %{assert*} %{R*} %{rpath*} %{defsym*} \ - %{shared:-Bshareable %{h*} %{soname*}} \ - %{!shared: \ - %{!static: \ - %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker /usr/libexec/ld-elf.so.1}} \ - %{static:-Bstatic}} \ - %{symbolic:-Bsymbolic}" - -/* A C statement to output to the stdio stream FILE an assembler - command to advance the location counter to a multiple of 1<<LOG - bytes if it is within MAX_SKIP bytes. - - This is used to align code labels according to Intel recommendations. */ - -#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN -#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP) \ - if ((LOG) != 0) {\ - if ((MAX_SKIP) == 0) fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ - else fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)); \ - } -#endif diff --git a/contrib/gcc/config/i386/freebsd.h b/contrib/gcc/config/i386/freebsd.h index e97d4ca..c78c2f6 100644 --- a/contrib/gcc/config/i386/freebsd.h +++ b/contrib/gcc/config/i386/freebsd.h @@ -1,8 +1,9 @@ -/* Definitions for Intel 386 running FreeBSD with ELF format +/* Definitions for Intel 386 running FreeBSD with either a.out or ELF format Copyright (C) 1996 Free Software Foundation, Inc. Contributed by Eric Youngdale. Modified for stabs-in-ELF by H.J. Lu. Adapted from GNU/Linux version by John Polstra. + Added support for generating "old a.out gas" on the fly by Peter Wemm. Continued development by David O'Brien <obrien@freebsd.org> This file is part of GNU CC. @@ -22,22 +23,35 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#undef TARGET_VERSION -#define TARGET_VERSION fprintf (stderr, " (i386 FreeBSD/ELF)"); +/* $FreeBSD$ */ -/* The svr4 ABI for the i386 says that records and unions are returned - in memory. */ -/* On FreeBSD, we do not. */ -#undef DEFAULT_PCC_STRUCT_RETURN -#define DEFAULT_PCC_STRUCT_RETURN 0 -/* This gets defined in tm.h->linux.h->svr4.h, and keeps us from using - libraries compiled with the native cc, so undef it. */ -#undef NO_DOLLAR_IN_LABEL +#undef TARGET_VERSION +#define TARGET_VERSION fprintf (stderr, " (i386 FreeBSD/ELF)"); -/* Use more efficient ``thunks'' to implement C++ vtables. */ -#undef DEFAULT_VTABLE_THUNKS -#define DEFAULT_VTABLE_THUNKS 1 +#define MASK_PROFILER_EPILOGUE 010000000000 +#define MASK_AOUT 004000000000 /* a.out not elf */ +#define MASK_UNDERSCORES 002000000000 /* use leading _ */ + +#define TARGET_PROFILER_EPILOGUE (target_flags & MASK_PROFILER_EPILOGUE) +#define TARGET_AOUT (target_flags & MASK_AOUT) +#define TARGET_ELF ((target_flags & MASK_AOUT) == 0) +#define TARGET_UNDERSCORES ((target_flags & MASK_UNDERSCORES) != 0) + +#undef SUBTARGET_SWITCHES +#define SUBTARGET_SWITCHES \ + { "profiler-epilogue", MASK_PROFILER_EPILOGUE}, \ + { "no-profiler-epilogue", -MASK_PROFILER_EPILOGUE}, \ + { "aout", MASK_AOUT}, \ + { "no-aout", -MASK_AOUT}, \ + { "underscores", MASK_UNDERSCORES}, \ + { "no-underscores", -MASK_UNDERSCORES}, + +/* Prefix for internally generated assembler labels. If we aren't using + underscores, we are using prefix `.'s to identify labels that should + be ignored, as in `i386/gas.h' --karl@cs.umb.edu */ +#undef LPREFIX +#define LPREFIX ((TARGET_UNDERSCORES) ? "L" : ".L") /* Override the default comment-starter of "/". */ #undef ASM_COMMENT_START @@ -47,25 +61,271 @@ Boston, MA 02111-1307, USA. */ #define ASM_APP_ON "#APP\n" #undef ASM_APP_OFF -#define ASM_APP_OFF "#NO_APP\n" +#define ASM_APP_OFF "#NO_APP\n" #undef SET_ASM_OP #define SET_ASM_OP ".set" +/* Output at beginning of assembler file. */ +/* The .file command should always begin the output. */ + +#undef ASM_FILE_START +#define ASM_FILE_START(FILE) \ + do { \ + output_file_directive ((FILE), main_input_filename); \ + if (TARGET_ELF) \ + fprintf ((FILE), "\t.version\t\"01.01\"\n"); \ + } while (0) + +/* Identify the front-end which produced this file. To keep symbol + space down, and not confuse kdb, only do this if the language is + not C. (svr4.h defines ASM_IDENTIFY_GCC but neglects this) */ +#undef ASM_IDENTIFY_LANGUAGE +#define ASM_IDENTIFY_LANGUAGE(STREAM) \ +{ \ + if (strcmp (lang_identify (), "c") != 0) \ + output_lang_identify (STREAM); \ +} + +/* This is how to store into the string BUF + the symbol_ref name of an internal numbered label where + PREFIX is the class of label and NUM is the number within the class. + This is suitable for output with `assemble_name'. */ +#undef ASM_GENERATE_INTERNAL_LABEL +#define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ + sprintf ((BUF), "*%s%s%d", (TARGET_UNDERSCORES) ? "" : ".", \ + (PREFIX), (NUMBER)) + +/* This is how to output an internal numbered label where + PREFIX is the class of label and NUM is the number within the class. */ +#undef ASM_OUTPUT_INTERNAL_LABEL +#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ + fprintf ((FILE), "%s%s%d:\n", (TARGET_UNDERSCORES) ? "" : ".", \ + (PREFIX), (NUM)) + +/* This is how to output a reference to a user-level label named NAME. */ +#undef ASM_OUTPUT_LABELREF +#define ASM_OUTPUT_LABELREF(FILE, NAME) \ + fprintf ((FILE), "%s%s", (TARGET_UNDERSCORES) ? "_" : "", (NAME)) + /* This is how to output an element of a case-vector that is relative. This is only used for PIC code. See comments by the `casesi' insn in i386.md for an explanation of the expression this outputs. */ #undef ASM_OUTPUT_ADDR_DIFF_ELT #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ - fprintf (FILE, "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, VALUE) + fprintf ((FILE), "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, (VALUE)) + +#undef ASM_OUTPUT_ALIGN +#define ASM_OUTPUT_ALIGN(FILE, LOG) \ + if ((LOG)!=0) { \ + if (in_text_section()) \ + fprintf ((FILE), "\t.p2align %d,0x90\n", (LOG)); \ + else \ + fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ + } + +/* conditionalize the use of ".section rodata" on elf mode - otherwise .text */ +#undef USE_CONST_SECTION +#define USE_CONST_SECTION TARGET_ELF + +/* The a.out tools do not support "linkonce" sections. */ +#undef SUPPORTS_ONE_ONLY +#define SUPPORTS_ONE_ONLY TARGET_ELF + +/* The a.out tools do not support "Lscope" .stabs symbols. */ +#undef NO_DBX_FUNCTION_END +#define NO_DBX_FUNCTION_END TARGET_AOUT + +/* A C statement (sans semicolon) to output an element in the table of + global constructors. */ +#undef ASM_OUTPUT_CONSTRUCTOR +#define ASM_OUTPUT_CONSTRUCTOR(FILE, NAME) \ + do { \ + if (TARGET_ELF) { \ + ctors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } else { \ + fprintf (asm_out_file, "%s \"%s__CTOR_LIST__\",22,0,0,", ASM_STABS_OP, \ + (TARGET_UNDERSCORES) ? "_" : ""); \ + assemble_name (asm_out_file, name); \ + fputc ('\n', asm_out_file); \ + } \ + } while (0) + +/* A C statement (sans semicolon) to output an element in the table of + global destructors. */ +#undef ASM_OUTPUT_DESTRUCTOR +#define ASM_OUTPUT_DESTRUCTOR(FILE, NAME) \ + do { \ + if (TARGET_ELF) { \ + dtors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } else { \ + fprintf (asm_out_file, "%s \"%s__DTOR_LIST__\",22,0,0,", ASM_STABS_OP, \ + (TARGET_UNDERSCORES) ? "_" : ""); \ + assemble_name (asm_out_file, name); \ + fputc ('\n', asm_out_file); \ + } \ + } while (0) + +/* This says how to output assembler code to declare an + uninitialized internal linkage data object. Under SVR4, + the linker seems to want the alignment of data objects + to depend on their types. We do exactly that here. */ + +#undef ASM_OUTPUT_ALIGNED_LOCAL +#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + ASM_OUTPUT_ALIGNED_COMMON ((FILE), (NAME), (SIZE), (ALIGN)); \ + } else { \ + int rounded = (SIZE); \ + if (rounded == 0) rounded = 1; \ + rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; \ + rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) \ + * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); \ + fputs (".lcomm ", (FILE)); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u\n", (rounded)); \ + } \ +} while (0) + +#undef ASM_OUTPUT_ALIGNED_COMMON +#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ + } else { \ + int rounded = (SIZE); \ + if (rounded == 0) rounded = 1; \ + rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; \ + rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) \ + * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); \ + fputs (".comm ", (FILE)); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u\n", (rounded)); \ + } \ +} while (0) + +/* Turn off svr4.h version, it chokes the old gas. The old layout + works fine under new gas anyway. */ +#undef ASM_OUTPUT_ASCII + +/* How to output some space */ +#undef ASM_OUTPUT_SKIP +#define ASM_OUTPUT_SKIP(FILE, SIZE) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t%u\n", SKIP_ASM_OP, (SIZE)); \ + } else { \ + fprintf ((FILE), "\t.space %u\n", (SIZE)); \ + } \ +} while (0) + +#undef ASM_OUTPUT_SOURCE_LINE +#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \ +do { \ + static int sym_lineno = 1; \ + if (TARGET_ELF) { \ + fprintf ((FILE), ".stabn 68,0,%d,.LM%d-", (LINE), sym_lineno); \ + assemble_name ((FILE), XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + fprintf ((FILE), "\n.LM%d:\n", sym_lineno); \ + sym_lineno += 1; \ + } else { \ + fprintf ((FILE), "\t%s %d,0,%d\n", ASM_STABD_OP, N_SLINE, lineno); \ + } \ +} while (0) + +/* in elf, the function stabs come first, before the relative offsets */ +#undef DBX_FUNCTION_FIRST +#define DBX_CHECK_FUNCTION_FIRST TARGET_ELF + +/* tag end of file in elf mode */ +#undef DBX_OUTPUT_MAIN_SOURCE_FILE_END +#define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t.text\n\t.stabs \"\",%d,0,0,.Letext\n.Letext:\n", \ + N_SO); \ + } \ +} while (0) + +/* stabs-in-elf has offsets relative to function beginning */ +#undef DBX_OUTPUT_LBRAC +#define DBX_OUTPUT_LBRAC(FILE, NAME) \ +do { \ + fprintf (asmfile, "%s %d,0,0,", ASM_STABN_OP, N_LBRAC); \ + assemble_name (asmfile, buf); \ + if (TARGET_ELF) { \ + fputc ('-', asmfile); \ + assemble_name (asmfile, XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + } \ + fprintf (asmfile, "\n"); \ +} while (0) + +#undef DBX_OUTPUT_RBRAC +#define DBX_OUTPUT_RBRAC(FILE, NAME) \ +do { \ + fprintf (asmfile, "%s %d,0,0,", ASM_STABN_OP, N_RBRAC); \ + assemble_name (asmfile, buf); \ + if (TARGET_ELF) { \ + fputc ('-', asmfile); \ + assemble_name (asmfile, XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + } \ + fprintf (asmfile, "\n"); \ +} while (0) + + +/* Define macro used to output shift-double opcodes when the shift + count is in %cl. Some assemblers require %cl as an argument; + some don't. + + *OLD* GAS requires the %cl argument, so override i386/unix.h. */ + +#undef AS3_SHIFT_DOUBLE +#define AS3_SHIFT_DOUBLE(a,b,c,d) AS3 (a,b,c,d) /* Indicate that jump tables go in the text section. This is necessary when compiling PIC code. */ +#undef JUMP_TABLES_IN_TEXT_SECTION #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) -/* Use stabs instead of DWARF debug format. */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG +/* override the exception table positioning */ +#undef EXCEPTION_SECTION +#define EXCEPTION_SECTION() \ +do { \ + if (TARGET_ELF) { \ + named_section (NULL_TREE, ".gcc_except_table", 0); \ + } else { \ + if (flag_pic) \ + data_section (); \ + else \ + readonly_data_section (); \ + } \ +} while (0); + +/* supply our own hook for calling __main() from main() */ +#undef INVOKE__main +#define INVOKE__main +#undef GEN_CALL__MAIN +#define GEN_CALL__MAIN \ + do { \ + if (!(TARGET_ELF)) \ + emit_library_call (gen_rtx (SYMBOL_REF, Pmode, NAME__MAIN), 0, \ + VOIDmode, 0); \ + } while (0) /* Copy this from the svr4 specifications... */ /* Define the register numbers to be used in Dwarf debugging information. @@ -122,8 +382,8 @@ Boston, MA 02111-1307, USA. */ 17 for %st(6) (gnu regno = 14) 18 for %st(7) (gnu regno = 15) */ -#undef DBX_REGISTER_NUMBER -#define DBX_REGISTER_NUMBER(n) \ +#undef DWARF_DBX_REGISTER_NUMBER +#define DWARF_DBX_REGISTER_NUMBER(n) \ ((n) == 0 ? 0 \ : (n) == 1 ? 2 \ : (n) == 2 ? 1 \ @@ -135,15 +395,57 @@ Boston, MA 02111-1307, USA. */ : ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) ? (n)+3 \ : (-1)) +/* Now what stabs expects in the register. */ +#undef STABS_DBX_REGISTER_NUMBER +#define STABS_DBX_REGISTER_NUMBER(n) \ +((n) == 0 ? 0 : \ + (n) == 1 ? 2 : \ + (n) == 2 ? 1 : \ + (n) == 3 ? 3 : \ + (n) == 4 ? 6 : \ + (n) == 5 ? 7 : \ + (n) == 6 ? 4 : \ + (n) == 7 ? 5 : \ + (n) + 4) + +#undef DBX_REGISTER_NUMBER +#define DBX_REGISTER_NUMBER(n) ((write_symbols == DWARF_DEBUG) \ + ? DWARF_DBX_REGISTER_NUMBER(n) \ + : STABS_DBX_REGISTER_NUMBER(n)) + /* Tell final.c that we don't need a label passed to mcount. */ +#define NO_PROFILE_DATA + +/* Output assembler code to FILE to increment profiler label # LABELNO + for profiling a function entry. */ +/* Redefine this to not pass an unused label in %edx. */ #undef FUNCTION_PROFILER #define FUNCTION_PROFILER(FILE, LABELNO) \ { \ if (flag_pic) \ - fprintf (FILE, "\tcall *.mcount@GOT(%%ebx)\n"); \ + { \ + fprintf ((FILE), "\tcall *%s@GOT(%%ebx)\n", \ + TARGET_AOUT ? "mcount" : ".mcount"); \ + } \ else \ - fprintf (FILE, "\tcall .mcount\n"); \ + { \ + fprintf ((FILE), "\tcall %s\n", TARGET_AOUT ? "mcount" : ".mcount"); \ + } \ +} + +#undef FUNCTION_PROFILER_EPILOGUE +#define FUNCTION_PROFILER_EPILOGUE(FILE) \ +{ \ + if (TARGET_PROFILER_EPILOGUE) \ + { \ + if (flag_pic) \ + fprintf ((FILE), "\tcall *%s@GOT(%%ebx)\n", \ + TARGET_AOUT ? "mexitcount" : ".mexitcount"); \ + else \ + fprintf ((FILE), "\tcall %s\n", \ + TARGET_AOUT ? "mexitcount" : ".mexitcount"); \ + } \ } #undef SIZE_TYPE @@ -151,69 +453,41 @@ Boston, MA 02111-1307, USA. */ #undef PTRDIFF_TYPE #define PTRDIFF_TYPE "int" - + #undef WCHAR_TYPE #define WCHAR_TYPE "int" - + #undef WCHAR_UNSIGNED #define WCHAR_UNSIGNED 0 - + #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE BITS_PER_WORD - + #undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Di386 -Dunix -D__ELF__ -D__FreeBSD__ -Asystem(unix) -Asystem(FreeBSD) -Acpu(i386) -Amachine(i386)" +#define CPP_PREDEFINES "-Di386 -Acpu(i386) -Amachine(i386)" CPP_FBSD_PREDEFINES #undef CPP_SPEC -#define CPP_SPEC "%(cpp_cpu) %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{posix:-D_POSIX_SOURCE}" - -/* This defines which switch letters take arguments. On FreeBSD, most of - the normal cases (defined in gcc.c) apply, and we also have -h* and - -z* options (for the linker) (comming from svr4). - We also have -R (alias --rpath), no -z, --soname (-h), --assert etc. */ - -#undef SWITCH_TAKES_ARG -#define SWITCH_TAKES_ARG(CHAR) \ - (DEFAULT_SWITCH_TAKES_ARG (CHAR) \ - || (CHAR) == 'h' \ - || (CHAR) == 'z' \ - || (CHAR) == 'R') - -/* Provide a STARTFILE_SPEC appropriate for FreeBSD. Here we add - the magical crtbegin.o file (see crtstuff.c) which provides part - of the support for getting C++ file-scope static object constructed - before entering `main'. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC \ - "%{!shared: \ - %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \ - %{!p:%{profile:gcrt1.o%s} \ - %{!profile:crt1.o%s}}}} \ - crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" - -/* Provide a ENDFILE_SPEC appropriate for FreeBSD. Here we tack on - the magical crtend.o file (see crtstuff.c) which provides part of - the support for getting C++ file-scope static object constructed - before entering `main', followed by a normal "finalizer" file, - `crtn.o'. */ - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC \ - "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s" +#if TARGET_CPU_DEFAULT == 2 +#define CPP_SPEC "\ +%{!maout: -D__ELF__} \ +%{munderscores: -D__UNDERSCORES__} \ +%{maout: %{!mno-underscores: -D__UNDERSCORES__}} \ +%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{!m386:-D__i486__}" +#else +#define CPP_SPEC "\ +%{!maout: -D__ELF__} \ +%{munderscores: -D__UNDERSCORES__} \ +%{maout: %{!mno-underscores: -D__UNDERSCORES__}} \ +%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{m486:-D__i486__}" +#endif -/* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate - libc, depending on whether we're doing profiling or need threads support. - (simular to the default, except no -lg, and no -p. */ +#undef CC1_SPEC +#define CC1_SPEC "\ +%{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ +%{maout: %{!mno-underscores: %{!munderscores: -munderscores }}}" -#undef LIB_SPEC -#define LIB_SPEC "%{!shared: \ - %{!pg:%{!pthread:%{!kthread:-lc} \ - %{kthread:-lpthread -lc}} \ - %{pthread:-lc_r}} \ - %{pg:%{!pthread:%{!kthread:-lc_p} \ - %{kthread:-lpthread_p -lc_p}} \ - %{pthread:-lc_r_p}}}" +#undef ASM_SPEC +#define ASM_SPEC "%{v*: -v} %{maout: %{fpic:-k} %{fPIC:-k}}" /* Provide a LINK_SPEC appropriate for FreeBSD. Here we provide support for the special GCC options -static and -shared, which allow us to @@ -230,17 +504,23 @@ Boston, MA 02111-1307, USA. */ done. */ #undef LINK_SPEC -#define LINK_SPEC "-m elf_i386 \ - %{Wl,*:%*} \ - %{v:-V} \ - %{assert*} %{R*} %{rpath*} %{defsym*} \ - %{shared:-Bshareable %{h*} %{soname*}} \ +#define LINK_SPEC "\ + %{p:%e`-p' not supported; use `-pg' and gprof(1)} \ + %{maout: %{shared:-Bshareable} \ + %{!shared:%{!nostdlib:%{!r:%{!e*:-e start}}} -dc -dp %{static:-Bstatic} \ + %{pg:-Bstatic} %{Z}} \ + %{assert*} %{R*}} \ + %{!maout: \ + -m elf_i386 \ + %{Wl,*:%*} \ + %{assert*} %{R*} %{rpath*} %{defsym*} \ + %{shared:-Bshareable %{h*} %{soname*}} \ + %{symbolic:-Bsymbolic} \ %{!shared: \ %{!static: \ - %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker /usr/libexec/ld-elf.so.1}} \ - %{static:-Bstatic}} \ - %{symbolic:-Bsymbolic}" + %{rdynamic: -export-dynamic} \ + %{!dynamic-linker: -dynamic-linker /usr/libexec/ld-elf.so.1}} \ + %{static:-Bstatic}}}" /* A C statement to output to the stdio stream FILE an assembler command to advance the location counter to a multiple of 1<<LOG @@ -249,9 +529,31 @@ Boston, MA 02111-1307, USA. */ This is used to align code labels according to Intel recommendations. */ #ifdef HAVE_GAS_MAX_SKIP_P2ALIGN -#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP) \ - if ((LOG) != 0) {\ - if ((MAX_SKIP) == 0) fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ - else fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)); \ - } +#error "we don't have this for the aout gas" +#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \ + if ((LOG)!=0) \ + if ((MAX_SKIP)==0) fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ + else fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)) #endif + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "\ + %{maout: %{shared:c++rt0.o%s} \ + %{!shared:%{pg:gcrt0.o%s}%{!pg:%{static:scrt0.o%s}%{!static:crt0.o%s}}}} \ + %{!maout: %{!shared: \ + %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}} \ + crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}}" + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC \ + "%{!maout: %{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s}" + +/* This goes away when the math emulator is fixed. */ +#undef TARGET_DEFAULT +#define TARGET_DEFAULT (MASK_NO_FANCY_MATH_387 | 0301) + +/* FreeBSD ELF using our home-grown crtbegin.o/crtend.o does not support the + DWARF2 unwinding mechanisms. Once `make world' bootstraping problems with + the EGCS crtstuff.c is overcome, we will switch to the non-sjlj-exceptions + type exception machanism. */ +#define DWARF2_UNWIND_INFO 0 diff --git a/contrib/gcc/config/i386/freebsd.h.fixed b/contrib/gcc/config/i386/freebsd.h.fixed index e97d4ca..c78c2f6 100644 --- a/contrib/gcc/config/i386/freebsd.h.fixed +++ b/contrib/gcc/config/i386/freebsd.h.fixed @@ -1,8 +1,9 @@ -/* Definitions for Intel 386 running FreeBSD with ELF format +/* Definitions for Intel 386 running FreeBSD with either a.out or ELF format Copyright (C) 1996 Free Software Foundation, Inc. Contributed by Eric Youngdale. Modified for stabs-in-ELF by H.J. Lu. Adapted from GNU/Linux version by John Polstra. + Added support for generating "old a.out gas" on the fly by Peter Wemm. Continued development by David O'Brien <obrien@freebsd.org> This file is part of GNU CC. @@ -22,22 +23,35 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#undef TARGET_VERSION -#define TARGET_VERSION fprintf (stderr, " (i386 FreeBSD/ELF)"); +/* $FreeBSD$ */ -/* The svr4 ABI for the i386 says that records and unions are returned - in memory. */ -/* On FreeBSD, we do not. */ -#undef DEFAULT_PCC_STRUCT_RETURN -#define DEFAULT_PCC_STRUCT_RETURN 0 -/* This gets defined in tm.h->linux.h->svr4.h, and keeps us from using - libraries compiled with the native cc, so undef it. */ -#undef NO_DOLLAR_IN_LABEL +#undef TARGET_VERSION +#define TARGET_VERSION fprintf (stderr, " (i386 FreeBSD/ELF)"); -/* Use more efficient ``thunks'' to implement C++ vtables. */ -#undef DEFAULT_VTABLE_THUNKS -#define DEFAULT_VTABLE_THUNKS 1 +#define MASK_PROFILER_EPILOGUE 010000000000 +#define MASK_AOUT 004000000000 /* a.out not elf */ +#define MASK_UNDERSCORES 002000000000 /* use leading _ */ + +#define TARGET_PROFILER_EPILOGUE (target_flags & MASK_PROFILER_EPILOGUE) +#define TARGET_AOUT (target_flags & MASK_AOUT) +#define TARGET_ELF ((target_flags & MASK_AOUT) == 0) +#define TARGET_UNDERSCORES ((target_flags & MASK_UNDERSCORES) != 0) + +#undef SUBTARGET_SWITCHES +#define SUBTARGET_SWITCHES \ + { "profiler-epilogue", MASK_PROFILER_EPILOGUE}, \ + { "no-profiler-epilogue", -MASK_PROFILER_EPILOGUE}, \ + { "aout", MASK_AOUT}, \ + { "no-aout", -MASK_AOUT}, \ + { "underscores", MASK_UNDERSCORES}, \ + { "no-underscores", -MASK_UNDERSCORES}, + +/* Prefix for internally generated assembler labels. If we aren't using + underscores, we are using prefix `.'s to identify labels that should + be ignored, as in `i386/gas.h' --karl@cs.umb.edu */ +#undef LPREFIX +#define LPREFIX ((TARGET_UNDERSCORES) ? "L" : ".L") /* Override the default comment-starter of "/". */ #undef ASM_COMMENT_START @@ -47,25 +61,271 @@ Boston, MA 02111-1307, USA. */ #define ASM_APP_ON "#APP\n" #undef ASM_APP_OFF -#define ASM_APP_OFF "#NO_APP\n" +#define ASM_APP_OFF "#NO_APP\n" #undef SET_ASM_OP #define SET_ASM_OP ".set" +/* Output at beginning of assembler file. */ +/* The .file command should always begin the output. */ + +#undef ASM_FILE_START +#define ASM_FILE_START(FILE) \ + do { \ + output_file_directive ((FILE), main_input_filename); \ + if (TARGET_ELF) \ + fprintf ((FILE), "\t.version\t\"01.01\"\n"); \ + } while (0) + +/* Identify the front-end which produced this file. To keep symbol + space down, and not confuse kdb, only do this if the language is + not C. (svr4.h defines ASM_IDENTIFY_GCC but neglects this) */ +#undef ASM_IDENTIFY_LANGUAGE +#define ASM_IDENTIFY_LANGUAGE(STREAM) \ +{ \ + if (strcmp (lang_identify (), "c") != 0) \ + output_lang_identify (STREAM); \ +} + +/* This is how to store into the string BUF + the symbol_ref name of an internal numbered label where + PREFIX is the class of label and NUM is the number within the class. + This is suitable for output with `assemble_name'. */ +#undef ASM_GENERATE_INTERNAL_LABEL +#define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ + sprintf ((BUF), "*%s%s%d", (TARGET_UNDERSCORES) ? "" : ".", \ + (PREFIX), (NUMBER)) + +/* This is how to output an internal numbered label where + PREFIX is the class of label and NUM is the number within the class. */ +#undef ASM_OUTPUT_INTERNAL_LABEL +#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ + fprintf ((FILE), "%s%s%d:\n", (TARGET_UNDERSCORES) ? "" : ".", \ + (PREFIX), (NUM)) + +/* This is how to output a reference to a user-level label named NAME. */ +#undef ASM_OUTPUT_LABELREF +#define ASM_OUTPUT_LABELREF(FILE, NAME) \ + fprintf ((FILE), "%s%s", (TARGET_UNDERSCORES) ? "_" : "", (NAME)) + /* This is how to output an element of a case-vector that is relative. This is only used for PIC code. See comments by the `casesi' insn in i386.md for an explanation of the expression this outputs. */ #undef ASM_OUTPUT_ADDR_DIFF_ELT #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ - fprintf (FILE, "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, VALUE) + fprintf ((FILE), "\t.long _GLOBAL_OFFSET_TABLE_+[.-%s%d]\n", LPREFIX, (VALUE)) + +#undef ASM_OUTPUT_ALIGN +#define ASM_OUTPUT_ALIGN(FILE, LOG) \ + if ((LOG)!=0) { \ + if (in_text_section()) \ + fprintf ((FILE), "\t.p2align %d,0x90\n", (LOG)); \ + else \ + fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ + } + +/* conditionalize the use of ".section rodata" on elf mode - otherwise .text */ +#undef USE_CONST_SECTION +#define USE_CONST_SECTION TARGET_ELF + +/* The a.out tools do not support "linkonce" sections. */ +#undef SUPPORTS_ONE_ONLY +#define SUPPORTS_ONE_ONLY TARGET_ELF + +/* The a.out tools do not support "Lscope" .stabs symbols. */ +#undef NO_DBX_FUNCTION_END +#define NO_DBX_FUNCTION_END TARGET_AOUT + +/* A C statement (sans semicolon) to output an element in the table of + global constructors. */ +#undef ASM_OUTPUT_CONSTRUCTOR +#define ASM_OUTPUT_CONSTRUCTOR(FILE, NAME) \ + do { \ + if (TARGET_ELF) { \ + ctors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } else { \ + fprintf (asm_out_file, "%s \"%s__CTOR_LIST__\",22,0,0,", ASM_STABS_OP, \ + (TARGET_UNDERSCORES) ? "_" : ""); \ + assemble_name (asm_out_file, name); \ + fputc ('\n', asm_out_file); \ + } \ + } while (0) + +/* A C statement (sans semicolon) to output an element in the table of + global destructors. */ +#undef ASM_OUTPUT_DESTRUCTOR +#define ASM_OUTPUT_DESTRUCTOR(FILE, NAME) \ + do { \ + if (TARGET_ELF) { \ + dtors_section (); \ + fprintf ((FILE), "\t%s\t ", INT_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + } else { \ + fprintf (asm_out_file, "%s \"%s__DTOR_LIST__\",22,0,0,", ASM_STABS_OP, \ + (TARGET_UNDERSCORES) ? "_" : ""); \ + assemble_name (asm_out_file, name); \ + fputc ('\n', asm_out_file); \ + } \ + } while (0) + +/* This says how to output assembler code to declare an + uninitialized internal linkage data object. Under SVR4, + the linker seems to want the alignment of data objects + to depend on their types. We do exactly that here. */ + +#undef ASM_OUTPUT_ALIGNED_LOCAL +#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), "\n"); \ + ASM_OUTPUT_ALIGNED_COMMON ((FILE), (NAME), (SIZE), (ALIGN)); \ + } else { \ + int rounded = (SIZE); \ + if (rounded == 0) rounded = 1; \ + rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; \ + rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) \ + * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); \ + fputs (".lcomm ", (FILE)); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u\n", (rounded)); \ + } \ +} while (0) + +#undef ASM_OUTPUT_ALIGNED_COMMON +#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ + } else { \ + int rounded = (SIZE); \ + if (rounded == 0) rounded = 1; \ + rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1; \ + rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT) \ + * (BIGGEST_ALIGNMENT / BITS_PER_UNIT)); \ + fputs (".comm ", (FILE)); \ + assemble_name ((FILE), (NAME)); \ + fprintf ((FILE), ",%u\n", (rounded)); \ + } \ +} while (0) + +/* Turn off svr4.h version, it chokes the old gas. The old layout + works fine under new gas anyway. */ +#undef ASM_OUTPUT_ASCII + +/* How to output some space */ +#undef ASM_OUTPUT_SKIP +#define ASM_OUTPUT_SKIP(FILE, SIZE) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t%s\t%u\n", SKIP_ASM_OP, (SIZE)); \ + } else { \ + fprintf ((FILE), "\t.space %u\n", (SIZE)); \ + } \ +} while (0) + +#undef ASM_OUTPUT_SOURCE_LINE +#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \ +do { \ + static int sym_lineno = 1; \ + if (TARGET_ELF) { \ + fprintf ((FILE), ".stabn 68,0,%d,.LM%d-", (LINE), sym_lineno); \ + assemble_name ((FILE), XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + fprintf ((FILE), "\n.LM%d:\n", sym_lineno); \ + sym_lineno += 1; \ + } else { \ + fprintf ((FILE), "\t%s %d,0,%d\n", ASM_STABD_OP, N_SLINE, lineno); \ + } \ +} while (0) + +/* in elf, the function stabs come first, before the relative offsets */ +#undef DBX_FUNCTION_FIRST +#define DBX_CHECK_FUNCTION_FIRST TARGET_ELF + +/* tag end of file in elf mode */ +#undef DBX_OUTPUT_MAIN_SOURCE_FILE_END +#define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \ +do { \ + if (TARGET_ELF) { \ + fprintf ((FILE), "\t.text\n\t.stabs \"\",%d,0,0,.Letext\n.Letext:\n", \ + N_SO); \ + } \ +} while (0) + +/* stabs-in-elf has offsets relative to function beginning */ +#undef DBX_OUTPUT_LBRAC +#define DBX_OUTPUT_LBRAC(FILE, NAME) \ +do { \ + fprintf (asmfile, "%s %d,0,0,", ASM_STABN_OP, N_LBRAC); \ + assemble_name (asmfile, buf); \ + if (TARGET_ELF) { \ + fputc ('-', asmfile); \ + assemble_name (asmfile, XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + } \ + fprintf (asmfile, "\n"); \ +} while (0) + +#undef DBX_OUTPUT_RBRAC +#define DBX_OUTPUT_RBRAC(FILE, NAME) \ +do { \ + fprintf (asmfile, "%s %d,0,0,", ASM_STABN_OP, N_RBRAC); \ + assemble_name (asmfile, buf); \ + if (TARGET_ELF) { \ + fputc ('-', asmfile); \ + assemble_name (asmfile, XSTR (XEXP (DECL_RTL (current_function_decl),\ + 0), 0)); \ + } \ + fprintf (asmfile, "\n"); \ +} while (0) + + +/* Define macro used to output shift-double opcodes when the shift + count is in %cl. Some assemblers require %cl as an argument; + some don't. + + *OLD* GAS requires the %cl argument, so override i386/unix.h. */ + +#undef AS3_SHIFT_DOUBLE +#define AS3_SHIFT_DOUBLE(a,b,c,d) AS3 (a,b,c,d) /* Indicate that jump tables go in the text section. This is necessary when compiling PIC code. */ +#undef JUMP_TABLES_IN_TEXT_SECTION #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) -/* Use stabs instead of DWARF debug format. */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG +/* override the exception table positioning */ +#undef EXCEPTION_SECTION +#define EXCEPTION_SECTION() \ +do { \ + if (TARGET_ELF) { \ + named_section (NULL_TREE, ".gcc_except_table", 0); \ + } else { \ + if (flag_pic) \ + data_section (); \ + else \ + readonly_data_section (); \ + } \ +} while (0); + +/* supply our own hook for calling __main() from main() */ +#undef INVOKE__main +#define INVOKE__main +#undef GEN_CALL__MAIN +#define GEN_CALL__MAIN \ + do { \ + if (!(TARGET_ELF)) \ + emit_library_call (gen_rtx (SYMBOL_REF, Pmode, NAME__MAIN), 0, \ + VOIDmode, 0); \ + } while (0) /* Copy this from the svr4 specifications... */ /* Define the register numbers to be used in Dwarf debugging information. @@ -122,8 +382,8 @@ Boston, MA 02111-1307, USA. */ 17 for %st(6) (gnu regno = 14) 18 for %st(7) (gnu regno = 15) */ -#undef DBX_REGISTER_NUMBER -#define DBX_REGISTER_NUMBER(n) \ +#undef DWARF_DBX_REGISTER_NUMBER +#define DWARF_DBX_REGISTER_NUMBER(n) \ ((n) == 0 ? 0 \ : (n) == 1 ? 2 \ : (n) == 2 ? 1 \ @@ -135,15 +395,57 @@ Boston, MA 02111-1307, USA. */ : ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) ? (n)+3 \ : (-1)) +/* Now what stabs expects in the register. */ +#undef STABS_DBX_REGISTER_NUMBER +#define STABS_DBX_REGISTER_NUMBER(n) \ +((n) == 0 ? 0 : \ + (n) == 1 ? 2 : \ + (n) == 2 ? 1 : \ + (n) == 3 ? 3 : \ + (n) == 4 ? 6 : \ + (n) == 5 ? 7 : \ + (n) == 6 ? 4 : \ + (n) == 7 ? 5 : \ + (n) + 4) + +#undef DBX_REGISTER_NUMBER +#define DBX_REGISTER_NUMBER(n) ((write_symbols == DWARF_DEBUG) \ + ? DWARF_DBX_REGISTER_NUMBER(n) \ + : STABS_DBX_REGISTER_NUMBER(n)) + /* Tell final.c that we don't need a label passed to mcount. */ +#define NO_PROFILE_DATA + +/* Output assembler code to FILE to increment profiler label # LABELNO + for profiling a function entry. */ +/* Redefine this to not pass an unused label in %edx. */ #undef FUNCTION_PROFILER #define FUNCTION_PROFILER(FILE, LABELNO) \ { \ if (flag_pic) \ - fprintf (FILE, "\tcall *.mcount@GOT(%%ebx)\n"); \ + { \ + fprintf ((FILE), "\tcall *%s@GOT(%%ebx)\n", \ + TARGET_AOUT ? "mcount" : ".mcount"); \ + } \ else \ - fprintf (FILE, "\tcall .mcount\n"); \ + { \ + fprintf ((FILE), "\tcall %s\n", TARGET_AOUT ? "mcount" : ".mcount"); \ + } \ +} + +#undef FUNCTION_PROFILER_EPILOGUE +#define FUNCTION_PROFILER_EPILOGUE(FILE) \ +{ \ + if (TARGET_PROFILER_EPILOGUE) \ + { \ + if (flag_pic) \ + fprintf ((FILE), "\tcall *%s@GOT(%%ebx)\n", \ + TARGET_AOUT ? "mexitcount" : ".mexitcount"); \ + else \ + fprintf ((FILE), "\tcall %s\n", \ + TARGET_AOUT ? "mexitcount" : ".mexitcount"); \ + } \ } #undef SIZE_TYPE @@ -151,69 +453,41 @@ Boston, MA 02111-1307, USA. */ #undef PTRDIFF_TYPE #define PTRDIFF_TYPE "int" - + #undef WCHAR_TYPE #define WCHAR_TYPE "int" - + #undef WCHAR_UNSIGNED #define WCHAR_UNSIGNED 0 - + #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE BITS_PER_WORD - + #undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Di386 -Dunix -D__ELF__ -D__FreeBSD__ -Asystem(unix) -Asystem(FreeBSD) -Acpu(i386) -Amachine(i386)" +#define CPP_PREDEFINES "-Di386 -Acpu(i386) -Amachine(i386)" CPP_FBSD_PREDEFINES #undef CPP_SPEC -#define CPP_SPEC "%(cpp_cpu) %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{posix:-D_POSIX_SOURCE}" - -/* This defines which switch letters take arguments. On FreeBSD, most of - the normal cases (defined in gcc.c) apply, and we also have -h* and - -z* options (for the linker) (comming from svr4). - We also have -R (alias --rpath), no -z, --soname (-h), --assert etc. */ - -#undef SWITCH_TAKES_ARG -#define SWITCH_TAKES_ARG(CHAR) \ - (DEFAULT_SWITCH_TAKES_ARG (CHAR) \ - || (CHAR) == 'h' \ - || (CHAR) == 'z' \ - || (CHAR) == 'R') - -/* Provide a STARTFILE_SPEC appropriate for FreeBSD. Here we add - the magical crtbegin.o file (see crtstuff.c) which provides part - of the support for getting C++ file-scope static object constructed - before entering `main'. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC \ - "%{!shared: \ - %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \ - %{!p:%{profile:gcrt1.o%s} \ - %{!profile:crt1.o%s}}}} \ - crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" - -/* Provide a ENDFILE_SPEC appropriate for FreeBSD. Here we tack on - the magical crtend.o file (see crtstuff.c) which provides part of - the support for getting C++ file-scope static object constructed - before entering `main', followed by a normal "finalizer" file, - `crtn.o'. */ - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC \ - "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s" +#if TARGET_CPU_DEFAULT == 2 +#define CPP_SPEC "\ +%{!maout: -D__ELF__} \ +%{munderscores: -D__UNDERSCORES__} \ +%{maout: %{!mno-underscores: -D__UNDERSCORES__}} \ +%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{!m386:-D__i486__}" +#else +#define CPP_SPEC "\ +%{!maout: -D__ELF__} \ +%{munderscores: -D__UNDERSCORES__} \ +%{maout: %{!mno-underscores: -D__UNDERSCORES__}} \ +%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{m486:-D__i486__}" +#endif -/* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate - libc, depending on whether we're doing profiling or need threads support. - (simular to the default, except no -lg, and no -p. */ +#undef CC1_SPEC +#define CC1_SPEC "\ +%{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ +%{maout: %{!mno-underscores: %{!munderscores: -munderscores }}}" -#undef LIB_SPEC -#define LIB_SPEC "%{!shared: \ - %{!pg:%{!pthread:%{!kthread:-lc} \ - %{kthread:-lpthread -lc}} \ - %{pthread:-lc_r}} \ - %{pg:%{!pthread:%{!kthread:-lc_p} \ - %{kthread:-lpthread_p -lc_p}} \ - %{pthread:-lc_r_p}}}" +#undef ASM_SPEC +#define ASM_SPEC "%{v*: -v} %{maout: %{fpic:-k} %{fPIC:-k}}" /* Provide a LINK_SPEC appropriate for FreeBSD. Here we provide support for the special GCC options -static and -shared, which allow us to @@ -230,17 +504,23 @@ Boston, MA 02111-1307, USA. */ done. */ #undef LINK_SPEC -#define LINK_SPEC "-m elf_i386 \ - %{Wl,*:%*} \ - %{v:-V} \ - %{assert*} %{R*} %{rpath*} %{defsym*} \ - %{shared:-Bshareable %{h*} %{soname*}} \ +#define LINK_SPEC "\ + %{p:%e`-p' not supported; use `-pg' and gprof(1)} \ + %{maout: %{shared:-Bshareable} \ + %{!shared:%{!nostdlib:%{!r:%{!e*:-e start}}} -dc -dp %{static:-Bstatic} \ + %{pg:-Bstatic} %{Z}} \ + %{assert*} %{R*}} \ + %{!maout: \ + -m elf_i386 \ + %{Wl,*:%*} \ + %{assert*} %{R*} %{rpath*} %{defsym*} \ + %{shared:-Bshareable %{h*} %{soname*}} \ + %{symbolic:-Bsymbolic} \ %{!shared: \ %{!static: \ - %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker /usr/libexec/ld-elf.so.1}} \ - %{static:-Bstatic}} \ - %{symbolic:-Bsymbolic}" + %{rdynamic: -export-dynamic} \ + %{!dynamic-linker: -dynamic-linker /usr/libexec/ld-elf.so.1}} \ + %{static:-Bstatic}}}" /* A C statement to output to the stdio stream FILE an assembler command to advance the location counter to a multiple of 1<<LOG @@ -249,9 +529,31 @@ Boston, MA 02111-1307, USA. */ This is used to align code labels according to Intel recommendations. */ #ifdef HAVE_GAS_MAX_SKIP_P2ALIGN -#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP) \ - if ((LOG) != 0) {\ - if ((MAX_SKIP) == 0) fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ - else fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)); \ - } +#error "we don't have this for the aout gas" +#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \ + if ((LOG)!=0) \ + if ((MAX_SKIP)==0) fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ + else fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)) #endif + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "\ + %{maout: %{shared:c++rt0.o%s} \ + %{!shared:%{pg:gcrt0.o%s}%{!pg:%{static:scrt0.o%s}%{!static:crt0.o%s}}}} \ + %{!maout: %{!shared: \ + %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}} \ + crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}}" + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC \ + "%{!maout: %{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s}" + +/* This goes away when the math emulator is fixed. */ +#undef TARGET_DEFAULT +#define TARGET_DEFAULT (MASK_NO_FANCY_MATH_387 | 0301) + +/* FreeBSD ELF using our home-grown crtbegin.o/crtend.o does not support the + DWARF2 unwinding mechanisms. Once `make world' bootstraping problems with + the EGCS crtstuff.c is overcome, we will switch to the non-sjlj-exceptions + type exception machanism. */ +#define DWARF2_UNWIND_INFO 0 diff --git a/contrib/gcc/config/i386/i386.c b/contrib/gcc/config/i386/i386.c index 0333b19..08542a0 100644 --- a/contrib/gcc/config/i386/i386.c +++ b/contrib/gcc/config/i386/i386.c @@ -18,6 +18,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* $FreeBSD$ */ + #include <setjmp.h> #include "config.h" #include "system.h" @@ -51,6 +53,11 @@ Boston, MA 02111-1307, USA. */ #define CHECK_STACK_LIMIT -1 #endif +#define PIC_REG_USED \ + (flag_pic && (current_function_uses_pic_offset_table \ + || current_function_uses_const_pool \ + || profile_flag || profile_block_flag)) + /* Type of an operand for ix86_{binary,unary}_operator_ok */ enum reg_mem { @@ -1638,13 +1645,11 @@ asm_output_function_prefix (file, name) char *name ATTRIBUTE_UNUSED; { rtx xops[2]; - int pic_reg_used = flag_pic && (current_function_uses_pic_offset_table - || current_function_uses_const_pool); xops[0] = pic_offset_table_rtx; xops[1] = stack_pointer_rtx; /* Deep branch prediction favors having a return for every call. */ - if (pic_reg_used && TARGET_DEEP_BRANCH_PREDICTION) + if (PIC_REG_USED && TARGET_DEEP_BRANCH_PREDICTION) { tree prologue_node; @@ -1785,8 +1790,7 @@ ix86_compute_frame_size (size, nregs_on_stack) int nregs; int regno; int padding; - int pic_reg_used = flag_pic && (current_function_uses_pic_offset_table - || current_function_uses_const_pool); + int pic_reg_used = PIC_REG_USED; HOST_WIDE_INT total_size; limit = frame_pointer_needed @@ -1840,8 +1844,7 @@ ix86_prologue (do_rtl) register int regno; int limit; rtx xops[4]; - int pic_reg_used = flag_pic && (current_function_uses_pic_offset_table - || current_function_uses_const_pool); + int pic_reg_used = PIC_REG_USED; HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), (int *)0); rtx insn; int cfa_offset = INCOMING_FRAME_SP_OFFSET, cfa_store_offset = cfa_offset; @@ -2011,8 +2014,6 @@ ix86_can_use_return_insn_p () int nregs = 0; int reglimit = (frame_pointer_needed ? FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM); - int pic_reg_used = flag_pic && (current_function_uses_pic_offset_table - || current_function_uses_const_pool); #ifdef NON_SAVING_SETJMP if (NON_SAVING_SETJMP && current_function_calls_setjmp) @@ -2024,7 +2025,7 @@ ix86_can_use_return_insn_p () for (regno = reglimit - 1; regno >= 0; regno--) if ((regs_ever_live[regno] && ! call_used_regs[regno]) - || (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used)) + || (regno == PIC_OFFSET_TABLE_REGNUM && PIC_REG_USED)) nregs++; return nregs == 0 || ! frame_pointer_needed; @@ -2058,8 +2059,7 @@ ix86_epilogue (do_rtl) register int limit; int nregs; rtx xops[3]; - int pic_reg_used = flag_pic && (current_function_uses_pic_offset_table - || current_function_uses_const_pool); + int pic_reg_used = PIC_REG_USED; int sp_valid = !frame_pointer_needed || current_function_sp_is_unchanging; HOST_WIDE_INT offset; HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), &nregs); diff --git a/contrib/gcc/config/i386/i386.h b/contrib/gcc/config/i386/i386.h index 5e27fd8..e492e04 100644 --- a/contrib/gcc/config/i386/i386.h +++ b/contrib/gcc/config/i386/i386.h @@ -34,6 +34,8 @@ Boston, MA 02111-1307, USA. */ PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */ +/* $FreeBSD$ */ + /* Names to predefine in the preprocessor for this target machine. */ #define I386 1 diff --git a/contrib/gcc/config/i386/i386.md b/contrib/gcc/config/i386/i386.md index b52e255..b645c1e 100644 --- a/contrib/gcc/config/i386/i386.md +++ b/contrib/gcc/config/i386/i386.md @@ -71,6 +71,8 @@ ;; This shadows the processor_type enumeration, so changes must be made ;; to i386.h at the same time. +;; $FreeBSD$ + (define_attr "type" "integer,binary,memory,test,compare,fcompare,idiv,imul,lea,fld,fpop,fpdiv,fpmul" (const_string "integer")) diff --git a/contrib/gcc/config/i386/x-freebsd b/contrib/gcc/config/i386/x-freebsd index a9b13ba..47640c0 100644 --- a/contrib/gcc/config/i386/x-freebsd +++ b/contrib/gcc/config/i386/x-freebsd @@ -1,3 +1,4 @@ # Don't run fixproto STMP_FIXPROTO = -CLIB=-lgnumalloc +# Use only native include files +USER_H = diff --git a/contrib/gcc/config/xm-freebsd.h b/contrib/gcc/config/xm-freebsd.h index b71ff56..41b08a4 100644 --- a/contrib/gcc/config/xm-freebsd.h +++ b/contrib/gcc/config/xm-freebsd.h @@ -22,3 +22,16 @@ Boston, MA 02111-1307, USA. */ running FreeBSD. This file should not be specified as $xm_file itself; instead $xm_file should be CPU/xm-freebsd.h, which should include both CPU/xm-CPU.h and this file xm-freebsd.h. */ + +#ifndef HAVE_ATEXIT +#define HAVE_ATEXIT +#endif + +/* Tell gcc and collect2 that FreeBSD targets support putenv(3). */ +#define HAVE_PUTENV + +/* We have _sys_siglist, but the declaration in <signal.h> conflicts with + the declarations in collect2.c and mips-tfile.c, so disable the declarations + in those files. */ + +#define SYS_SIGLIST_DECLARED |
