diff options
Diffstat (limited to 'contrib/gcc/config/rs6000/rs6000.md')
-rw-r--r-- | contrib/gcc/config/rs6000/rs6000.md | 116 |
1 files changed, 16 insertions, 100 deletions
diff --git a/contrib/gcc/config/rs6000/rs6000.md b/contrib/gcc/config/rs6000/rs6000.md index 3b062ce..0e242d4 100644 --- a/contrib/gcc/config/rs6000/rs6000.md +++ b/contrib/gcc/config/rs6000/rs6000.md @@ -5236,7 +5236,7 @@ (set (match_dup 0) (plus:DI (match_dup 0) (const_int 2047))) (set (match_dup 4) (compare:CCUNS (match_dup 3) - (const_int 3))) + (const_int 2))) (set (match_dup 0) (ior:DI (match_dup 0) (match_dup 1))) (parallel [(set (match_dup 0) (and:DI (match_dup 0) @@ -7839,8 +7839,8 @@ }") (define_insn "*movsf_hardfloat" - [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!r,!r") - (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,G,Fn"))] + [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!h,!r,!r") + (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,0,G,Fn"))] "(gpc_reg_operand (operands[0], SFmode) || gpc_reg_operand (operands[1], SFmode)) && (TARGET_HARD_FLOAT && TARGET_FPRS)" @@ -7854,10 +7854,11 @@ mt%0 %1 mt%0 %1 mf%1 %0 + {cror 0,0,0|nop} # #" - [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*") - (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")]) + [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*,*") + (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,8")]) (define_insn "*movsf_softfloat" [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,q,r,r,m,r,r,r,r,r,*h") @@ -8114,67 +8115,26 @@ ; ld/std require word-aligned displacements -> 'Y' constraint. ; List Y->r and r->Y before r->r for reload. (define_insn "*movdf_hardfloat64" - [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,b,!r,f,f,m,!cl,!r,!r,!r,!r") - (match_operand:DF 1 "input_operand" "r,Y,m,r,f,m,f,r,h,G,H,F"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,!cl,!r,!h,!r,!r,!r") + (match_operand:DF 1 "input_operand" "r,Y,r,f,m,f,r,h,0,G,H,F"))] "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && (gpc_reg_operand (operands[0], DFmode) || gpc_reg_operand (operands[1], DFmode))" "@ std%U0%X0 %1,%0 ld%U1%X1 %0,%1 - # mr %0,%1 fmr %0,%1 lfd%U1%X1 %0,%1 stfd%U0%X0 %1,%0 mt%0 %1 mf%1 %0 + {cror 0,0,0|nop} # # #" - [(set_attr "type" "store,load,load,*,fp,fpload,fpstore,mtjmpr,*,*,*,*") - (set_attr "length" "4,4,8,4,4,4,4,4,4,8,12,16")]) - -(define_split - [(set (match_operand:DF 0 "base_reg_operand" "") - (match_operand:DF 1 "invalid_gpr_mem" ""))] - "TARGET_POWERPC64 && no_new_pseudos" - [(set (match_dup 2) (match_dup 3)) - (set (match_dup 0) (match_dup 4))] - " -{ - operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0])); - operands[3] = XEXP (operands[1], 0); - operands[4] = replace_equiv_address (operands[1], operands[2]); -}") - -(define_expand "reload_outdf" - [(parallel [(match_operand:DF 0 "invalid_gpr_mem" "") - (match_operand:DF 1 "register_operand" "") - (match_operand:DI 2 "register_operand" "=&b")])] - "TARGET_POWERPC64" -{ - if (!TARGET_64BIT) - operands[2] = gen_rtx_REG (SImode, REGNO (operands[2])); - emit_move_insn (operands[2], XEXP (operands[0], 0)); - operands[0] = replace_equiv_address (operands[0], operands[2]); - emit_move_insn (operands[0], operands[1]); - DONE; -}) - -(define_expand "reload_indf" - [(parallel [(match_operand:DF 0 "register_operand" "") - (match_operand:DF 1 "invalid_gpr_mem" "") - (match_operand:DI 2 "register_operand" "=&b")])] - "TARGET_POWERPC64" -{ - if (!TARGET_64BIT) - operands[2] = gen_rtx_REG (SImode, REGNO (operands[2])); - emit_move_insn (operands[2], XEXP (operands[1], 0)); - operands[1] = replace_equiv_address (operands[1], operands[2]); - emit_move_insn (operands[0], operands[1]); - DONE; -}) + [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,*,*,*,*,*") + (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16")]) (define_insn "*movdf_softfloat64" [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Y,r,cl,r,r,r,r,*h") @@ -8191,7 +8151,7 @@ # # # - nop" + {cror 0,0,0|nop}" [(set_attr "type" "load,store,*,*,*,*,*,*,*") (set_attr "length" "4,4,4,4,4,8,12,16,4")]) @@ -8519,15 +8479,14 @@ }") (define_insn "*movdi_internal64" - [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,b,r,r,r,r,r,??f,f,m,r,*h,*h") - (match_operand:DI 1 "input_operand" "r,Y,m,r,I,L,nF,R,f,m,f,*h,r,0"))] + [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,r,??f,f,m,r,*h,*h") + (match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,R,f,m,f,*h,r,0"))] "TARGET_POWERPC64 && (gpc_reg_operand (operands[0], DImode) || gpc_reg_operand (operands[1], DImode))" "@ std%U0%X0 %1,%0 ld%U1%X1 %0,%1 - # mr %0,%1 li %0,%1 lis %0,%v1 @@ -8539,51 +8498,8 @@ mf%1 %0 mt%0 %1 {cror 0,0,0|nop}" - [(set_attr "type" "store,load,load,*,*,*,*,*,fp,fpload,fpstore,mfjmpr,mtjmpr,*") - (set_attr "length" "4,4,8,4,4,4,20,4,4,4,4,4,4,4")]) - -(define_split - [(set (match_operand:DI 0 "base_reg_operand" "") - (match_operand:DI 1 "invalid_gpr_mem" ""))] - "TARGET_POWERPC64 && no_new_pseudos" - [(set (match_dup 2) (match_dup 3)) - (set (match_dup 0) (match_dup 4))] - " -{ - operands[2] = operands[0]; - if (!TARGET_64BIT) - operands[2] = gen_rtx_REG (SImode, REGNO (operands[0])); - operands[3] = XEXP (operands[1], 0); - operands[4] = replace_equiv_address (operands[1], operands[2]); -}") - -(define_expand "reload_outdi" - [(parallel [(match_operand:DI 0 "invalid_gpr_mem" "") - (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "register_operand" "=&b")])] - "TARGET_POWERPC64" -{ - if (!TARGET_64BIT) - operands[2] = gen_rtx_REG (SImode, REGNO (operands[2])); - emit_move_insn (operands[2], XEXP (operands[0], 0)); - operands[0] = replace_equiv_address (operands[0], operands[2]); - emit_move_insn (operands[0], operands[1]); - DONE; -}) - -(define_expand "reload_indi" - [(parallel [(match_operand:DI 0 "register_operand" "") - (match_operand:DI 1 "invalid_gpr_mem" "") - (match_operand:DI 2 "register_operand" "=&b")])] - "TARGET_POWERPC64" -{ - if (!TARGET_64BIT) - operands[2] = gen_rtx_REG (SImode, REGNO (operands[2])); - emit_move_insn (operands[2], XEXP (operands[1], 0)); - operands[1] = replace_equiv_address (operands[1], operands[2]); - emit_move_insn (operands[0], operands[1]); - DONE; -}) + [(set_attr "type" "store,load,*,*,*,*,*,fp,fpload,fpstore,mfjmpr,mtjmpr,*") + (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4")]) ;; immediate value valid for a single instruction hiding in a const_double (define_insn "" |