diff options
Diffstat (limited to 'contrib/gcc/combine.c')
| -rw-r--r-- | contrib/gcc/combine.c | 1150 |
1 files changed, 785 insertions, 365 deletions
diff --git a/contrib/gcc/combine.c b/contrib/gcc/combine.c index 5e8ad1a..03d0dff 100644 --- a/contrib/gcc/combine.c +++ b/contrib/gcc/combine.c @@ -1,6 +1,6 @@ /* Optimize by combining instructions for GNU compiler. Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This file is part of GCC. @@ -137,6 +137,12 @@ static int max_uid_cuid; #define UWIDE_SHIFT_LEFT_BY_BITS_PER_WORD(val) \ (((unsigned HOST_WIDE_INT) (val) << (BITS_PER_WORD - 1)) << 1) +#define nonzero_bits(X, M) \ + cached_nonzero_bits (X, M, NULL_RTX, VOIDmode, 0) + +#define num_sign_bit_copies(X, M) \ + cached_num_sign_bit_copies (X, M, NULL_RTX, VOIDmode, 0) + /* Maximum register number, which is the size of the tables below. */ static unsigned int combine_max_regno; @@ -192,8 +198,8 @@ static HARD_REG_SET newpat_used_regs; static rtx added_links_insn; -/* Basic block number of the block in which we are performing combines. */ -static int this_basic_block; +/* Basic block in which we are performing combines. */ +static basic_block this_basic_block; /* A bitmap indicating which blocks had registers go dead at entry. After combine, we'll need to re-do global life analysis with @@ -202,7 +208,7 @@ static sbitmap refresh_blocks; static int need_refresh; /* The next group of arrays allows the recording of the last value assigned - to (hard or pseudo) register n. We use this information to see if a + to (hard or pseudo) register n. We use this information to see if an operation being processed is redundant given a prior operation performed on the register. For example, an `and' with a constant is redundant if all the zero bits are already known to be turned off. @@ -221,7 +227,7 @@ static int need_refresh; register was assigned reg_last_set_table_tick records the value of label_tick when a value using the register is assigned - reg_last_set_invalid set to non-zero when it is not valid + reg_last_set_invalid set to nonzero when it is not valid to use the value of this register in some register's value @@ -230,7 +236,7 @@ static int need_refresh; and the register being validly contained in some other expression in the table. - Entry I in reg_last_set_value is valid if it is non-zero, and either + Entry I in reg_last_set_value is valid if it is nonzero, and either reg_n_sets[i] is 1 or reg_last_set_label[i] == label_tick. Register I may validly appear in any expression returned for the value @@ -242,7 +248,7 @@ static int need_refresh; not validly appear in an expression, the register is replaced by something that won't match, (clobber (const_int 0)). - reg_last_set_invalid[i] is set non-zero when register I is being assigned + reg_last_set_invalid[i] is set nonzero when register I is being assigned to and reg_last_set_table_tick[i] == label_tick. */ /* Record last value assigned to (hard or pseudo) register n. */ @@ -259,7 +265,7 @@ static int *reg_last_set_label; static int *reg_last_set_table_tick; -/* Set non-zero if references to register n in expressions should not be +/* Set nonzero if references to register n in expressions should not be used. */ static char *reg_last_set_invalid; @@ -314,8 +320,8 @@ struct undo { struct undo *next; int is_int; - union {rtx r; unsigned int i;} old_contents; - union {rtx *r; unsigned int *i;} where; + union {rtx r; int i;} old_contents; + union {rtx *r; int *i;} where; }; /* Record a bunch of changes to be undone, up to MAX_UNDO of them. @@ -339,8 +345,7 @@ static struct undobuf undobuf; static int n_occurrences; static void do_SUBST PARAMS ((rtx *, rtx)); -static void do_SUBST_INT PARAMS ((unsigned int *, - unsigned int)); +static void do_SUBST_INT PARAMS ((int *, int)); static void init_reg_last_arrays PARAMS ((void)); static void setup_incoming_promotions PARAMS ((void)); static void set_nonzero_bits_and_sign_copies PARAMS ((rtx, rtx, void *)); @@ -376,8 +381,20 @@ static rtx make_field_assignment PARAMS ((rtx)); static rtx apply_distributive_law PARAMS ((rtx)); static rtx simplify_and_const_int PARAMS ((rtx, enum machine_mode, rtx, unsigned HOST_WIDE_INT)); -static unsigned HOST_WIDE_INT nonzero_bits PARAMS ((rtx, enum machine_mode)); -static unsigned int num_sign_bit_copies PARAMS ((rtx, enum machine_mode)); +static unsigned HOST_WIDE_INT cached_nonzero_bits + PARAMS ((rtx, enum machine_mode, rtx, + enum machine_mode, + unsigned HOST_WIDE_INT)); +static unsigned HOST_WIDE_INT nonzero_bits1 + PARAMS ((rtx, enum machine_mode, rtx, + enum machine_mode, + unsigned HOST_WIDE_INT)); +static unsigned int cached_num_sign_bit_copies + PARAMS ((rtx, enum machine_mode, rtx, + enum machine_mode, unsigned int)); +static unsigned int num_sign_bit_copies1 + PARAMS ((rtx, enum machine_mode, rtx, + enum machine_mode, unsigned int)); static int merge_outer_ops PARAMS ((enum rtx_code *, HOST_WIDE_INT *, enum rtx_code, HOST_WIDE_INT, enum machine_mode, int *)); @@ -472,10 +489,10 @@ do_SUBST (into, newval) static void do_SUBST_INT (into, newval) - unsigned int *into, newval; + int *into, newval; { struct undo *buf; - unsigned int oldval = *into; + int oldval = *into; if (oldval == newval) return; @@ -498,7 +515,7 @@ do_SUBST_INT (into, newval) /* Main entry point for combiner. F is the first insn of the function. NREGS is the first unused pseudo-reg number. - Return non-zero if the combiner has turned an indirect jump + Return nonzero if the combiner has turned an indirect jump instruction into a direct jump. */ int combine_instructions (f, nregs) @@ -578,7 +595,7 @@ combine_instructions (f, nregs) setup_incoming_promotions (); - refresh_blocks = sbitmap_alloc (n_basic_blocks); + refresh_blocks = sbitmap_alloc (last_basic_block); sbitmap_zero (refresh_blocks); need_refresh = 0; @@ -610,143 +627,144 @@ combine_instructions (f, nregs) /* Now scan all the insns in forward order. */ - this_basic_block = -1; label_tick = 1; last_call_cuid = 0; mem_last_set = 0; init_reg_last_arrays (); setup_incoming_promotions (); - for (insn = f; insn; insn = next ? next : NEXT_INSN (insn)) + FOR_EACH_BB (this_basic_block) { - next = 0; - - /* If INSN starts a new basic block, update our basic block number. */ - if (this_basic_block + 1 < n_basic_blocks - && BLOCK_HEAD (this_basic_block + 1) == insn) - this_basic_block++; - - if (GET_CODE (insn) == CODE_LABEL) - label_tick++; - - else if (INSN_P (insn)) + for (insn = this_basic_block->head; + insn != NEXT_INSN (this_basic_block->end); + insn = next ? next : NEXT_INSN (insn)) { - /* See if we know about function return values before this - insn based upon SUBREG flags. */ - check_promoted_subreg (insn, PATTERN (insn)); - - /* Try this insn with each insn it links back to. */ + next = 0; - for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) - if ((next = try_combine (insn, XEXP (links, 0), - NULL_RTX, &new_direct_jump_p)) != 0) - goto retry; + if (GET_CODE (insn) == CODE_LABEL) + label_tick++; - /* Try each sequence of three linked insns ending with this one. */ - - for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) + else if (INSN_P (insn)) { - rtx link = XEXP (links, 0); + /* See if we know about function return values before this + insn based upon SUBREG flags. */ + check_promoted_subreg (insn, PATTERN (insn)); - /* If the linked insn has been replaced by a note, then there - is no point in pursuing this chain any further. */ - if (GET_CODE (link) == NOTE) - continue; + /* Try this insn with each insn it links back to. */ - for (nextlinks = LOG_LINKS (link); - nextlinks; - nextlinks = XEXP (nextlinks, 1)) - if ((next = try_combine (insn, link, - XEXP (nextlinks, 0), - &new_direct_jump_p)) != 0) + for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) + if ((next = try_combine (insn, XEXP (links, 0), + NULL_RTX, &new_direct_jump_p)) != 0) goto retry; - } + + /* Try each sequence of three linked insns ending with this one. */ + + for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) + { + rtx link = XEXP (links, 0); + + /* If the linked insn has been replaced by a note, then there + is no point in pursuing this chain any further. */ + if (GET_CODE (link) == NOTE) + continue; + + for (nextlinks = LOG_LINKS (link); + nextlinks; + nextlinks = XEXP (nextlinks, 1)) + if ((next = try_combine (insn, link, + XEXP (nextlinks, 0), + &new_direct_jump_p)) != 0) + goto retry; + } #ifdef HAVE_cc0 - /* Try to combine a jump insn that uses CC0 - with a preceding insn that sets CC0, and maybe with its - logical predecessor as well. - This is how we make decrement-and-branch insns. - We need this special code because data flow connections - via CC0 do not get entered in LOG_LINKS. */ - - if (GET_CODE (insn) == JUMP_INSN - && (prev = prev_nonnote_insn (insn)) != 0 - && GET_CODE (prev) == INSN - && sets_cc0_p (PATTERN (prev))) - { - if ((next = try_combine (insn, prev, - NULL_RTX, &new_direct_jump_p)) != 0) - goto retry; - - for (nextlinks = LOG_LINKS (prev); nextlinks; - nextlinks = XEXP (nextlinks, 1)) - if ((next = try_combine (insn, prev, - XEXP (nextlinks, 0), - &new_direct_jump_p)) != 0) - goto retry; - } + /* Try to combine a jump insn that uses CC0 + with a preceding insn that sets CC0, and maybe with its + logical predecessor as well. + This is how we make decrement-and-branch insns. + We need this special code because data flow connections + via CC0 do not get entered in LOG_LINKS. */ + + if (GET_CODE (insn) == JUMP_INSN + && (prev = prev_nonnote_insn (insn)) != 0 + && GET_CODE (prev) == INSN + && sets_cc0_p (PATTERN (prev))) + { + if ((next = try_combine (insn, prev, + NULL_RTX, &new_direct_jump_p)) != 0) + goto retry; + + for (nextlinks = LOG_LINKS (prev); nextlinks; + nextlinks = XEXP (nextlinks, 1)) + if ((next = try_combine (insn, prev, + XEXP (nextlinks, 0), + &new_direct_jump_p)) != 0) + goto retry; + } - /* Do the same for an insn that explicitly references CC0. */ - if (GET_CODE (insn) == INSN - && (prev = prev_nonnote_insn (insn)) != 0 - && GET_CODE (prev) == INSN - && sets_cc0_p (PATTERN (prev)) - && GET_CODE (PATTERN (insn)) == SET - && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (insn)))) - { - if ((next = try_combine (insn, prev, - NULL_RTX, &new_direct_jump_p)) != 0) - goto retry; + /* Do the same for an insn that explicitly references CC0. */ + if (GET_CODE (insn) == INSN + && (prev = prev_nonnote_insn (insn)) != 0 + && GET_CODE (prev) == INSN + && sets_cc0_p (PATTERN (prev)) + && GET_CODE (PATTERN (insn)) == SET + && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (insn)))) + { + if ((next = try_combine (insn, prev, + NULL_RTX, &new_direct_jump_p)) != 0) + goto retry; + + for (nextlinks = LOG_LINKS (prev); nextlinks; + nextlinks = XEXP (nextlinks, 1)) + if ((next = try_combine (insn, prev, + XEXP (nextlinks, 0), + &new_direct_jump_p)) != 0) + goto retry; + } - for (nextlinks = LOG_LINKS (prev); nextlinks; - nextlinks = XEXP (nextlinks, 1)) - if ((next = try_combine (insn, prev, - XEXP (nextlinks, 0), - &new_direct_jump_p)) != 0) + /* Finally, see if any of the insns that this insn links to + explicitly references CC0. If so, try this insn, that insn, + and its predecessor if it sets CC0. */ + for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) + if (GET_CODE (XEXP (links, 0)) == INSN + && GET_CODE (PATTERN (XEXP (links, 0))) == SET + && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (XEXP (links, 0)))) + && (prev = prev_nonnote_insn (XEXP (links, 0))) != 0 + && GET_CODE (prev) == INSN + && sets_cc0_p (PATTERN (prev)) + && (next = try_combine (insn, XEXP (links, 0), + prev, &new_direct_jump_p)) != 0) goto retry; - } - - /* Finally, see if any of the insns that this insn links to - explicitly references CC0. If so, try this insn, that insn, - and its predecessor if it sets CC0. */ - for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) - if (GET_CODE (XEXP (links, 0)) == INSN - && GET_CODE (PATTERN (XEXP (links, 0))) == SET - && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (XEXP (links, 0)))) - && (prev = prev_nonnote_insn (XEXP (links, 0))) != 0 - && GET_CODE (prev) == INSN - && sets_cc0_p (PATTERN (prev)) - && (next = try_combine (insn, XEXP (links, 0), - prev, &new_direct_jump_p)) != 0) - goto retry; #endif - /* Try combining an insn with two different insns whose results it - uses. */ - for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) - for (nextlinks = XEXP (links, 1); nextlinks; - nextlinks = XEXP (nextlinks, 1)) - if ((next = try_combine (insn, XEXP (links, 0), - XEXP (nextlinks, 0), - &new_direct_jump_p)) != 0) - goto retry; + /* Try combining an insn with two different insns whose results it + uses. */ + for (links = LOG_LINKS (insn); links; links = XEXP (links, 1)) + for (nextlinks = XEXP (links, 1); nextlinks; + nextlinks = XEXP (nextlinks, 1)) + if ((next = try_combine (insn, XEXP (links, 0), + XEXP (nextlinks, 0), + &new_direct_jump_p)) != 0) + goto retry; - if (GET_CODE (insn) != NOTE) - record_dead_and_set_regs (insn); + if (GET_CODE (insn) != NOTE) + record_dead_and_set_regs (insn); - retry: - ; + retry: + ; + } } } + clear_bb_flags (); + EXECUTE_IF_SET_IN_SBITMAP (refresh_blocks, 0, i, + BASIC_BLOCK (i)->flags |= BB_DIRTY); + new_direct_jump_p |= purge_all_dead_edges (0); delete_noop_moves (f); - if (need_refresh) - { - update_life_info (refresh_blocks, UPDATE_LIFE_GLOBAL_RM_NOTES, - PROP_DEATH_NOTES); - } + update_life_info_in_dirty_blocks (UPDATE_LIFE_GLOBAL_RM_NOTES, + PROP_DEATH_NOTES | PROP_SCAN_DEAD_CODE + | PROP_KILL_DEAD_CODE); /* Clean up. */ sbitmap_free (refresh_blocks); @@ -858,7 +876,7 @@ set_nonzero_bits_and_sign_copies (x, set, data) && REGNO (x) >= FIRST_PSEUDO_REGISTER /* If this register is undefined at the start of the file, we can't say what its contents were. */ - && ! REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, REGNO (x)) + && ! REGNO_REG_SET_P (ENTRY_BLOCK_PTR->next_bb->global_live_at_start, REGNO (x)) && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT) { if (set == 0 || GET_CODE (set) == CLOBBER) @@ -1285,13 +1303,13 @@ sets_function_arg_p (pat) case, we would be getting the wrong value of I2DEST into I3, so we must reject the combination. This case occurs when I2 and I1 both feed into I3, rather than when I1 feeds into I2, which feeds into I3. - If I1_NOT_IN_SRC is non-zero, it means that finding I1 in the source + If I1_NOT_IN_SRC is nonzero, it means that finding I1 in the source of a SET must prevent combination from occurring. Before doing the above check, we first try to expand a field assignment into a set of logical operations. - If PI3_DEST_KILLED is non-zero, it is a pointer to a location in which + If PI3_DEST_KILLED is nonzero, it is a pointer to a location in which we place a register that is both set and used within I3. If more than one such register is detected, we fail. @@ -1497,7 +1515,7 @@ cant_combine_insn_p (insn) If we did the combination, return the insn at which combine should resume scanning. - Set NEW_DIRECT_JUMP_P to a non-zero value if try_combine creates a + Set NEW_DIRECT_JUMP_P to a nonzero value if try_combine creates a new direct jump instruction. */ static rtx @@ -1754,6 +1772,7 @@ try_combine (i3, i2, i1, new_direct_jump_p) subst_prev_insn = i1 = gen_rtx_INSN (VOIDmode, INSN_UID (i2), NULL_RTX, i2, + BLOCK_FOR_INSN (i2), INSN_SCOPE (i2), XVECEXP (PATTERN (i2), 0, 1), -1, NULL_RTX, NULL_RTX); @@ -2165,30 +2184,23 @@ try_combine (i3, i2, i1, new_direct_jump_p) } } - /* If we've split a jump pattern, we'll wind up with a sequence even - with one instruction. We can handle that below, so extract it. */ - if (m_split && GET_CODE (m_split) == SEQUENCE - && XVECLEN (m_split, 0) == 1) - m_split = PATTERN (XVECEXP (m_split, 0, 0)); - - if (m_split && GET_CODE (m_split) != SEQUENCE) + if (m_split && NEXT_INSN (m_split) == NULL_RTX) { + m_split = PATTERN (m_split); insn_code_number = recog_for_combine (&m_split, i3, &new_i3_notes); if (insn_code_number >= 0) newpat = m_split; } - else if (m_split && GET_CODE (m_split) == SEQUENCE - && XVECLEN (m_split, 0) == 2 + else if (m_split && NEXT_INSN (NEXT_INSN (m_split)) == NULL_RTX && (next_real_insn (i2) == i3 - || ! use_crosses_set_p (PATTERN (XVECEXP (m_split, 0, 0)), - INSN_CUID (i2)))) + || ! use_crosses_set_p (PATTERN (m_split), INSN_CUID (i2)))) { rtx i2set, i3set; - rtx newi3pat = PATTERN (XVECEXP (m_split, 0, 1)); - newi2pat = PATTERN (XVECEXP (m_split, 0, 0)); + rtx newi3pat = PATTERN (NEXT_INSN (m_split)); + newi2pat = PATTERN (m_split); - i3set = single_set (XVECEXP (m_split, 0, 1)); - i2set = single_set (XVECEXP (m_split, 0, 0)); + i3set = single_set (NEXT_INSN (m_split)); + i2set = single_set (m_split); /* In case we changed the mode of I2DEST, replace it in the pseudo-register table here. We can't do it above in case this @@ -2289,8 +2301,19 @@ try_combine (i3, i2, i1, new_direct_jump_p) /* If *SPLIT is a paradoxical SUBREG, when we split it, it should be written as a ZERO_EXTEND. */ if (split_code == SUBREG && GET_CODE (SUBREG_REG (*split)) == MEM) - SUBST (*split, gen_rtx_ZERO_EXTEND (split_mode, - SUBREG_REG (*split))); + { +#ifdef LOAD_EXTEND_OP + /* Or as a SIGN_EXTEND if LOAD_EXTEND_OP says that that's + what it really is. */ + if (LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (*split))) + == SIGN_EXTEND) + SUBST (*split, gen_rtx_SIGN_EXTEND (split_mode, + SUBREG_REG (*split))); + else +#endif + SUBST (*split, gen_rtx_ZERO_EXTEND (split_mode, + SUBREG_REG (*split))); + } #endif newi2pat = gen_rtx_SET (VOIDmode, newdest, *split); @@ -2311,6 +2334,10 @@ try_combine (i3, i2, i1, new_direct_jump_p) copy. This saves at least one insn, more if register allocation can eliminate the copy. + We cannot do this if the destination of the first assignment is a + condition code register or cc0. We eliminate this case by making sure + the SET_DEST and SET_SRC have the same mode. + We cannot do this if the destination of the second assignment is a register that we have already assumed is zero-extended. Similarly for a SUBREG of such a register. */ @@ -2320,6 +2347,8 @@ try_combine (i3, i2, i1, new_direct_jump_p) && XVECLEN (newpat, 0) == 2 && GET_CODE (XVECEXP (newpat, 0, 0)) == SET && GET_CODE (SET_SRC (XVECEXP (newpat, 0, 0))) == SIGN_EXTEND + && (GET_MODE (SET_DEST (XVECEXP (newpat, 0, 0))) + == GET_MODE (SET_SRC (XVECEXP (newpat, 0, 0)))) && GET_CODE (XVECEXP (newpat, 0, 1)) == SET && rtx_equal_p (SET_SRC (XVECEXP (newpat, 0, 1)), XEXP (SET_SRC (XVECEXP (newpat, 0, 0)), 0)) @@ -2386,8 +2415,8 @@ try_combine (i3, i2, i1, new_direct_jump_p) which we know will be a NOTE. */ for (insn = NEXT_INSN (i3); - insn && (this_basic_block == n_basic_blocks - 1 - || insn != BLOCK_HEAD (this_basic_block + 1)); + insn && (this_basic_block->next_bb == EXIT_BLOCK_PTR + || insn != this_basic_block->next_bb->head); insn = NEXT_INSN (insn)) { if (INSN_P (insn) && reg_referenced_p (ni2dest, PATTERN (insn))) @@ -2604,8 +2633,8 @@ try_combine (i3, i2, i1, new_direct_jump_p) && ! find_reg_note (i2, REG_UNUSED, SET_DEST (XVECEXP (PATTERN (i2), 0, i)))) for (temp = NEXT_INSN (i2); - temp && (this_basic_block == n_basic_blocks - 1 - || BLOCK_HEAD (this_basic_block) != temp); + temp && (this_basic_block->next_bb == EXIT_BLOCK_PTR + || this_basic_block->head != temp); temp = NEXT_INSN (temp)) if (temp != i3 && INSN_P (temp)) for (link = LOG_LINKS (temp); link; link = XEXP (link, 1)) @@ -2818,7 +2847,7 @@ try_combine (i3, i2, i1, new_direct_jump_p) BARRIER following it since it may have initially been a conditional jump. It may also be the last nonnote insn. */ - if (GET_CODE (newpat) == RETURN || any_uncondjump_p (i3)) + if (returnjump_p (i3) || any_uncondjump_p (i3)) { *new_direct_jump_p = 1; @@ -2826,6 +2855,18 @@ try_combine (i3, i2, i1, new_direct_jump_p) || GET_CODE (temp) != BARRIER) emit_barrier_after (i3); } + + if (undobuf.other_insn != NULL_RTX + && (returnjump_p (undobuf.other_insn) + || any_uncondjump_p (undobuf.other_insn))) + { + *new_direct_jump_p = 1; + + if ((temp = next_nonnote_insn (undobuf.other_insn)) == NULL_RTX + || GET_CODE (temp) != BARRIER) + emit_barrier_after (undobuf.other_insn); + } + /* An NOOP jump does not need barrier, but it does need cleaning up of CFG. */ if (GET_CODE (newpat) == SET @@ -2958,20 +2999,22 @@ find_split_point (loc, insn) we can make put both sources together and make a split point in the middle. */ - if (seq && XVECLEN (seq, 0) == 2 - && GET_CODE (XVECEXP (seq, 0, 0)) == INSN - && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) == SET - && SET_DEST (PATTERN (XVECEXP (seq, 0, 0))) == reg + if (seq + && NEXT_INSN (seq) != NULL_RTX + && NEXT_INSN (NEXT_INSN (seq)) == NULL_RTX + && GET_CODE (seq) == INSN + && GET_CODE (PATTERN (seq)) == SET + && SET_DEST (PATTERN (seq)) == reg && ! reg_mentioned_p (reg, - SET_SRC (PATTERN (XVECEXP (seq, 0, 0)))) - && GET_CODE (XVECEXP (seq, 0, 1)) == INSN - && GET_CODE (PATTERN (XVECEXP (seq, 0, 1))) == SET - && SET_DEST (PATTERN (XVECEXP (seq, 0, 1))) == reg + SET_SRC (PATTERN (seq))) + && GET_CODE (NEXT_INSN (seq)) == INSN + && GET_CODE (PATTERN (NEXT_INSN (seq))) == SET + && SET_DEST (PATTERN (NEXT_INSN (seq))) == reg && memory_address_p (GET_MODE (x), - SET_SRC (PATTERN (XVECEXP (seq, 0, 1))))) + SET_SRC (PATTERN (NEXT_INSN (seq))))) { - rtx src1 = SET_SRC (PATTERN (XVECEXP (seq, 0, 0))); - rtx src2 = SET_SRC (PATTERN (XVECEXP (seq, 0, 1))); + rtx src1 = SET_SRC (PATTERN (seq)); + rtx src2 = SET_SRC (PATTERN (NEXT_INSN (seq))); /* Replace the placeholder in SRC2 with SRC1. If we can find where in SRC2 it was placed, that can become our @@ -3062,11 +3105,8 @@ find_split_point (loc, insn) SUBST (SET_SRC (x), gen_binary (IOR, mode, gen_binary (AND, mode, dest, - GEN_INT - ( - trunc_int_for_mode - (~(mask << pos) - & GET_MODE_MASK (mode), mode))), + gen_int_mode (~(mask << pos), + mode)), GEN_INT (src << pos))); SUBST (SET_DEST (x), dest); @@ -3085,7 +3125,7 @@ find_split_point (loc, insn) case AND: /* If we are AND'ing with a large constant that is only a single bit and the result is only being used in a context where we - need to know if it is zero or non-zero, replace it with a bit + need to know if it is zero or nonzero, replace it with a bit extraction. This will avoid the large constant, which might have taken more than one insn to make. If the constant were not a valid argument to the AND but took only one insn to make, @@ -3313,10 +3353,10 @@ find_split_point (loc, insn) `n_occurrences' is incremented each time FROM is replaced. - IN_DEST is non-zero if we are processing the SET_DEST of a SET. + IN_DEST is nonzero if we are processing the SET_DEST of a SET. - UNIQUE_COPY is non-zero if each substitution must be unique. We do this - by copying if `n_occurrences' is non-zero. */ + UNIQUE_COPY is nonzero if each substitution must be unique. We do this + by copying if `n_occurrences' is nonzero. */ static rtx subst (x, from, to, in_dest, unique_copy) @@ -3497,15 +3537,13 @@ subst (x, from, to, in_dest, unique_copy) ) return gen_rtx_CLOBBER (VOIDmode, const0_rtx); -#ifdef CLASS_CANNOT_CHANGE_MODE +#ifdef CANNOT_CHANGE_MODE_CLASS if (code == SUBREG && GET_CODE (to) == REG && REGNO (to) < FIRST_PSEUDO_REGISTER - && (TEST_HARD_REG_BIT - (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], - REGNO (to))) - && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (to), - GET_MODE (x))) + && REG_CANNOT_CHANGE_MODE_P (REGNO (to), + GET_MODE (to), + GET_MODE (x))) return gen_rtx_CLOBBER (VOIDmode, const0_rtx); #endif @@ -3540,7 +3578,8 @@ subst (x, from, to, in_dest, unique_copy) if (GET_CODE (new) == CONST_INT && GET_CODE (x) == SUBREG) { enum machine_mode mode = GET_MODE (x); - x = simplify_subreg (mode, new, + + x = simplify_subreg (GET_MODE (x), new, GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); if (! x) @@ -3772,7 +3811,8 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) if (temp == const0_rtx) temp = CONST0_RTX (mode); else - temp = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE (mode), mode); + temp = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE (mode), + mode); } #endif break; @@ -3864,7 +3904,12 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) /* simplify_subreg can't use gen_lowpart_for_combine. */ if (CONSTANT_P (SUBREG_REG (x)) - && subreg_lowpart_offset (mode, op0_mode) == SUBREG_BYTE (x)) + && subreg_lowpart_offset (mode, op0_mode) == SUBREG_BYTE (x) + /* Don't call gen_lowpart_for_combine if the inner mode + is VOIDmode and we cannot simplify it, as SUBREG without + inner mode is invalid. */ + && (GET_MODE (SUBREG_REG (x)) != VOIDmode + || gen_lowpart_common (mode, SUBREG_REG (x)))) return gen_lowpart_for_combine (mode, SUBREG_REG (x)); if (GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_CC) @@ -3991,15 +4036,35 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) if (GET_CODE (XEXP (x, 0)) == NOT) return plus_constant (XEXP (XEXP (x, 0), 0), 1); - /* (neg (minus X Y)) can become (minus Y X). */ + /* (neg (minus X Y)) can become (minus Y X). This transformation + isn't safe for modes with signed zeros, since if X and Y are + both +0, (minus Y X) is the same as (minus X Y). If the rounding + mode is towards +infinity (or -infinity) then the two expressions + will be rounded differently. */ if (GET_CODE (XEXP (x, 0)) == MINUS - && (! FLOAT_MODE_P (mode) - /* x-y != -(y-x) with IEEE floating point. */ - || TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT - || flag_unsafe_math_optimizations)) + && !HONOR_SIGNED_ZEROS (mode) + && !HONOR_SIGN_DEPENDENT_ROUNDING (mode)) return gen_binary (MINUS, mode, XEXP (XEXP (x, 0), 1), XEXP (XEXP (x, 0), 0)); + /* (neg (plus A B)) is canonicalized to (minus (neg A) B). */ + if (GET_CODE (XEXP (x, 0)) == PLUS + && !HONOR_SIGNED_ZEROS (mode) + && !HONOR_SIGN_DEPENDENT_ROUNDING (mode)) + { + temp = simplify_gen_unary (NEG, mode, XEXP (XEXP (x, 0), 0), mode); + temp = combine_simplify_rtx (temp, mode, last, in_dest); + return gen_binary (MINUS, mode, temp, XEXP (XEXP (x, 0), 1)); + } + + /* (neg (mult A B)) becomes (mult (neg A) B). + This works even for floating-point values. */ + if (GET_CODE (XEXP (x, 0)) == MULT) + { + temp = simplify_gen_unary (NEG, mode, XEXP (XEXP (x, 0), 0), mode); + return gen_binary (MULT, mode, temp, XEXP (XEXP (x, 0), 1)); + } + /* (neg (xor A 1)) is (plus A -1) if A is known to be either 0 or 1. */ if (GET_CODE (XEXP (x, 0)) == XOR && XEXP (XEXP (x, 0), 1) == const1_rtx && nonzero_bits (XEXP (XEXP (x, 0), 0), mode) == 1) @@ -4102,7 +4167,7 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) if (TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))) && num_sign_bit_copies (XEXP (x, 0), GET_MODE (XEXP (x, 0))) - >= GET_MODE_BITSIZE (mode) + 1 + >= (unsigned int) (GET_MODE_BITSIZE (mode) + 1) && ! (GET_CODE (XEXP (x, 0)) == LSHIFTRT && GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT)) return gen_lowpart_for_combine (mode, XEXP (x, 0)); @@ -4158,10 +4223,11 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) if (XEXP (x, 1) == const0_rtx) return XEXP (x, 0); - /* In IEEE floating point, x-0 is not the same as x. */ - if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT - || ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))) - || flag_unsafe_math_optimizations) + /* x - 0 is the same as x unless x's mode has signed zeros and + allows rounding towards -infinity. Under those conditions, + 0 - 0 is -0. */ + if (!(HONOR_SIGNED_ZEROS (GET_MODE (XEXP (x, 0))) + && HONOR_SIGN_DEPENDENT_ROUNDING (GET_MODE (XEXP (x, 0)))) && XEXP (x, 1) == CONST0_RTX (GET_MODE (XEXP (x, 0)))) return XEXP (x, 0); break; @@ -4187,6 +4253,19 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) #endif case PLUS: + /* Canonicalize (plus (mult (neg B) C) A) to (minus A (mult B C)). + */ + if (GET_CODE (XEXP (x, 0)) == MULT + && GET_CODE (XEXP (XEXP (x, 0), 0)) == NEG) + { + rtx in1, in2; + + in1 = XEXP (XEXP (XEXP (x, 0), 0), 0); + in2 = XEXP (XEXP (x, 0), 1); + return gen_binary (MINUS, mode, XEXP (x, 1), + gen_binary (MULT, mode, in1, in2)); + } + /* If we have (plus (plus (A const) B)), associate it so that CONST is outermost. That's because that's the way indexed addresses are supposed to appear. This code used to check many more cases, but @@ -4293,6 +4372,32 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) return simplify_and_const_int (NULL_RTX, mode, XEXP (x, 0), -INTVAL (XEXP (XEXP (x, 1), 1)) - 1); + /* Canonicalize (minus A (mult (neg B) C)) to (plus (mult B C) A). + */ + if (GET_CODE (XEXP (x, 1)) == MULT + && GET_CODE (XEXP (XEXP (x, 1), 0)) == NEG) + { + rtx in1, in2; + + in1 = XEXP (XEXP (XEXP (x, 1), 0), 0); + in2 = XEXP (XEXP (x, 1), 1); + return gen_binary (PLUS, mode, gen_binary (MULT, mode, in1, in2), + XEXP (x, 0)); + } + + /* Canonicalize (minus (neg A) (mult B C)) to + (minus (mult (neg B) C) A). */ + if (GET_CODE (XEXP (x, 1)) == MULT + && GET_CODE (XEXP (x, 0)) == NEG) + { + rtx in1, in2; + + in1 = simplify_gen_unary (NEG, mode, XEXP (XEXP (x, 1), 0), mode); + in2 = XEXP (XEXP (x, 1), 1); + return gen_binary (MINUS, mode, gen_binary (MULT, mode, in1, in2), + XEXP (XEXP (x, 0), 0)); + } + /* Canonicalize (minus A (plus B C)) to (minus (minus A B) C) for integers. */ if (GET_CODE (XEXP (x, 1)) == PLUS && INTEGRAL_MODE_P (mode)) @@ -4579,7 +4684,7 @@ combine_simplify_rtx (x, op0_mode, last, in_dest) #ifdef SHIFT_COUNT_TRUNCATED else if (SHIFT_COUNT_TRUNCATED && GET_CODE (XEXP (x, 1)) != REG) SUBST (XEXP (x, 1), - force_to_mode (XEXP (x, 1), GET_MODE (x), + force_to_mode (XEXP (x, 1), GET_MODE (XEXP (x, 1)), ((HOST_WIDE_INT) 1 << exact_log2 (GET_MODE_BITSIZE (GET_MODE (x)))) - 1, @@ -4761,12 +4866,12 @@ simplify_if_then_else (x) /* Convert a == b ? b : a to "a". */ if (true_code == EQ && ! side_effects_p (cond) - && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations) + && !HONOR_NANS (mode) && rtx_equal_p (XEXP (cond, 0), false_rtx) && rtx_equal_p (XEXP (cond, 1), true_rtx)) return false_rtx; else if (true_code == NE && ! side_effects_p (cond) - && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations) + && !HONOR_NANS (mode) && rtx_equal_p (XEXP (cond, 0), true_rtx) && rtx_equal_p (XEXP (cond, 1), false_rtx)) return true_rtx; @@ -4827,7 +4932,9 @@ simplify_if_then_else (x) neither 1 or -1, but it isn't worth checking for. */ if ((STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1) - && comparison_p && mode != VOIDmode && ! side_effects_p (x)) + && comparison_p + && GET_MODE_CLASS (mode) == MODE_INT + && ! side_effects_p (x)) { rtx t = make_compound_operation (true_rtx, SET); rtx f = make_compound_operation (false_rtx, SET); @@ -4862,7 +4969,8 @@ simplify_if_then_else (x) && subreg_lowpart_p (XEXP (XEXP (t, 0), 0)) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f) && (num_sign_bit_copies (f, GET_MODE (f)) - > (GET_MODE_BITSIZE (mode) + > (unsigned int) + (GET_MODE_BITSIZE (mode) - GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (t, 0), 0)))))) { c1 = XEXP (XEXP (t, 0), 1); z = f; op = GET_CODE (XEXP (t, 0)); @@ -4877,7 +4985,8 @@ simplify_if_then_else (x) && subreg_lowpart_p (XEXP (XEXP (t, 0), 1)) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f) && (num_sign_bit_copies (f, GET_MODE (f)) - > (GET_MODE_BITSIZE (mode) + > (unsigned int) + (GET_MODE_BITSIZE (mode) - GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (t, 0), 1)))))) { c1 = XEXP (XEXP (t, 0), 0); z = f; op = GET_CODE (XEXP (t, 0)); @@ -4977,7 +5086,8 @@ simplify_set (x) simplify the expression for the object knowing that we only need the low-order bits. */ - if (GET_MODE_CLASS (mode) == MODE_INT) + if (GET_MODE_CLASS (mode) == MODE_INT + && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) { src = force_to_mode (src, mode, ~(HOST_WIDE_INT) 0, NULL_RTX, 0); SUBST (SET_SRC (x), src); @@ -4986,11 +5096,9 @@ simplify_set (x) /* If we are setting CC0 or if the source is a COMPARE, look for the use of the comparison result and try to simplify it unless we already have used undobuf.other_insn. */ - if ((GET_CODE (src) == COMPARE -#ifdef HAVE_cc0 - || dest == cc0_rtx -#endif - ) + if ((GET_MODE_CLASS (mode) == MODE_CC + || GET_CODE (src) == COMPARE + || CC0_P (dest)) && (cc_use = find_single_use (dest, subst_insn, &other_insn)) != 0 && (undobuf.other_insn == 0 || other_insn == undobuf.other_insn) && GET_RTX_CLASS (GET_CODE (*cc_use)) == '<' @@ -4998,15 +5106,44 @@ simplify_set (x) { enum rtx_code old_code = GET_CODE (*cc_use); enum rtx_code new_code; - rtx op0, op1; + rtx op0, op1, tmp; int other_changed = 0; enum machine_mode compare_mode = GET_MODE (dest); + enum machine_mode tmp_mode; if (GET_CODE (src) == COMPARE) op0 = XEXP (src, 0), op1 = XEXP (src, 1); else op0 = src, op1 = const0_rtx; + /* Check whether the comparison is known at compile time. */ + if (GET_MODE (op0) != VOIDmode) + tmp_mode = GET_MODE (op0); + else if (GET_MODE (op1) != VOIDmode) + tmp_mode = GET_MODE (op1); + else + tmp_mode = compare_mode; + tmp = simplify_relational_operation (old_code, tmp_mode, op0, op1); + if (tmp != NULL_RTX) + { + rtx pat = PATTERN (other_insn); + undobuf.other_insn = other_insn; + SUBST (*cc_use, tmp); + + /* Attempt to simplify CC user. */ + if (GET_CODE (pat) == SET) + { + rtx new = simplify_rtx (SET_SRC (pat)); + if (new != NULL_RTX) + SUBST (SET_SRC (pat), new); + } + + /* Convert X into a no-op move. */ + SUBST (SET_DEST (x), pc_rtx); + SUBST (SET_SRC (x), pc_rtx); + return x; + } + /* Simplify our comparison, if possible. */ new_code = simplify_comparison (old_code, &op0, &op1); @@ -5136,13 +5273,11 @@ simplify_set (x) && (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))) #endif -#ifdef CLASS_CANNOT_CHANGE_MODE +#ifdef CANNOT_CHANGE_MODE_CLASS && ! (GET_CODE (dest) == REG && REGNO (dest) < FIRST_PSEUDO_REGISTER - && (TEST_HARD_REG_BIT - (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], - REGNO (dest))) - && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (src), - GET_MODE (SUBREG_REG (src)))) + && REG_CANNOT_CHANGE_MODE_P (REGNO (dest), + GET_MODE (SUBREG_REG (src)), + GET_MODE (src))) #endif && (GET_CODE (dest) == REG || (GET_CODE (dest) == SUBREG @@ -5156,6 +5291,30 @@ simplify_set (x) src = SET_SRC (x), dest = SET_DEST (x); } +#ifdef HAVE_cc0 + /* If we have (set (cc0) (subreg ...)), we try to remove the subreg + in SRC. */ + if (dest == cc0_rtx + && GET_CODE (src) == SUBREG + && subreg_lowpart_p (src) + && (GET_MODE_BITSIZE (GET_MODE (src)) + < GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (src))))) + { + rtx inner = SUBREG_REG (src); + enum machine_mode inner_mode = GET_MODE (inner); + + /* Here we make sure that we don't have a sign bit on. */ + if (GET_MODE_BITSIZE (inner_mode) <= HOST_BITS_PER_WIDE_INT + && (nonzero_bits (inner, inner_mode) + < ((unsigned HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (GET_MODE (src)) - 1)))) + { + SUBST (SET_SRC (x), inner); + src = SET_SRC (x); + } + } +#endif + #ifdef LOAD_EXTEND_OP /* If we have (set FOO (subreg:M (mem:N BAR) 0)) with M wider than N, this would require a paradoxical subreg. Replace the subreg with a @@ -5594,9 +5753,15 @@ expand_compound_operation (x) if (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) > UNITS_PER_WORD) return x; + /* Reject MODEs that aren't scalar integers because turning vector + or complex modes into shifts causes problems. */ + + if (! SCALAR_INT_MODE_P (GET_MODE (XEXP (x, 0)))) + return x; + len = GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))); /* If the inner object has VOIDmode (the only way this can happen - is if it is a ASM_OPERANDS), we can't do anything since we don't + is if it is an ASM_OPERANDS), we can't do anything since we don't know how much masking to do. */ if (len == 0) return x; @@ -5615,6 +5780,12 @@ expand_compound_operation (x) || GET_MODE (XEXP (x, 0)) == VOIDmode) return x; + /* Reject MODEs that aren't scalar integers because turning vector + or complex modes into shifts causes problems. */ + + if (! SCALAR_INT_MODE_P (GET_MODE (XEXP (x, 0)))) + return x; + len = INTVAL (XEXP (x, 1)); pos = INTVAL (XEXP (x, 2)); @@ -5822,12 +5993,12 @@ expand_field_assignment (x) compute_mode = GET_MODE (inner); - /* Don't attempt bitwise arithmetic on non-integral modes. */ - if (! INTEGRAL_MODE_P (compute_mode)) + /* Don't attempt bitwise arithmetic on non scalar integer modes. */ + if (! SCALAR_INT_MODE_P (compute_mode)) { enum machine_mode imode; - /* Something is probably seriously wrong if this matches. */ + /* Don't do anything for vector or complex integral types. */ if (! FLOAT_MODE_P (compute_mode)) break; @@ -5881,15 +6052,15 @@ expand_field_assignment (x) code that understands the USE is this routine. If it is not removed, it will cause the resulting insn not to match. - UNSIGNEDP is non-zero for an unsigned reference and zero for a + UNSIGNEDP is nonzero for an unsigned reference and zero for a signed reference. - IN_DEST is non-zero if this is a reference in the destination of a - SET. This is used when a ZERO_ or SIGN_EXTRACT isn't needed. If non-zero, + IN_DEST is nonzero if this is a reference in the destination of a + SET. This is used when a ZERO_ or SIGN_EXTRACT isn't needed. If nonzero, a STRICT_LOW_PART will be used, if zero, ZERO_EXTEND or SIGN_EXTEND will be used. - IN_COMPARE is non-zero if we are in a COMPARE. This means that a + IN_COMPARE is nonzero if we are in a COMPARE. This means that a ZERO_EXTRACT should be built even for bits starting at bit 0. MODE is the desired mode of the result (if IN_DEST == 0). @@ -5940,6 +6111,21 @@ make_extraction (mode, inner, pos, pos_rtx, len, is_mode = GET_MODE (SUBREG_REG (inner)); inner = SUBREG_REG (inner); } + else if (GET_CODE (inner) == ASHIFT + && GET_CODE (XEXP (inner, 1)) == CONST_INT + && pos_rtx == 0 && pos == 0 + && len > (unsigned HOST_WIDE_INT) INTVAL (XEXP (inner, 1))) + { + /* We're extracting the least significant bits of an rtx + (ashift X (const_int C)), where LEN > C. Extract the + least significant (LEN - C) bits of X, giving an rtx + whose mode is MODE, then shift it left C times. */ + new = make_extraction (mode, XEXP (inner, 0), + 0, 0, len - INTVAL (XEXP (inner, 1)), + unsignedp, in_dest, in_compare); + if (new != 0) + return gen_rtx_ASHIFT (mode, new, XEXP (inner, 1)); + } inner_mode = GET_MODE (inner); @@ -6017,7 +6203,7 @@ make_extraction (mode, inner, pos, pos_rtx, len, - GET_MODE_SIZE (tmode)) % UNITS_PER_WORD; /* Avoid creating invalid subregs, for example when - simplifying (x>>32)&255. */ + simplifying (x>>32)&255. */ if (final_word >= GET_MODE_SIZE (inner_mode)) return NULL_RTX; @@ -6046,7 +6232,7 @@ make_extraction (mode, inner, pos, pos_rtx, len, return new; if (GET_CODE (new) == CONST_INT) - return GEN_INT (trunc_int_for_mode (INTVAL (new), mode)); + return gen_int_mode (INTVAL (new), mode); /* If we know that no extraneous bits are set, and that the high bit is not set, convert the extraction to the cheaper of @@ -6362,7 +6548,7 @@ make_compound_operation (x, in_code) : in_code == COMPARE ? SET : in_code); /* Process depending on the code of this operation. If NEW is set - non-zero, it will be returned. */ + nonzero, it will be returned. */ switch (code) { @@ -6567,7 +6753,11 @@ make_compound_operation (x, in_code) if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (tem)) || (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (XEXP (tem, 0))))) - tem = gen_rtx_fmt_e (GET_CODE (tem), mode, XEXP (tem, 0)); + { + if (! SCALAR_INT_MODE_P (mode)) + break; + tem = gen_rtx_fmt_e (GET_CODE (tem), mode, XEXP (tem, 0)); + } else tem = gen_lowpart_for_combine (mode, XEXP (tem, 0)); return tem; @@ -6635,7 +6825,7 @@ get_pos_from_mask (m, plen) Return a possibly simplified expression, but always convert X to MODE. If X is a CONST_INT, AND the CONST_INT with MASK. - Also, if REG is non-zero and X is a register equal in value to REG, + Also, if REG is nonzero and X is a register equal in value to REG, replace X with REG. If JUST_SELECT is nonzero, don't optimize by noticing that bits in MASK @@ -6698,12 +6888,20 @@ force_to_mode (x, mode, mask, reg, just_select) /* If none of the bits in X are needed, return a zero. */ if (! just_select && (nonzero & mask) == 0) - return const0_rtx; + x = const0_rtx; /* If X is a CONST_INT, return a new one. Do this here since the test below will fail. */ if (GET_CODE (x) == CONST_INT) - return gen_int_mode (INTVAL (x) & mask, mode); + { + if (SCALAR_INT_MODE_P (mode)) + return gen_int_mode (INTVAL (x) & mask, mode); + else + { + x = GEN_INT (INTVAL (x) & mask); + return gen_lowpart_common (mode, x); + } + } /* If X is narrower than MODE and we want all the bits in X's mode, just get X in the proper mode. */ @@ -6776,7 +6974,7 @@ force_to_mode (x, mode, mask, reg, just_select) if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT && ((INTVAL (XEXP (x, 1)) & GET_MODE_MASK (GET_MODE (x))) - == (HOST_WIDE_INT) mask)) + == mask)) x = XEXP (x, 0); /* If it remains an AND, try making another AND with the bits @@ -7058,7 +7256,7 @@ force_to_mode (x, mode, mask, reg, just_select) } } - /* If MASK is 1, convert this to a LSHIFTRT. This can be done + /* If MASK is 1, convert this to an LSHIFTRT. This can be done even if the shift count isn't a constant. */ if (mask == 1) x = gen_binary (LSHIFTRT, GET_MODE (x), XEXP (x, 0), XEXP (x, 1)); @@ -7125,7 +7323,8 @@ force_to_mode (x, mode, mask, reg, just_select) < GET_MODE_BITSIZE (GET_MODE (x))) && INTVAL (XEXP (XEXP (x, 0), 1)) < HOST_BITS_PER_WIDE_INT) { - temp = GEN_INT (mask << INTVAL (XEXP (XEXP (x, 0), 1))); + temp = gen_int_mode (mask << INTVAL (XEXP (XEXP (x, 0), 1)), + GET_MODE (x)); temp = gen_binary (XOR, GET_MODE (x), XEXP (XEXP (x, 0), 0), temp); x = gen_binary (LSHIFTRT, GET_MODE (x), temp, XEXP (XEXP (x, 0), 1)); @@ -7245,7 +7444,7 @@ if_then_else_cond (x, ptrue, pfalse) } /* See if we have PLUS, IOR, XOR, MINUS or UMAX, where one of the - operands is zero when the other is non-zero, and vice-versa, + operands is zero when the other is nonzero, and vice-versa, and STORE_FLAG_VALUE is 1 or -1. */ if ((STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1) @@ -7367,7 +7566,7 @@ if_then_else_cond (x, ptrue, pfalse) && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT && exact_log2 (nz = nonzero_bits (x, mode)) >= 0) { - *ptrue = GEN_INT (trunc_int_for_mode (nz, mode)), *pfalse = const0_rtx; + *ptrue = gen_int_mode (nz, mode), *pfalse = const0_rtx; return x; } @@ -7866,7 +8065,7 @@ simplify_and_const_int (x, mode, varop, constop) return const0_rtx; /* If VAROP is a NEG of something known to be zero or 1 and CONSTOP is - a power of two, we can replace this with a ASHIFT. */ + a power of two, we can replace this with an ASHIFT. */ if (GET_CODE (varop) == NEG && nonzero_bits (XEXP (varop, 0), mode) == 1 && (i = exact_log2 (constop)) >= 0) return simplify_shift_const (NULL_RTX, ASHIFT, mode, XEXP (varop, 0), i); @@ -7942,23 +8141,76 @@ simplify_and_const_int (x, mode, varop, constop) return x; } +#define nonzero_bits_with_known(X, MODE) \ + cached_nonzero_bits (X, MODE, known_x, known_mode, known_ret) + +/* The function cached_nonzero_bits is a wrapper around nonzero_bits1. + It avoids exponential behavior in nonzero_bits1 when X has + identical subexpressions on the first or the second level. */ + +static unsigned HOST_WIDE_INT +cached_nonzero_bits (x, mode, known_x, known_mode, known_ret) + rtx x; + enum machine_mode mode; + rtx known_x; + enum machine_mode known_mode; + unsigned HOST_WIDE_INT known_ret; +{ + if (x == known_x && mode == known_mode) + return known_ret; + + /* Try to find identical subexpressions. If found call + nonzero_bits1 on X with the subexpressions as KNOWN_X and the + precomputed value for the subexpression as KNOWN_RET. */ + + if (GET_RTX_CLASS (GET_CODE (x)) == '2' + || GET_RTX_CLASS (GET_CODE (x)) == 'c') + { + rtx x0 = XEXP (x, 0); + rtx x1 = XEXP (x, 1); + + /* Check the first level. */ + if (x0 == x1) + return nonzero_bits1 (x, mode, x0, mode, + nonzero_bits_with_known (x0, mode)); + + /* Check the second level. */ + if ((GET_RTX_CLASS (GET_CODE (x0)) == '2' + || GET_RTX_CLASS (GET_CODE (x0)) == 'c') + && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1))) + return nonzero_bits1 (x, mode, x1, mode, + nonzero_bits_with_known (x1, mode)); + + if ((GET_RTX_CLASS (GET_CODE (x1)) == '2' + || GET_RTX_CLASS (GET_CODE (x1)) == 'c') + && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1))) + return nonzero_bits1 (x, mode, x0, mode, + nonzero_bits_with_known (x0, mode)); + } + + return nonzero_bits1 (x, mode, known_x, known_mode, known_ret); +} + /* We let num_sign_bit_copies recur into nonzero_bits as that is useful. We don't let nonzero_bits recur into num_sign_bit_copies, because that is less useful. We can't allow both, because that results in exponential run time recursion. There is a nullstone testcase that triggered this. This macro avoids accidental uses of num_sign_bit_copies. */ -#define num_sign_bit_copies() +#define cached_num_sign_bit_copies() -/* Given an expression, X, compute which bits in X can be non-zero. +/* Given an expression, X, compute which bits in X can be nonzero. We don't care about bits outside of those defined in MODE. For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is a shift, AND, or zero_extract, we can do better. */ static unsigned HOST_WIDE_INT -nonzero_bits (x, mode) +nonzero_bits1 (x, mode, known_x, known_mode, known_ret) rtx x; enum machine_mode mode; + rtx known_x; + enum machine_mode known_mode; + unsigned HOST_WIDE_INT known_ret; { unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode); unsigned HOST_WIDE_INT inner_nz; @@ -7996,7 +8248,7 @@ nonzero_bits (x, mode) && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x))) { - nonzero &= nonzero_bits (x, GET_MODE (x)); + nonzero &= nonzero_bits_with_known (x, GET_MODE (x)); nonzero |= GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x)); return nonzero; } @@ -8049,7 +8301,7 @@ nonzero_bits (x, mode) && (reg_last_set_label[REGNO (x)] == label_tick || (REGNO (x) >= FIRST_PSEUDO_REGISTER && REG_N_SETS (REGNO (x)) == 1 - && ! REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, + && ! REGNO_REG_SET_P (ENTRY_BLOCK_PTR->next_bb->global_live_at_start, REGNO (x)))) && INSN_CUID (reg_last_set[REGNO (x)]) < subst_low_cuid) return reg_last_set_nonzero_bits[REGNO (x)] & nonzero; @@ -8078,7 +8330,7 @@ nonzero_bits (x, mode) | ((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (GET_MODE (x)))); #endif - return nonzero_bits (tem, mode) & nonzero; + return nonzero_bits_with_known (tem, mode) & nonzero; } else if (nonzero_sign_valid && reg_nonzero_bits[REGNO (x)]) { @@ -8153,11 +8405,12 @@ nonzero_bits (x, mode) break; case TRUNCATE: - nonzero &= (nonzero_bits (XEXP (x, 0), mode) & GET_MODE_MASK (mode)); + nonzero &= (nonzero_bits_with_known (XEXP (x, 0), mode) + & GET_MODE_MASK (mode)); break; case ZERO_EXTEND: - nonzero &= nonzero_bits (XEXP (x, 0), mode); + nonzero &= nonzero_bits_with_known (XEXP (x, 0), mode); if (GET_MODE (XEXP (x, 0)) != VOIDmode) nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0))); break; @@ -8165,8 +8418,8 @@ nonzero_bits (x, mode) case SIGN_EXTEND: /* If the sign bit is known clear, this is the same as ZERO_EXTEND. Otherwise, show all the bits in the outer mode but not the inner - may be non-zero. */ - inner_nz = nonzero_bits (XEXP (x, 0), mode); + may be nonzero. */ + inner_nz = nonzero_bits_with_known (XEXP (x, 0), mode); if (GET_MODE (XEXP (x, 0)) != VOIDmode) { inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0))); @@ -8181,19 +8434,21 @@ nonzero_bits (x, mode) break; case AND: - nonzero &= (nonzero_bits (XEXP (x, 0), mode) - & nonzero_bits (XEXP (x, 1), mode)); + nonzero &= (nonzero_bits_with_known (XEXP (x, 0), mode) + & nonzero_bits_with_known (XEXP (x, 1), mode)); break; case XOR: case IOR: case UMIN: case UMAX: case SMIN: case SMAX: { - unsigned HOST_WIDE_INT nonzero0 = nonzero_bits (XEXP (x, 0), mode); + unsigned HOST_WIDE_INT nonzero0 = + nonzero_bits_with_known (XEXP (x, 0), mode); /* Don't call nonzero_bits for the second time if it cannot change anything. */ if ((nonzero & nonzero0) != nonzero) - nonzero &= (nonzero0 | nonzero_bits (XEXP (x, 1), mode)); + nonzero &= (nonzero0 + | nonzero_bits_with_known (XEXP (x, 1), mode)); } break; @@ -8203,11 +8458,13 @@ nonzero_bits (x, mode) case MOD: case UMOD: /* We can apply the rules of arithmetic to compute the number of high- and low-order zero bits of these operations. We start by - computing the width (position of the highest-order non-zero bit) + computing the width (position of the highest-order nonzero bit) and the number of low-order zero bits for each value. */ { - unsigned HOST_WIDE_INT nz0 = nonzero_bits (XEXP (x, 0), mode); - unsigned HOST_WIDE_INT nz1 = nonzero_bits (XEXP (x, 1), mode); + unsigned HOST_WIDE_INT nz0 = + nonzero_bits_with_known (XEXP (x, 0), mode); + unsigned HOST_WIDE_INT nz1 = + nonzero_bits_with_known (XEXP (x, 1), mode); int width0 = floor_log2 (nz0) + 1; int width1 = floor_log2 (nz1) + 1; int low0 = floor_log2 (nz0 & -nz0); @@ -8289,9 +8546,9 @@ nonzero_bits (x, mode) been zero-extended, we know that at least the high-order bits are zero, though others might be too. */ - if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x)) + if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x) > 0) nonzero = (GET_MODE_MASK (GET_MODE (x)) - & nonzero_bits (SUBREG_REG (x), GET_MODE (x))); + & nonzero_bits_with_known (SUBREG_REG (x), GET_MODE (x))); /* If the inner mode is a single word for both the host and target machines, we can compute this from which bits of the inner @@ -8300,17 +8557,18 @@ nonzero_bits (x, mode) && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= HOST_BITS_PER_WIDE_INT)) { - nonzero &= nonzero_bits (SUBREG_REG (x), mode); + nonzero &= nonzero_bits_with_known (SUBREG_REG (x), mode); #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP) /* If this is a typical RISC machine, we only have to worry about the way loads are extended. */ - if (LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND - ? (((nonzero - & (((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1)))) - != 0)) - : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND) + if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND + ? (((nonzero + & (((unsigned HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1)))) + != 0)) + : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND) + || GET_CODE (SUBREG_REG (x)) != MEM) #endif { /* On many CISC machines, accessing an object in a wider mode @@ -8342,7 +8600,8 @@ nonzero_bits (x, mode) unsigned int width = GET_MODE_BITSIZE (inner_mode); int count = INTVAL (XEXP (x, 1)); unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode); - unsigned HOST_WIDE_INT op_nonzero = nonzero_bits (XEXP (x, 0), mode); + unsigned HOST_WIDE_INT op_nonzero = + nonzero_bits_with_known (XEXP (x, 0), mode); unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask; unsigned HOST_WIDE_INT outer = 0; @@ -8377,8 +8636,8 @@ nonzero_bits (x, mode) break; case IF_THEN_ELSE: - nonzero &= (nonzero_bits (XEXP (x, 1), mode) - | nonzero_bits (XEXP (x, 2), mode)); + nonzero &= (nonzero_bits_with_known (XEXP (x, 1), mode) + | nonzero_bits_with_known (XEXP (x, 2), mode)); break; default: @@ -8389,17 +8648,74 @@ nonzero_bits (x, mode) } /* See the macro definition above. */ -#undef num_sign_bit_copies +#undef cached_num_sign_bit_copies +#define num_sign_bit_copies_with_known(X, M) \ + cached_num_sign_bit_copies (X, M, known_x, known_mode, known_ret) + +/* The function cached_num_sign_bit_copies is a wrapper around + num_sign_bit_copies1. It avoids exponential behavior in + num_sign_bit_copies1 when X has identical subexpressions on the + first or the second level. */ + +static unsigned int +cached_num_sign_bit_copies (x, mode, known_x, known_mode, known_ret) + rtx x; + enum machine_mode mode; + rtx known_x; + enum machine_mode known_mode; + unsigned int known_ret; +{ + if (x == known_x && mode == known_mode) + return known_ret; + + /* Try to find identical subexpressions. If found call + num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and + the precomputed value for the subexpression as KNOWN_RET. */ + + if (GET_RTX_CLASS (GET_CODE (x)) == '2' + || GET_RTX_CLASS (GET_CODE (x)) == 'c') + { + rtx x0 = XEXP (x, 0); + rtx x1 = XEXP (x, 1); + + /* Check the first level. */ + if (x0 == x1) + return + num_sign_bit_copies1 (x, mode, x0, mode, + num_sign_bit_copies_with_known (x0, mode)); + + /* Check the second level. */ + if ((GET_RTX_CLASS (GET_CODE (x0)) == '2' + || GET_RTX_CLASS (GET_CODE (x0)) == 'c') + && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1))) + return + num_sign_bit_copies1 (x, mode, x1, mode, + num_sign_bit_copies_with_known (x1, mode)); + + if ((GET_RTX_CLASS (GET_CODE (x1)) == '2' + || GET_RTX_CLASS (GET_CODE (x1)) == 'c') + && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1))) + return + num_sign_bit_copies1 (x, mode, x0, mode, + num_sign_bit_copies_with_known (x0, mode)); + } + + return num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret); +} + /* Return the number of bits at the high-order end of X that are known to be equal to the sign bit. X will be used in mode MODE; if MODE is VOIDmode, X will be used in its own mode. The returned value will always be between 1 and the number of bits in MODE. */ static unsigned int -num_sign_bit_copies (x, mode) +num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret) rtx x; enum machine_mode mode; + rtx known_x; + enum machine_mode known_mode; + unsigned int known_ret; { enum rtx_code code = GET_CODE (x); unsigned int bitwidth; @@ -8422,7 +8738,7 @@ num_sign_bit_copies (x, mode) /* For a smaller object, just ignore the high bits. */ if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x))) { - num0 = num_sign_bit_copies (x, GET_MODE (x)); + num0 = num_sign_bit_copies_with_known (x, GET_MODE (x)); return MAX (1, num0 - (int) (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth)); } @@ -8464,14 +8780,14 @@ num_sign_bit_copies (x, mode) && (reg_last_set_label[REGNO (x)] == label_tick || (REGNO (x) >= FIRST_PSEUDO_REGISTER && REG_N_SETS (REGNO (x)) == 1 - && ! REGNO_REG_SET_P (BASIC_BLOCK (0)->global_live_at_start, + && ! REGNO_REG_SET_P (ENTRY_BLOCK_PTR->next_bb->global_live_at_start, REGNO (x)))) && INSN_CUID (reg_last_set[REGNO (x)]) < subst_low_cuid) return reg_last_set_sign_bit_copies[REGNO (x)]; tem = get_last_value (x); if (tem != 0) - return num_sign_bit_copies (tem, mode); + return num_sign_bit_copies_with_known (tem, mode); if (nonzero_sign_valid && reg_sign_bit_copies[REGNO (x)] != 0 && GET_MODE_BITSIZE (GET_MODE (x)) == bitwidth) @@ -8504,7 +8820,7 @@ num_sign_bit_copies (x, mode) if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x)) { - num0 = num_sign_bit_copies (SUBREG_REG (x), mode); + num0 = num_sign_bit_copies_with_known (SUBREG_REG (x), mode); return MAX ((int) bitwidth - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1, num0); @@ -8513,7 +8829,7 @@ num_sign_bit_copies (x, mode) /* For a smaller object, just ignore the high bits. */ if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))) { - num0 = num_sign_bit_copies (SUBREG_REG (x), VOIDmode); + num0 = num_sign_bit_copies_with_known (SUBREG_REG (x), VOIDmode); return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - bitwidth))); @@ -8533,8 +8849,9 @@ num_sign_bit_copies (x, mode) if ((GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) - && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND) - return num_sign_bit_copies (SUBREG_REG (x), mode); + && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND + && GET_CODE (SUBREG_REG (x)) == MEM) + return num_sign_bit_copies_with_known (SUBREG_REG (x), mode); #endif #endif break; @@ -8546,16 +8863,16 @@ num_sign_bit_copies (x, mode) case SIGN_EXTEND: return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - + num_sign_bit_copies (XEXP (x, 0), VOIDmode)); + + num_sign_bit_copies_with_known (XEXP (x, 0), VOIDmode)); case TRUNCATE: /* For a smaller object, just ignore the high bits. */ - num0 = num_sign_bit_copies (XEXP (x, 0), VOIDmode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), VOIDmode); return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - bitwidth))); case NOT: - return num_sign_bit_copies (XEXP (x, 0), mode); + return num_sign_bit_copies_with_known (XEXP (x, 0), mode); case ROTATE: case ROTATERT: /* If we are rotating left by a number of bits less than the number @@ -8565,7 +8882,7 @@ num_sign_bit_copies (x, mode) && INTVAL (XEXP (x, 1)) >= 0 && INTVAL (XEXP (x, 1)) < (int) bitwidth) { - num0 = num_sign_bit_copies (XEXP (x, 0), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1)) : (int) bitwidth - INTVAL (XEXP (x, 1)))); } @@ -8576,7 +8893,7 @@ num_sign_bit_copies (x, mode) is known to be positive, the number of sign bit copies is the same as that of the input. Finally, if the input has just one bit that might be nonzero, all the bits are copies of the sign bit. */ - num0 = num_sign_bit_copies (XEXP (x, 0), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); if (bitwidth > HOST_BITS_PER_WIDE_INT) return num0 > 1 ? num0 - 1 : 1; @@ -8594,8 +8911,8 @@ num_sign_bit_copies (x, mode) case SMIN: case SMAX: case UMIN: case UMAX: /* Logical operations will preserve the number of sign-bit copies. MIN and MAX operations always return one of the operands. */ - num0 = num_sign_bit_copies (XEXP (x, 0), mode); - num1 = num_sign_bit_copies (XEXP (x, 1), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); + num1 = num_sign_bit_copies_with_known (XEXP (x, 1), mode); return MIN (num0, num1); case PLUS: case MINUS: @@ -8613,8 +8930,8 @@ num_sign_bit_copies (x, mode) : bitwidth - floor_log2 (nonzero) - 1); } - num0 = num_sign_bit_copies (XEXP (x, 0), mode); - num1 = num_sign_bit_copies (XEXP (x, 1), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); + num1 = num_sign_bit_copies_with_known (XEXP (x, 1), mode); result = MAX (1, MIN (num0, num1) - 1); #ifdef POINTERS_EXTEND_UNSIGNED @@ -8636,8 +8953,8 @@ num_sign_bit_copies (x, mode) to be positive, we must allow for an additional bit since negating a negative number can remove one sign bit copy. */ - num0 = num_sign_bit_copies (XEXP (x, 0), mode); - num1 = num_sign_bit_copies (XEXP (x, 1), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); + num1 = num_sign_bit_copies_with_known (XEXP (x, 1), mode); result = bitwidth - (bitwidth - num0) - (bitwidth - num1); if (result > 0 @@ -8660,17 +8977,17 @@ num_sign_bit_copies (x, mode) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0) return 1; else - return num_sign_bit_copies (XEXP (x, 0), mode); + return num_sign_bit_copies_with_known (XEXP (x, 0), mode); case UMOD: /* The result must be <= the second operand. */ - return num_sign_bit_copies (XEXP (x, 1), mode); + return num_sign_bit_copies_with_known (XEXP (x, 1), mode); case DIV: /* Similar to unsigned division, except that we have to worry about the case where the divisor is negative, in which case we have to add 1. */ - result = num_sign_bit_copies (XEXP (x, 0), mode); + result = num_sign_bit_copies_with_known (XEXP (x, 0), mode); if (result > 1 && (bitwidth > HOST_BITS_PER_WIDE_INT || (nonzero_bits (XEXP (x, 1), mode) @@ -8680,7 +8997,7 @@ num_sign_bit_copies (x, mode) return result; case MOD: - result = num_sign_bit_copies (XEXP (x, 1), mode); + result = num_sign_bit_copies_with_known (XEXP (x, 1), mode); if (result > 1 && (bitwidth > HOST_BITS_PER_WIDE_INT || (nonzero_bits (XEXP (x, 1), mode) @@ -8692,7 +9009,7 @@ num_sign_bit_copies (x, mode) case ASHIFTRT: /* Shifts by a constant add to the number of bits equal to the sign bit. */ - num0 = num_sign_bit_copies (XEXP (x, 0), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) > 0) num0 = MIN ((int) bitwidth, num0 + INTVAL (XEXP (x, 1))); @@ -8706,12 +9023,12 @@ num_sign_bit_copies (x, mode) || INTVAL (XEXP (x, 1)) >= (int) bitwidth) return 1; - num0 = num_sign_bit_copies (XEXP (x, 0), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 0), mode); return MAX (1, num0 - INTVAL (XEXP (x, 1))); case IF_THEN_ELSE: - num0 = num_sign_bit_copies (XEXP (x, 1), mode); - num1 = num_sign_bit_copies (XEXP (x, 2), mode); + num0 = num_sign_bit_copies_with_known (XEXP (x, 1), mode); + num1 = num_sign_bit_copies_with_known (XEXP (x, 2), mode); return MIN (num0, num1); case EQ: case NE: case GE: case GT: case LE: case LT: @@ -8767,8 +9084,8 @@ extended_count (x, mode, unsignedp) return (unsignedp ? (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT - ? (GET_MODE_BITSIZE (mode) - 1 - - floor_log2 (nonzero_bits (x, mode))) + ? (unsigned int) (GET_MODE_BITSIZE (mode) - 1 + - floor_log2 (nonzero_bits (x, mode))) : 0) : num_sign_bit_copies (x, mode) - 1); } @@ -8911,7 +9228,7 @@ merge_outer_ops (pop0, pconst0, op1, const1, mode, pcomp_p) } /* Simplify a shift of VAROP by COUNT bits. CODE says what kind of shift. - The result of the shift is RESULT_MODE. X, if non-zero, is an expression + The result of the shift is RESULT_MODE. X, if nonzero, is an expression that we started with. The shift is normally computed in the widest mode we find in VAROP, as @@ -8978,7 +9295,14 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) /* Convert ROTATERT to ROTATE. */ if (code == ROTATERT) - code = ROTATE, count = GET_MODE_BITSIZE (result_mode) - count; + { + unsigned int bitsize = GET_MODE_BITSIZE (result_mode);; + code = ROTATE; + if (VECTOR_MODE_P (result_mode)) + count = bitsize / GET_MODE_NUNITS (result_mode) - count; + else + count = bitsize - count; + } /* We need to determine what mode we will do the shift in. If the shift is a right shift or a ROTATE, we must always do it in the mode @@ -8998,7 +9322,7 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) multiple operations, each of which are defined, we know what the result is supposed to be. */ - if (count > GET_MODE_BITSIZE (shift_mode) - 1) + if (count > (unsigned int) (GET_MODE_BITSIZE (shift_mode) - 1)) { if (code == ASHIFTRT) count = GET_MODE_BITSIZE (shift_mode) - 1; @@ -9036,8 +9360,8 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) /* We simplify the tests below and elsewhere by converting ASHIFTRT to LSHIFTRT if we know the sign bit is clear. - `make_compound_operation' will convert it to a ASHIFTRT for - those machines (such as VAX) that don't have a LSHIFTRT. */ + `make_compound_operation' will convert it to an ASHIFTRT for + those machines (such as VAX) that don't have an LSHIFTRT. */ if (GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT && code == ASHIFTRT && ((nonzero_bits (varop, shift_mode) @@ -9114,9 +9438,9 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) if (subreg_lowpart_p (varop) && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop))) > GET_MODE_SIZE (GET_MODE (varop))) - && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop))) - + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) - == mode_words)) + && (unsigned int) ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop))) + + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) + == mode_words) { varop = SUBREG_REG (varop); if (GET_MODE_SIZE (GET_MODE (varop)) > GET_MODE_SIZE (mode)) @@ -9157,7 +9481,8 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) bit of a wider mode may be different from what would be interpreted as the sign bit in a narrower mode, so, if the result is narrower, don't discard the shift. */ - if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1 + if (code == LSHIFTRT + && count == (unsigned int) (GET_MODE_BITSIZE (result_mode) - 1) && (GET_MODE_BITSIZE (result_mode) >= GET_MODE_BITSIZE (GET_MODE (varop)))) { @@ -9191,8 +9516,9 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) (ashiftrt:M1 (ashift:M1 (and:M1 (subreg:M1 FOO 0 C2) C3) C1). This simplifies certain SIGN_EXTEND operations. */ if (code == ASHIFT && first_code == ASHIFTRT - && (GET_MODE_BITSIZE (result_mode) - - GET_MODE_BITSIZE (GET_MODE (varop))) == count) + && count == (unsigned int) + (GET_MODE_BITSIZE (result_mode) + - GET_MODE_BITSIZE (GET_MODE (varop)))) { /* C3 has the low-order C1 bits zero. */ @@ -9210,7 +9536,7 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) /* If this was (ashiftrt (ashift foo C1) C2) and FOO has more than C1 high-order bits equal to the sign bit, we can convert - this to either an ASHIFT or a ASHIFTRT depending on the + this to either an ASHIFT or an ASHIFTRT depending on the two counts. We cannot do this if VAROP's mode is not SHIFT_MODE. */ @@ -9348,7 +9674,8 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) && XEXP (XEXP (varop, 0), 1) == constm1_rtx && (STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1) && (code == LSHIFTRT || code == ASHIFTRT) - && count == GET_MODE_BITSIZE (GET_MODE (varop)) - 1 + && count == (unsigned int) + (GET_MODE_BITSIZE (GET_MODE (varop)) - 1) && rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1))) { count = 0; @@ -9403,7 +9730,7 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) if (code == LSHIFTRT && XEXP (varop, 1) == const0_rtx && GET_MODE (XEXP (varop, 0)) == result_mode - && count == GET_MODE_BITSIZE (result_mode) - 1 + && count == (unsigned int) (GET_MODE_BITSIZE (result_mode) - 1) && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT && ((STORE_FLAG_VALUE & ((HOST_WIDE_INT) 1 @@ -9422,7 +9749,8 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) case NEG: /* (lshiftrt (neg A) C) where A is either 0 or 1 and C is one less than the number of bits in the mode is equivalent to A. */ - if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1 + if (code == LSHIFTRT + && count == (unsigned int) (GET_MODE_BITSIZE (result_mode) - 1) && nonzero_bits (XEXP (varop, 0), result_mode) == 1) { varop = XEXP (varop, 0); @@ -9446,7 +9774,8 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) /* (lshiftrt (plus A -1) C) where A is either 0 or 1 and C is one less than the number of bits in the mode is equivalent to (xor A 1). */ - if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1 + if (code == LSHIFTRT + && count == (unsigned int) (GET_MODE_BITSIZE (result_mode) - 1) && XEXP (varop, 1) == constm1_rtx && nonzero_bits (XEXP (varop, 0), result_mode) == 1 && merge_outer_ops (&outer_op, &outer_const, XOR, @@ -9511,10 +9840,12 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) if ((STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1) && GET_CODE (XEXP (varop, 0)) == ASHIFTRT - && count == GET_MODE_BITSIZE (GET_MODE (varop)) - 1 + && count == (unsigned int) + (GET_MODE_BITSIZE (GET_MODE (varop)) - 1) && (code == LSHIFTRT || code == ASHIFTRT) && GET_CODE (XEXP (XEXP (varop, 0), 1)) == CONST_INT - && INTVAL (XEXP (XEXP (varop, 0), 1)) == count + && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (varop, 0), 1)) + == count && rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1))) { count = 0; @@ -9578,7 +9909,7 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) if (x && GET_RTX_CLASS (GET_CODE (x)) == '2' && GET_CODE (XEXP (x, 1)) == CONST_INT - && INTVAL (XEXP (x, 1)) == count) + && (unsigned HOST_WIDE_INT) INTVAL (XEXP (x, 1)) == count) const_rtx = XEXP (x, 1); else const_rtx = GEN_INT (count); @@ -9610,7 +9941,7 @@ simplify_shift_const (x, code, result_mode, varop, orig_count) x = simplify_shift_const (x, code, shift_mode, XEXP (x, 0), INTVAL (XEXP (x, 1))); - /* If we were doing a LSHIFTRT in a wider mode than it was originally, + /* If we were doing an LSHIFTRT in a wider mode than it was originally, turn off all the bits that the shift would have turned off. */ if (orig_code == LSHIFTRT && result_mode != shift_mode) x = simplify_and_const_int (NULL_RTX, shift_mode, x, @@ -9796,14 +10127,14 @@ gen_lowpart_for_combine (mode, x) } result = gen_lowpart_common (mode, x); -#ifdef CLASS_CANNOT_CHANGE_MODE +#ifdef CANNOT_CHANGE_MODE_CLASS if (result != 0 && GET_CODE (result) == SUBREG && GET_CODE (SUBREG_REG (result)) == REG - && REGNO (SUBREG_REG (result)) >= FIRST_PSEUDO_REGISTER - && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (result), - GET_MODE (SUBREG_REG (result)))) - REG_CHANGES_MODE (REGNO (SUBREG_REG (result))) = 1; + && REGNO (SUBREG_REG (result)) >= FIRST_PSEUDO_REGISTER) + bitmap_set_bit (&subregs_of_mode, REGNO (SUBREG_REG (result)) + * MAX_MACHINE_MODE + + GET_MODE (result)); #endif if (result) @@ -9851,15 +10182,15 @@ gen_lowpart_for_combine (mode, x) { int offset = 0; rtx res; + enum machine_mode sub_mode = GET_MODE (x); - /* We can't handle VOIDmodes. We can get here when generating vector - modes since these, unlike integral and floating point modes are not - handled earlier. */ - if (GET_MODE (x) == VOIDmode) - return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); - - offset = subreg_lowpart_offset (mode, GET_MODE (x)); - res = simplify_gen_subreg (mode, x, GET_MODE (x), offset); + offset = subreg_lowpart_offset (mode, sub_mode); + if (sub_mode == VOIDmode) + { + sub_mode = int_mode_for_mode (mode); + x = gen_lowpart_common (sub_mode, x); + } + res = simplify_gen_subreg (mode, x, sub_mode, offset); if (res) return res; return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); @@ -10118,7 +10449,9 @@ simplify_comparison (code, pop0, pop1) /* Get the constant we are comparing against and turn off all bits not on in our mode. */ - const_op = trunc_int_for_mode (INTVAL (op1), mode); + const_op = INTVAL (op1); + if (mode != VOIDmode) + const_op = trunc_int_for_mode (const_op, mode); op1 = GEN_INT (const_op); /* If we are comparing against a constant power of two and the value @@ -10490,7 +10823,8 @@ simplify_comparison (code, pop0, pop1) & ~GET_MODE_MASK (mode)) || (num_sign_bit_copies (XEXP (SUBREG_REG (op0), 0), GET_MODE (SUBREG_REG (op0))) - > (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0))) + > (unsigned int) + (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0))) - GET_MODE_BITSIZE (mode))))) { op0 = SUBREG_REG (op0); @@ -10574,7 +10908,8 @@ simplify_comparison (code, pop0, pop1) of bits in X minus 1, is one iff X > 0. */ if (sign_bit_comparison_p && GET_CODE (XEXP (op0, 0)) == ASHIFTRT && GET_CODE (XEXP (XEXP (op0, 0), 1)) == CONST_INT - && INTVAL (XEXP (XEXP (op0, 0), 1)) == mode_width - 1 + && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (op0, 0), 1)) + == mode_width - 1 && rtx_equal_p (XEXP (XEXP (op0, 0), 0), XEXP (op0, 1))) { op0 = XEXP (op0, 1); @@ -10643,7 +10978,7 @@ simplify_comparison (code, pop0, pop1) break; case IOR: - /* The sign bit of (ior (plus X (const_int -1)) X) is non-zero + /* The sign bit of (ior (plus X (const_int -1)) X) is nonzero iff X <= 0. */ if (sign_bit_comparison_p && GET_CODE (XEXP (op0, 0)) == PLUS && XEXP (XEXP (op0, 0), 1) == constm1_rtx @@ -10729,6 +11064,9 @@ simplify_comparison (code, pop0, pop1) represents the low part, permute the SUBREG and the AND and try again. */ if (GET_CODE (XEXP (op0, 0)) == SUBREG + /* Require an integral mode, to avoid creating something like + (AND:SF ...). */ + && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (XEXP (op0, 0)))) && (0 #ifdef WORD_REGISTER_OPERATIONS || ((mode_width @@ -10809,7 +11147,7 @@ simplify_comparison (code, pop0, pop1) unsigned HOST_WIDE_INT temp = const_op & GET_MODE_MASK (mode); temp >>= INTVAL (XEXP (op0, 1)); - op1 = GEN_INT (trunc_int_for_mode (temp, mode)); + op1 = gen_int_mode (temp, mode); op0 = XEXP (op0, 0); continue; } @@ -10832,7 +11170,8 @@ simplify_comparison (code, pop0, pop1) low-order bit. */ if (const_op == 0 && equality_comparison_p && GET_CODE (XEXP (op0, 1)) == CONST_INT - && INTVAL (XEXP (op0, 1)) == mode_width - 1) + && (unsigned HOST_WIDE_INT) INTVAL (XEXP (op0, 1)) + == mode_width - 1) { op0 = simplify_and_const_int (NULL_RTX, mode, XEXP (op0, 0), (HOST_WIDE_INT) 1); @@ -10929,7 +11268,8 @@ simplify_comparison (code, pop0, pop1) if (const_op == 0 && (equality_comparison_p || sign_bit_comparison_p) && GET_CODE (XEXP (op0, 1)) == CONST_INT - && INTVAL (XEXP (op0, 1)) == mode_width - 1) + && (unsigned HOST_WIDE_INT) INTVAL (XEXP (op0, 1)) + == mode_width - 1) { op0 = XEXP (op0, 0); code = (code == NE || code == GT ? LT : GE); @@ -11030,9 +11370,11 @@ simplify_comparison (code, pop0, pop1) if (zero_extended || ((num_sign_bit_copies (op0, tmode) - > GET_MODE_BITSIZE (tmode) - GET_MODE_BITSIZE (mode)) + > (unsigned int) (GET_MODE_BITSIZE (tmode) + - GET_MODE_BITSIZE (mode))) && (num_sign_bit_copies (op1, tmode) - > GET_MODE_BITSIZE (tmode) - GET_MODE_BITSIZE (mode)))) + > (unsigned int) (GET_MODE_BITSIZE (tmode) + - GET_MODE_BITSIZE (mode))))) { /* If OP0 is an AND and we don't have an AND in MODE either, make a new AND in the proper mode. */ @@ -11142,7 +11484,45 @@ update_table_tick (x) /* Note that we can't have an "E" in values stored; see get_last_value_validate. */ if (fmt[i] == 'e') - update_table_tick (XEXP (x, i)); + { + /* Check for identical subexpressions. If x contains + identical subexpression we only have to traverse one of + them. */ + if (i == 0 + && (GET_RTX_CLASS (code) == '2' + || GET_RTX_CLASS (code) == 'c')) + { + /* Note that at this point x1 has already been + processed. */ + rtx x0 = XEXP (x, 0); + rtx x1 = XEXP (x, 1); + + /* If x0 and x1 are identical then there is no need to + process x0. */ + if (x0 == x1) + break; + + /* If x0 is identical to a subexpression of x1 then while + processing x1, x0 has already been processed. Thus we + are done with x. */ + if ((GET_RTX_CLASS (GET_CODE (x1)) == '2' + || GET_RTX_CLASS (GET_CODE (x1)) == 'c') + && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1))) + break; + + /* If x1 is identical to a subexpression of x0 then we + still have to process the rest of x0. */ + if ((GET_RTX_CLASS (GET_CODE (x0)) == '2' + || GET_RTX_CLASS (GET_CODE (x0)) == 'c') + && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1))) + { + update_table_tick (XEXP (x0, x1 == XEXP (x0, 0) ? 1 : 0)); + break; + } + } + + update_table_tick (XEXP (x, i)); + } } /* Record that REG is set to VALUE in insn INSN. If VALUE is zero, we @@ -11390,7 +11770,7 @@ record_promoted_value (insn, subreg) if (reg_last_set[regno] == insn) { - if (SUBREG_PROMOTED_UNSIGNED_P (subreg)) + if (SUBREG_PROMOTED_UNSIGNED_P (subreg) > 0) reg_last_set_nonzero_bits[regno] &= GET_MODE_MASK (mode); } @@ -11440,7 +11820,7 @@ check_promoted_subreg (insn, x) mentioned in *LOC are valid when *LOC was part of a value set when label_tick == TICK. Return 0 if some are not. - If REPLACE is non-zero, replace the invalid reference with + If REPLACE is nonzero, replace the invalid reference with (clobber (const_int 0)) and return 1. This replacement is useful because we often can get useful information about the form of a value (e.g., if it was produced by a shift that always produces -1 or 0) even though @@ -11473,7 +11853,7 @@ get_last_value_validate (loc, insn, tick, replace) || (! (regno >= FIRST_PSEUDO_REGISTER && REG_N_SETS (regno) == 1 && (! REGNO_REG_SET_P - (BASIC_BLOCK (0)->global_live_at_start, regno))) + (ENTRY_BLOCK_PTR->next_bb->global_live_at_start, regno))) && reg_last_set_label[j] > tick)) { if (replace) @@ -11495,11 +11875,52 @@ get_last_value_validate (loc, insn, tick, replace) } for (i = 0; i < len; i++) - if ((fmt[i] == 'e' - && get_last_value_validate (&XEXP (x, i), insn, tick, replace) == 0) - /* Don't bother with these. They shouldn't occur anyway. */ - || fmt[i] == 'E') - return 0; + { + if (fmt[i] == 'e') + { + /* Check for identical subexpressions. If x contains + identical subexpression we only have to traverse one of + them. */ + if (i == 1 + && (GET_RTX_CLASS (GET_CODE (x)) == '2' + || GET_RTX_CLASS (GET_CODE (x)) == 'c')) + { + /* Note that at this point x0 has already been checked + and found valid. */ + rtx x0 = XEXP (x, 0); + rtx x1 = XEXP (x, 1); + + /* If x0 and x1 are identical then x is also valid. */ + if (x0 == x1) + return 1; + + /* If x1 is identical to a subexpression of x0 then + while checking x0, x1 has already been checked. Thus + it is valid and so as x. */ + if ((GET_RTX_CLASS (GET_CODE (x0)) == '2' + || GET_RTX_CLASS (GET_CODE (x0)) == 'c') + && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1))) + return 1; + + /* If x0 is identical to a subexpression of x1 then x is + valid iff the rest of x1 is valid. */ + if ((GET_RTX_CLASS (GET_CODE (x1)) == '2' + || GET_RTX_CLASS (GET_CODE (x1)) == 'c') + && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1))) + return + get_last_value_validate (&XEXP (x1, + x0 == XEXP (x1, 0) ? 1 : 0), + insn, tick, replace); + } + + if (get_last_value_validate (&XEXP (x, i), insn, tick, + replace) == 0) + return 0; + } + /* Don't bother with these. They shouldn't occur anyway. */ + else if (fmt[i] == 'E') + return 0; + } /* If we haven't found a reason for it to be invalid, it is valid. */ return 1; @@ -11547,7 +11968,7 @@ get_last_value (x) && (regno < FIRST_PSEUDO_REGISTER || REG_N_SETS (regno) != 1 || (REGNO_REG_SET_P - (BASIC_BLOCK (0)->global_live_at_start, regno))))) + (ENTRY_BLOCK_PTR->next_bb->global_live_at_start, regno))))) return 0; /* If the value was set in a later insn than the ones we are processing, @@ -11653,7 +12074,7 @@ reg_dead_at_p_1 (dest, x, data) reg_dead_flag = (GET_CODE (x) == CLOBBER) ? 1 : -1; } -/* Return non-zero if REG is known to be dead at INSN. +/* Return nonzero if REG is known to be dead at INSN. We scan backwards from INSN. If we hit a REG_DEAD note or a CLOBBER referencing REG, it is dead. If we hit a SET referencing REG, it is @@ -11666,7 +12087,7 @@ reg_dead_at_p (reg, insn) rtx reg; rtx insn; { - int block; + basic_block block; unsigned int i; /* Set variables for reg_dead_at_p_1. */ @@ -11699,21 +12120,21 @@ reg_dead_at_p (reg, insn) return 1; } - /* Get the basic block number that we were in. */ + /* Get the basic block that we were in. */ if (insn == 0) - block = 0; + block = ENTRY_BLOCK_PTR->next_bb; else { - for (block = 0; block < n_basic_blocks; block++) - if (insn == BLOCK_HEAD (block)) + FOR_EACH_BB (block) + if (insn == block->head) break; - if (block == n_basic_blocks) + if (block == EXIT_BLOCK_PTR) return 0; } for (i = reg_dead_regno; i < reg_dead_endregno; i++) - if (REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start, i)) + if (REGNO_REG_SET_P (block->global_live_at_start, i)) return 0; return 1; @@ -11764,7 +12185,7 @@ mark_used_regs_combine (x) { unsigned int endregno, r; - /* None of this applies to the stack, frame or arg pointers */ + /* None of this applies to the stack, frame or arg pointers. */ if (regno == STACK_POINTER_REGNUM #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM @@ -11872,7 +12293,7 @@ move_deaths (x, maybe_kill_insn, from_cuid, to_insn, pnotes) rtx where_dead = reg_last_death[regno]; rtx before_dead, after_dead; - /* Don't move the register if it gets killed in between from and to */ + /* Don't move the register if it gets killed in between from and to. */ if (maybe_kill_insn && reg_set_p (x, maybe_kill_insn) && ! reg_referenced_p (x, maybe_kill_insn)) return; @@ -11920,7 +12341,7 @@ move_deaths (x, maybe_kill_insn, from_cuid, to_insn, pnotes) if (i < regno || i >= ourend) REG_NOTES (where_dead) = gen_rtx_EXPR_LIST (REG_DEAD, - gen_rtx_REG (reg_raw_mode[i], i), + regno_reg_rtx[i], REG_NOTES (where_dead)); } @@ -11947,7 +12368,7 @@ move_deaths (x, maybe_kill_insn, from_cuid, to_insn, pnotes) offset = 1; for (i = regno + offset; i < ourend; i++) - move_deaths (gen_rtx_REG (reg_raw_mode[i], i), + move_deaths (regno_reg_rtx[i], maybe_kill_insn, from_cuid, to_insn, &oldnotes); } @@ -12107,7 +12528,6 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) { case REG_BR_PROB: case REG_BR_PRED: - case REG_EXEC_COUNT: /* Doesn't matter much where we put this, as long as it's somewhere. It is preferable to keep these notes on branches, which is most likely to be i3. */ @@ -12327,7 +12747,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) case REG_DEAD: /* If the register is used as an input in I3, it dies there. - Similarly for I2, if it is non-zero and adjacent to I3. + Similarly for I2, if it is nonzero and adjacent to I3. If the register is not used as an input in either I3 or I2 and it is not one of the registers we were supposed to eliminate, @@ -12356,7 +12776,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) if (place == 0) { - basic_block bb = BASIC_BLOCK (this_basic_block); + basic_block bb = this_basic_block; for (tem = PREV_INSN (i3); place == 0; tem = PREV_INSN (tem)) { @@ -12500,7 +12920,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) && REGNO_REG_SET_P (bb->global_live_at_start, REGNO (XEXP (note, 0)))) { - SET_BIT (refresh_blocks, this_basic_block); + SET_BIT (refresh_blocks, this_basic_block->index); need_refresh = 1; } } @@ -12520,7 +12940,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) after we remove them in delete_noop_moves. */ if (noop_move_p (place)) { - SET_BIT (refresh_blocks, this_basic_block); + SET_BIT (refresh_blocks, this_basic_block->index); need_refresh = 1; } @@ -12569,8 +12989,8 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) for (i = regno; i < endregno; i += HARD_REGNO_NREGS (i, reg_raw_mode[i])) { - rtx piece = gen_rtx_REG (reg_raw_mode[i], i); - basic_block bb = BASIC_BLOCK (this_basic_block); + rtx piece = regno_reg_rtx[i]; + basic_block bb = this_basic_block; if (! dead_or_set_p (place, piece) && ! reg_bitfield_target_p (piece, @@ -12593,7 +13013,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) if (tem == bb->head) { SET_BIT (refresh_blocks, - this_basic_block); + this_basic_block->index); need_refresh = 1; break; } @@ -12698,8 +13118,8 @@ distribute_links (links) since most links don't point very far away. */ for (insn = NEXT_INSN (XEXP (link, 0)); - (insn && (this_basic_block == n_basic_blocks - 1 - || BLOCK_HEAD (this_basic_block + 1) != insn)); + (insn && (this_basic_block->next_bb == EXIT_BLOCK_PTR + || this_basic_block->next_bb->head != insn)); insn = NEXT_INSN (insn)) if (INSN_P (insn) && reg_overlap_mentioned_p (reg, PATTERN (insn))) { |
