diff options
Diffstat (limited to 'contrib/binutils/opcodes')
26 files changed, 6634 insertions, 1017 deletions
diff --git a/contrib/binutils/opcodes/ChangeLog b/contrib/binutils/opcodes/ChangeLog index 73e6d14..2d528c6 100644 --- a/contrib/binutils/opcodes/ChangeLog +++ b/contrib/binutils/opcodes/ChangeLog @@ -1,3 +1,727 @@ +Fri Apr 24 16:07:57 1998 Alan Modra <alan@spri.levels.unisa.edu.au> + + * i386-dis.c (OP_DSSI): Print segment override. + +Tue Apr 21 16:31:51 1998 Ian Lance Taylor <ian@cygnus.com> + + * mips-dis.c (print_insn_arg): Restore accidentally lost code. + +Sun Apr 5 16:04:39 1998 H.J. Lu <hjl@gnu.org> + + * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists + before trying to copy it. + * Makefile.in: Rebuild. + +Tue Mar 31 11:09:08 1998 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.am: Rebuild dependencies. + * Makefile.in: Rebuild. + + From H.J. Lu <hjl@gnu.org>: + * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew + to Ev for both. + +Fri Mar 27 18:08:13 1998 Ian Lance Taylor <ian@cygnus.com> + + Fix some gcc -Wall warnings: + * arc-dis.c (print_insn): Add casts to avoid warnings. + * cgen-opc.c (cgen_keyword_lookup_name): Likewise. + * d10v-dis.c (dis_long, dis_2_short): Likewise. + * m10200-dis.c (disassemble): Likewise. + * m10300-dis.c (disassemble): Likewise. + * ns32k-dis.c (print_insn_ns32k): Likewise. + * ppc-opc.c (insert_ral, insert_ram): Likewise. + * cgen-dis.c (build_dis_hash_table): Remove used local variables. + * cgen-opc.c (cgen_keyword_search_next): Likewise. + * d10v-dis.c (dis_long, dis_2_short): Likewise. + * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise. + * w65-dis.c (print_operand): Likewise. + * z8k-dis.c (fetch_data): Likewise. + * a29k-dis.c: Add return type for find_byte_func_type. + * arc-opc.c: Include <stdio.h>. Remove declarations of + insert_multshift and extract_multshift. + * h8500-dis.c (print_insn_h8500): Initialize local variables. + * h8500-opc.h (h8500_table): Fully bracket initializer. + * w65-opc.h (optable): Likewise. + * i386-dis.c (print_insn_x86): Declare aflag and flag parameters. + * i386-dis.c (OP_E): Initialize local variables. + * m10200-dis.c (print_insn_mn10200): Likewise. + * mips-dis.c (print_insn_mips16): Likewise. + * sh-dis.c (print_insn_shx): Likewise. + * v850-dis.c (print_insn_v850): Likewise. + * ns32k-dis.c (print_insn_arg): Declare. + (get_displacement, invalid_float): Declare. + (list_search, sign_extend, flip_bytes): Declare return type. + (get_displacement): Likewise. + (print_insn_arg): Likewise. Make d int. Fix sprintf format + string. + (print_insn_ns32k): Make i unsigned. + (invalid_float): Make static. Declare type of val. + * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen + on each for iteration. + * tic30-dis.c (get_indirect_operand): Likewise. + * z8k-dis.c (print_insn_z8001): Declare return type. + (print_insn_z8002): Likewise. + (unparse_instr): Fix sprintf format strings. + +Fri Mar 27 00:05:23 1998 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Add "sync.l" and "sync.p". + +Wed Mar 25 14:32:48 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * m68k-dis.c (print_insn_m68k): Use info->mach to select the + default m68k variant to recognize. + + * i960-dis.c (pinsn): Change type of first argument to bfd_vma. + (ctrl, cobr, mem, ea): Likewise. + (print_addr): Likewise. Remove cast. + (ea): Cast argument of print_addr to bfd_vma. + + * cgen-asm.c (cgen_parse_signed_integer): Fix type of local + variable value. + (cgen_parse_unsigned_integer): Likewise. + (cgen_parse_address): Likewise. + +Wed Mar 25 14:31:31 1998 Ian Lance Taylor <ian@cygnus.com> + + * i960-dis.c (ctrl): Add full braces to structure initialization. + (cobr, mem, reg): Likewise. + (ea): Correct parenthesization in expression. + + * cgen-asm.c: Include <ctype.h>. + (build_asm_hash_table): Remove unused local variable i. + (cgen_parse_keyword): Add casts to avoid warnings. + + * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF + symbol. Fix indentation. + (print_insn_little_arm): Likewise. + +Fri Mar 20 18:55:18 1998 Ian Lance Taylor <ian@cygnus.com> + + * configure.in: Use AM_DISABLE_SHARED. + * aclocal.m4, configure: Rebuild with libtool 1.2. + +Thu Mar 19 15:46:53 1998 Nick Clifton <nickc@cygnus.com> + + These patches are courtesy of Jonathan Walton and Tony Thompson + (athompso@cambridge.arm.com). + + * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC + relative addresses. + + * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with + both the offset and the label closest to the destination. + +Sat Mar 14 23:47:14 1998 Doug Evans <devans@seba.cygnus.com> + + * m32r-opc.h: Regenerate. + +Wed Mar 4 12:08:14 1998 Doug Evans <devans@canuck.cygnus.com> + + * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate. + +Tue Mar 3 18:51:22 1998 Doug Evans <devans@seba.cygnus.com> + + * cgen-asm.in: Move insertion of generated routines to top of file. + (insert_normal): Add prototype. Delete `shift' arg. + * cgen-dis.in: Move insertion of generated routines to top of file. + (extract_normal): Add prototype. Delete `shift' arg. + (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined. + (print_keyword): Add prototype. Fix type of `attrs' arg. + +Sat Feb 28 16:02:34 1998 Nick Clifton <nickc@cygnus.com> + + * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not + assume that info->symbols is non-empty. + +Sat Feb 28 12:19:05 1998 Richard Henderson <rth@cygnus.com> + + * alpha-opc.c (cvtqs) There is no such thing. + (cvttq): Missing most of the /*d variants. + +Tue Feb 24 10:46:44 1998 Doug Evans <devans@canuck.cygnus.com> + + * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed + to *info->symbols. + * mips-dis.c (print_insn_{big,little}_mips): Likewise. + * tic30-dis.c (print_branch): Likewise. + +Tue Feb 24 11:06:18 1998 Nick Clifton <nickc@cygnus.com> + + * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove + saved_symbol code as it is no longer needed. + +Mon Feb 23 13:16:17 1998 Doug Evans <devans@seba.cygnus.com> + + * cgen-asm.c: Include symcat.h. + * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto. + + * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate. + +Mon Feb 23 10:34:58 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'. + +Thu Feb 19 16:51:13 1998 Doug Evans <devans@canuck.cygnus.com> + + * m32r-opc.[ch]: Regenerate. + +Tue Feb 17 17:14:50 1998 Doug Evans <devans@seba.cygnus.com> + + * Makefile.am (CGENFILES): Update. + * Makefile.in: Regenerate. + * cgen-asm.in (insert_normal): Result is error message now. + Validate value to be inserted. + (insert_insn_normal): Result is error message now. + (@arch@_cgen_assemble_insn): Update. + * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max + arguments. Don't perform validation here. + * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate. + +Fri Feb 13 14:26:06 1998 Doug Evans <devans@canuck.cygnus.com> + + * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty + operand instance list. + * m32r-opc.c: Regenerate. + +Fri Feb 13 14:53:02 1998 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.am (AUTOMAKE_OPTIONS): Define. + * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e. + +Fri Feb 13 10:21:09 1998 Mark Alexander <marka@cygnus.com> + + * m10300-dis.c (print_insn_mn10300): Recognize break instruction. + +Fri Feb 13 13:12:14 1998 Ian Lance Taylor <ian@cygnus.com> + + * configure.in: Get the version number from BFD. + * configure: Rebuild. + + From H.J. Lu <hjl@gnu.org>: + * Makefile.am (libopcodes_la_LDFLAGS): Define. + * Makefile.in: Rebuild. + +Fri Feb 13 09:50:32 1998 Nick Clifton <nickc@cygnus.com> + + * m32r-opc.c: Regenerate. + * m32r-opc.h: Regenerate. + +Thu Feb 12 11:01:40 1998 Doug Evans <devans@canuck.cygnus.com> + + * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p. + Ignore ALIAS insns if asked to. + (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn. + * m32r-opc.c: Regenerate. + +Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk> + + Fix rac to accept only a0: + * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes): + Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1. + Introduce OPERAND_GPR. + * d10v-dis.c (print_operand): Likewise. + +Wed Feb 11 18:58:34 1998 Doug Evans <devans@seba.cygnus.com> + + * cgen-opc.in: New file. + * cgen.sh: Translate @ARCH@. Cat cgen-opc.in into @arch@-opc.c. + * Makefile.am (CGENFILES): Add cgen-opc.in. + * Makefile.in: Regenerate. + + * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain. + (cgen_hw_lookup): Make result const. + + * cgen-dis.in (*): Use PTR instead of void *. + (print_insn): Delete unused vars `i', `syntax'. + + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +Sat Feb 7 15:30:27 1998 Ian Lance Taylor <ian@cygnus.com> + + * configure, aclocal.m4: Rebuild with new libtool. + +Wed Feb 4 19:17:37 1998 Ian Lance Taylor <ian@cygnus.com> + + * configure.in: Set libtool_enable_shared rather than + libtool_shared. Remove diversion hack. + * configure, Makefile.in, aclocal.m4: Rebuild with new libtool. + +Tue Feb 3 17:19:40 1998 Doug Evans <devans@seba.cygnus.com> + + * cgen-opc.c (cgen_set_cpu): Initialize hardware table. + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +Mon Feb 2 19:22:15 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU> + + * tic30-dis.c: New file. + * disassemble.c (disassembler): Add bfd_arch_tic30 case. + * configure.in: Handle bfd_tic30_arch. + * Makefile.am: Rebuild dependencies. + (CFILES): Add tic30-dis.c + (ALL_MACHINES): Add tic30-dis.lo. + * configure, Makefile.in: Rebuild. + +Thu Jan 29 13:02:56 1998 Doug Evans <devans@canuck.cygnus.com> + + * m32r-opc.h (HAVE_CPU_M32R): Define. + +Wed Jan 28 09:55:03 1998 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (insertion routines): If both alignment and size is + wrong then report this. + +Tue Jan 27 21:52:59 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. + Only recognize instructions for the current target_processor. + +Thu Jan 22 16:20:17 1998 Fred Fish <fnf@cygnus.com> + + * d10v-dis.c (PC_MASK): Correct value. + (print_operand): If there's a reloc, don't calculate the + address because they could be in different sections. + +Fri Jan 16 15:29:11 1998 Jim Blandy <jimb@zwingli.cygnus.com> + + * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu" + instruction after the 4650's "mul" instruction; nobody's using the + 4010 these days. If object files someday indicate which processor + variant they're intended for, we can do a better job at this. + +Mon Jan 12 14:43:54 1998 Doug Evans <devans@seba.cygnus.com> + + * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MNEMONIC. + (cgen_parse_keyword): Rewrite. + * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MASK_BITSIZE. + * cgen-opc.c: Clean up pass over `struct foo' usage. + (cgen_keyword_lookup_value): Handle "" entry. + (cgen_keyword_add): Likewise. + +Mon Dec 22 12:37:06 1997 Ian Lance Taylor <ian@cygnus.com> + + * mips-opc.c: Add FP_D to s.d instruction flags. + +Wed Dec 17 11:38:29 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * m68k-opc.c (halt, pulse): Enable them on the 68060. + +1997-12-15 Brendan Kehoe <brendan@lisa.cygnus.com> + + * configure: Only build libopcodes shared if --enable-shared's value + was `yes', or was set to `*opcodes*'. + * aclocal.m4: Likewise. + * NOTE: this really needs to be fixed in libtool/libtool.m4, the + original source of this bit of code. It's not clear what the best fix + would be, though. + +Fri Dec 12 01:32:30 1997 Richard Henderson <rth@cygnus.com> + + * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. + +Wed Dec 10 17:42:35 1997 Nick Clifton <nickc@cygnus.com> + + * arm-dis.c (print_insn_little_arm): Prevent examination of stored + symbol if none is present. + (print_insn_big_arm): Prevent examination of stored symbol if + none is present. + +Thu Oct 23 21:13:37 1997 Fred Fish <fnf@cygnus.com> + + * d10v-opc.c (d10v_opcodes): Correct entry for RTE. + +Mon Dec 8 11:21:07 1997 Nick Clifton <nickc@cygnus.com> + + * disassemble.c: Remove disasm_symaddr() function. + + * arm-dis.c: Use info->symbol instead of info->flags to determine + if disassmbly should be in Thumb or Arm mode. + +Tue Dec 2 09:54:27 1997 Nick Clifton <nickc@cygnus.com> + + * arm-dis.c: Add support for disassembling Thumb opcodes. + (print_insn_thumb): New function. + + * disassemble.c (disasm_symaddr): New function. + + * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly. + (thumb_opcodes): Table of Thumb opcodes. + +Mon Dec 1 12:25:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * m68k-opc.c (btst): Change Dd@s to Dd;b. + + * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q', + and 'v' as operand types. + +Mon Dec 1 11:56:50 1997 Ian Lance Taylor <ian@cygnus.com> + + * m68k-opc.c: Add argument for lpstop. From Olivier Carmona + <olivier.carmona@di.epfl.ch>. + * m68k-dis.c (print_insn_m68k): Handle special case of lpstop, + which has a two word opcode with a one word argument. + +Wed Nov 19 17:42:35 1997 Richard Henderson <rth@cygnus.com> + + * sh-dis.c (print_insn_shx): Recognize all sh4 additions. + * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4. + (ftrv): Slay the cut-and-paste monster. + +Tue Nov 18 23:10:03 1997 J"orn Rennecke <amylaar@cygnus.co.uk> + + * d10v-dis.c (print_operand): + Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. + +Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk> + + * d10v-opc.c (OPERAND_FLAG): Split into: + (OPERAND_FFLAG, OPERAND_CFLAG) . + (FSRC): Split into: + (FFSRC, CFSRC). + +Thu Nov 13 11:05:33 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Move the INSN_MACRO ISA value to the membership + field for all INSN_MACRO's. + * mips16-opc.c: same + +Wed Nov 12 10:16:57 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c (sync,cache): These are 3900 insns. + +Tue Nov 11 23:53:41 1997 J"orn Rennecke <amylaar@cygnus.co.uk> + + sh-opc.h (sh_table): Remove ftst/nan. + +Tue Oct 28 17:59:32 1997 Ken Raeburn <raeburn@cygnus.com> + + * mips-opc.c (ffc, ffs): Fix mask. + +Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com> + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Mon Oct 27 22:34:03 1997 Ken Raeburn <raeburn@cygnus.com> + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Thu Oct 23 14:57:58 1997 Nick Clifton <nickc@cygnus.com> + + * v850-dis.c (disassemble): Replace // with /* ... */ + +Wed Oct 22 17:33:21 1997 Richard Henderson <rth@cygnus.com> + + * sparc-opc.c: Add wr & rd for v9a asr's. + * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's. + (v9a_asr_reg_names): New variable. + Patch from David Miller <davem@vger.rutgers.edu>. + +Wed Oct 22 17:18:02 1997 Richard Henderson <rth@cygnus.com> + + * sparc-opc.c (v9notv9a): New insn type. + (IMPDEP): Move to the end to not conflict with edge8 et al. + Patch from David Miller <davem@vger.rutgers.edu>. + +Fri Oct 17 13:18:53 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c (bnezl,beqzl): Mark these as also tx39. + +Thu Oct 16 11:55:20 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. + +Tue Oct 14 16:10:31 1997 Nick Clifton <nickc@cygnus.com> + + * v850-dis.c (disassemble): Use new symbol_at_address_func() field + of disassemble_info structure to determine if an overlay address + has a matching symbol in low memory. + + * dis-buf.c (generic_symbol_at_address): New (dummy) function for + new symbol_at_address_func field in disassemble_info structure. + +Fri Oct 10 16:44:52 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (extract_d22): Use signed arithmatic. + +Tue Oct 7 23:40:43 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Three op mult is not an ISA insn. + +Tue Oct 7 23:37:21 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Fix formatting. + +Fri Oct 3 17:26:54 1997 Ian Lance Taylor <ian@cygnus.com> + + * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather + than assuming that char is signed. Explicitly sign extend 16 bit + values, rather than assuming that short is 16 bits. + (OP_sI, OP_J, OP_DIR): Likewise. + +Wed Oct 1 16:58:54 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c: Fix typo in comment. + + * v850-dis.c (disassemble): Add test of processor type when + determining opcodes. + +Wed Oct 1 14:10:20 1997 Ian Lance Taylor <ian@cygnus.com> + + * configure.in: Use a diversion to set enable_shared before the + arguments are parsed. + * configure: Rebuild. + +Thu Sep 25 13:04:59 1997 Ian Lance Taylor <ian@cygnus.com> + + * m68k-opc.c (TBL1): Use ! rather than `. + * m68k-dis.c (print_insn_arg): Remove ` operand specifier. + +Wed Sep 24 11:29:35 1997 Ian Lance Taylor <ian@cygnus.com> + + * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. + + * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. + + * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr + for mcf5200. + + * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. + * aclocal.m4: Rebuild with new libtool. + * configure: Rebuild. + +Thu Sep 18 11:21:43 1997 Doug Evans <dje@canuck.cygnus.com> + + * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. + +Tue Sep 16 15:18:20 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (v850_opcodes): Further rearrangements. + +Tue Sep 16 09:48:50 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (v850_opcodes): Fields reordered to allow assembler + parser to work. + +Tue Sep 16 10:01:00 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. + +Mon Sep 15 18:31:52 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c: Initialise processors field of v850_opcode structure. + +Thu Sep 11 17:35:10 1997 Doug Evans <dje@canuck.cygnus.com> + + * sparc-opc.c (sparc_opcodes): Fix assembler args to + fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s, + fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s, + fandnot1s, fandnot2s. + +Tue Sep 9 10:03:49 1997 Doug Evans <dje@canuck.cygnus.com> + + * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq. + +Mon Sep 8 14:06:59 1997 Doug Evans <dje@canuck.cygnus.com> + + * cgen-asm.c (cgen_parse_address): New argument resultp. + All callers updated. + * m32r-asm.c (parse_h_hi16): Right shift numbers by 16. + +Tue Sep 2 18:39:08 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-dis.c (disassemble): PC relative instructions are + relative to the next instruction, not the current instruction. + +Tue Sep 2 15:41:55 1997 Nick Clifton <nickc@cygnus.com> + + * v850-dis.c (disassemble): Only signed extend values that are not + returned by extract functions. + Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag. + +Tue Sep 2 15:39:40 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c: Update comments. Remove use of + V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns. + +Tue Aug 26 09:42:28 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (MOVHI): Immediate parameter is unsigned. + +Mon Aug 25 15:58:07 1997 Christopher Provenzano <proven@cygnus.com> + + * configure: Rebuilt with latest devo autoconf for NT support. + +Fri Aug 22 10:35:15 1997 Nick Clifton <nickc@cygnus.com> + + * v850-dis.c (disassemble): Use curly brace syntax for register + lists. + + * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases + where r0 is being used as a destination register. + + +Wed Aug 20 00:43:11 1997 J"orn Rennecke <amylaar@cygnus.co.uk> + + * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR. + (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions. + (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb. + Add insns to access SGR and DBR. + * sh-dis.c (print_insn_shx): Add SH4 floating point extensions. + +Tue Aug 19 10:59:59 1997 Richard Henderson <rth@cygnus.com> + + * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage. + + +Fri Aug 15 05:17:48 1997 Doug Evans <dje@canuck.cygnus.com> + + * configure.in (bfd_arc_arch): Add. + * configure: Rebuild. + * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo. + * Makefile.in: Rebuild. + * arc-dis.c, arc-opc.c: New files. + * disassemble.c (ARCH_all): Define ARCH_arc. + (disassembler): Add ARC support. + +Wed Aug 13 18:52:11 1997 Nick Clifton <nickc@cygnus.com> + + + * v850-opc.c: Reorganised and re-layed out to improve readability + and portability. + +Tue Aug 5 23:09:31 1997 Ian Lance Taylor <ian@cygnus.com> + + * configure: Rebuild with autoconf 2.12.1. + +Mon Aug 4 12:02:16 1997 Ian Lance Taylor <ian@cygnus.com> + + * aclocal.m4, configure: Rebuild with new automake patches. + +Fri Aug 1 13:02:04 1997 Ian Lance Taylor <ian@cygnus.com> + + * configure.in: Set enable_shared before AM_PROG_LIBTOOL. + * acinclude.m4: Just include acinclude.m4 from BFD. + * aclocal.m4, configure: Rebuild. + +Thu Jul 31 21:44:42 1997 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.am: New file, based on old Makefile.in. + * acconfig.h: New file. + * acinclude.m4: New file. + * stamp-h.in: New file. + * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL. + Removed shared library handling; now handled by libtool. Replace + AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE, + AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with + AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h + handling in AC_OUTPUT. + * dep-in.sed: Change .o to .lo. + * Makefile.in: Now built with automake. + * aclocal.m4: Now built with aclocal. + * config.in, configure: Rebuild. + +Mon Jul 28 21:52:24 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Fix typo/thinko in "eret" instruction. + +Thu Jul 24 13:03:26 1997 Doug Evans <dje@canuck.cygnus.com> + + * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. + Make array const. + * sparc-dis.c (sorted_opcodes): New static local. + (struct opcode_hash): `opcode' is pointer to const element. + (build_hash): First arg is now table of sorted pointers. + (print_insn_sparc): Sort opcodes by sorting table of pointers. + (compare_opcodes): Update. + +Tue Jul 15 12:05:23 1997 Doug Evans <dje@canuck.cygnus.com> + + * cgen-opc.c: #include <ctype.h>. + (hash_keyword_name): New arg `case_sensitive_p'. Callers updated. + Handle case insensitive hashing. + (hash_keyword_value): Change type of `value' to unsigned int. + +Thu Jul 10 12:56:10 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mips_builtin_opcodes): If an insn uses single + precision FP, mark it as such. Likewise for double precision + FP. Mark ISA1 insns. Consolidate duplicate opcodes where + possible. + +Wed Jun 25 15:25:57 1997 Felix Lee <flee@cirdan.cygnus.com> + + * ppc-opc.c (extract_nsi): make unsigned expression signed before + negating it. + (UNUSED): remove one level of parens, so MSVC doesn't choke on + nesting depth when all the macros are expanded. + +Tue Jun 17 17:02:17 1997 Ian Lance Taylor <ian@cygnus.com> + + * sparc-opc.c: The fcmp v9a instructions take an integer register + as a destination, not a floating point register. From Christian + Kuehnke <Christian.Kuehnke@arbi.Informatik.Uni-Oldenburg.DE>. + +Mon Jun 16 14:13:18 1997 Ian Lance Taylor <ian@cygnus.com> + + * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@() + syntax. From Roman Hodek + <rnhodek@faui22c.informatik.uni-erlangen.de>. + + * i386-dis.c (twobyte_has_modrm): Fix pand. + +Mon Jun 16 14:08:38 1997 Michael Taylor <mbt@mit.edu> + + * i386-dis.c (dis386_twobyte): Fix pand and pandn. + +Tue Jun 10 11:26:47 1997 H.J. Lu <hjl@gnu.ai.mit.edu> + + * arm-dis.c: Add prototypes for arm_decode_shift and + print_insn_arm. + +Mon Jun 2 11:39:04 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c: Add r3900 insns. + +Tue May 27 15:55:44 1997 Ian Lance Taylor <ian@cygnus.com> + + * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't + print delay slot instructions on the same line. When using a PC + relative load, add a comment with the value being loaded if it can + be obtained. + +Tue May 27 11:02:08 1997 Alan Modra <alan@spri.levels.unisa.edu.au> + + * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl + to pushS/popS for segment regs and byte constant so that + pushw/popw printed when in 16 bit data mode. + + * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to + print cbtw, cwtd in 16 bit data mode. + * i386-dis.c (putop): extra case W to support above. + + * i386-dis.c (print_insn_x86): print addr32 prefix when given + address size prefix in 16 bit address mode. + +Fri May 23 16:47:23 1997 Ian Lance Taylor <ian@cygnus.com> + + * sh-dis.c: Reindent. Rename local variable fprintf to + fprintf_fn. + +Thu May 22 14:06:02 1997 Doug Evans <dje@canuck.cygnus.com> + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2. + +Tue May 20 11:26:27 1997 Gavin Koch <gavin@cygnus.com> + + * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new + field membership. + * mips16-opc.c (mip16_opcodes): same. + Mon May 12 15:10:53 1997 Jim Wilson <wilson@cygnus.com> * m68k-opc.c (moveb): Change $d to %d. @@ -12,6 +736,20 @@ Mon May 5 14:28:41 1997 Ian Lance Taylor <ian@cygnus.com> * i386-dis.c: Revert patch of April 4. The output now matches what gcc generates. +Fri May 2 12:48:37 1997 Doug Evans <dje@canuck.cygnus.com> + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead + of $simm16. + +Thu May 1 15:34:15 1997 Doug Evans <dje@canuck.cygnus.com> + + * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU. + +Tue Apr 15 12:40:08 1997 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.in (install): Depend upon installdirs. + (installdirs): New target. + Mon Apr 14 12:13:51 1997 Ian Lance Taylor <ian@cygnus.com> From Thomas Graichen <graichen@rzpd.de>: @@ -72,11 +810,17 @@ Fri Apr 4 14:04:16 1997 Ian Lance Taylor <ian@cygnus.com> * configure.in: Correct file names for bfd_mn10[23]00_arch. * configure: Rebuild. + * Makefile.in: Rebuild dependencies. + * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h". * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and fdivp. +Thu Apr 3 13:22:45 1997 Ian Lance Taylor <ian@cygnus.com> + + * Branched binutils 2.8. + Wed Apr 2 12:23:53 1997 Ian Lance Taylor <ian@cygnus.com> * m10200-dis.c: Rename from mn10200-dis.c. @@ -110,6 +854,12 @@ Thu Mar 27 14:24:43 1997 Ian Lance Taylor <ian@cygnus.com> * mips-opc.c: Add cast when setting mips_opcodes. +Tue Mar 25 23:04:00 1997 Stu Grossman (grossman@critters.cygnus.com) + + * v850-dis.c (disassemble): Fix sign extension problem. + * v850-opc.c (extract_d*): Fix sign extension problems to make + disassembly calculate branch offsets correctly. + Mon Mar 24 13:22:13 1997 Ian Lance Taylor <ian@cygnus.com> * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s. @@ -322,11 +1072,21 @@ Thu Jan 2 12:14:29 1997 Jeffrey A Law (law@cygnus.com) * mn10300-dis.c (disassemble): Make sure all variables are initialized before they are used. +Tue Dec 31 12:20:38 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_opcodes): Put curly-braces around operands + for "breakpoint" instruction. + Tue Dec 31 15:38:13 1996 Ian Lance Taylor <ian@cygnus.com> * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE. (dep): Use ALL_CFLAGS rather than CFLAGS. +Tue Dec 31 15:09:16 1996 Michael Meissner <meissner@tiktok.cygnus.com> + + * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY + flag. + Mon Dec 30 17:02:11 1996 Fred Fish <fnf@cygnus.com> * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency. @@ -566,15 +1326,33 @@ Fri Nov 1 10:29:11 1996 Richard Henderson <rth@tamu.edu> (alpha_opcodes): Add new BWX, CIX, and MAX instructions. Recategorize PALcode instructions. +Wed Oct 30 16:46:58 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_opcodes): Add relaxing "jbr". + Tue Oct 29 16:30:28 1996 Ian Lance Taylor <ian@cygnus.com> * mips-dis.c (_print_insn_mips): Don't print a trailing tab if there are no operand types. +Tue Oct 29 12:22:21 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (D9_RELAX): Renamed from D9, all references + changed. + (v850_operands): Make sure D22 immediately follows D9_RELAX. + Fri Oct 25 12:12:53 1996 Ian Lance Taylor <ian@cygnus.com> * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5. +Thu Oct 24 17:53:52 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w + and sst.w instructions. + + * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for + "bCC"instructions). + Thu Oct 24 17:21:20 1996 Ian Lance Taylor <ian@cygnus.com> * mips-dis.c (_print_insn_mips): Use a tab between the instruction @@ -591,6 +1369,10 @@ Fri Oct 11 16:03:49 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field for movhu instruction. + * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands, + cast value to "long" not "signed long" to keep hpux10 + compiler quiet. + Thu Oct 10 10:25:58 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field @@ -672,6 +1454,16 @@ Tue Oct 1 10:49:11 1996 Ian Lance Taylor <ian@cygnus.com> * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses accordingly. Don't declare functions using op_rtn. +Fri Sep 27 18:28:59 1996 Stu Grossman (grossman@critters.cygnus.com) + + * v850-dis.c (disassemble): Add memaddr argument. Re-arrange + params to be more standard. + * (disassemble): Print absolute addresses and symbolic names for + branch and jump targets. + * v850-opc.c (v850_operand): Add displacement flag to 9 and 22 + bit operands. + * (v850_opcodes): Add breakpoint insn. + Mon Sep 23 12:32:26 1996 Ian Lance Taylor <ian@cygnus.com> * m68k-opc.c: Move the fmovemx data register cases before the @@ -697,11 +1489,179 @@ Tue Sep 3 12:09:46 1996 Doug Evans <dje@canuck.cygnus.com> * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx. +Tue Sep 3 12:05:25 1996 Jeffrey A Law (law@cygnus.com) + + * v850-dis.c (disassemble): Make static. Provide prototype. + +Sun Sep 1 22:30:40 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (insert_d9, insert_d22): Fix boundary case + in range checks. + +Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com) + + * v850-dis.c (disassemble): Handle insertion of ',', '[' and + ']' characters into the output stream. + * v850-opc.c (v850_opcodes: Remove size field from all opcodes. + Add "memop" field to all opcodes (for the disassembler). + Reorder opcodes so that "nop" comes before "mov" and "jr" + comes before "jarl". + + * v850-dis.c (print_insn_v850): Fix typo in last change. + + * v850-dis.c (print_insn_v850): Properly handle disassembling + a two byte insn at the end of a memory region when the memory + region's size is only two byte aligned. + + * v850-dis.c (v850_cc_names): Fix stupid thinkos. + + * v850-dis.c (v850_reg_names): Define. + (v850_sreg_names, v850_cc_names): Likewise. + (disassemble): Very rough cut at printing operands (unformatted). + + * v850-opc.c (BOP_MASK): Fix. + (v850_opcodes): Fix mask for jarl and jr. + + * v850-dis.c: New file. Skeleton for disassembler support. + * Makefile.in Remove v850 references, they're not needed here. + * configure.in: Add v850-dis.o when building v850 toolchains. + * configure: Rebuilt. + * disassemble.c (disassembler): Call v850 disassembler. + + * v850-opc.c (insert_d8_7, extract_d8_7): New functions. + (insert_d8_6, extract_d8_6): New functions. + (v850_operands): Rename D7S to D7; operand for D7 is unsigned. + Rename D8 to D8_7, use {insert,extract}_d8_7 routines. + Add D8_6. + (IF4A, IF4B): Use "D7" instead of "D7S". + (IF4C, IF4D): Use "D8_7" instead of "D8". + (IF4E, IF4F): New. Use "D8_6". + (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for + sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w. + + * v850-opc.c (insert_d16_15, extract_d16_15): New functions. + (v850_operands): Change D16 to D16_15, use special insert/extract + routines. New new D16 that uses the generic insert/extract code. + (IF7A, IF7B): Use D16_15. + (IF7C, IF7D): New. Use D16. + (v850_opcodes): Use IF7C and IF7D for ld.b and st.b. + + * v850-opc.c (insert_d9, insert_d22): Slightly improve error + message. Issue an error if the branch offset is odd. + + * v850-opc.c: Add notes about needing special insert/extract + for all the load/store insns, except "ld.b" and "st.b". + + * v850-opc.c (insert_d22, extract_d22): New functions. + (v850_operands): Use insert_d22 and extract_d22 for + D22 operands. + (insert_d9): Fix range check. + +Fri Aug 30 18:01:02 1996 J.T. Conklin <jtc@hippo.cygnus.com> + + * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag + and set bits field to D9 and D22 operands. + +Thu Aug 29 11:10:46 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_operands): Define SR2 operand. + (v850_opcodes): "ldsr" uses R1,SR2. + + * v850-opc.c (v850_opcodes): Fix opcode specs for + sld.w, sst.b, sst.h, sst.w, and nop. + +Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_opcodes): Add null opcode to mark the + end of the opcode table. + Mon Aug 26 13:35:53 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v-opc.c (pre_defined_registers): Added register pairs, "r0-r1", "r2-r3", etc. +Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_operands): Make I16 be a signed operand. + Create I16U for an unsigned 16bit mmediate operand. + (v850_opcodes): Use I16U for "ori", "andi" and "xori". + + * v850-opc.c (v850_operands): Define EP operand. + (IF4A, IF4B, IF4C, IF4D): Use EP. + + * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov" + with immediate operand, "movhi". Tweak "ldsr". + + * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw] + correct. Get sld.[bhw] and sst.[bhw] closer. + + * v850-opc.c (v850_operands): "not" is a two byte insn + + * v850-opc.c (v850_opcodes): Correct bit pattern for setf. + + * v850-opc.c (v850_operands): D16 inserts at offset 16! + + * v850-opc.c (two): Get order of words correct. + + * v850-opc.c (v850_operands): I16 inserts at offset 16! + + * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system + register source and destination operands. + (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr". + + * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix + same thinko in "trap" opcode. + + * v850-opc.c (v850_opcodes): Add initializer for size field + on all opcodes. + + * v850-opc.c (v850_operands): D6 -> DS7. References changed. + Add D8 for 8-bit unsigned field in short load/store insns. + (IF4A, IF4D): These both need two registers. + (IF4C, IF4D): Define. Use 8-bit unsigned field. + (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use + IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand + for "ldsr" and "stsr". + * v850-opc.c (v850_operands): 3-bit immediate for bit insns + is unsigned. + + * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and + short store word (sst.w). + +Thu Aug 22 16:57:27 1996 J.T. Conklin <jtc@rtl.cygnus.com> + + * v850-opc.c (v850_operands): Added insert and extract fields, + pointers to functions that handle unusual operand encodings. + +Thu Aug 22 01:05:24 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_opcodes): Enable "trap". + + * v850-opc.c (v850_opcodes): Fix order of displacement + and register for "set1", "clr1", "not1", and "tst1". + +Wed Aug 21 18:46:26 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_operands): Add "B3" support. + (v850_opcodes): Fix and enable "set1", "clr1", "not1" + and "tst1". + + * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand. + + * v850-opc.c: Close unterminated comment. + +Wed Aug 21 17:31:26 1996 J.T. Conklin <jtc@hippo.cygnus.com> + + * v850-opc.c (v850_operands): Add flags field. + (v850_opcodes): add move opcodes. + +Tue Aug 20 14:41:03 1996 J.T. Conklin <jtc@hippo.cygnus.com> + + * Makefile.in (ALL_MACHINES): Add v850-opc.o. + * configure: (bfd_v850v_arch) Add new case. + * configure.in: (bfd_v850_arch) Add new case. + * v850-opc.c: New file. + Mon Aug 19 15:21:38 1996 Doug Evans <dje@canuck.cygnus.com> * sparc-dis.c (print_insn_sparc): Handle little endian sparcs. @@ -1666,7 +2626,6 @@ Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk) * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for the correct endianness. - Mon Apr 24 14:18:05 1995 Jason Molenda (crash@phydeaux.cygnus.com> * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from @@ -1692,7 +2651,6 @@ Mon Apr 17 12:23:28 1995 Kung Hsu <kung@rtl.cygnus.com> * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because gcc memory hog problem with initializer is fixed. - Mon Apr 10 15:55:01 1995 Stan Shebs <shebs@andros.cygnus.com> Merge in support for Mac MPW as a host. @@ -1718,7 +2676,6 @@ Mon Apr 10 15:55:01 1995 Stan Shebs <shebs@andros.cygnus.com> * mpw-config.in: New file, MPW version of configure.in. * mpw-make.in: New file, MPW version of Makefile.in. - Fri Mar 31 14:23:38 1995 Ken Raeburn <raeburn@cujo.cygnus.com> * alpha-dis.c (print_insn_alpha): Put empty statement after @@ -1767,7 +2724,6 @@ Wed Mar 8 02:54:05 1995 Ken Raeburn <raeburn@cujo.cygnus.com> (print_insn_arg): Arrays cacheFieldName and names now const. (print_indexed): Array scales now const. - Tue Mar 7 16:41:21 1995 Ian Lance Taylor <ian@cygnus.com> * ppc-opc.c: Sort recently added instructions by minor opcode @@ -1785,7 +2741,6 @@ Mon Feb 20 23:54:38 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) * Makefile.in (ALL_MACHINES): Add w65-dis.o. - Thu Feb 16 17:34:41 1995 Ian Lance Taylor <ian@cygnus.com> * mips-opc.c: Add r4650 mul instruction. @@ -1800,7 +2755,6 @@ Tue Feb 14 13:17:37 1995 Michael Meissner <meissner@tiktok.cygnus.com> * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci, mfdcr, mtdcr, icbt, iccci. - Thu Feb 9 12:28:13 1995 Stan Shebs <shebs@andros.cygnus.com> * i960-dis.c (struct tabent, struct sparse_tabent): Change the @@ -1853,12 +2807,10 @@ Wed Dec 28 22:15:33 1994 Steve Chamberlain (sac@jonny.cygnus.com) * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit immediates. - Tue Dec 20 11:25:12 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> * mips-opc.c: Add dli as a synonym for li. - Thu Dec 8 18:23:31 1994 Ken Raeburn <raeburn@cujo.cygnus.com> * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and @@ -1871,7 +2823,6 @@ Thu Dec 8 18:23:31 1994 Ken Raeburn <raeburn@cujo.cygnus.com> * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr control registers. - Wed Nov 23 22:34:51 1994 Steve Chamberlain (sac@jonny.cygnus.com) * sh-opc.h (mov.l gbr): Get direction right. diff --git a/contrib/binutils/opcodes/Makefile.am b/contrib/binutils/opcodes/Makefile.am new file mode 100644 index 0000000..5dda6953 --- /dev/null +++ b/contrib/binutils/opcodes/Makefile.am @@ -0,0 +1,258 @@ +## Process this file with automake to generate Makefile.in + +AUTOMAKE_OPTIONS = cygnus + +INCDIR = $(srcdir)/../include +BFDDIR = $(srcdir)/../bfd +DEP = mkdep + +lib_LTLIBRARIES = libopcodes.la + +# This is where bfd.h lives. +BFD_H = ../bfd/bfd.h + +# Header files. +HFILES = \ + arm-opc.h \ + h8500-opc.h \ + sh-opc.h \ + sysdep.h \ + w65-opc.h \ + z8k-opc.h + +# C source files that correspond to .o's. +CFILES = \ + a29k-dis.c \ + alpha-dis.c \ + alpha-opc.c \ + arm-dis.c \ + cgen-asm.c \ + cgen-dis.c \ + cgen-opc.c \ + d10v-dis.c \ + d10v-opc.c \ + dis-buf.c \ + disassemble.c \ + h8300-dis.c \ + h8500-dis.c \ + hppa-dis.c \ + i386-dis.c \ + i960-dis.c \ + m32r-asm.c \ + m32r-dis.c \ + m32r-opc.c \ + m68k-dis.c \ + m68k-opc.c \ + m88k-dis.c \ + mips-dis.c \ + mips-opc.c \ + mips16-opc.c \ + m10200-dis.c \ + m10200-opc.c \ + m10300-dis.c \ + m10300-opc.c \ + ns32k-dis.c \ + ppc-dis.c \ + ppc-opc.c \ + sh-dis.c \ + sparc-dis.c \ + sparc-opc.c \ + tic30-dis.c \ + w65-dis.c \ + z8k-dis.c \ + z8kgen.c + +ALL_MACHINES = \ + a29k-dis.lo \ + alpha-dis.lo \ + alpha-opc.lo \ + arc-dis.lo \ + arc-opc.lo \ + arm-dis.lo \ + cgen-asm.lo \ + cgen-dis.lo \ + cgen-opc.lo \ + d10v-dis.lo \ + d10v-opc.lo \ + h8300-dis.lo \ + h8500-dis.lo \ + hppa-dis.lo \ + i386-dis.lo \ + i960-dis.lo \ + m32r-asm.lo \ + m32r-dis.lo \ + m32r-opc.lo \ + m68k-dis.lo \ + m68k-opc.lo \ + m88k-dis.lo \ + m10200-dis.lo \ + m10200-opc.lo \ + m10300-dis.lo \ + m10300-opc.lo \ + mips-dis.lo \ + mips-opc.lo \ + mips16-opc.lo \ + ppc-dis.lo \ + ppc-opc.lo \ + ns32k-dis.lo \ + sh-dis.lo \ + sparc-dis.lo \ + sparc-opc.lo \ + tic30-dis.lo \ + v850-dis.lo \ + v850-opc.lo \ + w65-dis.lo \ + z8k-dis.lo + +OFILES = @BFD_MACHINES@ + +INCLUDES = -D_GNU_SOURCE -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR) @HDEFINES@ + +disassemble.lo: disassemble.c $(INCDIR)/dis-asm.h + $(LIBTOOL) --mode=compile $(COMPILE) -c @archdefs@ $(srcdir)/disassemble.c + +libopcodes_la_SOURCES = dis-buf.c disassemble.c +libopcodes_la_DEPENDENCIES = $(OFILES) +libopcodes_la_LIBADD = $(OFILES) +libopcodes_la_LDFLAGS = -release $(VERSION) + +# libtool will build .libs/libopcodes.a. We create libopcodes.a in +# the build directory so that we don't have to convert all the +# programs that use libopcodes.a simultaneously. This is a hack which +# should be removed if everything else starts using libtool. FIXME. + +noinst_LIBRARIES = libopcodes.a + +stamp-lib: libopcodes.la + if [ -f .libs/libopcodes.a ]; then \ + cp .libs/libopcodes.a libopcodes.tmp; \ + $(SHELL) $(srcdir)/../move-if-change libopcodes.tmp libopcodes.a; \ + else true; fi + touch stamp-lib + +libopcodes.a: stamp-lib ; @true + +CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 + + + + + +# This dependency stuff is copied from BFD. + +.dep: dep.sed $(CFILES) $(HFILES) config.h + rm -f .dep1 + $(MAKE) DEP=$(DEP) .dep1 + sed -f dep.sed < .dep1 > .dep + +.dep1: $(CFILES) + rm -f .dep2 .dep2a + echo '# DO NOT DELETE THIS LINE -- mkdep uses it.' > .dep2 + echo > .dep2a + $(DEP) -f .dep2a $(INCLUDES) $(CFLAGS) $? + sed -e '/DO NOT DELETE/d' -e '/^$$/d' < .dep2a >> .dep2 + rm -f .dep2a + $(srcdir)/../move-if-change .dep2 .dep1 + +dep.sed: dep-in.sed config.status + sed <$(srcdir)/dep-in.sed >dep.sed \ + -e 's!@BFD_H@!$(BFD_H)!' \ + -e 's!@INCDIR@!$(INCDIR)!' \ + -e 's!@BFDDIR@!$(BFDDIR)!' \ + -e 's!@SRCDIR@!$(srcdir)!' + +dep: .dep + sed -e '/^..DO NOT DELETE THIS LINE/,$$d' < Makefile > tmp-Makefile + cat .dep >> tmp-Makefile + $(srcdir)/../move-if-change tmp-Makefile Makefile + +dep-in: .dep + sed -e '/^..DO NOT DELETE THIS LINE/,$$d' < $(srcdir)/Makefile.in > tmp-Makefile.in + cat .dep >> tmp-Makefile.in + $(srcdir)/../move-if-change tmp-Makefile.in $(srcdir)/Makefile.in + +dep-am: .dep + sed -e '/^..DO NOT DELETE THIS LINE/,$$d' < $(srcdir)/Makefile.am > tmp-Makefile.am + cat .dep >> tmp-Makefile.am + $(srcdir)/../move-if-change tmp-Makefile.am $(srcdir)/Makefile.am + +.PHONY: dep dep-in dep-am + +# What appears below is generated by a hacked mkdep using gcc -MM. + +# DO NOT DELETE THIS LINE -- mkdep uses it. +# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. +a29k-dis.lo: a29k-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/a29k.h +alpha-dis.lo: alpha-dis.c $(INCDIR)/ansidecl.h sysdep.h \ + config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/alpha.h +alpha-opc.lo: alpha-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/alpha.h \ + $(BFD_H) +arm-dis.lo: arm-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h arm-opc.h $(INCDIR)/coff/internal.h \ + $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h +cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +d10v-dis.lo: d10v-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h \ + $(INCDIR)/dis-asm.h $(BFD_H) +d10v-opc.lo: d10v-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h +dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/dis-asm.h \ + $(BFD_H) +disassemble.lo: disassemble.c $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) +h8300-dis.lo: h8300-dis.c $(INCDIR)/opcode/h8300.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h +h8500-dis.lo: h8500-dis.c h8500-opc.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/ansidecl.h +hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h +i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h sysdep.h config.h +i960-dis.lo: i960-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h +m32r-asm.lo: m32r-asm.c sysdep.h config.h $(BFD_H) \ + $(INCDIR)/symcat.h m32r-opc.h $(INCDIR)/opcode/cgen.h +m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/symcat.h m32r-opc.h $(INCDIR)/opcode/cgen.h +m32r-opc.lo: m32r-opc.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h m32r-opc.h $(INCDIR)/opcode/cgen.h +m68k-dis.lo: m68k-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/floatformat.h $(INCDIR)/opcode/m68k.h +m68k-opc.lo: m68k-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/m68k.h +m88k-dis.lo: m88k-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/m88k.h +mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/opcode/mips.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h +mips-opc.lo: mips-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mips.h +mips16-opc.lo: mips16-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mips.h +m10200-dis.lo: m10200-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mn10200.h \ + $(INCDIR)/dis-asm.h $(BFD_H) +m10200-opc.lo: m10200-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mn10200.h +m10300-dis.lo: m10300-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mn10300.h \ + $(INCDIR)/dis-asm.h $(BFD_H) +m10300-opc.lo: m10300-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mn10300.h +ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \ + sysdep.h config.h $(INCDIR)/dis-asm.h $(INCDIR)/opcode/ns32k.h +ppc-dis.lo: ppc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ + config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ppc.h +ppc-opc.lo: ppc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/ppc.h +sh-dis.lo: sh-dis.c sh-opc.h $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h +sparc-dis.lo: sparc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ + config.h $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/libiberty.h +sparc-opc.lo: sparc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/sparc.h +tic30-dis.lo: tic30-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/tic30.h +w65-dis.lo: w65-dis.c w65-opc.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/ansidecl.h +z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ + $(BFD_H) z8k-opc.h +z8kgen.lo: z8kgen.c sysdep.h config.h +# IF YOU PUT ANYTHING HERE IT WILL GO AWAY diff --git a/contrib/binutils/opcodes/Makefile.in b/contrib/binutils/opcodes/Makefile.in index 5a0670e..b1d1b0f 100644 --- a/contrib/binutils/opcodes/Makefile.in +++ b/contrib/binutils/opcodes/Makefile.in @@ -1,78 +1,89 @@ -# Makefile template for Configure for the opcodes library. -# Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 1997 -# Free Software Foundation, Inc. -# Written by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# +# Makefile.in generated automatically by automake 1.2e from Makefile.am + +# Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + # This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. -VPATH = @srcdir@ -srcdir = @srcdir@ -prefix = @prefix@ +SHELL = @SHELL@ -program_transform_name = @program_transform_name@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +prefix = @prefix@ exec_prefix = @exec_prefix@ -bindir = @bindir@ -libdir = @libdir@ +bindir = @bindir@ +sbindir = @sbindir@ +libexecdir = @libexecdir@ datadir = @datadir@ -mandir = @mandir@ -man1dir = $(mandir)/man1 -man2dir = $(mandir)/man2 -man3dir = $(mandir)/man3 -man4dir = $(mandir)/man4 -man5dir = $(mandir)/man5 -man6dir = $(mandir)/man6 -man7dir = $(mandir)/man7 -man8dir = $(mandir)/man8 -man9dir = $(mandir)/man9 +sysconfdir = @sysconfdir@ +sharedstatedir = @sharedstatedir@ +localstatedir = @localstatedir@ +libdir = @libdir@ infodir = @infodir@ +mandir = @mandir@ includedir = @includedir@ +oldincludedir = /usr/include -SHELL = /bin/sh +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ + +top_builddir = . + +ACLOCAL = @ACLOCAL@ +AUTOCONF = @AUTOCONF@ +AUTOMAKE = @AUTOMAKE@ +AUTOHEADER = @AUTOHEADER@ INSTALL = @INSTALL@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_DATA = @INSTALL_DATA@ - +INSTALL_SCRIPT = @INSTALL_SCRIPT@ +transform = @program_transform_name@ + +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_alias = @build_alias@ +build_triplet = @build@ +host_alias = @host_alias@ +host_triplet = @host@ +target_alias = @target_alias@ +target_triplet = @target@ AR = @AR@ -AR_FLAGS = rc +BFD_MACHINES = @BFD_MACHINES@ CC = @CC@ -CFLAGS = @CFLAGS@ -MAKEINFO = makeinfo +EXEEXT = @EXEEXT@ +HDEFINES = @HDEFINES@ +LD = @LD@ +LIBTOOL = @LIBTOOL@ +LN_S = @LN_S@ +MAINT = @MAINT@ +MAKEINFO = @MAKEINFO@ +NM = @NM@ +PACKAGE = @PACKAGE@ RANLIB = @RANLIB@ +VERSION = @VERSION@ +archdefs = @archdefs@ -ALLLIBS = @ALLLIBS@ - -PICFLAG = @PICFLAG@ -SHLIB = @SHLIB@ -SHLIB_CC = @SHLIB_CC@ -SHLIB_CFLAGS = @SHLIB_CFLAGS@ -SHLIB_LIBS = @SHLIB_LIBS@ -COMMON_SHLIB = @COMMON_SHLIB@ -SHLIB_DEP = @SHLIB_DEP@ -SHLINK = @SHLINK@ - -SONAME = lib`echo $(SHLIB) | sed -e 's,^\.\./bfd/,,' -e 's/^lib//' | sed '$(program_transform_name)'` +AUTOMAKE_OPTIONS = cygnus INCDIR = $(srcdir)/../include BFDDIR = $(srcdir)/../bfd -CSEARCH = -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR) DEP = mkdep -TARGETLIB = libopcodes.a +lib_LTLIBRARIES = libopcodes.la # This is where bfd.h lives. BFD_H = ../bfd/bfd.h @@ -123,226 +134,372 @@ CFILES = \ sh-dis.c \ sparc-dis.c \ sparc-opc.c \ + tic30-dis.c \ w65-dis.c \ z8k-dis.c \ z8kgen.c ALL_MACHINES = \ - a29k-dis.o \ - alpha-dis.o \ - alpha-opc.o \ - arm-dis.o \ - cgen-asm.o \ - cgen-dis.o \ - cgen-opc.o \ - d10v-dis.o \ - d10v-opc.o \ - h8300-dis.o \ - h8500-dis.o \ - hppa-dis.o \ - i386-dis.o \ - i960-dis.o \ - m32r-asm.o \ - m32r-dis.o \ - m32r-opc.o \ - m68k-dis.o \ - m68k-opc.o \ - m88k-dis.o \ - m10200-dis.o \ - m10200-opc.o \ - m10300-dis.o \ - m10300-opc.o \ - mips-dis.o \ - mips-opc.o \ - mips16-opc.o \ - ppc-dis.o \ - ppc-opc.o \ - ns32k-dis.o \ - sh-dis.o \ - sparc-dis.o \ - sparc-opc.o \ - w65-dis.o \ - z8k-dis.o - -OFILES = @BFD_MACHINES@ dis-buf.o disassemble.o - -FLAGS_TO_PASS = \ - "against=$(against)" \ - "AR=$(AR)" \ - "AR_FLAGS=$(AR_FLAGS)" \ - "CC=$(CC)" \ - "CFLAGS=$(CFLAGS)" \ - "RANLIB=$(RANLIB)" \ - "MAKEINFO=$(MAKEINFO)" \ - "INSTALL=$(INSTALL)" \ - "INSTALL_DATA=$(INSTALL_DATA)" \ - "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" - -ALL_CFLAGS = -D_GNU_SOURCE $(CSEARCH) @HDEFINES@ $(CFLAGS) + a29k-dis.lo \ + alpha-dis.lo \ + alpha-opc.lo \ + arc-dis.lo \ + arc-opc.lo \ + arm-dis.lo \ + cgen-asm.lo \ + cgen-dis.lo \ + cgen-opc.lo \ + d10v-dis.lo \ + d10v-opc.lo \ + h8300-dis.lo \ + h8500-dis.lo \ + hppa-dis.lo \ + i386-dis.lo \ + i960-dis.lo \ + m32r-asm.lo \ + m32r-dis.lo \ + m32r-opc.lo \ + m68k-dis.lo \ + m68k-opc.lo \ + m88k-dis.lo \ + m10200-dis.lo \ + m10200-opc.lo \ + m10300-dis.lo \ + m10300-opc.lo \ + mips-dis.lo \ + mips-opc.lo \ + mips16-opc.lo \ + ppc-dis.lo \ + ppc-opc.lo \ + ns32k-dis.lo \ + sh-dis.lo \ + sparc-dis.lo \ + sparc-opc.lo \ + tic30-dis.lo \ + v850-dis.lo \ + v850-opc.lo \ + w65-dis.lo \ + z8k-dis.lo + +OFILES = @BFD_MACHINES@ + +INCLUDES = -D_GNU_SOURCE -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR) @HDEFINES@ + +libopcodes_la_SOURCES = dis-buf.c disassemble.c +libopcodes_la_DEPENDENCIES = $(OFILES) +libopcodes_la_LIBADD = $(OFILES) +libopcodes_la_LDFLAGS = -release $(VERSION) + +# libtool will build .libs/libopcodes.a. We create libopcodes.a in +# the build directory so that we don't have to convert all the +# programs that use libopcodes.a simultaneously. This is a hack which +# should be removed if everything else starts using libtool. FIXME. + +noinst_LIBRARIES = libopcodes.a + +CLEANFILES = libopcodes.a stamp-lib dep.sed .dep .dep1 +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs +CONFIG_HEADER = config.h +CONFIG_CLEAN_FILES = +LIBRARIES = $(noinst_LIBRARIES) + + +DEFS = @DEFS@ -I. -I$(srcdir) -I. +CPPFLAGS = @CPPFLAGS@ +LDFLAGS = @LDFLAGS@ +LIBS = @LIBS@ +libopcodes_a_LIBADD = +libopcodes_a_SOURCES = libopcodes.a.c +libopcodes_a_OBJECTS = libopcodes.a.o +LTLIBRARIES = $(lib_LTLIBRARIES) + +libopcodes_la_OBJECTS = dis-buf.lo disassemble.lo +CFLAGS = @CFLAGS@ +COMPILE = $(CC) $(DEFS) $(INCLUDES) $(CPPFLAGS) $(CFLAGS) +LTCOMPILE = $(LIBTOOL) --mode=compile $(CC) $(DEFS) $(INCLUDES) $(CPPFLAGS) $(CFLAGS) +LINK = $(LIBTOOL) --mode=link $(CC) $(CFLAGS) $(LDFLAGS) -o $@ +DIST_COMMON = ChangeLog Makefile.am Makefile.in acconfig.h acinclude.m4 \ +aclocal.m4 config.in configure configure.in stamp-h.in + + +DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) + +TAR = tar +GZIP = --best +SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES) +OBJECTS = libopcodes.a.o $(libopcodes_la_OBJECTS) + +default: all + +.SUFFIXES: +.SUFFIXES: .S .c .lo .o .s +$(srcdir)/Makefile.in: @MAINT@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4) + cd $(top_srcdir) && $(AUTOMAKE) --cygnus Makefile + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status + +$(ACLOCAL_M4): @MAINT@ configure.in acinclude.m4 + cd $(srcdir) && $(ACLOCAL) + +config.status: $(srcdir)/configure + $(SHELL) ./config.status --recheck +$(srcdir)/configure: @MAINT@$(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES) + cd $(srcdir) && $(AUTOCONF) + +config.h: stamp-h + @: +stamp-h: $(srcdir)/config.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES= CONFIG_HEADERS=config.h:config.in \ + $(SHELL) ./config.status + @echo timestamp > stamp-h +$(srcdir)/config.in: @MAINT@$(srcdir)/stamp-h.in +$(srcdir)/stamp-h.in: $(top_srcdir)/configure.in $(ACLOCAL_M4) acconfig.h + cd $(top_srcdir) && $(AUTOHEADER) + @echo timestamp > $(srcdir)/stamp-h.in + +mostlyclean-hdr: + +clean-hdr: + +distclean-hdr: + -rm -f config.h + +maintainer-clean-hdr: + +mostlyclean-noinstLIBRARIES: + +clean-noinstLIBRARIES: + -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES) + +distclean-noinstLIBRARIES: + +maintainer-clean-noinstLIBRARIES: .c.o: - if [ -n "$(PICFLAG)" ]; then \ - $(CC) -c $(PICFLAG) $(ALL_CFLAGS) $< -o pic/$@; \ - else true; fi - $(CC) -c $(ALL_CFLAGS) $< + $(COMPILE) -c $< -all: $(ALLLIBS) +.s.o: + $(COMPILE) -c $< -.NOEXPORT: +.S.o: + $(COMPILE) -c $< -installcheck check: +mostlyclean-compile: + -rm -f *.o core *.core -info: -clean-info: -install-info: -dvi: +clean-compile: -# HDEPFILES comes from the host config; TDEPFILES from the target config. - -$(TARGETLIB): $(OFILES) - rm -f $(TARGETLIB) - $(AR) $(AR_FLAGS) $(TARGETLIB) $(OFILES) - $(RANLIB) $(TARGETLIB) - -LIBIBERTY_LISTS = ../libiberty/required-list ../libiberty/needed-list -BFD_PICLIST = @BFD_PICLIST@ - -stamp-piclist: Makefile $(LIBIBERTY_LISTS) $(BFD_PICLIST) - rm -f tpiclist - if [ -n "$(PICFLAG)" ]; then \ - echo $(OFILES) | sed -e 's,\([^ ][^ ]*\),pic/\1,g' > tpiclist; \ - else \ - echo $(OFILES) > tpiclist; \ - fi - if [ "$(COMMON_SHLIB)" = "yes" ]; then \ - lobjs=`cat $(LIBIBERTY_LISTS)`; \ - if [ -n "$(PICFLAG)" ]; then \ - lobjs=`echo $$lobjs | sed -e 's,\([^ ][^ ]*\),pic/\1,g'`; \ - fi; \ - lobjs=`echo $$lobjs | sed -e 's,\([^ ][^ ]*\),../libiberty/\1,g'`; \ - echo $$lobjs >> tpiclist; \ - sed -e 's,\([^ ][^ ]*\),../bfd/\1,g' $(BFD_PICLIST) >> tpiclist; \ - else true; fi - $(srcdir)/../move-if-change tpiclist piclist - touch stamp-piclist - -piclist: stamp-piclist ; @true - -$(SHLIB): stamp-picdir $(OFILES) piclist $(SHLIB_DEP) - rm -f $(SHLIB) - $(SHLIB_CC) $(SHLIB_CFLAGS) -o $(SHLIB) `cat piclist` $(SHLIB_LIBS) - -$(SHLINK): $(SHLIB) - ts=lib`echo $(SHLIB) | sed -e 's,^\.\./bfd/,,' -e 's/^lib//' | sed -e '$(program_transform_name)'`; \ - if [ "$(COMMON_SHLIB)" = "yes" ]; then \ - ts=../bfd/$$ts; \ - fi; \ - if [ "$$ts" != "$(SHLIB)" ]; then \ - rm -f $$ts; \ - ln -s `echo $(SHLIB) | sed -e 's,^\.\./bfd/,,'` $$ts; \ - else true; fi - rm -f $(SHLINK) - ln -s `echo $(SHLIB) | sed -e 's,^\.\./bfd/,,'` $(SHLINK) - -# This target creates libTARGET-opcodes.so.VERSION as a symlink to -# libopcodes.so.VERSION. It is used on SunOS, which does not have SONAME. -stamp-tshlink: $(SHLIB) - tf=lib`echo $(SHLIB) | sed -e 's,\.\./bfd/,,' -e 's/^lib//' | sed '$(program_transform_name)'`; \ - if [ "$(COMMON_SHLIB)" = "yes" ]; then \ - tf=../bfd/$$tf; \ - fi; \ - if [ "$$tf" != "$(SHLIB)" ]; then \ - rm -f $$tf; \ - ln -s $(SHLIB) $$tf; \ - else true; fi - if [ "$(COMMON_SHLIB)" = "yes" ]; then \ - tf=lib`echo $(TARGETLIB) | sed -e 's/^lib//' | sed '$(program_transform_name)'`; \ - if [ "$$tf" != "$(TARGETLIB)" ]; then \ - rm -f $$tf; \ - ln -s $(TARGETLIB) $$tf; \ - else true; fi; \ - else true; fi - touch stamp-tshlink +distclean-compile: + -rm -f *.tab.c -$(OFILES): stamp-picdir +maintainer-clean-compile: -disassemble.o: disassemble.c $(INCDIR)/dis-asm.h - if [ -n "$(PICFLAG)" ]; then \ - $(CC) -c @archdefs@ $(PICFLAG) $(ALL_CFLAGS) $(srcdir)/disassemble.c -o pic/disassemble.o; \ - else true; fi - $(CC) -c @archdefs@ $(ALL_CFLAGS) $(srcdir)/disassemble.c - - -tags etags: TAGS - -TAGS: force - etags $(INCDIR)/*.h $(srcdir)/*.h $(srcdir)/*.c - -MOSTLYCLEAN = *.o core *.E *.p *.ip pic/*.o -mostlyclean: - rm -rf $(MOSTLYCLEAN) -clean: - rm -f *.a $(MOSTLYCLEAN) $(SHLIB) $(SHLINK) piclist stamp-piclist -distclean: clean - rm -rf Makefile config.status TAGS config.cache config.h stamp-h \ - pic stamp-picdir config.log -clobber realclean maintainer-clean: distclean - -# Mark everything as depending on config.status, since the timestamp on -# sysdep.h might actually move backwards if we reconfig and relink it -# to a different hosts/h-xxx.h file. This will force a recompile anyway. -RECONFIG = config.status - -# This target should be invoked before building a new release. -# 'VERSION' file must be present and contain a string of the form "x.y" -# -roll: - @V=`cat VERSION` ; \ - MAJ=`sed 's/\..*//' VERSION` ; \ - MIN=`sed 's/.*\.//' VERSION` ; \ - V=$$MAJ.`expr $$MIN + 1` ; \ - rm -f VERSION ; \ - echo $$V >VERSION ; \ - echo Version $$V - -# Dummy target to force execution of dependent targets. -# -force: - -install: $(ALLLIBS) - for f in $(ALLLIBS); do \ - if [ "$$f" = "stamp-tshlink" ]; then \ - continue; \ - fi; \ - tf=lib`echo $$f | sed -e 's,^\.\./bfd/,,' -e 's/^lib//' | sed '$(program_transform_name)'`; \ - rm -f $(libdir)/$$tf; \ - if [ "$$f" = "$(SHLINK)" ]; then \ - ts=lib`echo $(SHLIB) | sed -e 's,^\.\./bfd/,,' -e 's/^lib//' | sed '$(program_transform_name)'`; \ - ln -s $$ts $(libdir)/$$tf; \ - elif [ "$$f" = "$(SHLIB)" ]; then \ - @INSTALL_SHLIB@ \ - else \ - $(INSTALL_DATA) $$f $(libdir)/$$tf; \ - $(RANLIB) $(libdir)/$$tf; \ - chmod a-x $(libdir)/$$tf; \ - fi; \ - done +.c.lo: + $(LIBTOOL) --mode=compile $(COMPILE) -c $< + +.s.lo: + $(LIBTOOL) --mode=compile $(COMPILE) -c $< + +.S.lo: + $(LIBTOOL) --mode=compile $(COMPILE) -c $< + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs + +distclean-libtool: -Makefile: Makefile.in config.status - CONFIG_FILES=Makefile CONFIG_HEADERS= $(SHELL) ./config.status +maintainer-clean-libtool: -config.h: stamp-h ; @true -stamp-h: config.in config.status - CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status +mostlyclean-libLTLIBRARIES: -config.status: configure $(srcdir)/../bfd/configure.host $(srcdir)/../bfd/config.bfd $(srcdir)/../bfd/VERSION - $(SHELL) config.status --recheck +clean-libLTLIBRARIES: + -test -z "$(lib_LTLIBRARIES)" || rm -f $(lib_LTLIBRARIES) -stamp-picdir: - if [ -n "$(PICFLAG)" ] && [ ! -d pic ]; then \ - mkdir pic; \ +distclean-libLTLIBRARIES: + +maintainer-clean-libLTLIBRARIES: + +install-libLTLIBRARIES: $(lib_LTLIBRARIES) + @$(NORMAL_INSTALL) + $(mkinstalldirs) $(libdir) + @list='$(lib_LTLIBRARIES)'; for p in $$list; do \ + if test -f $$p; then \ + echo "$(LIBTOOL) --mode=install $(INSTALL_DATA) $$p $(libdir)/$$p"; \ + $(LIBTOOL) --mode=install $(INSTALL_DATA) $$p $(libdir)/$$p; \ + else :; fi; \ + done + +uninstall-libLTLIBRARIES: + $(NORMAL_UNINSTALL) + list='$(lib_LTLIBRARIES)'; for p in $$list; do \ + $(LIBTOOL) --mode=uninstall rm -f $(libdir)/$$p; \ + done + +libopcodes.la: $(libopcodes_la_OBJECTS) $(libopcodes_la_DEPENDENCIES) + $(LINK) -rpath $(libdir) $(libopcodes_la_LDFLAGS) $(libopcodes_la_OBJECTS) $(libopcodes_la_LIBADD) $(LIBS) + +tags: TAGS + +ID: $(HEADERS) $(SOURCES) $(LISP) + here=`pwd` && cd $(srcdir) \ + && mkid -f$$here/ID $(SOURCES) $(HEADERS) $(LISP) + +TAGS: $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) $(LISP) + tags=; \ + here=`pwd`; \ + list='$(SOURCES) $(HEADERS)'; \ + unique=`for i in $$list; do echo $$i; done | \ + awk ' { files[$$0] = 1; } \ + END { for (i in files) print i; }'`; \ + test -z "$(ETAGS_ARGS)config.in$$unique$(LISP)$$tags" \ + || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags config.in $$unique $(LISP) -o $$here/TAGS) + +mostlyclean-tags: + +clean-tags: + +distclean-tags: + -rm -f TAGS ID + +maintainer-clean-tags: + +distdir = $(PACKAGE)-$(VERSION) +top_distdir = $(distdir) + +# This target untars the dist file and tries a VPATH configuration. Then +# it guarantees that the distribution is self-contained by making another +# tarfile. +distcheck: dist + -rm -rf $(distdir) + GZIP=$(GZIP) $(TAR) zxf $(distdir).tar.gz + mkdir $(distdir)/=build + mkdir $(distdir)/=inst + dc_install_base=`cd $(distdir)/=inst && pwd`; \ + cd $(distdir)/=build \ + && ../configure --srcdir=.. --prefix=$$dc_install_base \ + && $(MAKE) \ + && $(MAKE) dvi \ + && $(MAKE) check \ + && $(MAKE) install \ + && $(MAKE) installcheck \ + && $(MAKE) dist + -rm -rf $(distdir) + @echo "========================"; \ + echo "$(distdir).tar.gz is ready for distribution"; \ + echo "========================" +dist: distdir + -chmod -R a+r $(distdir) + GZIP=$(GZIP) $(TAR) chozf $(distdir).tar.gz $(distdir) + -rm -rf $(distdir) +dist-all: distdir + -chmod -R a+r $(distdir) + GZIP=$(GZIP) $(TAR) chozf $(distdir).tar.gz $(distdir) + -rm -rf $(distdir) +distdir: $(DISTFILES) + -rm -rf $(distdir) + mkdir $(distdir) + -chmod 777 $(distdir) + @for file in $(DISTFILES); do \ + if test -f $$file; then d=.; else d=$(srcdir); fi; \ + test -f $(distdir)/$$file \ + || ln $$d/$$file $(distdir)/$$file 2> /dev/null \ + || cp -p $$d/$$file $(distdir)/$$file; \ + done +info: +dvi: +check: + $(MAKE) +installcheck: +install-info: +install-exec: install-libLTLIBRARIES + @$(NORMAL_INSTALL) + +install-data: + @$(NORMAL_INSTALL) + +install: install-exec install-data all + @: + +uninstall: uninstall-libLTLIBRARIES + +all: Makefile $(LIBRARIES) $(LTLIBRARIES) config.h + +install-strip: + $(MAKE) INSTALL_PROGRAM='$(INSTALL_PROGRAM) -s' INSTALL_SCRIPT='$(INSTALL_PROGRAM)' install +installdirs: + $(mkinstalldirs) $(libdir) + + +mostlyclean-generic: + -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES) + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -rm -f Makefile $(DISTCLEANFILES) + -rm -f config.cache config.log stamp-h stamp-h[0-9]* + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + +maintainer-clean-generic: + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) + -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) +mostlyclean: mostlyclean-hdr mostlyclean-noinstLIBRARIES \ + mostlyclean-compile mostlyclean-libtool \ + mostlyclean-libLTLIBRARIES mostlyclean-tags \ + mostlyclean-generic + +clean: clean-hdr clean-noinstLIBRARIES clean-compile clean-libtool \ + clean-libLTLIBRARIES clean-tags clean-generic \ + mostlyclean + +distclean: distclean-hdr distclean-noinstLIBRARIES distclean-compile \ + distclean-libtool distclean-libLTLIBRARIES \ + distclean-tags distclean-generic clean + -rm -f config.status + -rm -f libtool + +maintainer-clean: maintainer-clean-hdr maintainer-clean-noinstLIBRARIES \ + maintainer-clean-compile maintainer-clean-libtool \ + maintainer-clean-libLTLIBRARIES maintainer-clean-tags \ + maintainer-clean-generic distclean + @echo "This command is intended for maintainers to use;" + @echo "it deletes files that may require special tools to rebuild." + -rm -f config.status + +.PHONY: default mostlyclean-hdr distclean-hdr clean-hdr \ +maintainer-clean-hdr mostlyclean-noinstLIBRARIES \ +distclean-noinstLIBRARIES clean-noinstLIBRARIES \ +maintainer-clean-noinstLIBRARIES mostlyclean-compile distclean-compile \ +clean-compile maintainer-clean-compile mostlyclean-libtool \ +distclean-libtool clean-libtool maintainer-clean-libtool \ +mostlyclean-libLTLIBRARIES distclean-libLTLIBRARIES \ +clean-libLTLIBRARIES maintainer-clean-libLTLIBRARIES \ +uninstall-libLTLIBRARIES install-libLTLIBRARIES tags mostlyclean-tags \ +distclean-tags clean-tags maintainer-clean-tags distdir info dvi \ +installcheck install-info install-exec install-data install uninstall \ +all installdirs mostlyclean-generic distclean-generic clean-generic \ +maintainer-clean-generic clean mostlyclean distclean maintainer-clean + + +disassemble.lo: disassemble.c $(INCDIR)/dis-asm.h + $(LIBTOOL) --mode=compile $(COMPILE) -c @archdefs@ $(srcdir)/disassemble.c + +stamp-lib: libopcodes.la + if [ -f .libs/libopcodes.a ]; then \ + cp .libs/libopcodes.a libopcodes.tmp; \ + $(SHELL) $(srcdir)/../move-if-change libopcodes.tmp libopcodes.a; \ else true; fi - touch stamp-picdir + touch stamp-lib + +libopcodes.a: stamp-lib ; @true # This dependency stuff is copied from BFD. @@ -355,7 +512,7 @@ stamp-picdir: rm -f .dep2 .dep2a echo '# DO NOT DELETE THIS LINE -- mkdep uses it.' > .dep2 echo > .dep2a - $(DEP) -f .dep2a $(ALL_CFLAGS) $? + $(DEP) -f .dep2a $(INCLUDES) $(CFLAGS) $? sed -e '/DO NOT DELETE/d' -e '/^$$/d' < .dep2a >> .dep2 rm -f .dep2a $(srcdir)/../move-if-change .dep2 .dep1 @@ -377,80 +534,92 @@ dep-in: .dep cat .dep >> tmp-Makefile.in $(srcdir)/../move-if-change tmp-Makefile.in $(srcdir)/Makefile.in -.PHONY: dep dep-in +dep-am: .dep + sed -e '/^..DO NOT DELETE THIS LINE/,$$d' < $(srcdir)/Makefile.am > tmp-Makefile.am + cat .dep >> tmp-Makefile.am + $(srcdir)/../move-if-change tmp-Makefile.am $(srcdir)/Makefile.am + +.PHONY: dep dep-in dep-am # What appears below is generated by a hacked mkdep using gcc -MM. # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. -a29k-dis.o: a29k-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ +a29k-dis.lo: a29k-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/opcode/a29k.h -alpha-dis.o: alpha-dis.c $(INCDIR)/ansidecl.h sysdep.h \ +alpha-dis.lo: alpha-dis.c $(INCDIR)/ansidecl.h sysdep.h \ config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/alpha.h -alpha-opc.o: alpha-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/alpha.h \ +alpha-opc.lo: alpha-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/alpha.h \ $(BFD_H) -arm-dis.o: arm-dis.c $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ - arm-opc.h -cgen-asm.o: cgen-asm.c config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/opcode/cgen.h -cgen-dis.o: cgen-dis.c config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/opcode/cgen.h -cgen-opc.o: cgen-opc.c config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/opcode/cgen.h -d10v-dis.o: d10v-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h \ +arm-dis.lo: arm-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h arm-opc.h $(INCDIR)/coff/internal.h \ + $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h +cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h +d10v-dis.lo: d10v-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h \ $(INCDIR)/dis-asm.h $(BFD_H) -d10v-opc.o: d10v-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h -dis-buf.o: dis-buf.c sysdep.h config.h $(INCDIR)/dis-asm.h \ - $(BFD_H) -disassemble.o: disassemble.c $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h \ +d10v-opc.lo: d10v-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/d10v.h +dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/dis-asm.h \ $(BFD_H) -h8300-dis.o: h8300-dis.c $(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h \ - $(BFD_H) $(INCDIR)/ansidecl.h -h8500-dis.o: h8500-dis.c h8500-opc.h $(INCDIR)/dis-asm.h \ +disassemble.lo: disassemble.c $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) +h8300-dis.lo: h8300-dis.c $(INCDIR)/opcode/h8300.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h +h8500-dis.lo: h8500-dis.c h8500-opc.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(INCDIR)/ansidecl.h -hppa-dis.o: hppa-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ +hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h -i386-dis.o: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ +i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h sysdep.h config.h -i960-dis.o: i960-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ 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$(INCDIR)/dis-asm.h $(BFD_H) \ +ppc-opc.lo: ppc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/ppc.h +sh-dis.lo: sh-dis.c sh-opc.h $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h -sparc-dis.o: sparc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ +sparc-dis.lo: sparc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ config.h $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(INCDIR)/libiberty.h -sparc-opc.o: sparc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/sparc.h -w65-dis.o: w65-dis.c w65-opc.h $(INCDIR)/dis-asm.h \ +sparc-opc.lo: sparc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/sparc.h +tic30-dis.lo: tic30-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/tic30.h +w65-dis.lo: w65-dis.c w65-opc.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(INCDIR)/ansidecl.h -z8k-dis.o: z8k-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ +z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \ $(BFD_H) z8k-opc.h -z8kgen.o: z8kgen.c sysdep.h config.h +z8kgen.lo: z8kgen.c sysdep.h config.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/contrib/binutils/opcodes/acconfig.h b/contrib/binutils/opcodes/acconfig.h new file mode 100644 index 0000000..ef2f496 --- /dev/null +++ b/contrib/binutils/opcodes/acconfig.h @@ -0,0 +1,6 @@ + +/* Name of package. */ +#undef PACKAGE + +/* Version of package. */ +#undef VERSION diff --git a/contrib/binutils/opcodes/acinclude.m4 b/contrib/binutils/opcodes/acinclude.m4 new file mode 100644 index 0000000..71b09b9 --- /dev/null +++ b/contrib/binutils/opcodes/acinclude.m4 @@ -0,0 +1 @@ +sinclude(../bfd/acinclude.m4) diff --git a/contrib/binutils/opcodes/aclocal.m4 b/contrib/binutils/opcodes/aclocal.m4 index 7adc004..ea7ce9b 100644 --- a/contrib/binutils/opcodes/aclocal.m4 +++ b/contrib/binutils/opcodes/aclocal.m4 @@ -1 +1,460 @@ -sinclude(../bfd/aclocal.m4) +dnl aclocal.m4 generated automatically by aclocal 1.2e + +dnl Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. +dnl This Makefile.in is free software; the Free Software Foundation +dnl gives unlimited permission to copy and/or distribute it, +dnl with or without modifications, as long as this notice is preserved. + +dnl This program is distributed in the hope that it will be useful, +dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without +dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A +dnl PARTICULAR PURPOSE. + +sinclude(../bfd/acinclude.m4) + +# Do all the work for Automake. This macro actually does too much -- +# some checks are only needed if your package does certain things. +# But this isn't really a big deal. + +# serial 1 + +dnl Usage: +dnl AM_INIT_AUTOMAKE(package,version, [no-define]) + +AC_DEFUN(AM_INIT_AUTOMAKE, +[AC_REQUIRE([AM_PROG_INSTALL]) +PACKAGE=[$1] +AC_SUBST(PACKAGE) +VERSION=[$2] +AC_SUBST(VERSION) +dnl test to see if srcdir already configured +if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then + AC_MSG_ERROR([source directory already configured; run "make distclean" there first]) +fi +ifelse([$3],, +AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE") +AC_DEFINE_UNQUOTED(VERSION, "$VERSION")) +AC_REQUIRE([AM_SANITY_CHECK]) +AC_REQUIRE([AC_ARG_PROGRAM]) +dnl FIXME This is truly gross. +missing_dir=`cd $ac_aux_dir && pwd` +AM_MISSING_PROG(ACLOCAL, aclocal, $missing_dir) +AM_MISSING_PROG(AUTOCONF, autoconf, $missing_dir) +AM_MISSING_PROG(AUTOMAKE, automake, $missing_dir) +AM_MISSING_PROG(AUTOHEADER, autoheader, $missing_dir) +AM_MISSING_PROG(MAKEINFO, makeinfo, $missing_dir) +AC_REQUIRE([AC_PROG_MAKE_SET])]) + + +# serial 1 + +AC_DEFUN(AM_PROG_INSTALL, +[AC_REQUIRE([AC_PROG_INSTALL]) +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' +AC_SUBST(INSTALL_SCRIPT)dnl +]) + +# +# Check to make sure that the build environment is sane. +# + +AC_DEFUN(AM_SANITY_CHECK, +[AC_MSG_CHECKING([whether build environment is sane]) +# Just in case +sleep 1 +echo timestamp > conftestfile +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null` + if test "[$]*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftestfile` + fi + if test "[$]*" != "X $srcdir/configure conftestfile" \ + && test "[$]*" != "X conftestfile $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken +alias in your environment]) + fi + + test "[$]2" = conftestfile + ) +then + # Ok. + : +else + AC_MSG_ERROR([newly created file is older than distributed files! +Check your system clock]) +fi +rm -f conftest* +AC_MSG_RESULT(yes)]) + +dnl AM_MISSING_PROG(NAME, PROGRAM, DIRECTORY) +dnl The program must properly implement --version. +AC_DEFUN(AM_MISSING_PROG, +[AC_MSG_CHECKING(for working $2) +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if ($2 --version) < /dev/null > /dev/null 2>&1; then + $1=$2 + AC_MSG_RESULT(found) +else + $1="$3/missing $2" + AC_MSG_RESULT(missing) +fi +AC_SUBST($1)]) + + +# serial 24 AM_PROG_LIBTOOL +AC_DEFUN(AM_PROG_LIBTOOL, +[AC_REQUIRE([AM_ENABLE_SHARED])dnl +AC_REQUIRE([AM_ENABLE_STATIC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_PROG_RANLIB])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AM_PROG_LD])dnl +AC_REQUIRE([AM_PROG_NM])dnl +AC_REQUIRE([AC_PROG_LN_S])dnl +dnl +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +# Check for any special flags to pass to ltconfig. +libtool_flags= +test "$enable_shared" = no && libtool_flags="$libtool_flags --disable-shared" +test "$enable_static" = no && libtool_flags="$libtool_flags --disable-static" +test "$silent" = yes && libtool_flags="$libtool_flags --silent" +test "$ac_cv_prog_gcc" = yes && libtool_flags="$libtool_flags --with-gcc" +test "$ac_cv_prog_gnu_ld" = yes && libtool_flags="$libtool_flags --with-gnu-ld" + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case "$host" in +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line __oline__ "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case "`/usr/bin/file conftest.o`" in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + CFLAGS="$CFLAGS -belf" + ;; +esac + +# Actually configure libtool. ac_aux_dir is where install-sh is found. +CC="$CC" CFLAGS="$CFLAGS" CPPFLAGS="$CPPFLAGS" \ +LD="$LD" NM="$NM" RANLIB="$RANLIB" LN_S="$LN_S" \ +${CONFIG_SHELL-/bin/sh} $ac_aux_dir/ltconfig \ +$libtool_flags --no-verify $ac_aux_dir/ltmain.sh $host \ +|| AC_MSG_ERROR([libtool configure failed]) +]) + +# AM_ENABLE_SHARED - implement the --enable-shared flag +# Usage: AM_ENABLE_SHARED[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN(AM_ENABLE_SHARED, +[define([AM_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(shared, +changequote(<<, >>)dnl +<< --enable-shared build shared libraries [default=>>AM_ENABLE_SHARED_DEFAULT] +changequote([, ])dnl +[ --enable-shared=PKGS only build shared libraries if the current package + appears as an element in the PKGS list], +[p=${PACKAGE-default} +case "$enableval" in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_shared=AM_ENABLE_SHARED_DEFAULT)dnl +]) + +# AM_DISABLE_SHARED - set the default shared flag to --disable-shared +AC_DEFUN(AM_DISABLE_SHARED, +[AM_ENABLE_SHARED(no)]) + +# AM_DISABLE_STATIC - set the default static flag to --disable-static +AC_DEFUN(AM_DISABLE_STATIC, +[AM_ENABLE_STATIC(no)]) + +# AM_ENABLE_STATIC - implement the --enable-static flag +# Usage: AM_ENABLE_STATIC[(DEFAULT)] +# Where DEFAULT is either `yes' or `no'. If omitted, it defaults to +# `yes'. +AC_DEFUN(AM_ENABLE_STATIC, +[define([AM_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl +AC_ARG_ENABLE(static, +changequote(<<, >>)dnl +<< --enable-static build static libraries [default=>>AM_ENABLE_STATIC_DEFAULT] +changequote([, ])dnl +[ --enable-static=PKGS only build shared libraries if the current package + appears as an element in the PKGS list], +[p=${PACKAGE-default} +case "$enableval" in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac], +enable_static=AM_ENABLE_STATIC_DEFAULT)dnl +]) + + +# AM_PROG_LD - find the path to the GNU or non-GNU linker +AC_DEFUN(AM_PROG_LD, +[AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld assume the C compiler uses GNU ld [default=no]], +test "$withval" = no || with_gnu_ld=yes, with_gnu_ld=no) +AC_REQUIRE([AC_PROG_CC]) +ac_prog=ld +if test "$ac_cv_prog_gcc" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by GCC]) + ac_prog=`($CC -print-prog-name=ld) 2>&5` + case "$ac_prog" in + # Accept absolute paths. +changequote(,)dnl + /* | [A-Za-z]:\\*) +changequote([,])dnl + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(ac_cv_path_LD, +[if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog"; then + ac_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$ac_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + ac_cv_path_LD="$LD" # Let the user override the test with a path. +fi]) +LD="$ac_cv_path_LD" +if test -n "$LD"; then + AC_MSG_RESULT($LD) +else + AC_MSG_RESULT(no) +fi +test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH]) +AC_SUBST(LD) +AM_PROG_LD_GNU +]) + +AC_DEFUN(AM_PROG_LD_GNU, +[AC_CACHE_CHECK([if the linker ($LD) is GNU ld], ac_cv_prog_gnu_ld, +[# I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 </dev/null | egrep '(GNU|with BFD)' 1>&5; then + ac_cv_prog_gnu_ld=yes +else + ac_cv_prog_gnu_ld=no +fi]) +]) + +# AM_PROG_NM - find the path to a BSD-compatible name lister +AC_DEFUN(AM_PROG_NM, +[AC_MSG_CHECKING([for BSD-compatible nm]) +AC_CACHE_VAL(ac_cv_path_NM, +[case "$NM" in +changequote(,)dnl +/* | [A-Za-z]:\\*) +changequote([,])dnl + ac_cv_path_NM="$NM" # Let the user override the test with a path. + ;; +*) + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in /usr/ucb /usr/ccs/bin $PATH /bin; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/nm; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + if ($ac_dir/nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + ac_cv_path_NM="$ac_dir/nm -B" + elif ($ac_dir/nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + ac_cv_path_NM="$ac_dir/nm -p" + else + ac_cv_path_NM="$ac_dir/nm" + fi + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_path_NM" && ac_cv_path_NM=nm + ;; +esac]) +NM="$ac_cv_path_NM" +AC_MSG_RESULT([$NM]) +AC_SUBST(NM) +]) + +# Like AC_CONFIG_HEADER, but automatically create stamp file. + +AC_DEFUN(AM_CONFIG_HEADER, +[AC_PREREQ([2.12]) +AC_CONFIG_HEADER([$1]) +dnl When config.status generates a header, we must update the stamp-h file. +dnl This file resides in the same directory as the config header +dnl that is generated. We must strip everything past the first ":", +dnl and everything past the last "/". +AC_OUTPUT_COMMANDS(changequote(<<,>>)dnl +ifelse(patsubst(<<$1>>, <<[^ ]>>, <<>>), <<>>, +<<test -z "<<$>>CONFIG_HEADERS" || echo timestamp > patsubst(<<$1>>, <<^\([^:]*/\)?.*>>, <<\1>>)stamp-h<<>>dnl>>, +<<am_indx=1 +for am_file in <<$1>>; do + case " <<$>>CONFIG_HEADERS " in + *" <<$>>am_file "*<<)>> + echo timestamp > `echo <<$>>am_file | sed -e 's%:.*%%' -e 's%[^/]*$%%'`stamp-h$am_indx + ;; + esac + am_indx=`expr "<<$>>am_indx" + 1` +done<<>>dnl>>) +changequote([,]))]) + +# Add --enable-maintainer-mode option to configure. +# From Jim Meyering + +# serial 1 + +AC_DEFUN(AM_MAINTAINER_MODE, +[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) + dnl maintainer-mode is disabled by default + AC_ARG_ENABLE(maintainer-mode, +[ --enable-maintainer-mode enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer], + USE_MAINTAINER_MODE=$enableval, + USE_MAINTAINER_MODE=no) + AC_MSG_RESULT($USE_MAINTAINER_MODE) + if test $USE_MAINTAINER_MODE = yes; then + MAINT= + else + MAINT='#M#' + fi + AC_SUBST(MAINT)dnl +] +) + +# Check to see if we're running under Cygwin32, without using +# AC_CANONICAL_*. If so, set output variable CYGWIN32 to "yes". +# Otherwise set it to "no". + +dnl AM_CYGWIN32() +AC_DEFUN(AM_CYGWIN32, +[AC_CACHE_CHECK(for Cygwin32 environment, am_cv_cygwin32, +[AC_TRY_COMPILE(,[return __CYGWIN32__;], +am_cv_cygwin32=yes, am_cv_cygwin32=no) +rm -f conftest*]) +CYGWIN32= +test "$am_cv_cygwin32" = yes && CYGWIN32=yes]) + +# Check to see if we're running under Win32, without using +# AC_CANONICAL_*. If so, set output variable EXEEXT to ".exe". +# Otherwise set it to "". + +dnl AM_EXEEXT() +dnl This knows we add .exe if we're building in the Cygwin32 +dnl environment. But if we're not, then it compiles a test program +dnl to see if there is a suffix for executables. +AC_DEFUN(AM_EXEEXT, +[AC_REQUIRE([AM_CYGWIN32]) +AC_REQUIRE([AM_MINGW32]) +AC_MSG_CHECKING([for executable suffix]) +AC_CACHE_VAL(am_cv_exeext, +[if test "$CYGWIN32" = yes || test "$MINGW32" = yes; then +am_cv_exeext=.exe +else +cat > am_c_test.c << 'EOF' +int main() { +/* Nothing needed here */ +} +EOF +${CC-cc} -o am_c_test $CFLAGS $CPPFLAGS $LDFLAGS am_c_test.c $LIBS 1>&5 +am_cv_exeext=`echo am_c_test.* | grep -v am_c_test.c | sed -e s/am_c_test//` +rm -f am_c_test*]) +test x"${am_cv_exeext}" = x && am_cv_exeext=no +fi +EXEEXT="" +test x"${am_cv_exeext}" != xno && EXEEXT=${am_cv_exeext} +AC_MSG_RESULT(${am_cv_exeext}) +AC_SUBST(EXEEXT)]) + +# Check to see if we're running under Mingw, without using +# AC_CANONICAL_*. If so, set output variable MINGW32 to "yes". +# Otherwise set it to "no". + +dnl AM_MINGW32() +AC_DEFUN(AM_MINGW32, +[AC_CACHE_CHECK(for Mingw32 environment, am_cv_mingw32, +[AC_TRY_COMPILE(,[return __MINGW32__;], +am_cv_mingw32=yes, am_cv_mingw32=no) +rm -f conftest*]) +MINGW32= +test "$am_cv_mingw32" = yes && MINGW32=yes]) + diff --git a/contrib/binutils/opcodes/alpha-opc.c b/contrib/binutils/opcodes/alpha-opc.c index cf836b2..46b7223 100644 --- a/contrib/binutils/opcodes/alpha-opc.c +++ b/contrib/binutils/opcodes/alpha-opc.c @@ -860,8 +860,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/um", FP(0x16,0x162), BASE, ARG_FP }, { "divt/um", FP(0x16,0x163), BASE, ARG_FP }, { "cvtts/um", FP(0x16,0x16C), BASE, ARG_FPZ1 }, - { "cvttq/um", FP(0x16,0x16F), BASE, ARG_FPZ1 }, - { "cvtqs/um", FP(0x16,0x17C), BASE, ARG_FPZ1 }, + { "cvttq/vm", FP(0x16,0x16F), BASE, ARG_FPZ1 }, { "adds/u", FP(0x16,0x180), BASE, ARG_FP }, { "subs/u", FP(0x16,0x181), BASE, ARG_FP }, { "muls/u", FP(0x16,0x182), BASE, ARG_FP }, @@ -881,7 +880,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/ud", FP(0x16,0x1E2), BASE, ARG_FP }, { "divt/ud", FP(0x16,0x1E3), BASE, ARG_FP }, { "cvtts/ud", FP(0x16,0x1EC), BASE, ARG_FPZ1 }, - { "cvttq/ud", FP(0x16,0x1EF), BASE, ARG_FPZ1 }, + { "cvttq/vd", FP(0x16,0x1EF), BASE, ARG_FPZ1 }, { "cvtst", FP(0x16,0x2AC), BASE, ARG_FPZ1 }, { "adds/suc", FP(0x16,0x500), BASE, ARG_FP }, { "subs/suc", FP(0x16,0x501), BASE, ARG_FP }, @@ -902,8 +901,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/sum", FP(0x16,0x562), BASE, ARG_FP }, { "divt/sum", FP(0x16,0x563), BASE, ARG_FP }, { "cvtts/sum", FP(0x16,0x56C), BASE, ARG_FPZ1 }, - { "cvttq/sum", FP(0x16,0x56F), BASE, ARG_FPZ1 }, - { "cvtqs/sum", FP(0x16,0x57C), BASE, ARG_FPZ1 }, + { "cvttq/svm", FP(0x16,0x56F), BASE, ARG_FPZ1 }, { "adds/su", FP(0x16,0x580), BASE, ARG_FP }, { "negs/su", FP(0x16,0x581), BASE, ARG_FPZ1 }, /* pseudo */ { "subs/su", FP(0x16,0x581), BASE, ARG_FP }, @@ -929,7 +927,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/sud", FP(0x16,0x5E2), BASE, ARG_FP }, { "divt/sud", FP(0x16,0x5E3), BASE, ARG_FP }, { "cvtts/sud", FP(0x16,0x5EC), BASE, ARG_FPZ1 }, - { "cvttq/sud", FP(0x16,0x5EF), BASE, ARG_FPZ1 }, + { "cvttq/svd", FP(0x16,0x5EF), BASE, ARG_FPZ1 }, { "cvtst/s", FP(0x16,0x6AC), BASE, ARG_FPZ1 }, { "adds/suic", FP(0x16,0x700), BASE, ARG_FP }, { "subs/suic", FP(0x16,0x701), BASE, ARG_FP }, @@ -952,7 +950,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/suim", FP(0x16,0x762), BASE, ARG_FP }, { "divt/suim", FP(0x16,0x763), BASE, ARG_FP }, { "cvtts/suim", FP(0x16,0x76C), BASE, ARG_FPZ1 }, - { "cvttq/suim", FP(0x16,0x76F), BASE, ARG_FPZ1 }, + { "cvttq/svim", FP(0x16,0x76F), BASE, ARG_FPZ1 }, { "cvtqs/suim", FP(0x16,0x77C), BASE, ARG_FPZ1 }, { "cvtqt/suim", FP(0x16,0x77E), BASE, ARG_FPZ1 }, { "adds/sui", FP(0x16,0x780), BASE, ARG_FP }, @@ -978,7 +976,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "mult/suid", FP(0x16,0x7E2), BASE, ARG_FP }, { "divt/suid", FP(0x16,0x7E3), BASE, ARG_FP }, { "cvtts/suid", FP(0x16,0x7EC), BASE, ARG_FPZ1 }, - { "cvttq/suid", FP(0x16,0x7EF), BASE, ARG_FPZ1 }, + { "cvttq/svid", FP(0x16,0x7EF), BASE, ARG_FPZ1 }, { "cvtqs/suid", FP(0x16,0x7FC), BASE, ARG_FPZ1 }, { "cvtqt/suid", FP(0x16,0x7FE), BASE, ARG_FPZ1 }, @@ -1268,7 +1266,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "pal1d", PCD(0x1D), BASE, ARG_PCD }, { "hw_rei", SPCD(0x1E,0x3FF8000), EV4|EV5, ARG_NONE }, - { "hw_rei_stBASE", SPCD(0x1E,0x3FFC000), EV5, ARG_NONE }, + { "hw_rei_stall", SPCD(0x1E,0x3FFC000), EV5, ARG_NONE }, { "pal1e", PCD(0x1E), BASE, ARG_PCD }, { "hw_stl", EV4HWMEM(0x1F,0x0), EV4, ARG_EV4HWMEM }, diff --git a/contrib/binutils/opcodes/arc-dis.c b/contrib/binutils/opcodes/arc-dis.c new file mode 100644 index 0000000..3a597aa --- /dev/null +++ b/contrib/binutils/opcodes/arc-dis.c @@ -0,0 +1,266 @@ +/* Instruction printing code for the ARC. + Copyright (C) 1994, 1995, 1997, 1998 Free Software Foundation, Inc. + Contributed by Doug Evans (dje@cygnus.com). + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "dis-asm.h" +#include "opcode/arc.h" +#include "elf-bfd.h" +#include "elf/arc.h" + +static int print_insn_arc_base_little PARAMS ((bfd_vma, disassemble_info *)); +static int print_insn_arc_base_big PARAMS ((bfd_vma, disassemble_info *)); + +static int print_insn PARAMS ((bfd_vma, disassemble_info *, int, int)); + +/* Print one instruction from PC on INFO->STREAM. + Return the size of the instruction (4 or 8 for the ARC). */ + +static int +print_insn (pc, info, mach, big_p) + bfd_vma pc; + disassemble_info *info; + int mach; + int big_p; +{ + const struct arc_opcode *opcode; + bfd_byte buffer[4]; + void *stream = info->stream; + fprintf_ftype func = info->fprintf_func; + int status; + /* First element is insn, second element is limm (if present). */ + arc_insn insn[2]; + int got_limm_p = 0; + static int initialized = 0; + static int current_mach = 0; + + if (!initialized || mach != current_mach) + { + initialized = 1; + current_mach = arc_get_opcode_mach (mach, big_p); + arc_opcode_init_tables (current_mach); + } + + status = (*info->read_memory_func) (pc, buffer, 4, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + if (big_p) + insn[0] = bfd_getb32 (buffer); + else + insn[0] = bfd_getl32 (buffer); + + (*func) (stream, "%08lx\t", insn[0]); + + /* The instructions are stored in lists hashed by the insn code + (though we needn't care how they're hashed). */ + + opcode = arc_opcode_lookup_dis (insn[0]); + for ( ; opcode != NULL; opcode = ARC_OPCODE_NEXT_DIS (opcode)) + { + char *syn; + int mods,invalid; + long value; + const struct arc_operand *operand; + const struct arc_operand_value *opval; + + /* Basic bit mask must be correct. */ + if ((insn[0] & opcode->mask) != opcode->value) + continue; + + /* Supported by this cpu? */ + if (! arc_opcode_supported (opcode)) + continue; + + /* Make two passes over the operands. First see if any of them + have extraction functions, and, if they do, make sure the + instruction is valid. */ + + arc_opcode_init_extract (); + invalid = 0; + + /* ??? Granted, this is slower than the `ppc' way. Maybe when this is + done it'll be clear what the right way to do this is. */ + /* Instructions like "add.f r0,r1,1" are tricky because the ".f" gets + printed first, but we don't know how to print it until we've processed + the regs. Since we're scanning all the args before printing the insn + anyways, it's actually quite easy. */ + + for (syn = opcode->syntax; *syn; ++syn) + { + int c; + + if (*syn != '%' || *++syn == '%') + continue; + mods = 0; + c = *syn; + while (ARC_MOD_P (arc_operands[arc_operand_map[c]].flags)) + { + mods |= arc_operands[arc_operand_map[c]].flags & ARC_MOD_BITS; + ++syn; + c = *syn; + } + operand = arc_operands + arc_operand_map[c]; + if (operand->extract) + (*operand->extract) (insn, operand, mods, + (const struct arc_operand_value **) NULL, + &invalid); + } + if (invalid) + continue; + + /* The instruction is valid. */ + + /* If we have an insn with a limm, fetch it now. Scanning the insns + twice lets us do this. */ + if (arc_opcode_limm_p (NULL)) + { + status = (*info->read_memory_func) (pc + 4, buffer, 4, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + if (big_p) + insn[1] = bfd_getb32 (buffer); + else + insn[1] = bfd_getl32 (buffer); + got_limm_p = 1; + } + + for (syn = opcode->syntax; *syn; ++syn) + { + int c; + + if (*syn != '%' || *++syn == '%') + { + (*func) (stream, "%c", *syn); + continue; + } + + /* We have an operand. Fetch any special modifiers. */ + mods = 0; + c = *syn; + while (ARC_MOD_P (arc_operands[arc_operand_map[c]].flags)) + { + mods |= arc_operands[arc_operand_map[c]].flags & ARC_MOD_BITS; + ++syn; + c = *syn; + } + operand = arc_operands + arc_operand_map[c]; + + /* Extract the value from the instruction. */ + opval = NULL; + if (operand->extract) + { + value = (*operand->extract) (insn, operand, mods, + &opval, (int *) NULL); + } + else + { + value = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + if ((operand->flags & ARC_OPERAND_SIGNED) + && (value & (1 << (operand->bits - 1)))) + value -= 1 << operand->bits; + + /* If this is a suffix operand, set `opval'. */ + if (operand->flags & ARC_OPERAND_SUFFIX) + opval = arc_opcode_lookup_suffix (operand, value); + } + + /* Print the operand as directed by the flags. */ + if (operand->flags & ARC_OPERAND_FAKE) + ; /* nothing to do (??? at least not yet) */ + else if (operand->flags & ARC_OPERAND_SUFFIX) + { + /* Default suffixes aren't printed. Fortunately, they all have + zero values. Also, zero values for boolean suffixes are + represented by the absence of text. */ + + if (value != 0) + { + /* ??? OPVAL should have a value. If it doesn't just cope + as we want disassembly to be reasonably robust. + Also remember that several condition code values (16-31) + aren't defined yet. For these cases just print the + number suitably decorated. */ + if (opval) + (*func) (stream, "%s%s", + mods & ARC_MOD_DOT ? "." : "", + opval->name); + else + (*func) (stream, "%s%c%d", + mods & ARC_MOD_DOT ? "." : "", + operand->fmt, value); + } + } + else if (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) + (*info->print_address_func) (pc + 4 + value, info); + /* ??? Not all cases of this are currently caught. */ + else if (operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) + (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info); + else if (operand->flags & ARC_OPERAND_ADDRESS) + (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info); + else if (opval) + /* Note that this case catches both normal and auxiliary regs. */ + (*func) (stream, "%s", opval->name); + else + (*func) (stream, "%ld", value); + } + + /* We have found and printed an instruction; return. */ + return got_limm_p ? 8 : 4; + } + + (*func) (stream, "*unknown*"); + return 4; +} + +/* Given MACH, one of bfd_mach_arc_xxx, return the print_insn function to use. + This does things a non-standard way (the "standard" way would be to copy + this code into disassemble.c). Since there are more than a couple of + variants, hiding all this crud here seems cleaner. */ + +disassembler_ftype +arc_get_disassembler (mach, big_p) + int mach; + int big_p; +{ + switch (mach) + { + case bfd_mach_arc_base: + return big_p ? print_insn_arc_base_big : print_insn_arc_base_little; + } + return print_insn_arc_base_little; +} + +static int +print_insn_arc_base_little (pc, info) + bfd_vma pc; + disassemble_info *info; +{ + return print_insn (pc, info, bfd_mach_arc_base, 0); +} + +static int +print_insn_arc_base_big (pc, info) + bfd_vma pc; + disassemble_info *info; +{ + return print_insn (pc, info, bfd_mach_arc_base, 1); +} diff --git a/contrib/binutils/opcodes/arc-opc.c b/contrib/binutils/opcodes/arc-opc.c new file mode 100644 index 0000000..5ee928b --- /dev/null +++ b/contrib/binutils/opcodes/arc-opc.c @@ -0,0 +1,1128 @@ +/* Opcode table for the ARC. + Copyright 1994, 1995, 1997, 1998 Free Software Foundation, Inc. + Contributed by Doug Evans (dje@cygnus.com). + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include <stdio.h> +#include "ansidecl.h" +#include "opcode/arc.h" + +#ifndef NULL +#define NULL 0 +#endif + +#define INSERT_FN(fn) \ +static arc_insn fn PARAMS ((arc_insn, const struct arc_operand *, \ + int, const struct arc_operand_value *, long, \ + const char **)) +#define EXTRACT_FN(fn) \ +static long fn PARAMS ((arc_insn *, const struct arc_operand *, \ + int, const struct arc_operand_value **, int *)) + +INSERT_FN (insert_reg); +INSERT_FN (insert_shimmfinish); +INSERT_FN (insert_limmfinish); +INSERT_FN (insert_shimmoffset); +INSERT_FN (insert_shimmzero); +INSERT_FN (insert_flag); +INSERT_FN (insert_flagfinish); +INSERT_FN (insert_cond); +INSERT_FN (insert_forcelimm); +INSERT_FN (insert_reladdr); +INSERT_FN (insert_absaddr); +INSERT_FN (insert_unopmacro); + +EXTRACT_FN (extract_reg); +EXTRACT_FN (extract_flag); +EXTRACT_FN (extract_cond); +EXTRACT_FN (extract_reladdr); +EXTRACT_FN (extract_unopmacro); + +/* Various types of ARC operands, including insn suffixes. */ + +/* Insn format values: + + 'a' REGA register A field + 'b' REGB register B field + 'c' REGC register C field + 'S' SHIMMFINISH finish inserting a shimm value + 'L' LIMMFINISH finish inserting a limm value + 'd' SHIMMOFFSET shimm offset in ld,st insns + '0' SHIMMZERO 0 shimm value in ld,st insns + 'f' FLAG F flag + 'F' FLAGFINISH finish inserting the F flag + 'G' FLAGINSN insert F flag in "flag" insn + 'n' DELAY N field (nullify field) + 'q' COND condition code field + 'Q' FORCELIMM set `cond_p' to 1 to ensure a constant is a limm + 'B' BRANCH branch address (22 bit pc relative) + 'J' JUMP jump address (26 bit absolute) + 'z' SIZE1 size field in ld a,[b,c] + 'Z' SIZE10 size field in ld a,[b,shimm] + 'y' SIZE22 size field in st c,[b,shimm] + 'x' SIGN0 sign extend field ld a,[b,c] + 'X' SIGN9 sign extend field ld a,[b,shimm] + 'w' ADDRESS3 write-back field in ld a,[b,c] + 'W' ADDRESS12 write-back field in ld a,[b,shimm] + 'v' ADDRESS24 write-back field in st c,[b,shimm] + 'e' CACHEBYPASS5 cache bypass in ld a,[b,c] + 'E' CACHEBYPASS14 cache bypass in ld a,[b,shimm] + 'D' CACHEBYPASS26 cache bypass in st c,[b,shimm] + 'U' UNOPMACRO fake operand to copy REGB to REGC for unop macros + + The following modifiers may appear between the % and char (eg: %.f): + + '.' MODDOT '.' prefix must be present + 'r' REG generic register value, for register table + 'A' AUXREG auxiliary register in lr a,[b], sr c,[b] + + Fields are: + + CHAR BITS SHIFT FLAGS INSERT_FN EXTRACT_FN +*/ + +const struct arc_operand arc_operands[] = +{ +/* place holder (??? not sure if needed) */ +#define UNUSED 0 + { 0 }, + +/* register A or shimm/limm indicator */ +#define REGA (UNUSED + 1) + { 'a', 6, ARC_SHIFT_REGA, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + +/* register B or shimm/limm indicator */ +#define REGB (REGA + 1) + { 'b', 6, ARC_SHIFT_REGB, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + +/* register C or shimm/limm indicator */ +#define REGC (REGB + 1) + { 'c', 6, ARC_SHIFT_REGC, ARC_OPERAND_SIGNED, insert_reg, extract_reg }, + +/* fake operand used to insert shimm value into most instructions */ +#define SHIMMFINISH (REGC + 1) + { 'S', 9, 0, ARC_OPERAND_SIGNED + ARC_OPERAND_FAKE, insert_shimmfinish, 0 }, + +/* fake operand used to insert limm value into most instructions. */ +#define LIMMFINISH (SHIMMFINISH + 1) + { 'L', 32, 32, ARC_OPERAND_ADDRESS + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE, insert_limmfinish, 0 }, + +/* shimm operand when there is no reg indicator (ld,st) */ +#define SHIMMOFFSET (LIMMFINISH + 1) + { 'd', 9, 0, ARC_OPERAND_SIGNED, insert_shimmoffset, 0 }, + +/* 0 shimm operand for ld,st insns */ +#define SHIMMZERO (SHIMMOFFSET + 1) + { '0', 9, 0, ARC_OPERAND_FAKE, insert_shimmzero, 0 }, + +/* flag update bit (insertion is defered until we know how) */ +#define FLAG (SHIMMZERO + 1) + { 'f', 1, 8, ARC_OPERAND_SUFFIX, insert_flag, extract_flag }, + +/* fake utility operand to finish 'f' suffix handling */ +#define FLAGFINISH (FLAG + 1) + { 'F', 1, 8, ARC_OPERAND_FAKE, insert_flagfinish, 0 }, + +/* fake utility operand to set the 'f' flag for the "flag" insn */ +#define FLAGINSN (FLAGFINISH + 1) + { 'G', 1, 8, ARC_OPERAND_FAKE, insert_flag, 0 }, + +/* branch delay types */ +#define DELAY (FLAGINSN + 1) + { 'n', 2, 5, ARC_OPERAND_SUFFIX }, + +/* conditions */ +#define COND (DELAY + 1) + { 'q', 5, 0, ARC_OPERAND_SUFFIX, insert_cond, extract_cond }, + +/* set `cond_p' to 1 to ensure a constant is treated as a limm */ +#define FORCELIMM (COND + 1) + { 'Q', 0, 0, ARC_OPERAND_FAKE, insert_forcelimm }, + +/* branch address; b, bl, and lp insns */ +#define BRANCH (FORCELIMM + 1) + { 'B', 20, 7, ARC_OPERAND_RELATIVE_BRANCH + ARC_OPERAND_SIGNED, insert_reladdr, extract_reladdr }, + +/* jump address; j insn (this is basically the same as 'L' except that the + value is right shifted by 2) */ +#define JUMP (BRANCH + 1) + { 'J', 24, 32, ARC_OPERAND_ABSOLUTE_BRANCH + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE, insert_absaddr }, + +/* size field, stored in bit 1,2 */ +#define SIZE1 (JUMP + 1) + { 'z', 2, 1, ARC_OPERAND_SUFFIX }, + +/* size field, stored in bit 10,11 */ +#define SIZE10 (SIZE1 + 1) + { 'Z', 2, 10, ARC_OPERAND_SUFFIX, }, + +/* size field, stored in bit 22,23 */ +#define SIZE22 (SIZE10 + 1) + { 'y', 2, 22, ARC_OPERAND_SUFFIX, }, + +/* sign extend field, stored in bit 0 */ +#define SIGN0 (SIZE22 + 1) + { 'x', 1, 0, ARC_OPERAND_SUFFIX }, + +/* sign extend field, stored in bit 9 */ +#define SIGN9 (SIGN0 + 1) + { 'X', 1, 9, ARC_OPERAND_SUFFIX }, + +/* address write back, stored in bit 3 */ +#define ADDRESS3 (SIGN9 + 1) + { 'w', 1, 3, ARC_OPERAND_SUFFIX }, + +/* address write back, stored in bit 12 */ +#define ADDRESS12 (ADDRESS3 + 1) + { 'W', 1, 12, ARC_OPERAND_SUFFIX }, + +/* address write back, stored in bit 24 */ +#define ADDRESS24 (ADDRESS12 + 1) + { 'v', 1, 24, ARC_OPERAND_SUFFIX }, + +/* cache bypass, stored in bit 5 */ +#define CACHEBYPASS5 (ADDRESS24 + 1) + { 'e', 1, 5, ARC_OPERAND_SUFFIX }, + +/* cache bypass, stored in bit 14 */ +#define CACHEBYPASS14 (CACHEBYPASS5 + 1) + { 'E', 1, 14, ARC_OPERAND_SUFFIX }, + +/* cache bypass, stored in bit 26 */ +#define CACHEBYPASS26 (CACHEBYPASS14 + 1) + { 'D', 1, 26, ARC_OPERAND_SUFFIX }, + +/* unop macro, used to copy REGB to REGC */ +#define UNOPMACRO (CACHEBYPASS26 + 1) + { 'U', 6, ARC_SHIFT_REGC, ARC_OPERAND_FAKE, insert_unopmacro, extract_unopmacro }, + +/* '.' modifier ('.' required). */ +#define MODDOT (UNOPMACRO + 1) + { '.', 1, 0, ARC_MOD_DOT }, + +/* Dummy 'r' modifier for the register table. + It's called a "dummy" because there's no point in inserting an 'r' into all + the %a/%b/%c occurrences in the insn table. */ +#define REG (MODDOT + 1) + { 'r', 6, 0, ARC_MOD_REG }, + +/* Known auxiliary register modifier (stored in shimm field). */ +#define AUXREG (REG + 1) + { 'A', 9, 0, ARC_MOD_AUXREG }, + +/* end of list place holder */ + { 0 } +}; + +/* Given a format letter, yields the index into `arc_operands'. + eg: arc_operand_map['a'] = REGA. */ +unsigned char arc_operand_map[256]; + +#define I(x) (((x) & 31) << 27) +#define A(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGA) +#define B(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGB) +#define C(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGC) +#define R(x,b,m) (((x) & (m)) << (b)) /* value X, mask M, at bit B */ + +/* ARC instructions. + + Longer versions of insns must appear before shorter ones (if gas sees + "lsr r2,r3,1" when it's parsing "lsr %a,%b" it will think the ",1" is + junk). This isn't necessary for `ld' because of the trailing ']'. + + Instructions that are really macros based on other insns must appear + before the real insn so they're chosen when disassembling. Eg: The `mov' + insn is really the `and' insn. + + This table is best viewed on a wide screen (161 columns). I'd prefer to + keep it this way. The rest of the file, however, should be viewable on an + 80 column terminal. */ + +/* ??? This table also includes macros: asl, lsl, and mov. The ppc port has + a more general facility for dealing with macros which could be used if + we need to. */ + +/* This table can't be `const' because members `next_asm' and `next_dis' are + computed at run-time. We could split this into two, but that doesn't seem + worth it. */ + +struct arc_opcode arc_opcodes[] = { + + /* Macros appear first. */ + /* "mov" is really an "and". */ + { "mov%.q%.f %a,%b%F%S%L%U", I(-1), I(12) }, + /* "asl" is really an "add". */ + { "asl%.q%.f %a,%b%F%S%L%U", I(-1), I(8) }, + /* "lsl" is really an "add". */ + { "lsl%.q%.f %a,%b%F%S%L%U", I(-1), I(8) }, + /* "nop" is really an "xor". */ + { "nop", 0xffffffff, 0x7fffffff }, + /* "rlc" is really an "adc". */ + { "rlc%.q%.f %a,%b%F%S%L%U", I(-1), I(9) }, + + /* The rest of these needn't be sorted, but it helps to find them if they are. */ + { "adc%.q%.f %a,%b,%c%F%S%L", I(-1), I(9) }, + { "add%.q%.f %a,%b,%c%F%S%L", I(-1), I(8) }, + { "and%.q%.f %a,%b,%c%F%S%L", I(-1), I(12) }, + { "asr%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(1) }, + { "bic%.q%.f %a,%b,%c%F%S%L", I(-1), I(14) }, + { "b%q%.n %B", I(-1), I(4), ARC_OPCODE_COND_BRANCH }, + { "bl%q%.n %B", I(-1), I(5), ARC_OPCODE_COND_BRANCH }, + { "extb%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(7) }, + { "extw%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(8) }, + { "flag%.q %b%G%S%L", I(-1)+A(-1)+C(-1), I(3)+A(ARC_REG_SHIMM_UPDATE)+C(0) }, + /* %Q: force cond_p=1 --> no shimm values */ + /* ??? This insn allows an optional flags spec. */ + { "j%q%Q%.n%.f %b%J", I(-1)+A(-1)+C(-1)+R(-1,7,1), I(7)+A(0)+C(0)+R(0,7,1) }, + /* Put opcode 1 ld insns first so shimm gets prefered over limm. */ + /* "[%b]" is before "[%b,%d]" so 0 offsets don't get printed. */ + { "ld%Z%.X%.W%.E %0%a,[%b]%L", I(-1)+R(-1,13,1)+R(-1,0,511), I(1)+R(0,13,1)+R(0,0,511) }, + { "ld%Z%.X%.W%.E %a,[%b,%d]%S%L", I(-1)+R(-1,13,1), I(1)+R(0,13,1) }, + { "ld%z%.x%.w%.e%Q %a,[%b,%c]%L", I(-1)+R(-1,4,1)+R(-1,6,7), I(0)+R(0,4,1)+R(0,6,7) }, + { "lp%q%.n %B", I(-1), I(6), }, + { "lr %a,[%Ab]%S%L", I(-1)+C(-1), I(1)+C(0x10) }, + { "lsr%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(2) }, + { "or%.q%.f %a,%b,%c%F%S%L", I(-1), I(13) }, + { "ror%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(3) }, + { "rrc%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(4) }, + { "sbc%.q%.f %a,%b,%c%F%S%L", I(-1), I(11) }, + { "sexb%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(5) }, + { "sexw%.q%.f %a,%b%F%S%L", I(-1)+C(-1), I(3)+C(6) }, + { "sr %c,[%Ab]%S%L", I(-1)+A(-1), I(2)+A(0x10) }, + /* "[%b]" is before "[%b,%d]" so 0 offsets don't get printed. */ + { "st%y%.v%.D%Q %0%c,[%b]%L", I(-1)+R(-1,25,1)+R(-1,21,1)+R(-1,0,511), I(2)+R(0,25,1)+R(0,21,1)+R(0,0,511) }, + { "st%y%.v%.D %c,[%b,%d]%S%L", I(-1)+R(-1,25,1)+R(-1,21,1), I(2)+R(0,25,1)+R(0,21,1) }, + { "sub%.q%.f %a,%b,%c%F%S%L", I(-1), I(10) }, + { "xor%.q%.f %a,%b,%c%F%S%L", I(-1), I(15) } +}; +const int arc_opcodes_count = sizeof (arc_opcodes) / sizeof (arc_opcodes[0]); + +const struct arc_operand_value arc_reg_names[] = +{ + /* Sort this so that the first 61 entries are sequential. + IE: For each i (i<61), arc_reg_names[i].value == i. */ + + { "r0", 0, REG }, { "r1", 1, REG }, { "r2", 2, REG }, { "r3", 3, REG }, + { "r4", 4, REG }, { "r5", 5, REG }, { "r6", 6, REG }, { "r7", 7, REG }, + { "r8", 8, REG }, { "r9", 9, REG }, { "r10", 10, REG }, { "r11", 11, REG }, + { "r12", 12, REG }, { "r13", 13, REG }, { "r14", 14, REG }, { "r15", 15, REG }, + { "r16", 16, REG }, { "r17", 17, REG }, { "r18", 18, REG }, { "r19", 19, REG }, + { "r20", 20, REG }, { "r21", 21, REG }, { "r22", 22, REG }, { "r23", 23, REG }, + { "r24", 24, REG }, { "r25", 25, REG }, { "r26", 26, REG }, { "fp", 27, REG }, + { "sp", 28, REG }, { "ilink1", 29, REG }, { "ilink2", 30, REG }, { "blink", 31, REG }, + { "r32", 32, REG }, { "r33", 33, REG }, { "r34", 34, REG }, { "r35", 35, REG }, + { "r36", 36, REG }, { "r37", 37, REG }, { "r38", 38, REG }, { "r39", 39, REG }, + { "r40", 40, REG }, { "r41", 41, REG }, { "r42", 42, REG }, { "r43", 43, REG }, + { "r44", 44, REG }, { "r45", 45, REG }, { "r46", 46, REG }, { "r47", 47, REG }, + { "r48", 48, REG }, { "r49", 49, REG }, { "r50", 50, REG }, { "r51", 51, REG }, + { "r52", 52, REG }, { "r53", 53, REG }, { "r54", 54, REG }, { "r55", 55, REG }, + { "r56", 56, REG }, { "r57", 57, REG }, { "r58", 58, REG }, { "r59", 59, REG }, + { "lp_count", 60, REG }, + + /* I'd prefer to output these as "fp" and "sp" by default, but we still need + to recognize the canonical values. */ + { "r27", 27, REG }, { "r28", 28, REG }, + + /* Someone may wish to refer to these in this way, and it's probably a + good idea to reserve them as such anyway. */ + { "r29", 29, REG }, { "r30", 30, REG }, { "r31", 31, REG }, { "r60", 60, REG }, + + /* Standard auxiliary registers. */ + { "status", 0, AUXREG }, + { "semaphore", 1, AUXREG }, + { "lp_start", 2, AUXREG }, + { "lp_end", 3, AUXREG }, + { "identity", 4, AUXREG }, + { "debug", 5, AUXREG }, +}; +const int arc_reg_names_count = sizeof (arc_reg_names) / sizeof (arc_reg_names[0]); + +/* The suffix table. + Operands with the same name must be stored together. */ + +const struct arc_operand_value arc_suffixes[] = +{ + /* Entry 0 is special, default values aren't printed by the disassembler. */ + { "", 0, -1 }, + { "al", 0, COND }, + { "ra", 0, COND }, + { "eq", 1, COND }, + { "z", 1, COND }, + { "ne", 2, COND }, + { "nz", 2, COND }, + { "p", 3, COND }, + { "pl", 3, COND }, + { "n", 4, COND }, + { "mi", 4, COND }, + { "c", 5, COND }, + { "cs", 5, COND }, + { "lo", 5, COND }, + { "nc", 6, COND }, + { "cc", 6, COND }, + { "hs", 6, COND }, + { "v", 7, COND }, + { "vs", 7, COND }, + { "nv", 8, COND }, + { "vc", 8, COND }, + { "gt", 9, COND }, + { "ge", 10, COND }, + { "lt", 11, COND }, + { "le", 12, COND }, + { "hi", 13, COND }, + { "ls", 14, COND }, + { "pnz", 15, COND }, + { "f", 1, FLAG }, + { "nd", ARC_DELAY_NONE, DELAY }, + { "d", ARC_DELAY_NORMAL, DELAY }, + { "jd", ARC_DELAY_JUMP, DELAY }, +/*{ "b", 7, SIZEEXT },*/ +/*{ "b", 5, SIZESEX },*/ + { "b", 1, SIZE1 }, + { "b", 1, SIZE10 }, + { "b", 1, SIZE22 }, +/*{ "w", 8, SIZEEXT },*/ +/*{ "w", 6, SIZESEX },*/ + { "w", 2, SIZE1 }, + { "w", 2, SIZE10 }, + { "w", 2, SIZE22 }, + { "x", 1, SIGN0 }, + { "x", 1, SIGN9 }, + { "a", 1, ADDRESS3 }, + { "a", 1, ADDRESS12 }, + { "a", 1, ADDRESS24 }, + { "di", 1, CACHEBYPASS5 }, + { "di", 1, CACHEBYPASS14 }, + { "di", 1, CACHEBYPASS26 }, +}; +const int arc_suffixes_count = sizeof (arc_suffixes) / sizeof (arc_suffixes[0]); + +/* Indexed by first letter of opcode. Points to chain of opcodes with same + first letter. */ +static struct arc_opcode *opcode_map[26 + 1]; + +/* Indexed by insn code. Points to chain of opcodes with same insn code. */ +static struct arc_opcode *icode_map[32]; + +/* Configuration flags. */ + +/* Various ARC_HAVE_XXX bits. */ +static int cpu_type; + +/* Translate a bfd_mach_arc_xxx value to a ARC_MACH_XXX value. */ + +int +arc_get_opcode_mach (bfd_mach, big_p) + int bfd_mach, big_p; +{ + static int mach_type_map[] = + { + ARC_MACH_BASE + }; + + return mach_type_map[bfd_mach] | (big_p ? ARC_MACH_BIG : 0); +} + +/* Initialize any tables that need it. + Must be called once at start up (or when first needed). + + FLAGS is a set of bits that say what version of the cpu we have, + and in particular at least (one of) ARC_MACH_XXX. */ + +void +arc_opcode_init_tables (flags) + int flags; +{ + static int init_p = 0; + + cpu_type = flags; + + /* We may be intentionally called more than once (for example gdb will call + us each time the user switches cpu). These tables only need to be init'd + once though. */ + /* ??? We can remove the need for arc_opcode_supported by taking it into + account here, but I'm not sure I want to do that yet (if ever). */ + if (!init_p) + { + register int i,n; + + memset (arc_operand_map, 0, sizeof (arc_operand_map)); + n = sizeof (arc_operands) / sizeof (arc_operands[0]); + for (i = 0; i < n; ++i) + arc_operand_map[arc_operands[i].fmt] = i; + + memset (opcode_map, 0, sizeof (opcode_map)); + memset (icode_map, 0, sizeof (icode_map)); + /* Scan the table backwards so macros appear at the front. */ + for (i = arc_opcodes_count - 1; i >= 0; --i) + { + int opcode_hash = ARC_HASH_OPCODE (arc_opcodes[i].syntax); + int icode_hash = ARC_HASH_ICODE (arc_opcodes[i].value); + + arc_opcodes[i].next_asm = opcode_map[opcode_hash]; + opcode_map[opcode_hash] = &arc_opcodes[i]; + + arc_opcodes[i].next_dis = icode_map[icode_hash]; + icode_map[icode_hash] = &arc_opcodes[i]; + } + + init_p = 1; + } +} + +/* Return non-zero if OPCODE is supported on the specified cpu. + Cpu selection is made when calling `arc_opcode_init_tables'. */ + +int +arc_opcode_supported (opcode) + const struct arc_opcode *opcode; +{ + if (ARC_OPCODE_CPU (opcode->flags) == 0) + return 1; + if (ARC_OPCODE_CPU (opcode->flags) & ARC_HAVE_CPU (cpu_type)) + return 1; + return 0; +} + +/* Return non-zero if OPVAL is supported on the specified cpu. + Cpu selection is made when calling `arc_opcode_init_tables'. */ + +int +arc_opval_supported (opval) + const struct arc_operand_value *opval; +{ + if (ARC_OPVAL_CPU (opval->flags) == 0) + return 1; + if (ARC_OPVAL_CPU (opval->flags) & ARC_HAVE_CPU (cpu_type)) + return 1; + return 0; +} + +/* Return the first insn in the chain for assembling INSN. */ + +const struct arc_opcode * +arc_opcode_lookup_asm (insn) + const char *insn; +{ + return opcode_map[ARC_HASH_OPCODE (insn)]; +} + +/* Return the first insn in the chain for disassembling INSN. */ + +const struct arc_opcode * +arc_opcode_lookup_dis (insn) + unsigned int insn; +{ + return icode_map[ARC_HASH_ICODE (insn)]; +} + +/* Nonzero if we've seen an 'f' suffix (in certain insns). */ +static int flag_p; + +/* Nonzero if we've finished processing the 'f' suffix. */ +static int flagshimm_handled_p; + +/* Nonzero if we've seen a 'q' suffix (condition code). */ +static int cond_p; + +/* Nonzero if we've inserted a shimm. */ +static int shimm_p; + +/* The value of the shimm we inserted (each insn only gets one but it can + appear multiple times. */ +static int shimm; + +/* Nonzero if we've inserted a limm (during assembly) or seen a limm + (during disassembly). */ +static int limm_p; + +/* The value of the limm we inserted. Each insn only gets one but it can + appear multiple times. */ +static long limm; + +/* Insertion functions. */ + +/* Called by the assembler before parsing an instruction. */ + +void +arc_opcode_init_insert () +{ + flag_p = 0; + flagshimm_handled_p = 0; + cond_p = 0; + shimm_p = 0; + limm_p = 0; +} + +/* Called by the assembler to see if the insn has a limm operand. + Also called by the disassembler to see if the insn contains a limm. */ + +int +arc_opcode_limm_p (limmp) + long *limmp; +{ + if (limmp) + *limmp = limm; + return limm_p; +} + +/* Insert a value into a register field. + If REG is NULL, then this is actually a constant. + + We must also handle auxiliary registers for lr/sr insns. */ + +static arc_insn +insert_reg (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + static char buf[100]; + + if (reg == NULL) + { + /* We have a constant that also requires a value stored in a register + field. Handle these by updating the register field and saving the + value for later handling by either %S (shimm) or %L (limm). */ + + /* Try to use a shimm value before a limm one. */ + if (ARC_SHIMM_CONST_P (value) + /* If we've seen a conditional suffix we have to use a limm. */ + && !cond_p + /* If we already have a shimm value that is different than ours + we have to use a limm. */ + && (!shimm_p || shimm == value)) + { + int marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM; + flagshimm_handled_p = 1; + shimm_p = 1; + shimm = value; + insn |= marker << operand->shift; + /* insn |= value & 511; - done later */ + } + /* We have to use a limm. If we've already seen one they must match. */ + else if (!limm_p || limm == value) + { + limm_p = 1; + limm = value; + insn |= ARC_REG_LIMM << operand->shift; + /* The constant is stored later. */ + } + else + { + *errmsg = "unable to fit different valued constants into instruction"; + } + } + else + { + /* We have to handle both normal and auxiliary registers. */ + + if (reg->type == AUXREG) + { + if (!(mods & ARC_MOD_AUXREG)) + *errmsg = "auxiliary register not allowed here"; + else + { + insn |= ARC_REG_SHIMM << operand->shift; + insn |= reg->value << arc_operands[reg->type].shift; + } + } + else + { + /* We should never get an invalid register number here. */ + if ((unsigned int) reg->value > 60) + { + sprintf (buf, "invalid register number `%d'", reg->value); + *errmsg = buf; + } + else + insn |= reg->value << operand->shift; + } + } + + return insn; +} + +/* Called when we see an 'f' flag. */ + +static arc_insn +insert_flag (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + /* We can't store anything in the insn until we've parsed the registers. + Just record the fact that we've got this flag. `insert_reg' will use it + to store the correct value (ARC_REG_SHIMM_UPDATE or bit 0x100). */ + flag_p = 1; + + return insn; +} + +/* Called after completely building an insn to ensure the 'f' flag gets set + properly. This is needed because we don't know how to set this flag until + we've parsed the registers. */ + +static arc_insn +insert_flagfinish (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + if (flag_p && !flagshimm_handled_p) + { + if (shimm_p) + abort (); + flagshimm_handled_p = 1; + insn |= (1 << operand->shift); + } + return insn; +} + +/* Called when we see a conditional flag (eg: .eq). */ + +static arc_insn +insert_cond (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + cond_p = 1; + insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; + return insn; +} + +/* Used in the "j" instruction to prevent constants from being interpreted as + shimm values (which the jump insn doesn't accept). This can also be used + to force the use of limm values in other situations (eg: ld r0,[foo] uses + this). + ??? The mechanism is sound. Access to it is a bit klunky right now. */ + +static arc_insn +insert_forcelimm (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + cond_p = 1; + return insn; +} + +/* Used in ld/st insns to handle the shimm offset field. */ + +static arc_insn +insert_shimmoffset (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + long minval, maxval; + static char buf[100]; + + if (reg != NULL) + { + *errmsg = "register appears where shimm value expected"; + } + else + { + /* This is *way* more general than necessary, but maybe some day it'll + be useful. */ + if (operand->flags & ARC_OPERAND_SIGNED) + { + minval = -(1 << (operand->bits - 1)); + maxval = (1 << (operand->bits - 1)) - 1; + } + else + { + minval = 0; + maxval = (1 << operand->bits) - 1; + } + if (value < minval || value > maxval) + { + sprintf (buf, "value won't fit in range %ld - %ld", + minval, maxval); + *errmsg = buf; + } + else + insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; + } + return insn; +} + +/* Used in ld/st insns when the shimm offset is 0. */ + +static arc_insn +insert_shimmzero (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + shimm_p = 1; + shimm = 0; + return insn; +} + +/* Called at the end of processing normal insns (eg: add) to insert a shimm + value (if present) into the insn. */ + +static arc_insn +insert_shimmfinish (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + if (shimm_p) + insn |= (shimm & ((1 << operand->bits) - 1)) << operand->shift; + return insn; +} + +/* Called at the end of processing normal insns (eg: add) to insert a limm + value (if present) into the insn. + + Note that this function is only intended to handle instructions (with 4 byte + immediate operands). It is not intended to handle data. */ + +/* ??? Actually, there's nothing for us to do as we can't call frag_more, the + caller must do that. The extract fns take a pointer to two words. The + insert fns could be converted and then we could do something useful, but + then the reloc handlers would have to know to work on the second word of + a 2 word quantity. That's too much so we don't handle them. */ + +static arc_insn +insert_limmfinish (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + if (limm_p) + ; /* nothing to do, gas does it */ + return insn; +} + +/* Called at the end of unary operand macros to copy the B field to C. */ + +static arc_insn +insert_unopmacro (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + insn |= ((insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) << operand->shift; + return insn; +} + +/* Insert a relative address for a branch insn (b, bl, or lp). */ + +static arc_insn +insert_reladdr (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + if (value & 3) + *errmsg = "branch address not on 4 byte boundary"; + insn |= ((value >> 2) & ((1 << operand->bits) - 1)) << operand->shift; + return insn; +} + +/* Insert a limm value as a 26 bit address right shifted 2 into the insn. + + Note that this function is only intended to handle instructions (with 4 byte + immediate operands). It is not intended to handle data. */ + +/* ??? Actually, there's nothing for us to do as we can't call frag_more, the + caller must do that. The extract fns take a pointer to two words. The + insert fns could be converted and then we could do something useful, but + then the reloc handlers would have to know to work on the second word of + a 2 word quantity. That's too much so we don't handle them. */ + +static arc_insn +insert_absaddr (insn, operand, mods, reg, value, errmsg) + arc_insn insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value *reg; + long value; + const char **errmsg; +{ + if (limm_p) + ; /* nothing to do */ + return insn; +} + +/* Extraction functions. + + The suffix extraction functions' return value is redundant since it can be + obtained from (*OPVAL)->value. However, the boolean suffixes don't have + a suffix table entry for the "false" case, so values of zero must be + obtained from the return value (*OPVAL == NULL). */ + +static const struct arc_operand_value *lookup_register (int type, long regno); + +/* Called by the disassembler before printing an instruction. */ + +void +arc_opcode_init_extract () +{ + flag_p = 0; + flagshimm_handled_p = 0; + shimm_p = 0; + limm_p = 0; +} + +/* As we're extracting registers, keep an eye out for the 'f' indicator + (ARC_REG_SHIMM_UPDATE). If we find a register (not a constant marker, + like ARC_REG_SHIMM), set OPVAL so our caller will know this is a register. + + We must also handle auxiliary registers for lr/sr insns. They are just + constants with special names. */ + +static long +extract_reg (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + int regno; + long value; + + /* Get the register number. */ + regno = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + + /* Is it a constant marker? */ + if (regno == ARC_REG_SHIMM) + { + value = insn[0] & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) + && (value & 256)) + value -= 512; + flagshimm_handled_p = 1; + } + else if (regno == ARC_REG_SHIMM_UPDATE) + { + value = insn[0] & 511; + if ((operand->flags & ARC_OPERAND_SIGNED) + && (value & 256)) + value -= 512; + flag_p = 1; + flagshimm_handled_p = 1; + } + else if (regno == ARC_REG_LIMM) + { + value = insn[1]; + limm_p = 1; + } + /* It's a register, set OPVAL (that's the only way we distinguish registers + from constants here). */ + else + { + const struct arc_operand_value *reg = lookup_register (REG, regno); + + if (reg == NULL) + abort (); + if (opval != NULL) + *opval = reg; + value = regno; + } + + /* If this field takes an auxiliary register, see if it's a known one. */ + if ((mods & ARC_MOD_AUXREG) + && ARC_REG_CONSTANT_P (regno)) + { + const struct arc_operand_value *reg = lookup_register (AUXREG, value); + + /* This is really a constant, but tell the caller it has a special + name. */ + if (reg != NULL && opval != NULL) + *opval = reg; + } + + return value; +} + +/* Return the value of the "flag update" field for shimm insns. + This value is actually stored in the register field. */ + +static long +extract_flag (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + int f; + const struct arc_operand_value *val; + + if (flagshimm_handled_p) + f = flag_p != 0; + else + f = (insn[0] & (1 << operand->shift)) != 0; + + /* There is no text for zero values. */ + if (f == 0) + return 0; + + val = arc_opcode_lookup_suffix (operand, 1); + if (opval != NULL && val != NULL) + *opval = val; + return val->value; +} + +/* Extract the condition code (if it exists). + If we've seen a shimm value in this insn (meaning that the insn can't have + a condition code field), then we don't store anything in OPVAL and return + zero. */ + +static long +extract_cond (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + long cond; + const struct arc_operand_value *val; + + if (flagshimm_handled_p) + return 0; + + cond = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + val = arc_opcode_lookup_suffix (operand, cond); + + /* Ignore NULL values of `val'. Several condition code values are + reserved for extensions. */ + if (opval != NULL && val != NULL) + *opval = val; + return cond; +} + +/* Extract a branch address. + We return the value as a real address (not right shifted by 2). */ + +static long +extract_reladdr (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + long addr; + + addr = (insn[0] >> operand->shift) & ((1 << operand->bits) - 1); + if ((operand->flags & ARC_OPERAND_SIGNED) + && (addr & (1 << (operand->bits - 1)))) + addr -= 1 << operand->bits; + + return addr << 2; +} + +/* The only thing this does is set the `invalid' flag if B != C. + This is needed because the "mov" macro appears before it's real insn "and" + and we don't want the disassembler to confuse them. */ + +static long +extract_unopmacro (insn, operand, mods, opval, invalid) + arc_insn *insn; + const struct arc_operand *operand; + int mods; + const struct arc_operand_value **opval; + int *invalid; +{ + /* This misses the case where B == ARC_REG_SHIMM_UPDATE && + C == ARC_REG_SHIMM (or vice versa). No big deal. Those insns will get + printed as "and"s. */ + if (((insn[0] >> ARC_SHIFT_REGB) & ARC_MASK_REG) + != ((insn[0] >> ARC_SHIFT_REGC) & ARC_MASK_REG)) + if (invalid != NULL) + *invalid = 1; + + return 0; +} + +/* Utility for the extraction functions to return the index into + `arc_suffixes'. */ + +const struct arc_operand_value * +arc_opcode_lookup_suffix (type, value) + const struct arc_operand *type; + int value; +{ + register const struct arc_operand_value *v,*end; + + /* ??? This is a little slow and can be speeded up. */ + + for (v = arc_suffixes, end = arc_suffixes + arc_suffixes_count; v < end; ++v) + if (type == &arc_operands[v->type] + && value == v->value) + return v; + return 0; +} + +static const struct arc_operand_value * +lookup_register (type, regno) + int type; + long regno; +{ + register const struct arc_operand_value *r,*end; + + if (type == REG) + return &arc_reg_names[regno]; + + /* ??? This is a little slow and can be speeded up. */ + + for (r = arc_reg_names, end = arc_reg_names + arc_reg_names_count; + r < end; ++r) + if (type == r->type && regno == r->value) + return r; + return 0; +} diff --git a/contrib/binutils/opcodes/cgen-asm.c b/contrib/binutils/opcodes/cgen-asm.c index 732ba57..6dd558b 100644 --- a/contrib/binutils/opcodes/cgen-asm.c +++ b/contrib/binutils/opcodes/cgen-asm.c @@ -1,28 +1,30 @@ /* CGEN generic assembler support code. -Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of the GNU Binutils and GDB, the GNU debugger. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "sysdep.h" #include <stdio.h> +#include <ctype.h> #include "ansidecl.h" #include "libiberty.h" #include "bfd.h" +#include "symcat.h" #include "opcode/cgen.h" /* Operand parsing callback. */ @@ -64,11 +66,11 @@ cgen_init_parse_operand () static void build_asm_hash_table () { - int i; unsigned int hash; int count = cgen_insn_count (); CGEN_OPCODE_DATA *data = cgen_current_opcode_data; CGEN_INSN_TABLE *insn_table = data->insn_table; + unsigned int entry_size = insn_table->entry_size; unsigned int hash_size = insn_table->asm_hash_table_size; const CGEN_INSN *insn; CGEN_INSN_LIST *insn_lists,*new_insns; @@ -87,13 +89,18 @@ build_asm_hash_table () /* Add compiled in insns. The table is scanned backwards as later additions are inserted in front of earlier ones and we want earlier ones to be prefered. - We stop at the first one as it is a reserved entry. */ - - for (insn = insn_table->init_entries + insn_table->num_init_entries - 1; + We stop at the first one as it is a reserved entry. + This is a bit tricky as the attribute member of CGEN_INSN is variable + among architectures. This code could be moved to cgen-asm.in, but + I prefer to keep it here for now. */ + + for (insn = (CGEN_INSN *) + ((char *) insn_table->init_entries + + entry_size * (insn_table->num_init_entries - 1)); insn > insn_table->init_entries; - --insn, ++insn_lists) + insn = (CGEN_INSN *) ((char *) insn - entry_size), ++insn_lists) { - hash = (*insn_table->asm_hash) (insn->syntax.mnemonic); + hash = (*insn_table->asm_hash) CGEN_INSN_MNEMONIC (insn); insn_lists->next = asm_hash_table[hash]; insn_lists->insn = insn; asm_hash_table[hash] = insn_lists; @@ -106,7 +113,7 @@ build_asm_hash_table () new_insns != NULL; new_insns = new_insns->next, ++insn_lists) { - hash = (*insn_table->asm_hash) (new_insns->insn->syntax.mnemonic); + hash = (*insn_table->asm_hash) CGEN_INSN_MNEMONIC (new_insns->insn); insn_lists->next = asm_hash_table[hash]; insn_lists->insn = new_insns->insn; asm_hash_table[hash] = insn_lists; @@ -139,35 +146,40 @@ cgen_asm_lookup_insn (insn) const char * cgen_parse_keyword (strp, keyword_table, valuep) const char **strp; - struct cgen_keyword *keyword_table; + CGEN_KEYWORD *keyword_table; long *valuep; { - const struct cgen_keyword_entry *ke; + const CGEN_KEYWORD_ENTRY *ke; char buf[256]; - const char *p; + const char *p,*start; - p = *strp; + p = start = *strp; - /* Allow any first character. */ + /* Allow any first character. + Note that this allows recognizing ",a" for the annul flag in sparc + even though "," is subsequently not a valid keyword char. */ if (*p) ++p; /* Now allow letters, digits, and _. */ - while (isalnum (*p) || *p == '_') + while (((p - start) < (int) sizeof (buf)) + && (isalnum ((unsigned char) *p) || *p == '_')) ++p; - if (p - *strp > 255) + if (p - start >= (int) sizeof (buf)) return "unrecognized keyword/register name"; - memcpy (buf, *strp, p - *strp); - buf[p - *strp] = 0; + memcpy (buf, start, p - start); + buf[p - start] = 0; ke = cgen_keyword_lookup_name (keyword_table, buf); if (ke != NULL) { *valuep = ke->value; - *strp = p; + /* Don't advance pointer if we recognized the null keyword. */ + if (ke->name[0] != 0) + *strp = p; return NULL; } @@ -177,13 +189,12 @@ cgen_parse_keyword (strp, keyword_table, valuep) /* Signed integer parser. */ const char * -cgen_parse_signed_integer (strp, opindex, min, max, valuep) +cgen_parse_signed_integer (strp, opindex, valuep) const char **strp; int opindex; - long min, max; long *valuep; { - long value; + bfd_vma value; enum cgen_parse_operand_result result; const char *errmsg; @@ -192,24 +203,19 @@ cgen_parse_signed_integer (strp, opindex, min, max, valuep) &result, &value); /* FIXME: Examine `result'. */ if (!errmsg) - { - if (value < min || value > max) - return "integer operand out of range"; - *valuep = value; - } + *valuep = value; return errmsg; } /* Unsigned integer parser. */ const char * -cgen_parse_unsigned_integer (strp, opindex, min, max, valuep) +cgen_parse_unsigned_integer (strp, opindex, valuep) const char **strp; int opindex; - unsigned long min, max; unsigned long *valuep; { - unsigned long value; + bfd_vma value; enum cgen_parse_operand_result result; const char *errmsg; @@ -218,33 +224,32 @@ cgen_parse_unsigned_integer (strp, opindex, min, max, valuep) &result, &value); /* FIXME: Examine `result'. */ if (!errmsg) - { - if (value < min || value > max) - return "integer operand out of range"; - *valuep = value; - } + *valuep = value; return errmsg; } /* Address parser. */ const char * -cgen_parse_address (strp, opindex, opinfo, valuep) +cgen_parse_address (strp, opindex, opinfo, resultp, valuep) const char **strp; int opindex; int opinfo; + enum cgen_parse_operand_result *resultp; long *valuep; { - long value; - enum cgen_parse_operand_result result; + bfd_vma value; + enum cgen_parse_operand_result result_type; const char *errmsg; errmsg = (*cgen_parse_operand_fn) (CGEN_PARSE_OPERAND_ADDRESS, strp, opindex, opinfo, - &result, &value); + &result_type, &value); /* FIXME: Examine `result'. */ if (!errmsg) { + if (resultp != NULL) + *resultp = result_type; *valuep = value; } return errmsg; diff --git a/contrib/binutils/opcodes/cgen-dis.c b/contrib/binutils/opcodes/cgen-dis.c index f239b66..f7ee88f 100644 --- a/contrib/binutils/opcodes/cgen-dis.c +++ b/contrib/binutils/opcodes/cgen-dis.c @@ -1,36 +1,37 @@ /* CGEN generic disassembler support code. -Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of the GNU Binutils and GDB, the GNU debugger. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "sysdep.h" #include <stdio.h> #include "ansidecl.h" #include "libiberty.h" #include "bfd.h" +#include "symcat.h" #include "opcode/cgen.h" /* This is not published as part of the public interface so we don't declare this in cgen.h. */ -extern CGEN_OPCODE_DATA *cgen_current_opcode_data; +extern CGEN_OPCODE_DATA * cgen_current_opcode_data; /* Disassembler instruction hash table. */ -static CGEN_INSN_LIST **dis_hash_table; +static CGEN_INSN_LIST ** dis_hash_table; void cgen_dis_init () @@ -47,17 +48,18 @@ cgen_dis_init () static void build_dis_hash_table () { - int i; - int big_p = cgen_current_endian == CGEN_ENDIAN_BIG; + int bigend = cgen_current_endian == CGEN_ENDIAN_BIG; unsigned int hash; - char buf[4]; + char buf [4]; unsigned long value; int count = cgen_insn_count (); - CGEN_OPCODE_DATA *data = cgen_current_opcode_data; - CGEN_INSN_TABLE *insn_table = data->insn_table; + CGEN_OPCODE_DATA * data = cgen_current_opcode_data; + CGEN_INSN_TABLE * insn_table = data->insn_table; + unsigned int entry_size = insn_table->entry_size; unsigned int hash_size = insn_table->dis_hash_table_size; - const CGEN_INSN *insn; - CGEN_INSN_LIST *insn_lists,*new_insns; + const CGEN_INSN * insn; + CGEN_INSN_LIST * insn_lists; + CGEN_INSN_LIST * new_insns; /* The space allocated for the hash table consists of two parts: the hash table and the hash lists. */ @@ -73,28 +75,33 @@ build_dis_hash_table () /* Add compiled in insns. The table is scanned backwards as later additions are inserted in front of earlier ones and we want earlier ones to be prefered. - We stop at the first one as it is a reserved entry. */ - - for (insn = insn_table->init_entries + insn_table->num_init_entries - 1; + We stop at the first one as it is a reserved entry. + This is a bit tricky as the attribute member of CGEN_INSN is variable + among architectures. This code could be moved to cgen-asm.in, but + I prefer to keep it here for now. */ + + for (insn = (CGEN_INSN *) + ((char *) insn_table->init_entries + + entry_size * (insn_table->num_init_entries - 1)); insn > insn_table->init_entries; - --insn, ++insn_lists) + insn = (CGEN_INSN *) ((char *) insn - entry_size), ++ insn_lists) { /* We don't know whether the target uses the buffer or the base insn to hash on, so set both up. */ - value = insn->syntax.value; - switch (CGEN_INSN_BITSIZE (insn)) + value = CGEN_INSN_VALUE (insn); + switch (CGEN_INSN_MASK_BITSIZE (insn)) { case 8: buf[0] = value; break; case 16: - if (big_p) + if (bigend) bfd_putb16 ((bfd_vma) value, buf); else bfd_putl16 ((bfd_vma) value, buf); break; case 32: - if (big_p) + if (bigend) bfd_putb32 ((bfd_vma) value, buf); else bfd_putl32 ((bfd_vma) value, buf); @@ -102,10 +109,13 @@ build_dis_hash_table () default: abort (); } - hash = (*insn_table->dis_hash) (buf, value); - insn_lists->next = dis_hash_table[hash]; + + hash = insn_table->dis_hash (buf, value); + + insn_lists->next = dis_hash_table [hash]; insn_lists->insn = insn; - dis_hash_table[hash] = insn_lists; + + dis_hash_table [hash] = insn_lists; } /* Add runtime added insns. @@ -113,24 +123,24 @@ build_dis_hash_table () Not sure this is a bug or not. */ for (new_insns = insn_table->new_entries; new_insns != NULL; - new_insns = new_insns->next, ++insn_lists) + new_insns = new_insns->next, ++ insn_lists) { /* We don't know whether the target uses the buffer or the base insn to hash on, so set both up. */ - value = new_insns->insn->syntax.value; - switch (CGEN_INSN_BITSIZE (new_insns->insn)) + value = CGEN_INSN_VALUE (new_insns->insn); + switch (CGEN_INSN_MASK_BITSIZE (new_insns->insn)) { case 8: buf[0] = value; break; case 16: - if (big_p) + if (bigend) bfd_putb16 ((bfd_vma) value, buf); else bfd_putl16 ((bfd_vma) value, buf); break; case 32: - if (big_p) + if (bigend) bfd_putb32 ((bfd_vma) value, buf); else bfd_putl32 ((bfd_vma) value, buf); @@ -138,10 +148,13 @@ build_dis_hash_table () default: abort (); } - hash = (*insn_table->dis_hash) (buf, value); - insn_lists->next = dis_hash_table[hash]; + + hash = insn_table->dis_hash (buf, value); + + insn_lists->next = dis_hash_table [hash]; insn_lists->insn = new_insns->insn; - dis_hash_table[hash] = insn_lists; + + dis_hash_table [hash] = insn_lists; } } @@ -149,7 +162,7 @@ build_dis_hash_table () CGEN_INSN_LIST * cgen_dis_lookup_insn (buf, value) - const char *buf; + const char * buf; unsigned long value; { unsigned int hash; @@ -157,6 +170,7 @@ cgen_dis_lookup_insn (buf, value) if (dis_hash_table == NULL) build_dis_hash_table (); - hash = (*cgen_current_opcode_data->insn_table->dis_hash) (buf, value); - return dis_hash_table[hash]; + hash = cgen_current_opcode_data->insn_table->dis_hash (buf, value); + + return dis_hash_table [hash]; } diff --git a/contrib/binutils/opcodes/cgen-opc.c b/contrib/binutils/opcodes/cgen-opc.c index f9c67c8..a9d937b 100644 --- a/contrib/binutils/opcodes/cgen-opc.c +++ b/contrib/binutils/opcodes/cgen-opc.c @@ -1,28 +1,30 @@ /* CGEN generic opcode support. -Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of the GNU Binutils and GDB, the GNU debugger. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "sysdep.h" +#include <ctype.h> #include <stdio.h> #include "ansidecl.h" #include "libiberty.h" #include "bfd.h" +#include "symcat.h" #include "opcode/cgen.h" /* State variables. @@ -38,31 +40,44 @@ int cgen_current_mach; /* Current endian. */ enum cgen_endian cgen_current_endian = CGEN_ENDIAN_UNKNOWN; +/* FIXME: To support multiple architectures, we need to return a handle + to the state set up by this function, and pass the handle back to the + other functions. Later. */ + void cgen_set_cpu (data, mach, endian) CGEN_OPCODE_DATA *data; int mach; enum cgen_endian endian; { + static int init_once_p; + cgen_current_opcode_data = data; cgen_current_mach = mach; cgen_current_endian = endian; + /* Initialize those things that only need be done once. */ + if (! init_once_p) + { + /* Nothing to do currently. */ + init_once_p = 1; + } + #if 0 /* This isn't done here because it would put assembler support in the disassembler, etc. The caller is required to call these after calling us. */ /* Reset the hash tables. */ cgen_asm_init (); cgen_dis_init (); -#endif +#endif } static unsigned int hash_keyword_name - PARAMS ((const struct cgen_keyword *, const char *)); + PARAMS ((const CGEN_KEYWORD *, const char *, int)); static unsigned int hash_keyword_value - PARAMS ((const struct cgen_keyword *, int)); + PARAMS ((const CGEN_KEYWORD *, unsigned int)); static void build_keyword_hash_tables - PARAMS ((struct cgen_keyword *)); + PARAMS ((CGEN_KEYWORD *)); /* Return number of hash table entries to use for N elements. */ #define KEYWORD_HASH_SIZE(n) ((n) <= 31 ? 17 : 31) @@ -70,18 +85,18 @@ static void build_keyword_hash_tables /* Look up *NAMEP in the keyword table KT. The result is the keyword entry or NULL if not found. */ -const struct cgen_keyword_entry * +const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_name (kt, name) - struct cgen_keyword *kt; + CGEN_KEYWORD *kt; const char *name; { - const struct cgen_keyword_entry *ke; + const CGEN_KEYWORD_ENTRY *ke; const char *p,*n; if (kt->name_hash_table == NULL) build_keyword_hash_tables (kt); - ke = kt->name_hash_table[hash_keyword_name (kt, name)]; + ke = kt->name_hash_table[hash_keyword_name (kt, name, 0)]; /* We do case insensitive comparisons. If that ever becomes a problem, add an attribute that denotes @@ -94,7 +109,9 @@ cgen_keyword_lookup_name (kt, name) while (*p && (*p == *n - || (isalpha (*p) && tolower (*p) == tolower (*n)))) + || (isalpha ((unsigned char) *p) + && (tolower ((unsigned char) *p) + == tolower ((unsigned char) *n))))) ++n, ++p; if (!*p && !*n) @@ -103,18 +120,20 @@ cgen_keyword_lookup_name (kt, name) ke = ke->next_name; } + if (kt->null_entry) + return kt->null_entry; return NULL; } /* Look up VALUE in the keyword table KT. The result is the keyword entry or NULL if not found. */ -const struct cgen_keyword_entry * +const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_value (kt, value) - struct cgen_keyword *kt; + CGEN_KEYWORD *kt; int value; { - const struct cgen_keyword_entry *ke; + const CGEN_KEYWORD_ENTRY *ke; if (kt->name_hash_table == NULL) build_keyword_hash_tables (kt); @@ -135,21 +154,24 @@ cgen_keyword_lookup_value (kt, value) void cgen_keyword_add (kt, ke) - struct cgen_keyword *kt; - struct cgen_keyword_entry *ke; + CGEN_KEYWORD *kt; + CGEN_KEYWORD_ENTRY *ke; { unsigned int hash; if (kt->name_hash_table == NULL) build_keyword_hash_tables (kt); - hash = hash_keyword_name (kt, ke->name); + hash = hash_keyword_name (kt, ke->name, 0); ke->next_name = kt->name_hash_table[hash]; kt->name_hash_table[hash] = ke; hash = hash_keyword_value (kt, ke->value); ke->next_value = kt->value_hash_table[hash]; kt->value_hash_table[hash] = ke; + + if (ke->name[0] == 0) + kt->null_entry = ke; } /* FIXME: Need function to return count of keywords. */ @@ -162,12 +184,12 @@ cgen_keyword_add (kt, ke) The result is an opaque data item used to record the search status. It is passed to each call to cgen_keyword_search_next. */ -struct cgen_keyword_search +CGEN_KEYWORD_SEARCH cgen_keyword_search_init (kt, spec) - struct cgen_keyword *kt; + CGEN_KEYWORD *kt; const char *spec; { - struct cgen_keyword_search search; + CGEN_KEYWORD_SEARCH search; /* FIXME: Need to specify format of PARAMS. */ if (spec != NULL) @@ -186,12 +208,10 @@ cgen_keyword_search_init (kt, spec) /* Return the next keyword specified by SEARCH. The result is the next entry or NULL if there are no more. */ -const struct cgen_keyword_entry * +const CGEN_KEYWORD_ENTRY * cgen_keyword_search_next (search) - struct cgen_keyword_search *search; + CGEN_KEYWORD_SEARCH *search; { - const struct cgen_keyword_entry *ke; - /* Has search finished? */ if (search->current_hash == search->table->hash_table_size) return NULL; @@ -220,17 +240,23 @@ cgen_keyword_search_next (search) return NULL; } -/* Return first entry in hash chain for NAME. */ +/* Return first entry in hash chain for NAME. + If CASE_SENSITIVE_P is non-zero, return a case sensitive hash. */ static unsigned int -hash_keyword_name (kt, name) - const struct cgen_keyword *kt; +hash_keyword_name (kt, name, case_sensitive_p) + const CGEN_KEYWORD *kt; const char *name; + int case_sensitive_p; { unsigned int hash; - for (hash = 0; *name; ++name) - hash = (hash * 97) + (unsigned char) *name; + if (case_sensitive_p) + for (hash = 0; *name; ++name) + hash = (hash * 97) + (unsigned char) *name; + else + for (hash = 0; *name; ++name) + hash = (hash * 97) + (unsigned char) tolower (*name); return hash % kt->hash_table_size; } @@ -238,8 +264,8 @@ hash_keyword_name (kt, name) static unsigned int hash_keyword_value (kt, value) - const struct cgen_keyword *kt; - int value; + const CGEN_KEYWORD *kt; + unsigned int value; { return value % kt->hash_table_size; } @@ -250,7 +276,7 @@ hash_keyword_value (kt, value) static void build_keyword_hash_tables (kt) - struct cgen_keyword *kt; + CGEN_KEYWORD *kt; { int i; /* Use the number of compiled in entries as an estimate for the @@ -258,12 +284,12 @@ build_keyword_hash_tables (kt) unsigned int size = KEYWORD_HASH_SIZE (kt->num_init_entries); kt->hash_table_size = size; - kt->name_hash_table = (struct cgen_keyword_entry **) - xmalloc (size * sizeof (struct cgen_keyword_entry *)); - memset (kt->name_hash_table, 0, size * sizeof (struct cgen_keyword_entry *)); - kt->value_hash_table = (struct cgen_keyword_entry **) - xmalloc (size * sizeof (struct cgen_keyword_entry *)); - memset (kt->value_hash_table, 0, size * sizeof (struct cgen_keyword_entry *)); + kt->name_hash_table = (CGEN_KEYWORD_ENTRY **) + xmalloc (size * sizeof (CGEN_KEYWORD_ENTRY *)); + memset (kt->name_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *)); + kt->value_hash_table = (CGEN_KEYWORD_ENTRY **) + xmalloc (size * sizeof (CGEN_KEYWORD_ENTRY *)); + memset (kt->value_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *)); /* The table is scanned backwards as we want keywords appearing earlier to be prefered over later ones. */ @@ -273,11 +299,11 @@ build_keyword_hash_tables (kt) /* Hardware support. */ -CGEN_HW_ENTRY * +const CGEN_HW_ENTRY * cgen_hw_lookup (name) const char *name; { - CGEN_HW_ENTRY *hw = cgen_current_opcode_data->hw_list; + const CGEN_HW_ENTRY *hw = cgen_current_opcode_data->hw_list; while (hw != NULL) { diff --git a/contrib/binutils/opcodes/config.in b/contrib/binutils/opcodes/config.in index aedc490..6be7c59 100644 --- a/contrib/binutils/opcodes/config.in +++ b/contrib/binutils/opcodes/config.in @@ -1,5 +1,11 @@ /* config.in. Generated automatically from configure.in by autoheader. */ +/* Name of package. */ +#undef PACKAGE + +/* Version of package. */ +#undef VERSION + /* Define if you have the <stdlib.h> header file. */ #undef HAVE_STDLIB_H diff --git a/contrib/binutils/opcodes/configure b/contrib/binutils/opcodes/configure index 5384638..ab71c7a 100755 --- a/contrib/binutils/opcodes/configure +++ b/contrib/binutils/opcodes/configure @@ -1,7 +1,7 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.12 +# Generated automatically using autoconf version 2.12.1 # Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. # # This configure script is free software; the Free Software Foundation @@ -12,11 +12,22 @@ ac_help= ac_default_prefix=/usr/local # Any additions from configure.in: ac_help="$ac_help - --enable-targets alternative target configurations" + --enable-shared build shared libraries [default=no] + --enable-shared=PKGS only build shared libraries if the current package + appears as an element in the PKGS list" +ac_help="$ac_help + --enable-static build static libraries [default=yes] + --enable-static=PKGS only build shared libraries if the current package + appears as an element in the PKGS list" +ac_help="$ac_help + --with-gnu-ld assume the C compiler uses GNU ld [default=no]" ac_help="$ac_help - --enable-shared build shared opcodes library" + --enable-targets alternative target configurations" ac_help="$ac_help --enable-commonbfdlib build shared BFD/opcodes/libiberty library" +ac_help="$ac_help + --enable-maintainer-mode enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer" # Initialize some variables set by options. # The variables have the same names as the options, with @@ -55,6 +66,7 @@ mandir='${prefix}/man' # Initialize some other variables. subdirs= MFLAGS= MAKEFLAGS= +SHELL=${CONFIG_SHELL-/bin/sh} # Maximum number of lines to put in a shell here document. ac_max_here_lines=12 @@ -338,7 +350,7 @@ EOF verbose=yes ;; -version | --version | --versio | --versi | --vers) - echo "configure generated by autoconf version 2.12" + echo "configure generated by autoconf version 2.12.1" exit 0 ;; -with-* | --with-*) @@ -524,58 +536,9 @@ else fi -# configure.in script for the opcodes library. -# Copyright (C) 1995, 1996 Free Software Foundation, Inc. -# Written by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Check whether --enable-targets or --disable-targets was given. -if test "${enable_targets+set}" = set; then - enableval="$enable_targets" - case "${enableval}" in - yes | "") { echo "configure: error: enable-targets option must specify target names or 'all'" 1>&2; exit 1; } - ;; - no) enable_targets= ;; - *) enable_targets=$enableval ;; -esac -fi -# Check whether --enable-shared or --disable-shared was given. -if test "${enable_shared+set}" = set; then - enableval="$enable_shared" - case "${enableval}" in - yes) shared=true ;; - no) shared=false ;; - *opcodes*) shared=true ;; - *) shared=false ;; -esac -fi -# Check whether --enable-commonbfdlib or --disable-commonbfdlib was given. -if test "${enable_commonbfdlib+set}" = set; then - enableval="$enable_commonbfdlib" - case "${enableval}" in - yes) commonbfdlib=true ;; - no) commonbfdlib=false ;; - *) { echo "configure: error: bad value ${enableval} for opcodes commonbfdlib option" 1>&2; exit 1; } ;; -esac -fi - - ac_aux_dir= -for ac_dir in `cd $srcdir/..;pwd` $srcdir/`cd $srcdir/..;pwd`; do +for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do if test -f $ac_dir/install-sh; then ac_aux_dir=$ac_dir ac_install_sh="$ac_aux_dir/install-sh -c" @@ -587,7 +550,7 @@ for ac_dir in `cd $srcdir/..;pwd` $srcdir/`cd $srcdir/..;pwd`; do fi done if test -z "$ac_aux_dir"; then - { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir/..;pwd` $srcdir/`cd $srcdir/..;pwd`" 1>&2; exit 1; } + { echo "configure: error: can not find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." 1>&2; exit 1; } fi ac_config_guess=$ac_aux_dir/config.guess ac_config_sub=$ac_aux_dir/config.sub @@ -616,33 +579,33 @@ esac # Make sure we can run config.sub. -if $ac_config_sub sun4 >/dev/null 2>&1; then : +if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then : else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:625: checking host system type" >&5 +echo "configure:588: checking host system type" >&5 host_alias=$host case "$host_alias" in NONE) case $nonopt in NONE) - if host_alias=`$ac_config_guess`; then : + if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then : else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; } fi ;; *) host_alias=$nonopt ;; esac ;; esac -host=`$ac_config_sub $host_alias` +host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias` host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:646: checking target system type" >&5 +echo "configure:609: checking target system type" >&5 target_alias=$target case "$target_alias" in @@ -653,14 +616,14 @@ NONE) esac ;; esac -target=`$ac_config_sub $target_alias` +target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias` target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:664: checking build system type" >&5 +echo "configure:627: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -671,7 +634,7 @@ NONE) esac ;; esac -build=`$ac_config_sub $build_alias` +build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias` build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` @@ -682,9 +645,115 @@ test "$host_alias" != "$target_alias" && NONENONEs,x,x, && program_prefix=${target_alias}- -if test -z "$target" ; then - { echo "configure: error: Unrecognized target system type; please check config.sub." 1>&2; exit 1; } + +# We currently only use the version number for the name of any shared +# library. For user convenience, we always use the same version +# number that BFD is using. +BFD_VERSION=`grep INIT_AUTOMAKE ${srcdir}/../bfd/configure.in | sed -n -e 's/[ ]//g' -e 's/^.*,\(.*\)).*$/\1/p'` + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# ./install, which can be erroneously created by make from ./install.sh. +echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 +echo "configure:667: checking for a BSD compatible install" >&5 +if test -z "$INSTALL"; then +if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + # Account for people who put trailing slashes in PATH elements. + case "$ac_dir/" in + /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + if test -f $ac_dir/$ac_prog; then + if test $ac_prog = install && + grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + else + ac_cv_path_install="$ac_dir/$ac_prog -c" + break 2 + fi + fi + done + ;; + esac + done + IFS="$ac_save_IFS" + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL="$ac_cv_path_install" + else + # As a last resort, use the slow shell script. We don't cache a + # path for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the path is relative. + INSTALL="$ac_install_sh" + fi fi +echo "$ac_t""$INSTALL" 1>&6 + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' + +echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6 +echo "configure:721: checking whether build environment is sane" >&5 +# Just in case +sleep 1 +echo timestamp > conftestfile +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null` + if test "$*" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftestfile` + fi + if test "$*" != "X $srcdir/configure conftestfile" \ + && test "$*" != "X conftestfile $srcdir/configure"; then + + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + { echo "configure: error: ls -t appears to fail. Make sure there is not a broken +alias in your environment" 1>&2; exit 1; } + fi + + test "$2" = conftestfile + ) +then + # Ok. + : +else + { echo "configure: error: newly created file is older than distributed files! +Check your system clock" 1>&2; exit 1; } +fi +rm -f conftest* +echo "$ac_t""yes" 1>&6 if test "$program_transform_name" = s,x,x,; then program_transform_name= else @@ -704,29 +773,302 @@ test "$program_suffix" != NONE && # sed with no file args requires a program. test "$program_transform_name" = "" && program_transform_name="s,x,x," +echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 +echo "configure:778: checking whether ${MAKE-make} sets \${MAKE}" >&5 +set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` +if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftestmake <<\EOF +all: + @echo 'ac_maketemp="${MAKE}"' +EOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=` +if test -n "$ac_maketemp"; then + eval ac_cv_prog_make_${ac_make}_set=yes +else + eval ac_cv_prog_make_${ac_make}_set=no +fi +rm -f conftestmake +fi +if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then + echo "$ac_t""yes" 1>&6 + SET_MAKE= +else + echo "$ac_t""no" 1>&6 + SET_MAKE="MAKE=${MAKE-make}" +fi -# host-specific stuff: -ALLLIBS='$(TARGETLIB)' -PICFLAG= -SHLIB=unused-shlib -SHLINK=unused-shlink -if test "${shared}" = "true"; then - ALLLIBS='$(TARGETLIB) $(SHLIB) $(SHLINK)' - PICFLAG=-fpic - if test "${commonbfdlib}" = "true"; then - SHLIB=../bfd/libbfd.so.`sed -e 's/[^0-9]*\([0-9.]*\).*/\1/' ${srcdir}/../bfd/VERSION` - SHLINK=../bfd/libbfd.so - else - SHLIB=libopcodes.so.`sed -e 's/[^0-9]*\([0-9.]*\).*/\1/' ${srcdir}/../bfd/VERSION` - SHLINK=libopcodes.so - fi +PACKAGE=opcodes + +VERSION=${BFD_VERSION} + +if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then + { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; } +fi +cat >> confdefs.h <<EOF +#define PACKAGE "$PACKAGE" +EOF + +cat >> confdefs.h <<EOF +#define VERSION "$VERSION" +EOF + + + +missing_dir=`cd $ac_aux_dir && pwd` +echo $ac_n "checking for working aclocal""... $ac_c" 1>&6 +echo "configure:824: checking for working aclocal" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (aclocal --version) < /dev/null > /dev/null 2>&1; then + ACLOCAL=aclocal + echo "$ac_t""found" 1>&6 +else + ACLOCAL="$missing_dir/missing aclocal" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working autoconf""... $ac_c" 1>&6 +echo "configure:837: checking for working autoconf" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (autoconf --version) < /dev/null > /dev/null 2>&1; then + AUTOCONF=autoconf + echo "$ac_t""found" 1>&6 +else + AUTOCONF="$missing_dir/missing autoconf" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working automake""... $ac_c" 1>&6 +echo "configure:850: checking for working automake" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (automake --version) < /dev/null > /dev/null 2>&1; then + AUTOMAKE=automake + echo "$ac_t""found" 1>&6 +else + AUTOMAKE="$missing_dir/missing automake" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working autoheader""... $ac_c" 1>&6 +echo "configure:863: checking for working autoheader" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (autoheader --version) < /dev/null > /dev/null 2>&1; then + AUTOHEADER=autoheader + echo "$ac_t""found" 1>&6 +else + AUTOHEADER="$missing_dir/missing autoheader" + echo "$ac_t""missing" 1>&6 +fi + +echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6 +echo "configure:876: checking for working makeinfo" >&5 +# Run test in a subshell; some versions of sh will print an error if +# an executable is not found, even if stderr is redirected. +# Redirect stdin to placate older versions of autoconf. Sigh. +if (makeinfo --version) < /dev/null > /dev/null 2>&1; then + MAKEINFO=makeinfo + echo "$ac_t""found" 1>&6 +else + MAKEINFO="$missing_dir/missing makeinfo" + echo "$ac_t""missing" 1>&6 +fi + + + +if test $host != $build; then + ac_tool_prefix=${host_alias}- +else + ac_tool_prefix= +fi + +# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. +set dummy ${ac_tool_prefix}ar; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:899: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$AR"; then + ac_cv_prog_AR="$AR" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_AR="${ac_tool_prefix}ar" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_AR" && ac_cv_prog_AR="ar" +fi +fi +AR="$ac_cv_prog_AR" +if test -n "$AR"; then + echo "$ac_t""$AR" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + + +# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:930: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + break + fi + done + IFS="$ac_save_ifs" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + + +if test -z "$ac_cv_prog_RANLIB"; then +if test -n "$ac_tool_prefix"; then + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:961: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="ranlib" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 +fi + +else + RANLIB=":" +fi +fi + + +# Check whether --enable-shared or --disable-shared was given. +if test "${enable_shared+set}" = set; then + enableval="$enable_shared" + p=${PACKAGE-default} +case "$enableval" in +yes) enable_shared=yes ;; +no) enable_shared=no ;; +*) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_shared=no +fi + + +# Check whether --enable-static or --disable-static was given. +if test "${enable_static+set}" = set; then + enableval="$enable_static" + p=${PACKAGE-default} +case "$enableval" in +yes) enable_static=yes ;; +no) enable_static=no ;; +*) + enable_static=no + # Look at the argument we got. We use all the common list separators. + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," + for pkg in $enableval; do + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$ac_save_ifs" + ;; +esac +else + enable_static=yes +fi + +# Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 +echo "configure:1043: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$ac_word; then + ac_cv_prog_RANLIB="ranlib" + break + fi + done + IFS="$ac_save_ifs" + test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" +fi +fi +RANLIB="$ac_cv_prog_RANLIB" +if test -n "$RANLIB"; then + echo "$ac_t""$RANLIB" 1>&6 +else + echo "$ac_t""no" 1>&6 fi # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:730: checking for $ac_word" >&5 +echo "configure:1072: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -755,7 +1097,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:759: checking for $ac_word" >&5 +echo "configure:1101: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -803,7 +1145,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:807: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:1149: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -813,11 +1155,11 @@ ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext <<EOF -#line 817 "configure" +#line 1159 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:821: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:1163: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -837,12 +1179,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:841: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:1183: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:846: checking whether we are using GNU C" >&5 +echo "configure:1188: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -851,7 +1193,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:855: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1197: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -866,7 +1208,7 @@ if test $ac_cv_prog_gcc = yes; then ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:870: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:1212: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -893,207 +1235,528 @@ else test "${CFLAGS+set}" = set || CFLAGS="-g" fi +# Check whether --with-gnu-ld or --without-gnu-ld was given. +if test "${with_gnu_ld+set}" = set; then + withval="$with_gnu_ld" + test "$withval" = no || with_gnu_ld=yes +else + with_gnu_ld=no +fi -. ${srcdir}/../bfd/configure.host +ac_prog=ld +if test "$ac_cv_prog_gcc" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6 +echo "configure:1252: checking for ld used by GCC" >&5 + ac_prog=`($CC -print-prog-name=ld) 2>&5` + case "$ac_prog" in + # Accept absolute paths. + /* | [A-Za-z]:\\*) + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + echo $ac_n "checking for GNU ld""... $ac_c" 1>&6 +echo "configure:1270: checking for GNU ld" >&5 +else + echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6 +echo "configure:1273: checking for non-GNU ld" >&5 +fi +if eval "test \"`echo '$''{'ac_cv_path_LD'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test -z "$LD"; then + IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + for ac_dir in $PATH; do + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog"; then + ac_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some GNU ld's only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + if "$ac_cv_path_LD" -v 2>&1 < /dev/null | egrep '(GNU|with BFD)' > /dev/null; then + test "$with_gnu_ld" != no && break + else + test "$with_gnu_ld" != yes && break + fi + fi + done + IFS="$ac_save_ifs" +else + ac_cv_path_LD="$LD" # Let the user override the test with a path. +fi +fi -if test $host != $build; then - ac_tool_prefix=${host_alias}- +LD="$ac_cv_path_LD" +if test -n "$LD"; then + echo "$ac_t""$LD" 1>&6 else - ac_tool_prefix= + echo "$ac_t""no" 1>&6 fi +test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; } -# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. -set dummy ${ac_tool_prefix}ar; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:910: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then +echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6 +echo "configure:1309: checking if the linker ($LD) is GNU ld" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_gnu_ld'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else - if test -n "$AR"; then - ac_cv_prog_AR="$AR" # Let the user override the test. + # I'd rather use --version here, but apparently some GNU ld's only accept -v. +if $LD -v 2>&1 </dev/null | egrep '(GNU|with BFD)' 1>&5; then + ac_cv_prog_gnu_ld=yes +else + ac_cv_prog_gnu_ld=no +fi +fi + +echo "$ac_t""$ac_cv_prog_gnu_ld" 1>&6 + + +echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6 +echo "configure:1325: checking for BSD-compatible nm" >&5 +if eval "test \"`echo '$''{'ac_cv_path_NM'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 else + case "$NM" in +/* | [A-Za-z]:\\*) + ac_cv_path_NM="$NM" # Let the user override the test with a path. + ;; +*) IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do + for ac_dir in /usr/ucb /usr/ccs/bin $PATH /bin; do test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_prog_AR="${ac_tool_prefix}ar" + if test -f $ac_dir/nm; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + if ($ac_dir/nm -B /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + ac_cv_path_NM="$ac_dir/nm -B" + elif ($ac_dir/nm -p /dev/null 2>&1 | sed '1q'; exit 0) | egrep /dev/null >/dev/null; then + ac_cv_path_NM="$ac_dir/nm -p" + else + ac_cv_path_NM="$ac_dir/nm" + fi break fi done IFS="$ac_save_ifs" - test -z "$ac_cv_prog_AR" && ac_cv_prog_AR="ar" + test -z "$ac_cv_path_NM" && ac_cv_path_NM=nm + ;; +esac fi + +NM="$ac_cv_path_NM" +echo "$ac_t""$NM" 1>&6 + + +echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6 +echo "configure:1362: checking whether ln -s works" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + rm -f conftestdata +if ln -s X conftestdata 2>/dev/null +then + rm -f conftestdata + ac_cv_prog_LN_S="ln -s" +else + ac_cv_prog_LN_S=ln fi -AR="$ac_cv_prog_AR" -if test -n "$AR"; then - echo "$ac_t""$AR" 1>&6 +fi +LN_S="$ac_cv_prog_LN_S" +if test "$ac_cv_prog_LN_S" = "ln -s"; then + echo "$ac_t""yes" 1>&6 else echo "$ac_t""no" 1>&6 fi +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' + +# Check for any special flags to pass to ltconfig. +libtool_flags= +test "$enable_shared" = no && libtool_flags="$libtool_flags --disable-shared" +test "$enable_static" = no && libtool_flags="$libtool_flags --disable-static" +test "$silent" = yes && libtool_flags="$libtool_flags --silent" +test "$ac_cv_prog_gcc" = yes && libtool_flags="$libtool_flags --with-gcc" +test "$ac_cv_prog_gnu_ld" = yes && libtool_flags="$libtool_flags --with-gnu-ld" + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case "$host" in +*-*-irix6*) + # Find out which ABI we are using. + echo '#line 1398 "configure"' > conftest.$ac_ext + if { (eval echo configure:1399: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + case "`/usr/bin/file conftest.o`" in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + rm -rf conftest* + ;; +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + CFLAGS="$CFLAGS -belf" + ;; +esac -# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. -set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +# Actually configure libtool. ac_aux_dir is where install-sh is found. +CC="$CC" CFLAGS="$CFLAGS" CPPFLAGS="$CPPFLAGS" \ +LD="$LD" NM="$NM" RANLIB="$RANLIB" LN_S="$LN_S" \ +${CONFIG_SHELL-/bin/sh} $ac_aux_dir/ltconfig \ +$libtool_flags --no-verify $ac_aux_dir/ltmain.sh $host \ +|| { echo "configure: error: libtool configure failed" 1>&2; exit 1; } + + +# Check whether --enable-targets or --disable-targets was given. +if test "${enable_targets+set}" = set; then + enableval="$enable_targets" + case "${enableval}" in + yes | "") { echo "configure: error: enable-targets option must specify target names or 'all'" 1>&2; exit 1; } + ;; + no) enable_targets= ;; + *) enable_targets=$enableval ;; +esac +fi +# Check whether --enable-commonbfdlib or --disable-commonbfdlib was given. +if test "${enable_commonbfdlib+set}" = set; then + enableval="$enable_commonbfdlib" + case "${enableval}" in + yes) commonbfdlib=true ;; + no) commonbfdlib=false ;; + *) { echo "configure: error: bad value ${enableval} for opcodes commonbfdlib option" 1>&2; exit 1; } ;; +esac +fi + + + + + +if test -z "$target" ; then + { echo "configure: error: Unrecognized target system type; please check config.sub." 1>&2; exit 1; } +fi +if test "$program_transform_name" = s,x,x,; then + program_transform_name= +else + # Double any \ or $. echo might interpret backslashes. + cat <<\EOF_SED > conftestsed +s,\\,\\\\,g; s,\$,$$,g +EOF_SED + program_transform_name="`echo $program_transform_name|sed -f conftestsed`" + rm -f conftestsed +fi +test "$program_prefix" != NONE && + program_transform_name="s,^,${program_prefix},; $program_transform_name" +# Use a double $ so make ignores it. +test "$program_suffix" != NONE && + program_transform_name="s,\$\$,${program_suffix},; $program_transform_name" + +# sed with no file args requires a program. +test "$program_transform_name" = "" && program_transform_name="s,x,x," + + +echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 +echo "configure:1477: checking whether to enable maintainer-specific portions of Makefiles" >&5 + # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. +if test "${enable_maintainer_mode+set}" = set; then + enableval="$enable_maintainer_mode" + USE_MAINTAINER_MODE=$enableval +else + USE_MAINTAINER_MODE=no +fi + + echo "$ac_t""$USE_MAINTAINER_MODE" 1>&6 + if test $USE_MAINTAINER_MODE = yes; then + MAINT= + else + MAINT='#M#' + fi + + +echo $ac_n "checking for Cygwin32 environment""... $ac_c" 1>&6 +echo "configure:1495: checking for Cygwin32 environment" >&5 +if eval "test \"`echo '$''{'am_cv_cygwin32'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <<EOF +#line 1500 "configure" +#include "confdefs.h" + +int main() { +return __CYGWIN32__; +; return 0; } +EOF +if { (eval echo configure:1507: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + am_cv_cygwin32=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + am_cv_cygwin32=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$am_cv_cygwin32" 1>&6 +CYGWIN32= +test "$am_cv_cygwin32" = yes && CYGWIN32=yes +echo $ac_n "checking for Mingw32 environment""... $ac_c" 1>&6 +echo "configure:1524: checking for Mingw32 environment" >&5 +if eval "test \"`echo '$''{'am_cv_mingw32'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext <<EOF +#line 1529 "configure" +#include "confdefs.h" + +int main() { +return __MINGW32__; +; return 0; } +EOF +if { (eval echo configure:1536: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + am_cv_mingw32=yes +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + am_cv_mingw32=no +fi +rm -f conftest* +rm -f conftest* +fi + +echo "$ac_t""$am_cv_mingw32" 1>&6 +MINGW32= +test "$am_cv_mingw32" = yes && MINGW32=yes + + +echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 +echo "configure:1555: checking for executable suffix" >&5 +if eval "test \"`echo '$''{'am_cv_exeext'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + if test "$CYGWIN32" = yes || test "$MINGW32" = yes; then +am_cv_exeext=.exe +else +cat > am_c_test.c << 'EOF' +int main() { +/* Nothing needed here */ +} +EOF +${CC-cc} -o am_c_test $CFLAGS $CPPFLAGS $LDFLAGS am_c_test.c $LIBS 1>&5 +am_cv_exeext=`echo am_c_test.* | grep -v am_c_test.c | sed -e s/am_c_test//` +rm -f am_c_test* +fi + +test x"${am_cv_exeext}" = x && am_cv_exeext=no +fi +EXEEXT="" +test x"${am_cv_exeext}" != xno && EXEEXT=${am_cv_exeext} +echo "$ac_t""${am_cv_exeext}" 1>&6 + + +# host-specific stuff: + +# Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:941: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then +echo "configure:1584: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else - if test -n "$RANLIB"; then - ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. else IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" for ac_dir in $PATH; do test -z "$ac_dir" && ac_dir=. if test -f $ac_dir/$ac_word; then - ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + ac_cv_prog_CC="gcc" break fi done IFS="$ac_save_ifs" fi fi -RANLIB="$ac_cv_prog_RANLIB" -if test -n "$RANLIB"; then - echo "$ac_t""$RANLIB" 1>&6 +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 else echo "$ac_t""no" 1>&6 fi - -if test -z "$ac_cv_prog_RANLIB"; then -if test -n "$ac_tool_prefix"; then - # Extract the first word of "ranlib", so it can be a program name with args. -set dummy ranlib; ac_word=$2 +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:972: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then +echo "configure:1613: checking for $ac_word" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else - if test -n "$RANLIB"; then - ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. else IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" + ac_prog_rejected=no for ac_dir in $PATH; do test -z "$ac_dir" && ac_dir=. if test -f $ac_dir/$ac_word; then - ac_cv_prog_RANLIB="ranlib" + if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" break fi done IFS="$ac_save_ifs" - test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# -gt 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + set dummy "$ac_dir/$ac_word" "$@" + shift + ac_cv_prog_CC="$@" + fi fi fi -RANLIB="$ac_cv_prog_RANLIB" -if test -n "$RANLIB"; then - echo "$ac_t""$RANLIB" 1>&6 +fi +CC="$ac_cv_prog_CC" +if test -n "$CC"; then + echo "$ac_t""$CC" 1>&6 else echo "$ac_t""no" 1>&6 fi -else - RANLIB=":" -fi + test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; } fi -# Find a good install program. We prefer a C program (faster), -# so one script is as good as another. But avoid the broken or -# incompatible versions: -# SysV /etc/install, /usr/sbin/install -# SunOS /usr/etc/install -# IRIX /sbin/install -# AIX /bin/install -# AFS /usr/afsws/bin/install, which mishandles nonexistent args -# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" -# ./install, which can be erroneously created by make from ./install.sh. -echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:1014: checking for a BSD compatible install" >&5 -if test -z "$INSTALL"; then -if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do - # Account for people who put trailing slashes in PATH elements. - case "$ac_dir/" in - /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; - *) - # OSF1 and SCO ODT 3.0 have their own names for install. - for ac_prog in ginstall installbsd scoinst install; do - if test -f $ac_dir/$ac_prog; then - if test $ac_prog = install && - grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then - # AIX install. It has an incompatible calling convention. - # OSF/1 installbsd also uses dspmsg, but is usable. - : - else - ac_cv_path_install="$ac_dir/$ac_prog -c" - break 2 - fi - fi - done - ;; - esac - done - IFS="$ac_save_IFS" +echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 +echo "configure:1661: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 -fi - if test "${ac_cv_path_install+set}" = set; then - INSTALL="$ac_cv_path_install" +ac_ext=c +# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. +ac_cpp='$CPP $CPPFLAGS' +ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' +ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' +cross_compiling=$ac_cv_prog_cc_cross + +cat > conftest.$ac_ext <<EOF +#line 1671 "configure" +#include "confdefs.h" +main(){return(0);} +EOF +if { (eval echo configure:1675: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then + ac_cv_prog_cc_works=yes + # If we can't run a trivial program, we are probably using a cross compiler. + if (./conftest; exit) 2>/dev/null; then + ac_cv_prog_cc_cross=no else - # As a last resort, use the slow shell script. We don't cache a - # path for INSTALL within a source directory, because that will - # break other packages using the cache if that directory is - # removed, or if the path is relative. - INSTALL="$ac_install_sh" + ac_cv_prog_cc_cross=yes fi +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + ac_cv_prog_cc_works=no fi -echo "$ac_t""$INSTALL" 1>&6 - -# Use test -z because SunOS4 sh mishandles braces in ${var-val}. -# It thinks the first close brace ends the variable substitution. -test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' - -test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' - +rm -fr conftest* -if test "${shared}" = "true"; then - if test "${GCC}" != "yes" && test "${shared_non_gcc}" != "yes"; then - echo "configure: warning: opcodes --enable-shared only supported when using gcc" 1>&2 - shared=false - ALLLIBS='$(TARGETLIB)' - PICFLAG= - SHLIB=unused-shlib - fi +echo "$ac_t""$ac_cv_prog_cc_works" 1>&6 +if test $ac_cv_prog_cc_works = no; then + { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi +echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 +echo "configure:1695: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 +cross_compiling=$ac_cv_prog_cc_cross +echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 +echo "configure:1700: checking whether we are using GNU C" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.c <<EOF +#ifdef __GNUC__ + yes; +#endif +EOF +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1709: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then + ac_cv_prog_gcc=yes +else + ac_cv_prog_gcc=no +fi +fi +echo "$ac_t""$ac_cv_prog_gcc" 1>&6 +if test $ac_cv_prog_gcc = yes; then + GCC=yes + ac_test_CFLAGS="${CFLAGS+set}" + ac_save_CFLAGS="$CFLAGS" + CFLAGS= + echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 +echo "configure:1724: checking whether ${CC-cc} accepts -g" >&5 +if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + echo 'void f(){}' > conftest.c +if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then + ac_cv_prog_cc_g=yes +else + ac_cv_prog_cc_g=no +fi +rm -f conftest* +fi - - -if test "${commonbfdlib}" = "true"; then - COMMON_SHLIB=yes - # Rebuild the shared library if libiberty or libbfd changes. - SHLIB_DEP="../libiberty/libiberty.a ../bfd/libbfd.a" - BFD_PICLIST=../bfd/piclist +echo "$ac_t""$ac_cv_prog_cc_g" 1>&6 + if test "$ac_test_CFLAGS" = set; then + CFLAGS="$ac_save_CFLAGS" + elif test $ac_cv_prog_cc_g = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-O2" + fi else - COMMON_SHLIB= - SHLIB_DEP= - BFD_PICLIST= + GCC= + test "${CFLAGS+set}" = set || CFLAGS="-g" fi +. ${srcdir}/../bfd/configure.host +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' + echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:1097: checking how to run the C preprocessor" >&5 +echo "configure:1760: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -1108,13 +1771,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 1112 "configure" +#line 1775 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1118: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1781: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then : @@ -1125,13 +1788,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 1129 "configure" +#line 1792 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1135: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1798: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then : @@ -1157,17 +1820,17 @@ for ac_hdr in string.h strings.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1161: checking for $ac_hdr" >&5 +echo "configure:1824: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1166 "configure" +#line 1829 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1171: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1834: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then rm -rf conftest* @@ -1194,6 +1857,7 @@ fi done + # target-specific stuff: # Canonicalize the secondary target names. @@ -1224,7 +1888,7 @@ done # Utility var, documents generic cgen support files. -cgen_files="cgen-opc.o cgen-asm.o cgen-dis.o" +cgen_files="cgen-opc.lo cgen-asm.lo cgen-dis.lo" # We don't do any links based on the target system, just makefile config. @@ -1238,36 +1902,39 @@ if test x${all_targets} = xfalse ; then ad=`echo $arch | sed -e s/bfd_//g -e s/_arch//g` archdefs="$archdefs -DARCH_$ad" case "$arch" in - bfd_a29k_arch) ta="$ta a29k-dis.o" ;; + bfd_a29k_arch) ta="$ta a29k-dis.lo" ;; bfd_alliant_arch) ;; - bfd_alpha_arch) ta="$ta alpha-dis.o alpha-opc.o" ;; - bfd_arm_arch) ta="$ta arm-dis.o" ;; + bfd_alpha_arch) ta="$ta alpha-dis.lo alpha-opc.lo" ;; + bfd_arc_arch) ta="$ta arc-dis.lo arc-opc.lo" ;; + bfd_arm_arch) ta="$ta arm-dis.lo" ;; bfd_convex_arch) ;; - bfd_d10v_arch) ta="$ta d10v-dis.o d10v-opc.o" ;; - bfd_h8300_arch) ta="$ta h8300-dis.o" ;; - bfd_h8500_arch) ta="$ta h8500-dis.o" ;; - bfd_hppa_arch) ta="$ta hppa-dis.o" ;; - bfd_i386_arch) ta="$ta i386-dis.o" ;; + bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;; + bfd_h8300_arch) ta="$ta h8300-dis.lo" ;; + bfd_h8500_arch) ta="$ta h8500-dis.lo" ;; + bfd_hppa_arch) ta="$ta hppa-dis.lo" ;; + bfd_i386_arch) ta="$ta i386-dis.lo" ;; bfd_i860_arch) ;; - bfd_i960_arch) ta="$ta i960-dis.o" ;; - bfd_m32r_arch) ta="$ta $cgen_files m32r-opc.o m32r-asm.o m32r-dis.o" ;; - bfd_m68k_arch) ta="$ta m68k-dis.o m68k-opc.o" ;; - bfd_m88k_arch) ta="$ta m88k-dis.o" ;; - bfd_mips_arch) ta="$ta mips-dis.o mips-opc.o mips16-opc.o" ;; - bfd_mn10200_arch) ta="$ta m10200-dis.o m10200-opc.o" ;; - bfd_mn10300_arch) ta="$ta m10300-dis.o m10300-opc.o" ;; - bfd_ns32k_arch) ta="$ta ns32k-dis.o" ;; - bfd_powerpc_arch) ta="$ta ppc-dis.o ppc-opc.o" ;; + bfd_i960_arch) ta="$ta i960-dis.lo" ;; + bfd_m32r_arch) ta="$ta $cgen_files m32r-opc.lo m32r-asm.lo m32r-dis.lo" ;; + bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;; + bfd_m88k_arch) ta="$ta m88k-dis.lo" ;; + bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo" ;; + bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;; + bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; + bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;; + bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; bfd_pyramid_arch) ;; bfd_romp_arch) ;; - bfd_rs6000_arch) ta="$ta ppc-dis.o ppc-opc.o" ;; - bfd_sh_arch) ta="$ta sh-dis.o" ;; - bfd_sparc_arch) ta="$ta sparc-dis.o sparc-opc.o" ;; + bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; + bfd_sh_arch) ta="$ta sh-dis.lo" ;; + bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; + bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_vax_arch) ;; - bfd_w65_arch) ta="$ta w65-dis.o" ;; + bfd_w65_arch) ta="$ta w65-dis.lo" ;; bfd_we32k_arch) ;; - bfd_z8k_arch) ta="$ta z8k-dis.o" ;; + bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; "") ;; *) { echo "configure: error: *** unknown target architecture $arch" 1>&2; exit 1; } ;; @@ -1327,7 +1994,7 @@ EOF # Ultrix sh set writes to stderr and can't be redirected directly, # and sets the high bit in the cache file unless we assign to the vars. (set) 2>&1 | - case `(ac_space=' '; set) 2>&1` in + case `(ac_space=' '; set) 2>&1 | grep ac_space` in *ac_space=\ *) # `set' does not quote correctly, so add quotes (double-quote substitution # turns \\\\ into \\, and sed turns \\ into \). @@ -1394,7 +2061,7 @@ do echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion" exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;; -version | --version | --versio | --versi | --vers | --ver | --ve | --v) - echo "$CONFIG_STATUS generated by autoconf version 2.12" + echo "$CONFIG_STATUS generated by autoconf version 2.12.1" exit 0 ;; -help | --help | --hel | --he | --h) echo "\$ac_cs_usage"; exit 0 ;; @@ -1414,6 +2081,7 @@ sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g; s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF $ac_vpsub $extrasub +s%@SHELL@%$SHELL%g s%@CFLAGS@%$CFLAGS%g s%@CPPFLAGS@%$CPPFLAGS%g s%@CXXFLAGS@%$CXXFLAGS%g @@ -1450,23 +2118,27 @@ s%@build_alias@%$build_alias%g s%@build_cpu@%$build_cpu%g s%@build_vendor@%$build_vendor%g s%@build_os@%$build_os%g -s%@CC@%$CC%g -s%@HDEFINES@%$HDEFINES%g -s%@AR@%$AR%g -s%@RANLIB@%$RANLIB%g s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g s%@INSTALL_DATA@%$INSTALL_DATA%g -s%@ALLLIBS@%$ALLLIBS%g -s%@PICFLAG@%$PICFLAG%g -s%@SHLIB@%$SHLIB%g -s%@SHLIB_CC@%$SHLIB_CC%g -s%@SHLIB_CFLAGS@%$SHLIB_CFLAGS%g -s%@SHLIB_LIBS@%$SHLIB_LIBS%g -s%@COMMON_SHLIB@%$COMMON_SHLIB%g -s%@SHLIB_DEP@%$SHLIB_DEP%g -s%@BFD_PICLIST@%$BFD_PICLIST%g -s%@SHLINK@%$SHLINK%g -s%@INSTALL_SHLIB@%$INSTALL_SHLIB%g +s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g +s%@PACKAGE@%$PACKAGE%g +s%@VERSION@%$VERSION%g +s%@ACLOCAL@%$ACLOCAL%g +s%@AUTOCONF@%$AUTOCONF%g +s%@AUTOMAKE@%$AUTOMAKE%g +s%@AUTOHEADER@%$AUTOHEADER%g +s%@MAKEINFO@%$MAKEINFO%g +s%@SET_MAKE@%$SET_MAKE%g +s%@AR@%$AR%g +s%@RANLIB@%$RANLIB%g +s%@CC@%$CC%g +s%@LD@%$LD%g +s%@NM@%$NM%g +s%@LN_S@%$LN_S%g +s%@LIBTOOL@%$LIBTOOL%g +s%@MAINT@%$MAINT%g +s%@EXEEXT@%$EXEEXT%g +s%@HDEFINES@%$HDEFINES%g s%@CPP@%$CPP%g s%@archdefs@%$archdefs%g s%@BFD_MACHINES@%$BFD_MACHINES%g @@ -1680,9 +2352,11 @@ fi; done EOF cat >> $CONFIG_STATUS <<EOF + EOF cat >> $CONFIG_STATUS <<\EOF -case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac +test -z "$CONFIG_HEADERS" || echo timestamp > stamp-h + exit 0 EOF chmod +x $CONFIG_STATUS diff --git a/contrib/binutils/opcodes/configure.in b/contrib/binutils/opcodes/configure.in index 67057a0..3a24a43 100644 --- a/contrib/binutils/opcodes/configure.in +++ b/contrib/binutils/opcodes/configure.in @@ -1,22 +1,30 @@ +dnl Process this file with autoconf to produce a configure script. +dnl + AC_PREREQ(2.5) AC_INIT(z8k-dis.c) -# configure.in script for the opcodes library. -# Copyright (C) 1995, 1996 Free Software Foundation, Inc. -# Written by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +AC_CANONICAL_SYSTEM + +# We currently only use the version number for the name of any shared +# library. For user convenience, we always use the same version +# number that BFD is using. +changequote(,)dnl +BFD_VERSION=`grep INIT_AUTOMAKE ${srcdir}/../bfd/configure.in | sed -n -e 's/[ ]//g' -e 's/^.*,\(.*\)).*$/\1/p'` +changequote([,])dnl + +AM_INIT_AUTOMAKE(opcodes, ${BFD_VERSION}) + +dnl These must be called before AM_PROG_LIBTOOL, because it may want +dnl to call AC_CHECK_PROG. +AC_CHECK_TOOL(AR, ar) +AC_CHECK_TOOL(RANLIB, ranlib, :) + +dnl Default to a non shared library. This may be overridden by the +dnl configure option --enable-shared. +AM_DISABLE_SHARED + +AM_PROG_LIBTOOL AC_ARG_ENABLE(targets, [ --enable-targets alternative target configurations], @@ -26,14 +34,6 @@ AC_ARG_ENABLE(targets, no) enable_targets= ;; *) enable_targets=$enableval ;; esac])dnl -AC_ARG_ENABLE(shared, -[ --enable-shared build shared opcodes library], -[case "${enableval}" in - yes) shared=true ;; - no) shared=false ;; - *opcodes*) shared=true ;; - *) shared=false ;; -esac])dnl AC_ARG_ENABLE(commonbfdlib, [ --enable-commonbfdlib build shared BFD/opcodes/libiberty library], [case "${enableval}" in @@ -42,80 +42,29 @@ AC_ARG_ENABLE(commonbfdlib, *) AC_MSG_ERROR([bad value ${enableval} for opcodes commonbfdlib option]) ;; esac])dnl -AC_CONFIG_HEADER(config.h:config.in) +AM_CONFIG_HEADER(config.h:config.in) -AC_CONFIG_AUX_DIR(`cd $srcdir/..;pwd`) -AC_CANONICAL_SYSTEM if test -z "$target" ; then AC_MSG_ERROR(Unrecognized target system type; please check config.sub.) fi AC_ARG_PROGRAM -# host-specific stuff: +AM_MAINTAINER_MODE +AM_CYGWIN32 +AM_EXEEXT -ALLLIBS='$(TARGETLIB)' -PICFLAG= -SHLIB=unused-shlib -SHLINK=unused-shlink -if test "${shared}" = "true"; then - ALLLIBS='$(TARGETLIB) $(SHLIB) $(SHLINK)' - PICFLAG=-fpic - if test "${commonbfdlib}" = "true"; then -changequote(,)dnl - SHLIB=../bfd/libbfd.so.`sed -e 's/[^0-9]*\([0-9.]*\).*/\1/' ${srcdir}/../bfd/VERSION` -changequote([,])dnl - SHLINK=../bfd/libbfd.so - else -changequote(,)dnl - SHLIB=libopcodes.so.`sed -e 's/[^0-9]*\([0-9.]*\).*/\1/' ${srcdir}/../bfd/VERSION` -changequote([,])dnl - SHLINK=libopcodes.so - fi -fi +# host-specific stuff: AC_PROG_CC . ${srcdir}/../bfd/configure.host AC_SUBST(HDEFINES) -AC_CHECK_TOOL(AR, ar) -AC_CHECK_TOOL(RANLIB, ranlib, :) -AC_PROG_INSTALL - -if test "${shared}" = "true"; then - if test "${GCC}" != "yes" && test "${shared_non_gcc}" != "yes"; then - AC_MSG_WARN([opcodes --enable-shared only supported when using gcc]) - shared=false - ALLLIBS='$(TARGETLIB)' - PICFLAG= - SHLIB=unused-shlib - fi -fi - -AC_SUBST(ALLLIBS) -AC_SUBST(PICFLAG) -AC_SUBST(SHLIB) -AC_SUBST(SHLIB_CC) -AC_SUBST(SHLIB_CFLAGS) -AC_SUBST(SHLIB_LIBS) -if test "${commonbfdlib}" = "true"; then - COMMON_SHLIB=yes - # Rebuild the shared library if libiberty or libbfd changes. - SHLIB_DEP="../libiberty/libiberty.a ../bfd/libbfd.a" - BFD_PICLIST=../bfd/piclist -else - COMMON_SHLIB= - SHLIB_DEP= - BFD_PICLIST= -fi -AC_SUBST(COMMON_SHLIB) -AC_SUBST(SHLIB_DEP) -AC_SUBST(BFD_PICLIST) -AC_SUBST(SHLINK) -AC_SUBST(INSTALL_SHLIB) +AM_PROG_INSTALL AC_CHECK_HEADERS(string.h strings.h stdlib.h) + # target-specific stuff: # Canonicalize the secondary target names. @@ -146,7 +95,7 @@ done # Utility var, documents generic cgen support files. -cgen_files="cgen-opc.o cgen-asm.o cgen-dis.o" +cgen_files="cgen-opc.lo cgen-asm.lo cgen-dis.lo" # We don't do any links based on the target system, just makefile config. @@ -160,36 +109,39 @@ if test x${all_targets} = xfalse ; then ad=`echo $arch | sed -e s/bfd_//g -e s/_arch//g` archdefs="$archdefs -DARCH_$ad" case "$arch" in - bfd_a29k_arch) ta="$ta a29k-dis.o" ;; + bfd_a29k_arch) ta="$ta a29k-dis.lo" ;; bfd_alliant_arch) ;; - bfd_alpha_arch) ta="$ta alpha-dis.o alpha-opc.o" ;; - bfd_arm_arch) ta="$ta arm-dis.o" ;; + bfd_alpha_arch) ta="$ta alpha-dis.lo alpha-opc.lo" ;; + bfd_arc_arch) ta="$ta arc-dis.lo arc-opc.lo" ;; + bfd_arm_arch) ta="$ta arm-dis.lo" ;; bfd_convex_arch) ;; - bfd_d10v_arch) ta="$ta d10v-dis.o d10v-opc.o" ;; - bfd_h8300_arch) ta="$ta h8300-dis.o" ;; - bfd_h8500_arch) ta="$ta h8500-dis.o" ;; - bfd_hppa_arch) ta="$ta hppa-dis.o" ;; - bfd_i386_arch) ta="$ta i386-dis.o" ;; + bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;; + bfd_h8300_arch) ta="$ta h8300-dis.lo" ;; + bfd_h8500_arch) ta="$ta h8500-dis.lo" ;; + bfd_hppa_arch) ta="$ta hppa-dis.lo" ;; + bfd_i386_arch) ta="$ta i386-dis.lo" ;; bfd_i860_arch) ;; - bfd_i960_arch) ta="$ta i960-dis.o" ;; - bfd_m32r_arch) ta="$ta $cgen_files m32r-opc.o m32r-asm.o m32r-dis.o" ;; - bfd_m68k_arch) ta="$ta m68k-dis.o m68k-opc.o" ;; - bfd_m88k_arch) ta="$ta m88k-dis.o" ;; - bfd_mips_arch) ta="$ta mips-dis.o mips-opc.o mips16-opc.o" ;; - bfd_mn10200_arch) ta="$ta m10200-dis.o m10200-opc.o" ;; - bfd_mn10300_arch) ta="$ta m10300-dis.o m10300-opc.o" ;; - bfd_ns32k_arch) ta="$ta ns32k-dis.o" ;; - bfd_powerpc_arch) ta="$ta ppc-dis.o ppc-opc.o" ;; + bfd_i960_arch) ta="$ta i960-dis.lo" ;; + bfd_m32r_arch) ta="$ta $cgen_files m32r-opc.lo m32r-asm.lo m32r-dis.lo" ;; + bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;; + bfd_m88k_arch) ta="$ta m88k-dis.lo" ;; + bfd_mips_arch) ta="$ta mips-dis.lo mips-opc.lo mips16-opc.lo" ;; + bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;; + bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; + bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;; + bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; bfd_pyramid_arch) ;; bfd_romp_arch) ;; - bfd_rs6000_arch) ta="$ta ppc-dis.o ppc-opc.o" ;; - bfd_sh_arch) ta="$ta sh-dis.o" ;; - bfd_sparc_arch) ta="$ta sparc-dis.o sparc-opc.o" ;; + bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; + bfd_sh_arch) ta="$ta sh-dis.lo" ;; + bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; + bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_vax_arch) ;; - bfd_w65_arch) ta="$ta w65-dis.o" ;; + bfd_w65_arch) ta="$ta w65-dis.lo" ;; bfd_we32k_arch) ;; - bfd_z8k_arch) ta="$ta z8k-dis.o" ;; + bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; "") ;; *) AC_MSG_ERROR(*** unknown target architecture $arch) ;; @@ -226,5 +178,4 @@ fi AC_SUBST(archdefs) AC_SUBST(BFD_MACHINES) -AC_OUTPUT(Makefile, -[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac]) +AC_OUTPUT(Makefile) diff --git a/contrib/binutils/opcodes/dep-in.sed b/contrib/binutils/opcodes/dep-in.sed index ebf69eb..c30dee5 100644 --- a/contrib/binutils/opcodes/dep-in.sed +++ b/contrib/binutils/opcodes/dep-in.sed @@ -3,6 +3,7 @@ s/\\\n */ /g t loop +s!\.o:!.lo:! s! @BFD_H@! $(BFD_H)!g s!@INCDIR@!$(INCDIR)!g s!@BFDDIR@!$(BFDDIR)!g diff --git a/contrib/binutils/opcodes/dis-buf.c b/contrib/binutils/opcodes/dis-buf.c index 47a2e33..befbd59 100644 --- a/contrib/binutils/opcodes/dis-buf.c +++ b/contrib/binutils/opcodes/dis-buf.c @@ -68,3 +68,13 @@ generic_print_address (addr, info) { (*info->fprintf_func) (info->stream, "0x%x", addr); } + +/* Just return the given address. */ + +int +generic_symbol_at_address (addr, info) + bfd_vma addr; + struct disassemble_info * info; +{ + return 1; +} diff --git a/contrib/binutils/opcodes/disassemble.c b/contrib/binutils/opcodes/disassemble.c index 66cff50..213ff7f 100644 --- a/contrib/binutils/opcodes/disassemble.c +++ b/contrib/binutils/opcodes/disassemble.c @@ -21,6 +21,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #ifdef ARCH_all #define ARCH_a29k #define ARCH_alpha +#define ARCH_arc #define ARCH_arm #define ARCH_d10v #define ARCH_h8300 @@ -39,10 +40,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_rs6000 #define ARCH_sh #define ARCH_sparc +#define ARCH_tic30 +#define ARCH_v850 #define ARCH_w65 #define ARCH_z8k #endif + disassembler_ftype disassembler (abfd) bfd *abfd; @@ -65,6 +69,14 @@ disassembler (abfd) disassemble = print_insn_alpha; break; #endif +#ifdef ARCH_arc + case bfd_arch_arc: + { + disassemble = arc_get_disassembler (bfd_get_mach (abfd), + bfd_big_endian (abfd)); + break; + } +#endif #ifdef ARCH_arm case bfd_arch_arm: if (bfd_big_endian (abfd)) @@ -172,6 +184,16 @@ disassembler (abfd) disassemble = print_insn_sparc; break; #endif +#ifdef ARCH_tic30 + case bfd_arch_tic30: + disassemble = print_insn_tic30; + break; +#endif +#ifdef ARCH_v850 + case bfd_arch_v850: + disassemble = print_insn_v850; + break; +#endif #ifdef ARCH_w65 case bfd_arch_w65: disassemble = print_insn_w65; @@ -190,3 +212,4 @@ disassembler (abfd) } return disassemble; } + diff --git a/contrib/binutils/opcodes/i386-dis.c b/contrib/binutils/opcodes/i386-dis.c index a8f8c80..63b7d9c 100644 --- a/contrib/binutils/opcodes/i386-dis.c +++ b/contrib/binutils/opcodes/i386-dis.c @@ -1,5 +1,5 @@ /* Print i386 instructions for GDB, the GNU debugger. - Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 1997 + Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. This file is part of GDB. @@ -267,8 +267,8 @@ static struct dis386 dis386[] = { { "addS", Gv, Ev }, { "addb", AL, Ib }, { "addS", eAX, Iv }, - { "pushl", es }, - { "popl", es }, + { "pushS", es }, + { "popS", es }, /* 08 */ { "orb", Eb, Gb }, { "orS", Ev, Gv }, @@ -276,7 +276,7 @@ static struct dis386 dis386[] = { { "orS", Gv, Ev }, { "orb", AL, Ib }, { "orS", eAX, Iv }, - { "pushl", cs }, + { "pushS", cs }, { "(bad)" }, /* 0x0f extended opcode escape */ /* 10 */ { "adcb", Eb, Gb }, @@ -285,8 +285,8 @@ static struct dis386 dis386[] = { { "adcS", Gv, Ev }, { "adcb", AL, Ib }, { "adcS", eAX, Iv }, - { "pushl", ss }, - { "popl", ss }, + { "pushS", ss }, + { "popS", ss }, /* 18 */ { "sbbb", Eb, Gb }, { "sbbS", Ev, Gv }, @@ -294,8 +294,8 @@ static struct dis386 dis386[] = { { "sbbS", Gv, Ev }, { "sbbb", AL, Ib }, { "sbbS", eAX, Iv }, - { "pushl", ds }, - { "popl", ds }, + { "pushS", ds }, + { "popS", ds }, /* 20 */ { "andb", Eb, Gb }, { "andS", Ev, Gv }, @@ -380,7 +380,7 @@ static struct dis386 dis386[] = { /* 68 */ { "pushS", Iv }, /* 386 book wrong */ { "imulS", Gv, Ev, Iv }, - { "pushl", sIb }, /* push of byte really pushes 4 bytes */ + { "pushS", sIb }, /* push of byte really pushes 2 or 4 bytes */ { "imulS", Gv, Ev, Ib }, { "insb", Yb, indirDX }, { "insS", Yv, indirDX }, @@ -418,9 +418,9 @@ static struct dis386 dis386[] = { { "movS", Ev, Gv }, { "movb", Gb, Eb }, { "movS", Gv, Ev }, - { "movw", Ew, Sw }, + { "movS", Ev, Sw }, { "leaS", Gv, M }, - { "movw", Sw, Ew }, + { "movS", Sw, Ev }, { "popS", Ev }, /* 90 */ { "nop" }, @@ -432,8 +432,8 @@ static struct dis386 dis386[] = { { "xchgS", eSI, eAX }, { "xchgS", eDI, eAX }, /* 98 */ - { "cwtl" }, - { "cltd" }, + { "cWtS" }, + { "cStd" }, { "lcall", Ap }, { "(bad)" }, /* fwait */ { "pushf" }, @@ -670,8 +670,8 @@ static struct dis386 dis386_twobyte[] = { { "setle", Eb }, { "setg", Eb }, /* a0 */ - { "pushl", fs }, - { "popl", fs }, + { "pushS", fs }, + { "popS", fs }, { "cpuid" }, { "btS", Ev, Gv }, { "shldS", Ev, Gv, Ib }, @@ -679,8 +679,8 @@ static struct dis386 dis386_twobyte[] = { { "(bad)" }, { "(bad)" }, /* a8 */ - { "pushl", gs }, - { "popl", gs }, + { "pushS", gs }, + { "popS", gs }, { "rsm" }, { "btsS", Ev, Gv }, { "shrdS", Ev, Gv, Ib }, @@ -734,12 +734,12 @@ static struct dis386 dis386_twobyte[] = { /* d8 */ { "psubusb", MX, EM }, { "psubusw", MX, EM }, - { "pand", MX, EM }, { "(bad)" }, + { "pand", MX, EM }, { "paddusb", MX, EM }, { "paddusw", MX, EM }, { "(bad)" }, - { "pand", MX, EM }, + { "pandn", MX, EM }, /* e0 */ { "(bad)" }, { "psraw", MX, EM }, @@ -809,7 +809,7 @@ static const unsigned char twobyte_has_modrm[256] = { /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ - /* d0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,0,1, /* df */ + /* d0 */ 0,1,1,1,0,1,0,0,1,1,0,1,1,1,0,1, /* df */ /* e0 */ 0,1,1,0,0,1,0,0,1,1,0,1,1,1,0,1, /* ef */ /* f0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,1,0 /* ff */ }; @@ -1164,6 +1164,8 @@ int print_insn_x86 (pc, info, aflag, dflag) bfd_vma pc; disassemble_info *info; + int aflag; + int dflag; { struct dis386 *dp; int i; @@ -1229,7 +1231,10 @@ print_insn_x86 (pc, info, aflag, dflag) if (prefixes & PREFIX_ADR) { aflag ^= 1; - oappend ("addr16 "); + if (aflag) + oappend ("addr32 "); + else + oappend ("addr16 "); } if (*codep == 0x0f) @@ -1660,6 +1665,13 @@ putop (template, aflag, dflag) else *obufp++ = 'w'; break; + case 'W': + /* operand size flag for cwtl, cbtw */ + if (dflag) + *obufp++ = 'w'; + else + *obufp++ = 'b'; + break; } } *obufp = 0; @@ -1743,8 +1755,8 @@ OP_E (bytemode, aflag, dflag) int havesib; int havebase; int base; - int index; - int scale; + int index = 0; + int scale = 0; havesib = 0; havebase = 1; @@ -1771,7 +1783,9 @@ OP_E (bytemode, aflag, dflag) break; case 1: FETCH_DATA (the_info, codep + 1); - disp = *(char *)codep++; + disp = *codep++; + if ((disp & 0x80) != 0) + disp -= 0x100; break; case 2: disp = get32 (); @@ -1808,14 +1822,22 @@ OP_E (bytemode, aflag, dflag) { case 0: if (rm == 6) - disp = (short) get16 (); + { + disp = get16 (); + if ((disp & 0x8000) != 0) + disp -= 0x10000; + } break; case 1: FETCH_DATA (the_info, codep + 1); - disp = *(char *)codep++; + disp = *codep++; + if ((disp & 0x80) != 0) + disp -= 0x100; break; case 2: - disp = (short) get16 (); + disp = get16 (); + if ((disp & 0x8000) != 0) + disp -= 0x10000; break; } @@ -1979,16 +2001,24 @@ OP_sI (bytemode, aflag, dflag) { case b_mode: FETCH_DATA (the_info, codep + 1); - op = *(char *)codep++; + op = *codep++; + if ((op & 0x80) != 0) + op -= 0x100; break; case v_mode: if (dflag) op = get32 (); else - op = (short)get16(); + { + op = get16(); + if ((op & 0x8000) != 0) + op -= 0x10000; + } break; case w_mode: - op = (short)get16 (); + op = get16 (); + if ((op & 0x8000) != 0) + op -= 0x10000; break; default: oappend ("<internal disassembler error>"); @@ -2012,14 +2042,18 @@ OP_J (bytemode, aflag, dflag) { case b_mode: FETCH_DATA (the_info, codep + 1); - disp = *(char *)codep++; + disp = *codep++; + if ((disp & 0x80) != 0) + disp -= 0x100; break; case v_mode: if (dflag) disp = get32 (); else { - disp = (short)get16 (); + disp = get16 (); + if ((disp & 0x8000) != 0) + disp -= 0x10000; /* for some reason, a data16 prefix on a jump instruction means that the pc is masked to 16 bits after the displacement is added! */ @@ -2080,7 +2114,11 @@ OP_DIR (size, aflag, dflag) if (aflag) offset = get32 (); else - offset = (short)get16 (); + { + offset = get16 (); + if ((offset & 0x8000) != 0) + offset -= 0x10000; + } offset = start_pc + codep - start_codep + offset; set_op (offset); @@ -2135,7 +2173,16 @@ OP_DSSI (dummy, aflag, dflag) int aflag; int dflag; { - oappend ("%ds:("); + if ((prefixes + & (PREFIX_CS + | PREFIX_DS + | PREFIX_SS + | PREFIX_ES + | PREFIX_FS + | PREFIX_GS)) == 0) + prefixes |= PREFIX_DS; + append_prefix (); + oappend ("("); oappend (aflag ? "%esi" : "%si"); oappend (")"); return (0); diff --git a/contrib/binutils/opcodes/sh-dis.c b/contrib/binutils/opcodes/sh-dis.c index c83570e..2ebfdb6 100644 --- a/contrib/binutils/opcodes/sh-dis.c +++ b/contrib/binutils/opcodes/sh-dis.c @@ -1,5 +1,5 @@ /* Disassemble SH instructions. - Copyright (C) 1993, 1995 Free Software Foundation, Inc. + Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -25,28 +25,26 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define LITTLE_BIT 2 static int -print_insn_shx(memaddr, info) +print_insn_shx (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; { - fprintf_ftype fprintf = info->fprintf_func; + fprintf_ftype fprintf_fn = info->fprintf_func; void *stream = info->stream; - unsigned char insn[2]; - unsigned char nibs[4]; + unsigned char insn[2]; + unsigned char nibs[4]; int status; - int relmask = ~0; + bfd_vma relmask = ~ (bfd_vma) 0; sh_opcode_info *op; - - status = info->read_memory_func(memaddr, insn, 2, info); + + status = info->read_memory_func (memaddr, insn, 2, info); if (status != 0) { - info->memory_error_func(status, memaddr, info); + info->memory_error_func (status, memaddr, info); return -1; } - - if (info->flags & LITTLE_BIT) { nibs[0] = (insn[1] >> 4) & 0xf; @@ -67,196 +65,245 @@ print_insn_shx(memaddr, info) for (op = sh_table; op->name; op++) { int n; - int imm; - int rn; - int rm; - int rb; - - for (n = 0; n < 4; n++) { - int i = op->nibbles[n]; - if (i < 16) - { - if (nibs[n] == i) continue; - goto fail; - } - switch (i) - { - case BRANCH_8: - imm = (nibs[2] << 4) | (nibs[3]); - if (imm & 0x80) - imm |= ~0xff; - imm = ((char)imm) * 2 + 4 ; - goto ok; - - case BRANCH_12: - imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); - if (imm & 0x800) - imm |= ~0xfff; - imm = imm * 2 + 4; - goto ok; - case IMM_4: - imm = nibs[3]; - goto ok; - case IMM_4BY2: - imm = nibs[3] <<1; - goto ok; - case IMM_4BY4: - imm = nibs[3] <<2; - goto ok; + int imm = 0; + int rn = 0; + int rm = 0; + int rb = 0; + int disp_pc; + bfd_vma disp_pc_addr = 0; - - case IMM_8: - imm = (nibs[2] << 4) | nibs[3]; - goto ok; - case PCRELIMM_8BY2: - imm = ((nibs[2] << 4) | nibs[3]) <<1; - relmask = ~1; - - goto ok; + for (n = 0; n < 4; n++) + { + int i = op->nibbles[n]; - case PCRELIMM_8BY4: - imm = ((nibs[2] << 4) | nibs[3]) <<2; - relmask = ~3; - goto ok; - - case IMM_8BY2: - imm = ((nibs[2] << 4) | nibs[3]) <<1; - goto ok; - case IMM_8BY4: - imm = ((nibs[2] << 4) | nibs[3]) <<2; - goto ok; - case DISP_8: - imm = (nibs[2] << 4) | (nibs[3]); - goto ok; - case DISP_4: - imm = nibs[3]; - goto ok; - case REG_N: - rn = nibs[n]; - break; - case REG_M: - rm = nibs[n]; - break; - case REG_B: - rb = nibs[n] & 0x07; - break; - default: - abort(); - } + if (i < 16) + { + if (nibs[n] == i) + continue; + goto fail; + } + switch (i) + { + case BRANCH_8: + imm = (nibs[2] << 4) | (nibs[3]); + if (imm & 0x80) + imm |= ~0xff; + imm = ((char)imm) * 2 + 4 ; + goto ok; + case BRANCH_12: + imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); + if (imm & 0x800) + imm |= ~0xfff; + imm = imm * 2 + 4; + goto ok; + case IMM_4: + imm = nibs[3]; + goto ok; + case IMM_4BY2: + imm = nibs[3] <<1; + goto ok; + case IMM_4BY4: + imm = nibs[3] <<2; + goto ok; + case IMM_8: + imm = (nibs[2] << 4) | nibs[3]; + goto ok; + case PCRELIMM_8BY2: + imm = ((nibs[2] << 4) | nibs[3]) <<1; + relmask = ~ (bfd_vma) 1; + goto ok; + case PCRELIMM_8BY4: + imm = ((nibs[2] << 4) | nibs[3]) <<2; + relmask = ~ (bfd_vma) 3; + goto ok; + case IMM_8BY2: + imm = ((nibs[2] << 4) | nibs[3]) <<1; + goto ok; + case IMM_8BY4: + imm = ((nibs[2] << 4) | nibs[3]) <<2; + goto ok; + case DISP_8: + imm = (nibs[2] << 4) | (nibs[3]); + goto ok; + case DISP_4: + imm = nibs[3]; + goto ok; + case REG_N: + rn = nibs[n]; + break; + case REG_M: + rm = nibs[n]; + break; + case REG_NM: + rn = (nibs[n] & 0xc) >> 2; + rm = (nibs[n] & 0x3); + break; + case REG_B: + rb = nibs[n] & 0x07; + break; + default: + abort(); + } + } - } ok: - fprintf(stream,"%s\t", op->name); + fprintf_fn (stream,"%s\t", op->name); + disp_pc = 0; for (n = 0; n < 3 && op->arg[n] != A_END; n++) { if (n && op->arg[1] != A_END) - fprintf(stream,","); + fprintf_fn (stream, ","); switch (op->arg[n]) { case A_IMM: - fprintf(stream,"#%d", (char)(imm)); + fprintf_fn (stream, "#%d", (char)(imm)); break; case A_R0: - fprintf(stream,"r0"); + fprintf_fn (stream, "r0"); break; case A_REG_N: - fprintf(stream,"r%d", rn); + fprintf_fn (stream, "r%d", rn); break; case A_INC_N: - fprintf(stream,"@r%d+", rn); + fprintf_fn (stream, "@r%d+", rn); break; case A_DEC_N: - fprintf(stream,"@-r%d", rn); + fprintf_fn (stream, "@-r%d", rn); break; case A_IND_N: - fprintf(stream,"@r%d", rn); + fprintf_fn (stream, "@r%d", rn); break; case A_DISP_REG_N: - fprintf(stream,"@(%d,r%d)",imm, rn); + fprintf_fn (stream, "@(%d,r%d)", imm, rn); break; case A_REG_M: - fprintf(stream,"r%d", rm); + fprintf_fn (stream, "r%d", rm); break; case A_INC_M: - fprintf(stream,"@r%d+", rm); + fprintf_fn (stream, "@r%d+", rm); break; case A_DEC_M: - fprintf(stream,"@-r%d", rm); + fprintf_fn (stream, "@-r%d", rm); break; case A_IND_M: - fprintf(stream,"@r%d", rm); + fprintf_fn (stream, "@r%d", rm); break; case A_DISP_REG_M: - fprintf(stream,"@(%d,r%d)",imm, rm); + fprintf_fn (stream, "@(%d,r%d)", imm, rm); break; - case A_REG_B: - fprintf(stream,"r%d_bank", rb); + case A_REG_B: + fprintf_fn (stream, "r%d_bank", rb); break; case A_DISP_PC: - fprintf(stream,"0x%0x", imm+ 4+(memaddr&relmask)); + disp_pc = 1; + disp_pc_addr = imm + 4 + (memaddr & relmask); + (*info->print_address_func) (disp_pc_addr, info); break; case A_IND_R0_REG_N: - fprintf(stream,"@(r0,r%d)", rn); + fprintf_fn (stream, "@(r0,r%d)", rn); break; case A_IND_R0_REG_M: - fprintf(stream,"@(r0,r%d)", rm); + fprintf_fn (stream, "@(r0,r%d)", rm); break; case A_DISP_GBR: - fprintf(stream,"@(%d,gbr)",imm); + fprintf_fn (stream, "@(%d,gbr)",imm); break; case A_R0_GBR: - fprintf(stream,"@(r0,gbr)"); + fprintf_fn (stream, "@(r0,gbr)"); break; case A_BDISP12: case A_BDISP8: (*info->print_address_func) (imm + memaddr, info); break; case A_SR: - fprintf(stream,"sr"); + fprintf_fn (stream, "sr"); break; case A_GBR: - fprintf(stream,"gbr"); + fprintf_fn (stream, "gbr"); break; case A_VBR: - fprintf(stream,"vbr"); + fprintf_fn (stream, "vbr"); break; case A_SSR: - fprintf(stream,"ssr"); + fprintf_fn (stream, "ssr"); break; case A_SPC: - fprintf(stream,"spc"); + fprintf_fn (stream, "spc"); break; case A_MACH: - fprintf(stream,"mach"); + fprintf_fn (stream, "mach"); break; case A_MACL: - fprintf(stream,"macl"); + fprintf_fn (stream ,"macl"); break; case A_PR: - fprintf(stream,"pr"); + fprintf_fn (stream, "pr"); + break; + case A_SGR: + fprintf_fn (stream, "sgr"); + break; + case A_DBR: + fprintf_fn (stream, "dbr"); break; + case FD_REG_N: + if (0) + goto d_reg_n; case F_REG_N: - fprintf(stream,"fr%d", rn); + fprintf_fn (stream, "fr%d", rn); break; case F_REG_M: - fprintf(stream,"fr%d", rm); + fprintf_fn (stream, "fr%d", rm); + break; + case DX_REG_N: + if (rn & 1) + { + fprintf_fn (stream, "xd%d", rn & ~1); + break; + } + d_reg_n: + case D_REG_N: + fprintf_fn (stream, "dr%d", rn); + break; + case DX_REG_M: + if (rm & 1) + { + fprintf_fn (stream, "xd%d", rm & ~1); + break; + } + case D_REG_M: + fprintf_fn (stream, "dr%d", rm); break; case FPSCR_M: case FPSCR_N: - fprintf(stream,"fpscr"); + fprintf_fn (stream, "fpscr"); break; case FPUL_M: case FPUL_N: - fprintf(stream,"fpul"); + fprintf_fn (stream, "fpul"); break; case F_FR0: - fprintf(stream,"fr0"); + fprintf_fn (stream, "fr0"); + break; + case V_REG_N: + fprintf_fn (stream, "fv%d", rn*4); + break; + case V_REG_M: + fprintf_fn (stream, "fv%d", rm*4); + break; + case XMTRX_M4: + fprintf_fn (stream, "xmtrx"); break; default: abort(); } - } + +#if 0 + /* This code prints instructions in delay slots on the same line + as the instruction which needs the delay slots. This can be + confusing, since other disassembler don't work this way, and + it means that the instructions are not all in a line. So I + disabled it. Ian. */ if (!(info->flags & 1) && (op->name[0] == 'j' || (op->name[0] == 'b' @@ -266,40 +313,75 @@ print_insn_shx(memaddr, info) || (op->name[0] == 'b' && op->name[2] == '.'))) { info->flags |= 1; - fprintf(stream,"\t(slot "); print_insn_shx(memaddr +2, info); + fprintf_fn (stream, "\t(slot "); + print_insn_shx (memaddr + 2, info); info->flags &= ~1; - fprintf(stream,")"); + fprintf_fn (stream, ")"); return 4; } - +#endif + + if (disp_pc && strcmp (op->name, "mova") != 0) + { + int size; + bfd_byte bytes[4]; + + if (relmask == ~ (bfd_vma) 1) + size = 2; + else + size = 4; + status = info->read_memory_func (disp_pc_addr, bytes, size, info); + if (status == 0) + { + unsigned int val; + + if (size == 2) + { + if ((info->flags & LITTLE_BIT) != 0) + val = bfd_getl16 (bytes); + else + val = bfd_getb16 (bytes); + } + else + { + if ((info->flags & LITTLE_BIT) != 0) + val = bfd_getl32 (bytes); + else + val = bfd_getb32 (bytes); + } + fprintf_fn (stream, "\t! 0x%x", val); + } + } + return 2; fail: ; } - fprintf(stream,".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]); + fprintf_fn (stream, ".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]); return 2; } - int -print_insn_shl(memaddr, info) +print_insn_shl (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; { int r; + info->flags = LITTLE_BIT; - r =print_insn_shx (memaddr, info); + r = print_insn_shx (memaddr, info); return r; } int -print_insn_sh(memaddr, info) +print_insn_sh (memaddr, info) bfd_vma memaddr; struct disassemble_info *info; { int r; + info->flags = 0; - r =print_insn_shx (memaddr, info); + r = print_insn_shx (memaddr, info); return r; } diff --git a/contrib/binutils/opcodes/sh-opc.h b/contrib/binutils/opcodes/sh-opc.h index cc75e79..dc1aae5 100644 --- a/contrib/binutils/opcodes/sh-opc.h +++ b/contrib/binutils/opcodes/sh-opc.h @@ -34,6 +34,7 @@ typedef enum { HEX_F, REG_N, REG_M, + REG_NM, REG_B, BRANCH_12, BRANCH_8, @@ -79,8 +80,20 @@ typedef enum { A_VBR, A_SSR, A_SPC, + A_SGR, + A_DBR, F_REG_N, F_REG_M, + D_REG_N, + D_REG_M, + X_REG_N, /* Only used for argument parsing */ + X_REG_M, /* Only used for argument parsing */ + DX_REG_N, + DX_REG_M, + V_REG_N, + V_REG_M, + FD_REG_N, + XMTRX_M4, F_FR0, FPUL_N, FPUL_M, @@ -180,6 +193,8 @@ sh_opcode_info sh_table[] = { /* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}}, +/* 0100nnnn01111110 ldc <REG_N>,DBR */{"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_E}}, + /* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}}, /* 0100nnnn00000111 ldc.l @<REG_N>+,SR */{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}}, @@ -192,6 +207,8 @@ sh_opcode_info sh_table[] = { /* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}}, +/* 0100nnnn01110111 ldc.l @<REG_N>+,DBR */{"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_7}}, + /* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}}, /* 0100nnnn00001010 lds <REG_N>,MACH */{"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}}, @@ -287,6 +304,8 @@ sh_opcode_info sh_table[] = { /* 11000001i8*2.... mov.w R0,@(<disp>,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}}, /* 11000111i8p4.... mova @(<disp>,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}}, +/* 0000nnnn11000011 movca.l R0,@<REG_N> */{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}}, + /* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}}, @@ -303,6 +322,12 @@ sh_opcode_info sh_table[] = { /* 0000000000001001 nop */{"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}}, /* 0110nnnnmmmm0111 not <REG_M>,<REG_N> */{"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}}, +/* 0000nnnn10010011 ocbi @<REG_N> */{"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}}, + +/* 0000nnnn10100011 ocbp @<REG_N> */{"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}}, + +/* 0000nnnn10110011 ocbwb @<REG_N> */{"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}}, + /* 11001011i8*1.... or #<imm>,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}}, @@ -363,6 +388,10 @@ sh_opcode_info sh_table[] = { /* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}}, +/* 0000nnnn01100010 stc SGR,<REG_N> */{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}}, + +/* 0000nnnn01110010 stc DBR,<REG_N> */{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}}, + /* 0000nnnn1xxx0012 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}}, /* 0100nnnn00000011 stc.l SR,@-<REG_N> */{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}}, @@ -375,6 +404,10 @@ sh_opcode_info sh_table[] = { /* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}}, +/* 0100nnnn01100011 stc.l SGR,@-<REG_N> */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}}, + +/* 0100nnnn01110011 stc.l DBR,@-<REG_N> */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_7,HEX_3}}, + /* 0100nnnn1xxx0012 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}}, /* 0000nnnn00001010 sts MACH,<REG_N> */{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}}, @@ -439,15 +472,25 @@ sh_opcode_info sh_table[] = { /* 0000nnnn00000011 bsrf <REG_N> */{"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}}, -/* 1111nnnn01011101 fabs <F_REG_N> */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}}, +/* 1111nnnn01011101 fabs <F_REG_N> */{"fabs",{FD_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}}, /* 1111nnnnmmmm0000 fadd <F_REG_M>,<F_REG_N>*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}}, +/* 1111nnn0mmm00000 fadd <D_REG_M>,<D_REG_N>*/{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}}, /* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}}, +/* 1111nnn0mmm00100 fcmp/eq <D_REG_M>,<D_REG_N>*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}}, /* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}}, +/* 1111nnn0mmm00101 fcmp/gt <D_REG_M>,<D_REG_N>*/{"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}}, + +/* 1111nnn010111101 fcnvds <D_REG_N>,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}}, + +/* 1111nnn010101101 fcnvsd FPUL,<D_REG_N>*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}}, /* 1111nnnnmmmm0011 fdiv <F_REG_M>,<F_REG_N>*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}}, +/* 1111nnn0mmm00011 fdiv <D_REG_M>,<D_REG_N>*/{"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}}, + +/* 1111nnmm11101101 fipr <V_REG_M>,<V_REG_N>*/{"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}}, /* 1111nnnn10001101 fldi0 <F_REG_N> */{"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}}, @@ -455,11 +498,42 @@ sh_opcode_info sh_table[] = { /* 1111nnnn00011101 flds <F_REG_N>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}}, -/* 1111nnnn00101101 float FPUL,<F_REG_N>*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}}, +/* 1111nnnn00101101 float FPUL,<FD_REG_N>*/{"float",{FPUL_M,FD_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}}, /* 1111nnnnmmmm1110 fmac FR0,<F_REG_M>,<F_REG_N>*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}}, /* 1111nnnnmmmm1100 fmov <F_REG_M>,<F_REG_N>*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}}, +/* 1111nnnnmmmm1100 fmov <DX_REG_M>,<DX_REG_N>*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}}, + +/* 1111nnnnmmmm1000 fmov @<REG_M>,<F_REG_N>*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, +/* 1111nnnnmmmm1000 fmov @<REG_M>,<DX_REG_N>*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, + +/* 1111nnnnmmmm1010 fmov <F_REG_M>,@<REG_N>*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, +/* 1111nnnnmmmm1010 fmov <DX_REG_M>,@<REG_N>*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, + +/* 1111nnnnmmmm1001 fmov @<REG_M>+,<F_REG_N>*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, +/* 1111nnnnmmmm1001 fmov @<REG_M>+,<DX_REG_N>*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, + +/* 1111nnnnmmmm1011 fmov <F_REG_M>,@-<REG_N>*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, +/* 1111nnnnmmmm1011 fmov <DX_REG_M>,@-<REG_N>*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, + +/* 1111nnnnmmmm0110 fmov @(R0,<REG_M>),<F_REG_N>*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, +/* 1111nnnnmmmm0110 fmov @(R0,<REG_M>),<DX_REG_N>*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, + +/* 1111nnnnmmmm0111 fmov <F_REG_M>,@(R0,<REG_N>)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, +/* 1111nnnnmmmm0111 fmov <DX_REG_M>,@(R0,<REG_N>)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, + +/* 1111nnnnmmmm1000 fmov.d @<REG_M>,<DX_REG_N>*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, + +/* 1111nnnnmmmm1010 fmov.d <DX_REG_M>,@<REG_N>*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, + +/* 1111nnnnmmmm1001 fmov.d @<REG_M>+,<DX_REG_N>*/{"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, + +/* 1111nnnnmmmm1011 fmov.d <DX_REG_M>,@-<REG_N>*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, + +/* 1111nnnnmmmm0110 fmov.d @(R0,<REG_M>),<DX_REG_N>*/{"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, + +/* 1111nnnnmmmm0111 fmov.d <DX_REG_M>,@(R0,<REG_N>)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, /* 1111nnnnmmmm1000 fmov.s @<REG_M>,<F_REG_N>*/{"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, @@ -474,18 +548,24 @@ sh_opcode_info sh_table[] = { /* 1111nnnnmmmm0111 fmov.s <F_REG_M>,@(R0,<REG_N>)*/{"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, /* 1111nnnnmmmm0010 fmul <F_REG_M>,<F_REG_N>*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}}, +/* 1111nnn0mmm00010 fmul <D_REG_M>,<D_REG_N>*/{"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}}, + +/* 1111nnnn01001101 fneg <FD_REG_N> */{"fneg",{FD_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}}, + +/* 1111101111111101 frchg */{"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}}, -/* 1111nnnn01001101 fneg <F_REG_N> */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}}, +/* 1111001111111101 fschg */{"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}}, -/* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}}, +/* 1111nnnn01101101 fsqrt <FD_REG_N> */{"fsqrt",{FD_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}}, /* 1111nnnn00001101 fsts FPUL,<F_REG_N>*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}}, /* 1111nnnnmmmm0001 fsub <F_REG_M>,<F_REG_N>*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}}, +/* 1111nnn0mmm00001 fsub <D_REG_M>,<D_REG_N>*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}}, -/* 1111nnnn00111101 ftrc <F_REG_M>,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}}, +/* 1111nnnn00111101 ftrc <FD_REG_N>,FPUL*/{"ftrc",{FD_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}}, -/* 1111nnnn01111101 ftst/nan <F_REG_N> */{"ftst/nan",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}}, +/* 1111nn0111111101 ftrv XMTRX_M4,<V_REG_n>*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}}, { 0 } }; diff --git a/contrib/binutils/opcodes/stamp-h.in b/contrib/binutils/opcodes/stamp-h.in new file mode 100644 index 0000000..9788f70 --- /dev/null +++ b/contrib/binutils/opcodes/stamp-h.in @@ -0,0 +1 @@ +timestamp diff --git a/contrib/binutils/opcodes/tic30-dis.c b/contrib/binutils/opcodes/tic30-dis.c new file mode 100644 index 0000000..1051457 --- /dev/null +++ b/contrib/binutils/opcodes/tic30-dis.c @@ -0,0 +1,711 @@ +/* Disassembly routines for TMS320C30 architecture + Copyright (C) 1998 Free Software Foundation, Inc. + Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#include <errno.h> +#include <math.h> +#include <stdlib.h> +#include <string.h> +#include "dis-asm.h" +#include "opcode/tic30.h" + +#define NORMAL_INSN 1 +#define PARALLEL_INSN 2 + +/* Gets the type of instruction based on the top 2 or 3 bits of the + instruction word. */ +#define GET_TYPE(insn) (insn & 0x80000000 ? insn & 0xC0000000 : insn & 0xE0000000) + +/* Instruction types. */ +#define TWO_OPERAND_1 0x00000000 +#define TWO_OPERAND_2 0x40000000 +#define THREE_OPERAND 0x20000000 +#define PAR_STORE 0xC0000000 +#define MUL_ADDS 0x80000000 +#define BRANCHES 0x60000000 + +/* Specific instruction id bits. */ +#define NORMAL_IDEN 0x1F800000 +#define PAR_STORE_IDEN 0x3E000000 +#define MUL_ADD_IDEN 0x2C000000 +#define BR_IMM_IDEN 0x1F000000 +#define BR_COND_IDEN 0x1C3F0000 + +/* Addressing modes. */ +#define AM_REGISTER 0x00000000 +#define AM_DIRECT 0x00200000 +#define AM_INDIRECT 0x00400000 +#define AM_IMM 0x00600000 + +#define P_FIELD 0x03000000 + +#define REG_AR0 0x08 +#define LDP_INSN 0x08700000 + +/* TMS320C30 program counter for current instruction. */ +static unsigned int _pc; + +struct instruction + { + int type; + template *tm; + partemplate *ptm; + }; + +int get_tic30_instruction PARAMS ((unsigned long, struct instruction *)); +int print_two_operand + PARAMS ((disassemble_info *, unsigned long, struct instruction *)); +int print_three_operand + PARAMS ((disassemble_info *, unsigned long, struct instruction *)); +int print_par_insn + PARAMS ((disassemble_info *, unsigned long, struct instruction *)); +int print_branch + PARAMS ((disassemble_info *, unsigned long, struct instruction *)); +int get_indirect_operand PARAMS ((unsigned short, int, char *)); +int get_register_operand PARAMS ((unsigned char, char *)); +int cnvt_tmsfloat_ieee PARAMS ((unsigned long, int, float *)); + +int +print_insn_tic30 (pc, info) + bfd_vma pc; + disassemble_info *info; +{ + unsigned long insn_word; + struct instruction insn = + {0, NULL, NULL}; + bfd_vma bufaddr = pc - info->buffer_vma; + /* Obtain the current instruction word from the buffer. */ + insn_word = (*(info->buffer + bufaddr) << 24) | (*(info->buffer + bufaddr + 1) << 16) | + (*(info->buffer + bufaddr + 2) << 8) | *(info->buffer + bufaddr + 3); + _pc = pc / 4; + /* Get the instruction refered to by the current instruction word + and print it out based on its type. */ + if (!get_tic30_instruction (insn_word, &insn)) + return -1; + switch (GET_TYPE (insn_word)) + { + case TWO_OPERAND_1: + case TWO_OPERAND_2: + if (!print_two_operand (info, insn_word, &insn)) + return -1; + break; + case THREE_OPERAND: + if (!print_three_operand (info, insn_word, &insn)) + return -1; + break; + case PAR_STORE: + case MUL_ADDS: + if (!print_par_insn (info, insn_word, &insn)) + return -1; + break; + case BRANCHES: + if (!print_branch (info, insn_word, &insn)) + return -1; + break; + } + return 4; +} + +int +get_tic30_instruction (insn_word, insn) + unsigned long insn_word; + struct instruction *insn; +{ + switch (GET_TYPE (insn_word)) + { + case TWO_OPERAND_1: + case TWO_OPERAND_2: + case THREE_OPERAND: + insn->type = NORMAL_INSN; + { + template *current_optab = (template *) tic30_optab; + for (; current_optab < tic30_optab_end; current_optab++) + { + if (GET_TYPE (current_optab->base_opcode) == GET_TYPE (insn_word)) + { + if (current_optab->operands == 0) + { + if (current_optab->base_opcode == insn_word) + { + insn->tm = current_optab; + break; + } + } + else if ((current_optab->base_opcode & NORMAL_IDEN) == (insn_word & NORMAL_IDEN)) + { + insn->tm = current_optab; + break; + } + } + } + } + break; + case PAR_STORE: + insn->type = PARALLEL_INSN; + { + partemplate *current_optab = (partemplate *) tic30_paroptab; + for (; current_optab < tic30_paroptab_end; current_optab++) + { + if (GET_TYPE (current_optab->base_opcode) == GET_TYPE (insn_word)) + { + if ((current_optab->base_opcode & PAR_STORE_IDEN) == (insn_word & PAR_STORE_IDEN)) + { + insn->ptm = current_optab; + break; + } + } + } + } + break; + case MUL_ADDS: + insn->type = PARALLEL_INSN; + { + partemplate *current_optab = (partemplate *) tic30_paroptab; + for (; current_optab < tic30_paroptab_end; current_optab++) + { + if (GET_TYPE (current_optab->base_opcode) == GET_TYPE (insn_word)) + { + if ((current_optab->base_opcode & MUL_ADD_IDEN) == (insn_word & MUL_ADD_IDEN)) + { + insn->ptm = current_optab; + break; + } + } + } + } + break; + case BRANCHES: + insn->type = NORMAL_INSN; + { + template *current_optab = (template *) tic30_optab; + for (; current_optab < tic30_optab_end; current_optab++) + { + if (GET_TYPE (current_optab->base_opcode) == GET_TYPE (insn_word)) + { + if (current_optab->operand_types[0] & Imm24) + { + if ((current_optab->base_opcode & BR_IMM_IDEN) == (insn_word & BR_IMM_IDEN)) + { + insn->tm = current_optab; + break; + } + } + else if (current_optab->operands > 0) + { + if ((current_optab->base_opcode & BR_COND_IDEN) == (insn_word & BR_COND_IDEN)) + { + insn->tm = current_optab; + break; + } + } + else + { + if ((current_optab->base_opcode & (BR_COND_IDEN | 0x00800000)) == (insn_word & (BR_COND_IDEN | 0x00800000))) + { + insn->tm = current_optab; + break; + } + } + } + } + } + break; + default: + return 0; + } + return 1; +} + +int +print_two_operand (info, insn_word, insn) + disassemble_info *info; + unsigned long insn_word; + struct instruction *insn; +{ + char name[12]; + char operand[2][13] = + { + {0}, + {0}}; + float f_number; + + if (insn->tm == NULL) + return 0; + strcpy (name, insn->tm->name); + if (insn->tm->opcode_modifier == AddressMode) + { + int src_op, dest_op; + /* Determine whether instruction is a store or a normal instruction. */ + if ((insn->tm->operand_types[1] & (Direct | Indirect)) == (Direct | Indirect)) + { + src_op = 1; + dest_op = 0; + } + else + { + src_op = 0; + dest_op = 1; + } + /* Get the destination register. */ + if (insn->tm->operands == 2) + get_register_operand ((insn_word & 0x001F0000) >> 16, operand[dest_op]); + /* Get the source operand based on addressing mode. */ + switch (insn_word & AddressMode) + { + case AM_REGISTER: + /* Check for the NOP instruction before getting the operand. */ + if ((insn->tm->operand_types[0] & NotReq) == 0) + get_register_operand ((insn_word & 0x0000001F), operand[src_op]); + break; + case AM_DIRECT: + sprintf (operand[src_op], "@0x%lX", (insn_word & 0x0000FFFF)); + break; + case AM_INDIRECT: + get_indirect_operand ((insn_word & 0x0000FFFF), 2, operand[src_op]); + break; + case AM_IMM: + /* Get the value of the immediate operand based on variable type. */ + switch (insn->tm->imm_arg_type) + { + case Imm_Float: + cnvt_tmsfloat_ieee ((insn_word & 0x0000FFFF), 2, &f_number); + sprintf (operand[src_op], "%2.2f", f_number); + break; + case Imm_SInt: + sprintf (operand[src_op], "%d", (short) (insn_word & 0x0000FFFF)); + break; + case Imm_UInt: + sprintf (operand[src_op], "%lu", (insn_word & 0x0000FFFF)); + break; + default: + return 0; + } + /* Handle special case for LDP instruction. */ + if ((insn_word & 0xFFFFFF00) == LDP_INSN) + { + strcpy (name, "ldp"); + sprintf (operand[0], "0x%06lX", (insn_word & 0x000000FF) << 16); + operand[1][0] = '\0'; + } + } + } + /* Handle case for stack and rotate instructions. */ + else if (insn->tm->operands == 1) + { + if (insn->tm->opcode_modifier == StackOp) + { + get_register_operand ((insn_word & 0x001F0000) >> 16, operand[0]); + } + } + /* Output instruction to stream. */ + info->fprintf_func (info->stream, " %s %s%c%s", name, + operand[0][0] ? operand[0] : "", + operand[1][0] ? ',' : ' ', + operand[1][0] ? operand[1] : ""); + return 1; +} + +int +print_three_operand (info, insn_word, insn) + disassemble_info *info; + unsigned long insn_word; + struct instruction *insn; +{ + char operand[3][13] = + { + {0}, + {0}, + {0}}; + + if (insn->tm == NULL) + return 0; + switch (insn_word & AddressMode) + { + case AM_REGISTER: + get_register_operand ((insn_word & 0x000000FF), operand[0]); + get_register_operand ((insn_word & 0x0000FF00) >> 8, operand[1]); + break; + case AM_DIRECT: + get_register_operand ((insn_word & 0x000000FF), operand[0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1]); + break; + case AM_INDIRECT: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0]); + get_register_operand ((insn_word & 0x0000FF00) >> 8, operand[1]); + break; + case AM_IMM: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1]); + break; + default: + return 0; + } + if (insn->tm->operands == 3) + get_register_operand ((insn_word & 0x001F0000) >> 16, operand[2]); + info->fprintf_func (info->stream, " %s %s,%s%c%s", insn->tm->name, + operand[0], operand[1], + operand[2][0] ? ',' : ' ', + operand[2][0] ? operand[2] : ""); + return 1; +} + +int +print_par_insn (info, insn_word, insn) + disassemble_info *info; + unsigned long insn_word; + struct instruction *insn; +{ + size_t i, len; + char *name1, *name2; + char operand[2][3][13] = + { + { + {0}, + {0}, + {0}}, + { + {0}, + {0}, + {0}}}; + + if (insn->ptm == NULL) + return 0; + /* Parse out the names of each of the parallel instructions from the + q_insn1_insn2 format. */ + name1 = (char *) strdup (insn->ptm->name + 2); + name2 = ""; + len = strlen (name1); + for (i = 0; i < len; i++) + { + if (name1[i] == '_') + { + name2 = &name1[i + 1]; + name1[i] = '\0'; + break; + } + } + /* Get the operands of the instruction based on the operand order. */ + switch (insn->ptm->oporder) + { + case OO_4op1: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][1]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][0]); + get_register_operand ((insn_word >> 22) & 0x07, operand[0][1]); + break; + case OO_4op2: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][0]); + get_register_operand ((insn_word >> 19) & 0x07, operand[1][1]); + get_register_operand ((insn_word >> 22) & 0x07, operand[0][1]); + break; + case OO_4op3: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][1]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][1]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][0]); + get_register_operand ((insn_word >> 22) & 0x07, operand[0][0]); + break; + case OO_5op1: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][1]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][0]); + get_register_operand ((insn_word >> 19) & 0x07, operand[0][1]); + get_register_operand ((insn_word >> 22) & 0x07, operand[0][2]); + break; + case OO_5op2: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][1]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][1]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][0]); + get_register_operand ((insn_word >> 19) & 0x07, operand[0][0]); + get_register_operand ((insn_word >> 22) & 0x07, operand[0][2]); + break; + case OO_PField: + if (insn_word & 0x00800000) + get_register_operand (0x01, operand[0][2]); + else + get_register_operand (0x00, operand[0][2]); + if (insn_word & 0x00400000) + get_register_operand (0x03, operand[1][2]); + else + get_register_operand (0x02, operand[1][2]); + switch (insn_word & P_FIELD) + { + case 0x00000000: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[0][1]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[0][0]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][1]); + get_register_operand ((insn_word >> 19) & 0x07, operand[1][0]); + break; + case 0x01000000: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[1][0]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[0][0]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][1]); + get_register_operand ((insn_word >> 19) & 0x07, operand[0][1]); + break; + case 0x02000000: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[1][1]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[1][0]); + get_register_operand ((insn_word >> 16) & 0x07, operand[0][1]); + get_register_operand ((insn_word >> 19) & 0x07, operand[0][0]); + break; + case 0x03000000: + get_indirect_operand ((insn_word & 0x000000FF), 1, operand[1][1]); + get_indirect_operand ((insn_word & 0x0000FF00) >> 8, 1, operand[0][0]); + get_register_operand ((insn_word >> 16) & 0x07, operand[1][0]); + get_register_operand ((insn_word >> 19) & 0x07, operand[0][1]); + break; + } + break; + default: + return 0; + } + info->fprintf_func (info->stream, " %s %s,%s%c%s", name1, + operand[0][0], operand[0][1], + operand[0][2][0] ? ',' : ' ', + operand[0][2][0] ? operand[0][2] : ""); + info->fprintf_func (info->stream, "\n\t\t\t|| %s %s,%s%c%s", name2, + operand[1][0], operand[1][1], + operand[1][2][0] ? ',' : ' ', + operand[1][2][0] ? operand[1][2] : ""); + free (name1); + return 1; +} + +int +print_branch (info, insn_word, insn) + disassemble_info *info; + unsigned long insn_word; + struct instruction *insn; +{ + char operand[2][13] = + { + {0}, + {0}}; + unsigned long address; + int print_label = 0; + + if (insn->tm == NULL) + return 0; + /* Get the operands for 24-bit immediate jumps. */ + if (insn->tm->operand_types[0] & Imm24) + { + address = insn_word & 0x00FFFFFF; + sprintf (operand[0], "0x%lX", address); + print_label = 1; + } + /* Get the operand for the trap instruction. */ + else if (insn->tm->operand_types[0] & IVector) + { + address = insn_word & 0x0000001F; + sprintf (operand[0], "0x%lX", address); + } + else + { + address = insn_word & 0x0000FFFF; + /* Get the operands for the DB instructions. */ + if (insn->tm->operands == 2) + { + get_register_operand (((insn_word & 0x01C00000) >> 22) + REG_AR0, operand[0]); + if (insn_word & PCRel) + { + sprintf (operand[1], "%d", (short) address); + print_label = 1; + } + else + get_register_operand (insn_word & 0x0000001F, operand[1]); + } + /* Get the operands for the standard branches. */ + else if (insn->tm->operands == 1) + { + if (insn_word & PCRel) + { + address = (short) address; + sprintf (operand[0], "%ld", address); + print_label = 1; + } + else + get_register_operand (insn_word & 0x0000001F, operand[0]); + } + } + info->fprintf_func (info->stream, " %s %s%c%s", insn->tm->name, + operand[0][0] ? operand[0] : "", + operand[1][0] ? ',' : ' ', + operand[1][0] ? operand[1] : ""); + /* Print destination of branch in relation to current symbol. */ + if (print_label && info->symbols) + { + asymbol *sym = *info->symbols; + + if ((insn->tm->opcode_modifier == PCRel) && (insn_word & PCRel)) + { + address = (_pc + 1 + (short) address) - ((sym->section->vma + sym->value) / 4); + /* Check for delayed instruction, if so adjust destination. */ + if (insn_word & 0x00200000) + address += 2; + } + else + { + address -= ((sym->section->vma + sym->value) / 4); + } + if (address == 0) + info->fprintf_func (info->stream, " <%s>", sym->name); + else + info->fprintf_func (info->stream, " <%s %c %d>", sym->name, + ((short) address < 0) ? '-' : '+', + abs (address)); + } + return 1; +} + +int +get_indirect_operand (fragment, size, buffer) + unsigned short fragment; + int size; + char *buffer; +{ + unsigned char mod; + unsigned arnum; + unsigned char disp; + + if (buffer == NULL) + return 0; + /* Determine which bits identify the sections of the indirect operand based on the + size in bytes. */ + switch (size) + { + case 1: + mod = (fragment & 0x00F8) >> 3; + arnum = (fragment & 0x0007); + disp = 0; + break; + case 2: + mod = (fragment & 0xF800) >> 11; + arnum = (fragment & 0x0700) >> 8; + disp = (fragment & 0x00FF); + break; + default: + return 0; + } + { + const ind_addr_type *current_ind = tic30_indaddr_tab; + for (; current_ind < tic30_indaddrtab_end; current_ind++) + { + if (current_ind->modfield == mod) + { + if (current_ind->displacement == IMPLIED_DISP && size == 2) + { + continue; + } + else + { + size_t i, len; + int bufcnt; + + len = strlen (current_ind->syntax); + for (i = 0, bufcnt = 0; i < len; i++, bufcnt++) + { + buffer[bufcnt] = current_ind->syntax[i]; + if (buffer[bufcnt - 1] == 'a' && buffer[bufcnt] == 'r') + buffer[++bufcnt] = arnum + '0'; + if (buffer[bufcnt] == '(' && current_ind->displacement == DISP_REQUIRED) + { + sprintf (&buffer[bufcnt + 1], "%u", disp); + bufcnt += strlen (&buffer[bufcnt + 1]); + } + } + buffer[bufcnt + 1] = '\0'; + break; + } + } + } + } + return 1; +} + +int +get_register_operand (fragment, buffer) + unsigned char fragment; + char *buffer; +{ + const reg *current_reg = tic30_regtab; + + if (buffer == NULL) + return 0; + for (; current_reg < tic30_regtab_end; current_reg++) + { + if ((fragment & 0x1F) == current_reg->opcode) + { + strcpy (buffer, current_reg->name); + return 1; + } + } + return 0; +} + +int +cnvt_tmsfloat_ieee (tmsfloat, size, ieeefloat) + unsigned long tmsfloat; + int size; + float *ieeefloat; +{ + unsigned long exp, sign, mant; + + if (size == 2) + { + if ((tmsfloat & 0x0000F000) == 0x00008000) + tmsfloat = 0x80000000; + else + { + tmsfloat <<= 16; + tmsfloat = (long) tmsfloat >> 4; + } + } + exp = tmsfloat & 0xFF000000; + if (exp == 0x80000000) + { + *ieeefloat = 0.0; + return 1; + } + exp += 0x7F000000; + sign = (tmsfloat & 0x00800000) << 8; + mant = tmsfloat & 0x007FFFFF; + if (exp == 0xFF000000) + { + if (mant == 0) + *ieeefloat = ERANGE; + if (sign == 0) + *ieeefloat = 1.0 / 0.0; + else + *ieeefloat = -1.0 / 0.0; + return 1; + } + exp >>= 1; + if (sign) + { + mant = (~mant) & 0x007FFFFF; + mant += 1; + exp += mant & 0x00800000; + exp &= 0x7F800000; + mant &= 0x007FFFFF; + } + if (tmsfloat == 0x80000000) + sign = mant = exp = 0; + tmsfloat = sign | exp | mant; + *ieeefloat = *((float *) &tmsfloat); + return 1; +} diff --git a/contrib/binutils/opcodes/v850-dis.c b/contrib/binutils/opcodes/v850-dis.c new file mode 100644 index 0000000..da099bf --- /dev/null +++ b/contrib/binutils/opcodes/v850-dis.c @@ -0,0 +1,253 @@ +/* Disassemble V850 instructions. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + + +#include <stdio.h> + +#include "ansidecl.h" +#include "opcode/v850.h" +#include "dis-asm.h" + +static const char *const v850_reg_names[] = +{ "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "ep", "lp" }; + +static const char *const v850_sreg_names[] = +{ "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", + "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", + "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23", + "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31" }; + +static const char *const v850_cc_names[] = +{ "v", "c/l", "z", "nh", "s/n", "t", "lt", "le", + "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt" }; + +static int +disassemble (memaddr, info, insn) + bfd_vma memaddr; + struct disassemble_info *info; + unsigned long insn; +{ + struct v850_opcode * op = (struct v850_opcode *)v850_opcodes; + const struct v850_operand * operand; + int match = 0; + int short_op = ((insn & 0x0600) != 0x0600); + int bytes_read; + int target_processor; + + + bytes_read = short_op ? 2 : 4; + + /* If this is a two byte insn, then mask off the high bits. */ + if (short_op) + insn &= 0xffff; + + switch (info->mach) + { + case 0: + default: + target_processor = PROCESSOR_V850; + break; + + } + + /* Find the opcode. */ + while (op->name) + { + if ((op->mask & insn) == op->opcode + && (op->processors & target_processor)) + { + const unsigned char * opindex_ptr; + unsigned int opnum; + unsigned int memop; + + match = 1; + (*info->fprintf_func) (info->stream, "%s\t", op->name); +/*fprintf (stderr, "match: mask: %x insn: %x, opcode: %x, name: %s\n", op->mask, insn, op->opcode, op->name );*/ + + memop = op->memop; + /* Now print the operands. + + MEMOP is the operand number at which a memory + address specification starts, or zero if this + instruction has no memory addresses. + + A memory address is always two arguments. + + This information allows us to determine when to + insert commas into the output stream as well as + when to insert disp[reg] expressions onto the + output stream. */ + + for (opindex_ptr = op->operands, opnum = 1; + *opindex_ptr != 0; + opindex_ptr++, opnum++) + { + long value; + int flag; + int status; + bfd_byte buffer[ 4 ]; + + operand = &v850_operands[*opindex_ptr]; + + if (operand->extract) + value = (operand->extract) (insn, 0); + else + { + if (operand->bits == -1) + value = (insn & operand->shift); + else + value = (insn >> operand->shift) & ((1 << operand->bits) - 1); + + if (operand->flags & V850_OPERAND_SIGNED) + value = ((long)(value << (32 - operand->bits)) + >> (32 - operand->bits)); + } + + /* The first operand is always output without any + special handling. + + For the following arguments: + + If memop && opnum == memop + 1, then we need '[' since + we're about to output the register used in a memory + reference. + + If memop && opnum == memop + 2, then we need ']' since + we just finished the register in a memory reference. We + also need a ',' before this operand. + + Else we just need a comma. + + We may need to output a trailing ']' if the last operand + in an instruction is the register for a memory address. + + The exception (and there's always an exception) is the + "jmp" insn which needs square brackets around it's only + register argument. */ + + if (memop && opnum == memop + 1) info->fprintf_func (info->stream, "["); + else if (memop && opnum == memop + 2) info->fprintf_func (info->stream, "],"); + else if (memop == 1 && opnum == 1 + && (operand->flags & V850_OPERAND_REG)) + info->fprintf_func (info->stream, "["); + else if (opnum > 1) info->fprintf_func (info->stream, ", "); + + /* extract the flags, ignorng ones which do not effect disassembly output. */ + flag = operand->flags; + flag &= ~ V850_OPERAND_SIGNED; + flag &= ~ V850_OPERAND_RELAX; + flag &= - flag; + + switch (flag) + { + case V850_OPERAND_REG: info->fprintf_func (info->stream, "%s", v850_reg_names[value]); break; + case V850_OPERAND_SRG: info->fprintf_func (info->stream, "%s", v850_sreg_names[value]); break; + case V850_OPERAND_CC: info->fprintf_func (info->stream, "%s", v850_cc_names[value]); break; + case V850_OPERAND_EP: info->fprintf_func (info->stream, "ep"); break; + default: info->fprintf_func (info->stream, "%d", value); break; + case V850_OPERAND_DISP: + { + bfd_vma addr = value + memaddr; + + /* On the v850 the top 8 bits of an address are used by an overlay manager. + Thus it may happen that when we are looking for a symbol to match + against an address with some of its top bits set, the search fails to + turn up an exact match. In this case we try to find an exact match + against a symbol in the lower address space, and if we find one, we + use that address. We only do this for JARL instructions however, as + we do not want to misinterpret branch instructions. */ + if (operand->bits == 22) + { + if ( ! info->symbol_at_address_func (addr, info) + && ((addr & 0xFF000000) != 0) + && info->symbol_at_address_func (addr & 0x00FFFFFF, info)) + { + addr &= 0x00FFFFFF; + } + } + info->print_address_func (addr, info); + break; + } + + } + + /* Handle jmp correctly. */ + if (memop == 1 && opnum == 1 + && ((operand->flags & V850_OPERAND_REG) != 0)) + (*info->fprintf_func) (info->stream, "]"); + } + + /* Close any square bracket we left open. */ + if (memop && opnum == memop + 2) + (*info->fprintf_func) (info->stream, "]"); + + /* All done. */ + break; + } + op++; + } + + if (!match) + { + if (short_op) + info->fprintf_func (info->stream, ".short\t0x%04x", insn); + else + info->fprintf_func (info->stream, ".long\t0x%08x", insn); + } + + return bytes_read; +} + +int +print_insn_v850 (memaddr, info) + bfd_vma memaddr; + struct disassemble_info * info; +{ + int status; + bfd_byte buffer[ 4 ]; + unsigned long insn = 0; + + /* First figure out how big the opcode is. */ + + status = info->read_memory_func (memaddr, buffer, 2, info); + if (status == 0) + { + insn = bfd_getl16 (buffer); + + if ( (insn & 0x0600) == 0x0600 + && (insn & 0xffe0) != 0x0620) + { + /* If this is a 4 byte insn, read 4 bytes of stuff. */ + status = info->read_memory_func (memaddr, buffer, 4, info); + + if (status == 0) + insn = bfd_getl32 (buffer); + } + } + + if (status != 0) + { + info->memory_error_func (status, memaddr, info); + return -1; + } + + /* Make sure we tell our caller how many bytes we consumed. */ + return disassemble (memaddr, info, insn); +} diff --git a/contrib/binutils/opcodes/v850-opc.c b/contrib/binutils/opcodes/v850-opc.c new file mode 100644 index 0000000..3a6624b --- /dev/null +++ b/contrib/binutils/opcodes/v850-opc.c @@ -0,0 +1,494 @@ +/* Assemble V850 instructions. + Copyright (C) 1996 Free Software Foundation, Inc. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "ansidecl.h" +#include "opcode/v850.h" +#include <stdio.h> + +/* regular opcode */ +#define OP(x) ((x & 0x3f) << 5) +#define OP_MASK OP (0x3f) + +/* conditional branch opcode */ +#define BOP(x) ((0x0b << 7) | (x & 0x0f)) +#define BOP_MASK ((0x0f << 7) | 0x0f) + +/* one-word opcodes */ +#define one(x) ((unsigned int) (x)) + +/* two-word opcodes */ +#define two(x,y) ((unsigned int) (x) | ((unsigned int) (y) << 16)) + + + +/* The functions used to insert and extract complicated operands. */ + +/* Note: There is a conspiracy between these functions and + v850_insert_operand() in gas/config/tc-v850.c. Error messages + containing the string 'out of range' will be ignored unless a + specific command line option is given to GAS. */ + +static const char * not_valid = "displacement value is not in range and is not aligned"; +static const char * out_of_range = "displacement value is out of range"; +static const char * not_aligned = "displacement value is not aligned"; + +static const char * immediate_out_of_range = "immediate value is out of range"; + +static unsigned long +insert_d9 (insn, value, errmsg) + unsigned long insn; + long value; + const char ** errmsg; +{ + if (value > 0xff || value < -0x100) + { + if ((value % 2) != 0) + * errmsg = "branch value not in range and to odd offset"; + else + * errmsg = "branch value out of range"; + } + else if ((value % 2) != 0) + * errmsg = "branch to odd offset"; + + return (insn | ((value & 0x1f0) << 7) | ((value & 0x0e) << 3)); +} + +static unsigned long +extract_d9 (insn, invalid) + unsigned long insn; + int * invalid; +{ + unsigned long ret = ((insn & 0xf800) >> 7) | ((insn & 0x0070) >> 3); + + if ((insn & 0x8000) != 0) + ret -= 0x0200; + + return ret; +} + +static unsigned long +insert_d22 (insn, value, errmsg) + unsigned long insn; + long value; + const char ** errmsg; +{ + if (value > 0x1fffff || value < -0x200000) + { + if ((value % 2) != 0) + * errmsg = "branch value not in range and to an odd offset"; + else + * errmsg = "branch value out of range"; + } + else if ((value % 2) != 0) + * errmsg = "branch to odd offset"; + + return (insn | ((value & 0xfffe) << 16) | ((value & 0x3f0000) >> 16)); +} + +static unsigned long +extract_d22 (insn, invalid) + unsigned long insn; + int * invalid; +{ + signed long ret = ((insn & 0xfffe0000) >> 16) | ((insn & 0x3f) << 16); + + return (unsigned long) ((ret << 10) >> 10); +} + +static unsigned long +insert_d16_15 (insn, value, errmsg) + unsigned long insn; + long value; + const char ** errmsg; +{ + if (value > 0x7fff || value < -0x8000) + { + if ((value % 2) != 0) + * errmsg = not_valid; + else + * errmsg = out_of_range; + } + else if ((value % 2) != 0) + * errmsg = not_aligned; + + return insn | ((value & 0xfffe) << 16); +} + +static unsigned long +extract_d16_15 (insn, invalid) + unsigned long insn; + int * invalid; +{ + signed long ret = (insn & 0xfffe0000); + + return ret >> 16; +} + +static unsigned long +insert_d8_7 (insn, value, errmsg) + unsigned long insn; + long value; + const char ** errmsg; +{ + if (value > 0xff || value < 0) + { + if ((value % 2) != 0) + * errmsg = not_valid; + else + * errmsg = out_of_range; + } + else if ((value % 2) != 0) + * errmsg = not_aligned; + + value >>= 1; + + return (insn | (value & 0x7f)); +} + +static unsigned long +extract_d8_7 (insn, invalid) + unsigned long insn; + int * invalid; +{ + unsigned long ret = (insn & 0x7f); + + return ret << 1; +} + +static unsigned long +insert_d8_6 (insn, value, errmsg) + unsigned long insn; + long value; + const char ** errmsg; +{ + if (value > 0xff || value < 0) + { + if ((value % 4) != 0) + *errmsg = not_valid; + else + * errmsg = out_of_range; + } + else if ((value % 4) != 0) + * errmsg = not_aligned; + + value >>= 1; + + return (insn | (value & 0x7e)); +} + +static unsigned long +extract_d8_6 (insn, invalid) + unsigned long insn; + int * invalid; +{ + unsigned long ret = (insn & 0x7e); + + return ret << 1; +} + + + +/* Warning: code in gas/config/tc-v850.c examines the contents of this array. + If you change any of the values here, be sure to look for side effects in + that code. */ +const struct v850_operand v850_operands[] = +{ +#define UNUSED 0 + { 0, 0, NULL, NULL, 0 }, + +/* The R1 field in a format 1, 6, 7, or 9 insn. */ +#define R1 (UNUSED + 1) + { 5, 0, NULL, NULL, V850_OPERAND_REG }, + +/* As above, but register 0 is not allowed. */ +#define R1_NOTR0 (R1 + 1) + { 5, 0, NULL, NULL, V850_OPERAND_REG | V850_NOT_R0 }, + +/* The R2 field in a format 1, 2, 4, 5, 6, 7, 9 insn. */ +#define R2 (R1_NOTR0 + 1) + { 5, 11, NULL, NULL, V850_OPERAND_REG }, + +/* As above, but register 0 is not allowed. */ +#define R2_NOTR0 (R2 + 1) + { 5, 11, NULL, NULL, V850_OPERAND_REG | V850_NOT_R0 }, + +/* The imm5 field in a format 2 insn. */ +#define I5 (R2_NOTR0 + 1) + { 5, 0, NULL, NULL, V850_OPERAND_SIGNED }, + +/* The unsigned imm5 field in a format 2 insn. */ +#define I5U (I5 + 1) + { 5, 0, NULL, NULL, 0 }, + +/* The imm16 field in a format 6 insn. */ +#define I16 (I5U + 1) + { 16, 16, NULL, NULL, V850_OPERAND_SIGNED }, + +/* The signed disp7 field in a format 4 insn. */ +#define D7 (I16 + 1) + { 7, 0, NULL, NULL, 0}, + +/* The disp16 field in a format 6 insn. */ +#define D16_15 (D7 + 1) + { 15, 17, insert_d16_15, extract_d16_15, V850_OPERAND_SIGNED }, + +/* The 3 bit immediate field in format 8 insn. */ +#define B3 (D16_15 + 1) + { 3, 11, NULL, NULL, 0 }, + +/* The 4 bit condition code in a setf instruction */ +#define CCCC (B3 + 1) + { 4, 0, NULL, NULL, V850_OPERAND_CC }, + +/* The unsigned DISP8 field in a format 4 insn. */ +#define D8_7 (CCCC + 1) + { 7, 0, insert_d8_7, extract_d8_7, 0 }, + +/* The unsigned DISP8 field in a format 4 insn. */ +#define D8_6 (D8_7 + 1) + { 6, 1, insert_d8_6, extract_d8_6, 0 }, + +/* System register operands. */ +#define SR1 (D8_6 + 1) + { 5, 0, NULL, NULL, V850_OPERAND_SRG }, + +/* EP Register. */ +#define EP (SR1 + 1) + { 0, 0, NULL, NULL, V850_OPERAND_EP }, + +/* The imm16 field (unsigned) in a format 6 insn. */ +#define I16U (EP + 1) + { 16, 16, NULL, NULL, 0}, + +/* The R2 field as a system register. */ +#define SR2 (I16U + 1) + { 5, 11, NULL, NULL, V850_OPERAND_SRG }, + +/* The disp16 field in a format 8 insn. */ +#define D16 (SR2 + 1) + { 16, 16, NULL, NULL, V850_OPERAND_SIGNED }, + +/* The DISP9 field in a format 3 insn, relaxable. */ +#define D9_RELAX (D16 + 1) + { 9, 0, insert_d9, extract_d9, V850_OPERAND_RELAX | V850_OPERAND_SIGNED | V850_OPERAND_DISP }, + +/* The DISP22 field in a format 4 insn, relaxable. + This _must_ follow D9_RELAX; the assembler assumes that the longer + version immediately follows the shorter version for relaxing. */ +#define D22 (D9_RELAX + 1) + { 22, 0, insert_d22, extract_d22, V850_OPERAND_SIGNED | V850_OPERAND_DISP }, + +} ; + + +/* reg-reg instruction format (Format I) */ +#define IF1 {R1, R2} + +/* imm-reg instruction format (Format II) */ +#define IF2 {I5, R2} + +/* conditional branch instruction format (Format III) */ +#define IF3 {D9_RELAX} + +/* 3 operand instruction (Format VI) */ +#define IF6 {I16, R1, R2} + +/* 3 operand instruction (Format VI) */ +#define IF6U {I16U, R1, R2} + + + +/* The opcode table. + + The format of the opcode table is: + + NAME OPCODE MASK { OPERANDS } MEMOP PROCESSOR + + NAME is the name of the instruction. + OPCODE is the instruction opcode. + MASK is the opcode mask; this is used to tell the disassembler + which bits in the actual opcode must match OPCODE. + OPERANDS is the list of operands. + MEMOP specifies which operand (if any) is a memory operand. + PROCESSORS specifies which CPU(s) support the opcode. + + The disassembler reads the table in order and prints the first + instruction which matches, so this table is sorted to put more + specific instructions before more general instructions. It is also + sorted by major opcode. + + The table is also sorted by name. This is used by the assembler. + When parsing an instruction the assembler finds the first occurance + of the name of the instruciton in this table and then attempts to + match the instruction's arguments with description of the operands + associated with the entry it has just found in this table. If the + match fails the assembler looks at the next entry in this table. + If that entry has the same name as the previous entry, then it + tries to match the instruction against that entry and so on. This + is how the assembler copes with multiple, different formats of the + same instruction. */ + +const struct v850_opcode v850_opcodes[] = +{ +{ "breakpoint", 0xffff, 0xffff, {UNUSED}, 0, PROCESSOR_ALL }, + +{ "jmp", one (0x0060), one (0xffe0), {R1}, 1, PROCESSOR_ALL }, + +/* load/store instructions */ +{ "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_V850 }, + + +{ "sld.h", one (0x0400), one (0x0780), {D8_7, EP, R2}, 1, PROCESSOR_V850 }, +{ "sld.w", one (0x0500), one (0x0781), {D8_6, EP, R2}, 1, PROCESSOR_ALL }, +{ "sst.b", one (0x0380), one (0x0780), {R2, D7, EP}, 2, PROCESSOR_ALL }, +{ "sst.h", one (0x0480), one (0x0780), {R2, D8_7, EP}, 2, PROCESSOR_ALL }, +{ "sst.w", one (0x0501), one (0x0781), {R2, D8_6, EP}, 2, PROCESSOR_ALL }, + + + +{ "ld.b", two (0x0700, 0x0000), two (0x07e0, 0x0000), {D16, R1, R2}, 1, PROCESSOR_ALL }, +{ "ld.h", two (0x0720, 0x0000), two (0x07e0, 0x0001), {D16_15, R1, R2}, 1, PROCESSOR_ALL }, +{ "ld.w", two (0x0720, 0x0001), two (0x07e0, 0x0001), {D16_15, R1, R2}, 1, PROCESSOR_ALL }, +{ "st.b", two (0x0740, 0x0000), two (0x07e0, 0x0000), {R2, D16, R1}, 2, PROCESSOR_ALL }, +{ "st.h", two (0x0760, 0x0000), two (0x07e0, 0x0001), {R2, D16_15, R1}, 2, PROCESSOR_ALL }, +{ "st.w", two (0x0760, 0x0001), two (0x07e0, 0x0001), {R2, D16_15, R1}, 2, PROCESSOR_ALL }, + + +/* arithmetic operation instructions */ +{ "setf", two (0x07e0, 0x0000), two (0x07f0, 0xffff), {CCCC, R2}, 0, PROCESSOR_ALL }, +{ "divh", OP (0x02), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, + + +{ "nop", one (0x00), one (0xffff), {0}, 0, PROCESSOR_ALL }, +{ "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "mov", OP (0x00), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "movea", OP (0x31), OP_MASK, {I16, R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "movhi", OP (0x32), OP_MASK, {I16U, R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "add", OP (0x0e), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "add", OP (0x12), OP_MASK, IF2, 0, PROCESSOR_ALL }, +{ "addi", OP (0x30), OP_MASK, IF6, 0, PROCESSOR_ALL }, +{ "sub", OP (0x0d), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "subr", OP (0x0c), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "mulh", OP (0x07), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "mulhi", OP (0x37), OP_MASK, {I16, R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "cmp", OP (0x0f), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "cmp", OP (0x13), OP_MASK, IF2, 0, PROCESSOR_ALL }, + +/* saturated operation instructions */ +{ "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "satadd", OP (0x06), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "satsub", OP (0x05), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "satsubi", OP (0x33), OP_MASK, {I16, R1, R2_NOTR0}, 0, PROCESSOR_ALL }, +{ "satsubr", OP (0x04), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }, + +/* logical operation instructions */ +{ "tst", OP (0x0b), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "or", OP (0x08), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "ori", OP (0x34), OP_MASK, IF6U, 0, PROCESSOR_ALL }, +{ "and", OP (0x0a), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "andi", OP (0x36), OP_MASK, IF6U, 0, PROCESSOR_ALL }, +{ "xor", OP (0x09), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "xori", OP (0x35), OP_MASK, IF6U, 0, PROCESSOR_ALL }, +{ "not", OP (0x01), OP_MASK, IF1, 0, PROCESSOR_ALL }, +{ "sar", OP (0x15), OP_MASK, {I5U, R2}, 0, PROCESSOR_ALL }, +{ "sar", two (0x07e0, 0x00a0), two (0x07e0, 0xffff), {R1, R2}, 0, PROCESSOR_ALL }, +{ "shl", OP (0x16), OP_MASK, {I5U, R2}, 0, PROCESSOR_ALL }, +{ "shl", two (0x07e0, 0x00c0), two (0x07e0, 0xffff), {R1, R2}, 0, PROCESSOR_ALL }, +{ "shr", OP (0x14), OP_MASK, {I5U, R2}, 0, PROCESSOR_ALL }, +{ "shr", two (0x07e0, 0x0080), two (0x07e0, 0xffff), {R1, R2}, 0, PROCESSOR_ALL }, + +/* branch instructions */ + /* signed integer */ +{ "bgt", BOP (0xf), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bge", BOP (0xe), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "blt", BOP (0x6), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "ble", BOP (0x7), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* unsigned integer */ +{ "bh", BOP (0xb), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bnh", BOP (0x3), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bl", BOP (0x1), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bnl", BOP (0x9), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* common */ +{ "be", BOP (0x2), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bne", BOP (0xa), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* others */ +{ "bv", BOP (0x0), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bnv", BOP (0x8), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bn", BOP (0x4), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bp", BOP (0xc), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bc", BOP (0x1), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bnc", BOP (0x9), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bz", BOP (0x2), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bnz", BOP (0xa), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "br", BOP (0x5), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "bsa", BOP (0xd), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + +/* Branch macros. + + We use the short form in the opcode/mask fields. The assembler + will twiddle bits as necessary if the long form is needed. */ + + /* signed integer */ +{ "jgt", BOP (0xf), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jge", BOP (0xe), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jlt", BOP (0x6), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jle", BOP (0x7), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* unsigned integer */ +{ "jh", BOP (0xb), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jnh", BOP (0x3), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jl", BOP (0x1), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jnl", BOP (0x9), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* common */ +{ "je", BOP (0x2), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jne", BOP (0xa), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + /* others */ +{ "jv", BOP (0x0), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jnv", BOP (0x8), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jn", BOP (0x4), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jp", BOP (0xc), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jc", BOP (0x1), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jnc", BOP (0x9), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jz", BOP (0x2), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jnz", BOP (0xa), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jsa", BOP (0xd), BOP_MASK, IF3, 0, PROCESSOR_ALL }, +{ "jbr", BOP (0x5), BOP_MASK, IF3, 0, PROCESSOR_ALL }, + +{ "jr", one (0x0780), two (0xffc0, 0x0001), {D22}, 0, PROCESSOR_ALL }, +{ "jarl", one (0x0780), two (0x07c0, 0x0001), {D22, R2}, 0, PROCESSOR_ALL}, + +/* bit manipulation instructions */ +{ "set1", two (0x07c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 2, PROCESSOR_ALL }, +{ "not1", two (0x47c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 2, PROCESSOR_ALL }, +{ "clr1", two (0x87c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 2, PROCESSOR_ALL }, +{ "tst1", two (0xc7c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 2, PROCESSOR_ALL }, + +/* special instructions */ +{ "di", two (0x07e0, 0x0160), two (0xffff, 0xffff), {0}, 0, PROCESSOR_ALL }, +{ "ei", two (0x87e0, 0x0160), two (0xffff, 0xffff), {0}, 0, PROCESSOR_ALL }, +{ "halt", two (0x07e0, 0x0120), two (0xffff, 0xffff), {0}, 0, PROCESSOR_ALL }, +{ "reti", two (0x07e0, 0x0140), two (0xffff, 0xffff), {0}, 0, PROCESSOR_ALL }, +{ "trap", two (0x07e0, 0x0100), two (0xffe0, 0xffff), {I5U}, 0, PROCESSOR_ALL }, +{ "ldsr", two (0x07e0, 0x0020), two (0x07e0, 0xffff), {R1, SR2}, 0, PROCESSOR_ALL }, +{ "stsr", two (0x07e0, 0x0040), two (0x07e0, 0xffff), {SR1, R2}, 0, PROCESSOR_ALL }, +{ 0, 0, 0, {0}, 0, 0 }, + +} ; + +const int v850_num_opcodes = + sizeof (v850_opcodes) / sizeof (v850_opcodes[0]); + diff --git a/contrib/binutils/opcodes/z8k-dis.c b/contrib/binutils/opcodes/z8k-dis.c index 8890e12..7123622 100644 --- a/contrib/binutils/opcodes/z8k-dis.c +++ b/contrib/binutils/opcodes/z8k-dis.c @@ -1,4 +1,6 @@ -/* +/* Disassemble z8000 code. + Copyright 1992, 1993, 1995, 1998 Free Software Foundation, Inc. + This file is part of GNU Binutils. This program is free software; you can redistribute it and/or modify @@ -67,7 +69,6 @@ fetch_data (info, nibble) unsigned char mybuf[20]; int status; instr_data_s *priv = (instr_data_s *)info->private_data; - bfd_vma start; if ((nibble % 4) != 0) abort (); @@ -164,6 +165,7 @@ print_insn_z8k (addr, info, is_segmented) } } +int print_insn_z8001 (addr, info) bfd_vma addr; disassemble_info *info; @@ -171,6 +173,7 @@ print_insn_z8001 (addr, info) return print_insn_z8k (addr, info, 1); } +int print_insn_z8002 (addr, info) bfd_vma addr; disassemble_info *info; @@ -495,26 +498,26 @@ unparse_instr (instr_data) switch (datum_class) { case CLASS_X: - sprintf (tmp_str, "0x%0x(R%d)", instr_data->address, + sprintf (tmp_str, "0x%0lx(R%ld)", instr_data->address, instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; case CLASS_BA: - sprintf (tmp_str, "r%d(#%x)", instr_data->arg_reg[datum_value], + sprintf (tmp_str, "r%ld(#%lx)", instr_data->arg_reg[datum_value], instr_data->immediate); strcat (out_str, tmp_str); break; case CLASS_BX: - sprintf (tmp_str, "r%d(R%d)", instr_data->arg_reg[datum_value], + sprintf (tmp_str, "r%ld(R%ld)", instr_data->arg_reg[datum_value], instr_data->arg_reg[ARG_RX]); strcat (out_str, tmp_str); break; case CLASS_DISP: - sprintf (tmp_str, "#0x%0x", instr_data->displacement); + sprintf (tmp_str, "#0x%0lx", instr_data->displacement); strcat (out_str, tmp_str); break; case CLASS_IMM: - sprintf (tmp_str, "#0x%0x", instr_data->immediate); + sprintf (tmp_str, "#0x%0lx", instr_data->immediate); strcat (out_str, tmp_str); break; case CLASS_CC: @@ -522,44 +525,44 @@ unparse_instr (instr_data) strcat (out_str, tmp_str); break; case CLASS_CTRL: - sprintf (tmp_str, "0x%0x", instr_data->ctrl_code); + sprintf (tmp_str, "0x%0lx", instr_data->ctrl_code); strcat (out_str, tmp_str); break; case CLASS_DA: case CLASS_ADDRESS: - sprintf (tmp_str, "#0x%0x", instr_data->address); + sprintf (tmp_str, "#0x%0lx", instr_data->address); strcat (out_str, tmp_str); break; case CLASS_IR: - sprintf (tmp_str, "@R%d", instr_data->arg_reg[datum_value]); + sprintf (tmp_str, "@R%ld", instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; case CLASS_FLAGS: - sprintf (tmp_str, "0x%0x", instr_data->flags); + sprintf (tmp_str, "0x%0lx", instr_data->flags); strcat (out_str, tmp_str); break; case CLASS_REG_BYTE: if (instr_data->arg_reg[datum_value] >= 0x8) { - sprintf (tmp_str, "rl%d", + sprintf (tmp_str, "rl%ld", instr_data->arg_reg[datum_value] - 0x8); } else { - sprintf (tmp_str, "rh%d", instr_data->arg_reg[datum_value]); + sprintf (tmp_str, "rh%ld", instr_data->arg_reg[datum_value]); } strcat (out_str, tmp_str); break; case CLASS_REG_WORD: - sprintf (tmp_str, "r%d", instr_data->arg_reg[datum_value]); + sprintf (tmp_str, "r%ld", instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; case CLASS_REG_QUAD: - sprintf (tmp_str, "rq%d", instr_data->arg_reg[datum_value]); + sprintf (tmp_str, "rq%ld", instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; case CLASS_REG_LONG: - sprintf (tmp_str, "rr%d", instr_data->arg_reg[datum_value]); + sprintf (tmp_str, "rr%ld", instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; default: |
