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-rw-r--r--contrib/binutils/gas/doc/c-arm.texi39
1 files changed, 33 insertions, 6 deletions
diff --git a/contrib/binutils/gas/doc/c-arm.texi b/contrib/binutils/gas/doc/c-arm.texi
index ff98d7f..e354982 100644
--- a/contrib/binutils/gas/doc/c-arm.texi
+++ b/contrib/binutils/gas/doc/c-arm.texi
@@ -1,4 +1,4 @@
-@c Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc.
+@c Copyright (C) 1996, 1998, 1999, 2000 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@@ -27,66 +27,86 @@
@section Options
@cindex ARM options (none)
@cindex options for ARM (none)
+
@table @code
+
@cindex @code{-marm} command line option, ARM
-@item -marm [@var{2}|@var{250}|@var{3}|@var{6}|@var{60}|@var{600}|@var{610}|@var{620}|@var{7}|@var{7m}|@var{7d}|@var{7dm}|@var{7di}|@var{7dmi}|@var{70}|@var{700}|@var{700i}|@var{710}|@var{710c}|@var{7100}|@var{7500}|@var{7500fe}|@var{7tdmi}|@var{8}|@var{810}|@var{9}|@var{9tdmi}|@var{920}|@var{strongarm}|@var{strongarm110}|@var{strongarm1100}]
+@item -marm@code{[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|810|9|9tdmi|920|strongarm|strongarm110|strongarm1100]}
This option specifies the target processor. The assembler will issue an
error message if an attempt is made to assemble an instruction which
will not execute on the target processor.
+
@cindex @code{-marmv} command line option, ARM
-@item -marmv [@var{2}|@var{2a}|@var{3}|@var{3m}|@var{4}|@var{4t}|@var{5}|@var{5t}]
+@item -marmv@code{[2|2a|3|3m|4|4t|5|5t]}
This option specifies the target architecture. The assembler will issue
an error message if an attempt is made to assemble an instruction which
will not execute on the target architecture.
+
@cindex @code{-mthumb} command line option, ARM
@item -mthumb
This option specifies that only Thumb instructions should be assembled.
+
@cindex @code{-mall} command line option, ARM
@item -mall
This option specifies that any Arm or Thumb instruction should be assembled.
+
@cindex @code{-mfpa} command line option, ARM
-@item -mfpa [@var{10}|@var{11}]
+@item -mfpa @var{[10|11]}
This option specifies the floating point architecture in use on the
target processor.
+
@cindex @code{-mfpe-old} command line option, ARM
@item -mfpe-old
Do not allow the assemble of floating point multiple instructions.
+
@cindex @code{-mno-fpu} command line option, ARM
@item -mno-fpu
Do not allow the assembly of any floating point instructions.
+
@cindex @code{-mthumb-interwork} command line option, ARM
@item -mthumb-interwork
This option specifies that the output generated by the assembler should
be marked as supporting interworking.
+
@cindex @code{-mapcs} command line option, ARM
-@item -mapcs [@var{26}|@var{32}]
+@item -mapcs @var{[26|32]}
This option specifies that the output generated by the assembler should
be marked as supporting the indicated version of the Arm Procedure.
Calling Standard.
+
+@cindex @code{-mapcs-float} command line option, ARM
@item -mapcs-float
This indicates the the floating point variant of the APCS should be
used. In this variant floating point arguments are passed in FP
registers rather than integer registers.
+
+@cindex @code{-mapcs-reentrant} command line option, ARM
@item -mapcs-reentrant
This indicates that the reentrant variant of the APCS should be used.
This variant supports position independent code.
+
@cindex @code{-EB} command line option, ARM
@item -EB
This option specifies that the output generated by the assembler should
be marked as being encoded for a big-endian processor.
+
@cindex @code{-EL} command line option, ARM
@item -EL
This option specifies that the output generated by the assembler should
be marked as being encoded for a little-endian processor.
+
@cindex @code{-k} command line option, ARM
@cindex PIC code generation for ARM
@item -k
This option enables the generation of PIC (position independent code).
+
+@cindex @code{-moabi} command line option, ARM
@item -moabi
This indicates that the code should be assembled using the old ARM ELF
conventions, based on a beta release release of the ARM-ELF
specifications, rather than the default conventions which are based on
the final release of the ARM-ELF specifications.
+
@end table
@@ -143,6 +163,13 @@ The ARM family uses @sc{ieee} floating-point numbers.
@cindex ARM machine directives
@table @code
+@cindex @code{align} directive, ARM
+@item .align @var{expression} [, @var{expression}]
+This is the generic @var{.align} directive. For the ARM however if the
+first argument is zero (ie no alignment is needed) the assembler will
+behave as if the argument had been 2 (ie pad to the next four byte
+boundary). This is for compatability with ARM's own assembler.
+
@cindex @code{req} directive, ARM
@item @var{name} .req @var{register name}
This creates an alias for @var{register name} called @var{name}. For
@@ -153,7 +180,7 @@ example:
@end smallexample
@cindex @code{code} directive, ARM
-@item .code [@var{16}|@var{32}]
+@item .code @var{[16|32]}
This directive selects the instruction set being generated. The value 16
selects Thumb, with the value 32 selecting ARM.
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