1 files changed, 130 insertions, 100 deletions

diff --git a/contrib/binutils/gas/config/tc-ppc.c b/contrib/binutils/gas/config/tc-ppc.c
index f7872a0..c743c54 100644
--- a/contrib/binutils/gas/config/tc-ppc.c
+++ b/contrib/binutils/gas/config/tc-ppc.c
@@ -232,7 +232,7 @@ const pseudo_typeS md_pseudo_table[] =
   { "rdata",	ppc_elf_rdata,	0 },
   { "rodata",	ppc_elf_rdata,	0 },
   { "lcomm",	ppc_elf_lcomm,	0 },
-  { "file",	dwarf2_directive_file, 0 },
+  { "file",	(void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
   { "loc",	dwarf2_directive_loc, 0 },
 #endif
 
@@ -695,16 +695,10 @@ ppc_parse_name (name, expr)
 
 /* The type of processor we are assembling for.  This is one or more
    of the PPC_OPCODE flags defined in opcode/ppc.h.  */
-static int ppc_cpu = 0;
+static unsigned long ppc_cpu = 0;
 
-/* The size of the processor we are assembling for.  This is either
-   PPC_OPCODE_32 or PPC_OPCODE_64.  */
-static unsigned long ppc_size = (BFD_DEFAULT_TARGET_SIZE == 64
-				 ? PPC_OPCODE_64
-				 : PPC_OPCODE_32);
-
-/* Whether to target xcoff64.  */
-static int ppc_xcoff64 = 0;
+/* Whether to target xcoff64/elf64.  */
+static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
 
 /* Opcode hash table.  */
 static struct hash_control *ppc_hash;
@@ -858,44 +852,41 @@ md_parse_option (c, arg)
       /* a64 and a32 determine whether to use XCOFF64 or XCOFF32.  */
     case 'a':
       if (strcmp (arg, "64") == 0)
-	ppc_xcoff64 = 1;
+	ppc_obj64 = 1;
       else if (strcmp (arg, "32") == 0)
-	ppc_xcoff64 = 0;
+	ppc_obj64 = 0;
       else
 	return 0;
       break;
 
     case 'm':
-      /* Most CPU's are 32 bit.  Exceptions are listed below.  */
-      ppc_size = PPC_OPCODE_32;
-
       /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
 	 (RIOS2).  */
       if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
-	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2;
+	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
       /* -mpwr means to assemble for the IBM POWER (RIOS1).  */
       else if (strcmp (arg, "pwr") == 0)
-	ppc_cpu = PPC_OPCODE_POWER;
+	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
       /* -m601 means to assemble for the PowerPC 601, which includes
 	 instructions that are holdovers from the Power.  */
       else if (strcmp (arg, "601") == 0)
-	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_601;
+	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_601 | PPC_OPCODE_32;
       /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
 	 PowerPC 603/604.  */
       else if (strcmp (arg, "ppc") == 0
 	       || strcmp (arg, "ppc32") == 0
 	       || strcmp (arg, "603") == 0
 	       || strcmp (arg, "604") == 0)
-	ppc_cpu = PPC_OPCODE_PPC;
+	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_32;
       /* -m403 and -m405 mean to assemble for the PowerPC 403/405.  */
       else if (strcmp (arg, "403") == 0
                || strcmp (arg, "405") == 0)
-	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_403;
+	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_32;
       else if (strcmp (arg, "7400") == 0
                || strcmp (arg, "7410") == 0
                || strcmp (arg, "7450") == 0
                || strcmp (arg, "7455") == 0)
-	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
+	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32;
       else if (strcmp (arg, "altivec") == 0)
         {
           if (ppc_cpu == 0)
@@ -908,36 +899,32 @@ md_parse_option (c, arg)
       else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
 	{
 	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64;
-	  ppc_size = PPC_OPCODE_64;
 	}
       else if (strcmp (arg, "ppc64bridge") == 0)
 	{
 	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64;
-	  ppc_size = PPC_OPCODE_64;
 	}
       /* -mbooke/-mbooke32 mean enable 32-bit BookE support.  */
       else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
-	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE;
+	ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
       /* -mbooke64 means enable 64-bit BookE support.  */
       else if (strcmp (arg, "booke64") == 0)
 	{
-	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | 
+	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE |
 		    PPC_OPCODE_BOOKE64 | PPC_OPCODE_64;
-	  ppc_size = PPC_OPCODE_64;
 	}
       else if (strcmp (arg, "power4") == 0)
 	{
 	  ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4;
-	  ppc_size = PPC_OPCODE_64;
 	}
       /* -mcom means assemble for the common intersection between Power
 	 and PowerPC.  At present, we just allow the union, rather
 	 than the intersection.  */
       else if (strcmp (arg, "com") == 0)
-	ppc_cpu = PPC_OPCODE_COMMON;
+	ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
       /* -many means to assemble for any architecture (PWR/PWRX/PPC).  */
       else if (strcmp (arg, "any") == 0)
-	ppc_cpu = PPC_OPCODE_ANY;
+	ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
 
       else if (strcmp (arg, "regnames") == 0)
 	reg_names_p = true;
@@ -1077,13 +1064,18 @@ ppc_set_cpu ()
     {
       if (strncmp (default_os, "aix", 3) == 0
 	  && default_os[3] >= '4' && default_os[3] <= '9')
-	ppc_cpu = PPC_OPCODE_COMMON;
+	ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
       else if (strncmp (default_os, "aix3", 4) == 0)
-	ppc_cpu = PPC_OPCODE_POWER;
+	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
       else if (strcmp (default_cpu, "rs6000") == 0)
-	ppc_cpu = PPC_OPCODE_POWER;
+	ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
       else if (strncmp (default_cpu, "powerpc", 7) == 0)
-	ppc_cpu = PPC_OPCODE_PPC;
+	{
+	  if (default_cpu[7] == '6' && default_cpu[8] == '4')
+	    ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_64;
+	  else
+	    ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_32;
+	}
       else
 	as_fatal (_("Unknown default cpu = %s, os = %s"),
 		  default_cpu, default_os);
@@ -1117,17 +1109,9 @@ ppc_arch ()
 unsigned long
 ppc_mach ()
 {
-  return ppc_size == PPC_OPCODE_64 ? 620 : 0;
+  return ppc_obj64 ? bfd_mach_ppc64 : bfd_mach_ppc;
 }
 
-#ifdef OBJ_XCOFF
-int
-ppc_subseg_align ()
-{
-  return ppc_xcoff64 ? 3 : 2;
-}
-#endif
-
 extern char*
 ppc_target_format ()
 {
@@ -1137,15 +1121,17 @@ ppc_target_format ()
 #elif TE_POWERMAC
   return "xcoff-powermac";
 #else
-  return ppc_xcoff64 ? "aixcoff64-rs6000" : "aixcoff-rs6000";
+#  ifdef TE_AIX5
+    return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
+#  else
+    return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
+#  endif
 #endif
 #endif
 #ifdef OBJ_ELF
-  boolean is64 = BFD_DEFAULT_TARGET_SIZE == 64 && ppc_size == PPC_OPCODE_64;
-
   return (target_big_endian
-	  ? (is64 ? "elf64-powerpc" : "elf32-powerpc")
-	  : (is64 ? "elf64-powerpcle" : "elf32-powerpcle"));
+	  ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
+	  : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
 #endif
 }
 
@@ -1178,10 +1164,19 @@ md_begin ()
     {
       know ((op->opcode & op->mask) == op->opcode);
 
-      if ((op->flags & ppc_cpu) != 0
+      if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
 	  && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
-	      || (op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == ppc_size
+	      || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
+		  == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
 	      || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
+	  /* Certain instructions (eg: extsw) do not exist in the
+	     32-bit BookE instruction set, but they do exist in the
+	     64-bit BookE instruction set, and other PPC instruction
+	     sets.  Check to see if the opcode has the BOOKE64 flag set.
+	     If it does make sure that the target CPU is not the BookE32.  */
+	  && ((op->flags & PPC_OPCODE_BOOKE64) == 0
+	      || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
+	      || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
 	  && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
 	      || ((op->flags & PPC_OPCODE_POWER4)
 		  == (ppc_cpu & PPC_OPCODE_POWER4))))
@@ -1276,7 +1271,7 @@ ppc_insert_operand (insn, operand, val, file, line)
 	    max = (1 << (operand->bits - 1)) - 1;
 	  min = - (1 << (operand->bits - 1));
 
-	  if (ppc_size == PPC_OPCODE_32)
+	  if (!ppc_obj64)
 	    {
 	      /* Some people write 32 bit hex constants with the sign
 		 extension done by hand.  This shouldn't really be
@@ -1318,7 +1313,7 @@ ppc_insert_operand (insn, operand, val, file, line)
       const char *errmsg;
 
       errmsg = NULL;
-      insn = (*operand->insert) (insn, (long) val, ppc_cpu | ppc_size, &errmsg);
+      insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
       if (errmsg != (const char *) NULL)
 	as_bad_where (file, line, errmsg);
     }
@@ -1395,7 +1390,8 @@ ppc_elf_suffix (str_p, exp_p)
     MAP ("bitfld",	(int) BFD_RELOC_PPC_EMB_BIT_FLD),
     MAP ("relsda",	(int) BFD_RELOC_PPC_EMB_RELSDA),
     MAP ("xgot",	(int) BFD_RELOC_PPC_TOC16),
-#if BFD_DEFAULT_TARGET_SIZE == 64
+    /* The following are only valid for ppc64.  Negative values are
+       used instead of a flag.  */
     MAP ("higher",	- (int) BFD_RELOC_PPC64_HIGHER),
     MAP ("highera",	- (int) BFD_RELOC_PPC64_HIGHER_S),
     MAP ("highest",	- (int) BFD_RELOC_PPC64_HIGHEST),
@@ -1405,7 +1401,6 @@ ppc_elf_suffix (str_p, exp_p)
     MAP ("toc@l",	- (int) BFD_RELOC_PPC64_TOC16_LO),
     MAP ("toc@h",	- (int) BFD_RELOC_PPC64_TOC16_HI),
     MAP ("toc@ha",	- (int) BFD_RELOC_PPC64_TOC16_HA),
-#endif
     { (char *) 0, 0,	(int) BFD_RELOC_UNUSED }
   };
 
@@ -1431,9 +1426,9 @@ ppc_elf_suffix (str_p, exp_p)
       {
 	int reloc = ptr->reloc;
 
-	if (BFD_DEFAULT_TARGET_SIZE == 64 && reloc < 0)
+	if (reloc < 0)
 	  {
-	    if (ppc_size != PPC_OPCODE_64)
+	    if (!ppc_obj64)
 	      return BFD_RELOC_UNUSED;
 	    reloc = -reloc;
 	  }
@@ -1464,8 +1459,7 @@ ppc_elf_suffix (str_p, exp_p)
 	  }
 	*str_p = str;
 
-	if (BFD_DEFAULT_TARGET_SIZE == 64
-	    && reloc == (int) BFD_RELOC_PPC64_TOC
+	if (reloc == (int) BFD_RELOC_PPC64_TOC
 	    && exp_p->X_op == O_symbol)
 	  {
 	    /* This reloc type ignores the symbol.  Change the symbol
@@ -1707,24 +1701,50 @@ ppc_elf_validate_fix (fixp, seg)
     }
 }
 
-#if BFD_DEFAULT_TARGET_SIZE == 64
-/* Don't emit .TOC. symbol.  */
-int
-ppc_elf_frob_symbol (sym)
-     symbolS *sym;
+/* Prevent elf_frob_file_before_adjust removing a weak undefined
+   function descriptor sym if the corresponding code sym is used.  */
+
+void
+ppc_frob_file_before_adjust ()
 {
-  const char *name;
+  symbolS *symp;
+
+  if (!ppc_obj64)
+    return;
 
-  name = S_GET_NAME (sym);
-  if (name != NULL && strcmp (name, ".TOC.") == 0)
+  for (symp = symbol_rootP; symp; symp = symbol_next (symp))
     {
-      S_CLEAR_EXTERNAL (sym);
-      return 1;
+      const char *name;
+      char *dotname;
+      symbolS *dotsym;
+      size_t len;
+
+      name = S_GET_NAME (symp);
+      if (name[0] == '.')
+	continue;
+
+      if (! S_IS_WEAK (symp)
+	  || S_IS_DEFINED (symp))
+	continue;
+
+      len = strlen (name) + 1;
+      dotname = xmalloc (len + 1);
+      dotname[0] = '.';
+      memcpy (dotname + 1, name, len);
+      dotsym = symbol_find (dotname);
+      free (dotname);
+      if (dotsym != NULL && (symbol_used_p (dotsym)
+			     || symbol_used_in_reloc_p (dotsym)))
+	{
+	  symbol_mark_used (symp);
+	}
     }
 
-  return 0;
+  /* Don't emit .TOC. symbol.  */
+  symp = symbol_find (".TOC.");
+  if (symp != NULL)
+    symbol_remove (symp, &symbol_rootP, &symbol_lastP);
 }
-#endif
 #endif /* OBJ_ELF */
 
 #ifdef TE_PE
@@ -1904,6 +1924,8 @@ md_assemble (str)
       if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 	{
 	  unsigned int opcount;
+	  unsigned int num_operands_expected;
+	  unsigned int i;
 
 	  /* There is an optional operand.  Count the number of
 	     commas in the input line.  */
@@ -1920,10 +1942,16 @@ md_assemble (str)
 		}
 	    }
 
+	  /* Compute the number of expected operands.
+	     Do not count fake operands.  */
+	  for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
+	    if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
+	      ++ num_operands_expected;
+
 	  /* If there are fewer operands in the line then are called
 	     for by the instruction, we want to skip the optional
 	     operand.  */
-	  if (opcount < strlen (opcode->operands))
+	  if (opcount < num_operands_expected)
 	    skip_optional = 1;
 
 	  break;
@@ -1956,7 +1984,7 @@ md_assemble (str)
 	 from the input.  */
       if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 	{
-	  insn = (*operand->insert) (insn, 0L, ppc_cpu | ppc_size, &errmsg);
+	  insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
 	  if (errmsg != (const char *) NULL)
 	    as_bad (errmsg);
 	  continue;
@@ -1969,7 +1997,7 @@ md_assemble (str)
 	{
 	  if (operand->insert)
 	    {
-	      insn = (*operand->insert) (insn, 0L, ppc_cpu | ppc_size, &errmsg);
+	      insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
 	      if (errmsg != (const char *) NULL)
 		as_bad (errmsg);
 	    }
@@ -2155,7 +2183,6 @@ md_assemble (str)
 		  ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
 		break;
 
-#if BFD_DEFAULT_TARGET_SIZE == 64
 	      case BFD_RELOC_PPC64_HIGHER:
 		if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
 		  ex.X_add_number = PPC_HIGHER (ex.X_add_number);
@@ -2183,7 +2210,6 @@ md_assemble (str)
 		else
 		  ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
 		break;
-#endif /* BFD_DEFAULT_TARGET_SIZE == 64 */
 	      }
 #endif /* OBJ_ELF */
 	  insn = ppc_insert_operand (insn, operand, ex.X_add_number,
@@ -2215,8 +2241,7 @@ md_assemble (str)
 		}
 	    }
 
-	  if (BFD_DEFAULT_TARGET_SIZE == 64
-	      && ppc_size == PPC_OPCODE_64
+	  if (ppc_obj64
 	      && (operand->flags & PPC_OPERAND_DS) != 0)
 	    {
 	      switch (reloc)
@@ -2366,13 +2391,11 @@ md_assemble (str)
 	    case BFD_RELOC_HI16:
 	    case BFD_RELOC_HI16_S:
 #ifdef OBJ_ELF
-#if BFD_DEFAULT_TARGET_SIZE == 64
 	    case BFD_RELOC_PPC64_HIGHER:
 	    case BFD_RELOC_PPC64_HIGHER_S:
 	    case BFD_RELOC_PPC64_HIGHEST:
 	    case BFD_RELOC_PPC64_HIGHEST_S:
 #endif
-#endif
 	      fixP->fx_no_overflow = 1;
 	      break;
 	    default:
@@ -2481,7 +2504,7 @@ ppc_section_letter (letter, ptr_msg)
   if (letter == 'e')
     return SHF_EXCLUDE;
 
-  *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S in string");
+  *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
   return 0;
 }
 
@@ -2832,7 +2855,7 @@ ppc_change_csect (sym)
       symbol_set_frag (sym, frag_now);
       S_SET_VALUE (sym, (valueT) frag_now_fix ());
 
-      symbol_get_tc (sym)->align = (ppc_xcoff64) ? 3 : 2;
+      symbol_get_tc (sym)->align = 2;
       symbol_get_tc (sym)->output = 1;
       symbol_get_tc (sym)->within = sym;
 
@@ -3210,7 +3233,7 @@ ppc_function (ignore)
 /* The .bf pseudo-op.  This is just like a COFF C_FCN symbol named
    ".bf".  If the pseudo op .bi was seen before .bf, patch the .bi sym
    with the correct line number */
- 
+
 static symbolS *saved_bi_sym = 0;
 
 static void
@@ -3231,12 +3254,12 @@ ppc_bf (ignore)
   SA_SET_SYM_LNNO (sym, coff_line_base);
 
   /* Line number for bi.  */
-  if (saved_bi_sym) 
+  if (saved_bi_sym)
     {
       S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
       saved_bi_sym = 0;
     }
-  
+
 
   symbol_get_tc (sym)->output = 1;
 
@@ -3303,7 +3326,7 @@ ppc_biei (ei)
   symbol_get_tc (sym)->output = 1;
 
   /* Save bi.  */
-  if (ei) 
+  if (ei)
     saved_bi_sym = 0;
   else
     saved_bi_sym = sym;
@@ -3656,7 +3679,7 @@ ppc_tc (ignore)
     ++input_line_pointer;
 
   /* Align to a four/eight byte boundary.  */
-  align = BFD_DEFAULT_TARGET_SIZE == 64 && ppc_size == PPC_OPCODE_64 ? 3 : 2;
+  align = ppc_obj64 ? 3 : 2;
   frag_align (align, 0, 0);
   record_alignment (now_seg, align);
 #endif /* OBJ_ELF */
@@ -3666,13 +3689,13 @@ ppc_tc (ignore)
   else
     {
       ++input_line_pointer;
-      cons ((ppc_size == PPC_OPCODE_64) ? 8 : 4);
+      cons (ppc_obj64 ? 8 : 4);
     }
 }
 
 /* Pseudo-op .machine.  */
 /* FIXME: `.machine' is a nop for the moment.  It would be nice to
-   accept this directive on the first line of input and set ppc_size
+   accept this directive on the first line of input and set ppc_obj64
    and the target format accordingly.  Unfortunately, the target
    format is selected in output-file.c:output_file_create before we
    even get to md_begin, so it's not possible without changing
@@ -3696,7 +3719,7 @@ ppc_is_toc_sym (sym)
 #endif
 #ifdef OBJ_ELF
   const char *sname = segment_name (S_GET_SEGMENT (sym));
-  if (BFD_DEFAULT_TARGET_SIZE == 64 && ppc_size == PPC_OPCODE_64)
+  if (ppc_obj64)
     return strcmp (sname, ".toc") == 0;
   else
     return strcmp (sname, ".got") == 0;
@@ -5174,7 +5197,7 @@ md_apply_fix3 (fixP, valP, seg)
       if ((operand->flags & PPC_OPERAND_PARENS) != 0
 	  && operand->bits == 16
 	  && operand->shift == 0
-	  && (operand->insert == NULL || ppc_xcoff64)
+	  && (operand->insert == NULL || ppc_obj64)
 	  && fixP->fx_addsy != NULL
 	  && symbol_get_tc (fixP->fx_addsy)->subseg != 0
 	  && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
@@ -5216,7 +5239,14 @@ md_apply_fix3 (fixP, valP, seg)
       else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
 	  && operand->bits == 16
 	  && operand->shift == 0)
-	fixP->fx_r_type = BFD_RELOC_PPC_B16;
+	{
+	  fixP->fx_r_type = BFD_RELOC_PPC_B16;
+#ifdef OBJ_XCOFF
+	  fixP->fx_size = 2;
+	  if (target_big_endian)
+	    fixP->fx_where += 2;
+#endif
+	}
       else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
 	       && operand->bits == 26
 	       && operand->shift == 0)
@@ -5224,7 +5254,14 @@ md_apply_fix3 (fixP, valP, seg)
       else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
 	       && operand->bits == 16
 	       && operand->shift == 0)
-	fixP->fx_r_type = BFD_RELOC_PPC_BA16;
+	{
+	  fixP->fx_r_type = BFD_RELOC_PPC_BA16;
+#ifdef OBJ_XCOFF
+	  fixP->fx_size = 2;
+	  if (target_big_endian)
+	    fixP->fx_where += 2;
+#endif
+	}
 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
       else if ((operand->flags & PPC_OPERAND_PARENS) != 0
 	       && operand->bits == 16
@@ -5233,8 +5270,7 @@ md_apply_fix3 (fixP, valP, seg)
 	{
 	  fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
 #ifdef OBJ_ELF
-	  if (BFD_DEFAULT_TARGET_SIZE == 64
-	      && ppc_size == PPC_OPCODE_64
+	  if (ppc_obj64
 	      && (operand->flags & PPC_OPERAND_DS) != 0)
 	    fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
 #endif
@@ -5269,7 +5305,7 @@ md_apply_fix3 (fixP, valP, seg)
       switch (fixP->fx_r_type)
 	{
 	case BFD_RELOC_CTOR:
-	  if (BFD_DEFAULT_TARGET_SIZE == 64 && ppc_size == PPC_OPCODE_64)
+	  if (ppc_obj64)
 	    goto ctor64;
 	  /* fall through */
 
@@ -5322,12 +5358,10 @@ md_apply_fix3 (fixP, valP, seg)
 	case BFD_RELOC_PPC_EMB_RELSDA:
 	case BFD_RELOC_PPC_TOC16:
 #ifdef OBJ_ELF
-#if BFD_DEFAULT_TARGET_SIZE == 64
 	case BFD_RELOC_PPC64_TOC16_LO:
 	case BFD_RELOC_PPC64_TOC16_HI:
 	case BFD_RELOC_PPC64_TOC16_HA:
 #endif
-#endif
 	  if (fixP->fx_pcrel)
 	    {
 	      if (fixP->fx_addsy != NULL)
@@ -5363,7 +5397,6 @@ md_apply_fix3 (fixP, valP, seg)
 	  break;
 
 #ifdef OBJ_ELF
-#if BFD_DEFAULT_TARGET_SIZE == 64
 	case BFD_RELOC_PPC64_HIGHER:
 	  if (fixP->fx_pcrel)
 	    abort ();
@@ -5421,7 +5454,6 @@ md_apply_fix3 (fixP, valP, seg)
 	  }
 	  break;
 #endif
-#endif
 	  /* Because SDA21 modifies the register field, the size is set to 4
 	     bytes, rather than 2, so offset it here appropriately.  */
 	case BFD_RELOC_PPC_EMB_SDA21:
@@ -5487,14 +5519,12 @@ md_apply_fix3 (fixP, valP, seg)
 	  break;
 
 #ifdef OBJ_ELF
-#if BFD_DEFAULT_TARGET_SIZE == 64
 	  /* Generated by reference to `sym@tocbase'.  The sym is
 	     ignored by the linker.  */
 	case BFD_RELOC_PPC64_TOC:
 	  fixP->fx_done = 0;
 	  break;
 #endif
-#endif
 	default:
 	  fprintf (stderr,
 		   _("Gas failure, reloc value %d\n"), fixP->fx_r_type);