diff options
| -rw-r--r-- | contrib/llvm/patches/patch-31-llvm-r222292-aarch64-no-neon.diff | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-31-llvm-r222292-aarch64-no-neon.diff b/contrib/llvm/patches/patch-31-llvm-r222292-aarch64-no-neon.diff new file mode 100644 index 0000000..c1120bb --- /dev/null +++ b/contrib/llvm/patches/patch-31-llvm-r222292-aarch64-no-neon.diff @@ -0,0 +1,61 @@ +Pull in r222292 from upstream llvm trunk (by Weiming Zhao): + + [Aarch64] Customer lowering of CTPOP to SIMD should check for NEON + availability + +This ensures llvm's AArch64 backend does not emit floating point +instructions if they are disabled. + +Introduced here: http://svnweb.freebsd.org/changeset/base/276786 + +Index: lib/Target/AArch64/AArch64ISelLowering.cpp +=================================================================== +--- lib/Target/AArch64/AArch64ISelLowering.cpp ++++ lib/Target/AArch64/AArch64ISelLowering.cpp +@@ -3062,6 +3062,9 @@ SDValue AArch64TargetLowering::LowerCTPOP(SDValue + AttributeSet::FunctionIndex, Attribute::NoImplicitFloat)) + return SDValue(); + ++ if (!Subtarget->hasNEON()) ++ return SDValue(); ++ + // While there is no integer popcount instruction, it can + // be more efficiently lowered to the following sequence that uses + // AdvSIMD registers/instructions as long as the copies to/from +Index: test/CodeGen/AArch64/arm64-popcnt.ll +=================================================================== +--- test/CodeGen/AArch64/arm64-popcnt.ll ++++ test/CodeGen/AArch64/arm64-popcnt.ll +@@ -1,4 +1,5 @@ + ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s ++; RUN: llc < %s -march=aarch64 -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s + + define i32 @cnt32_advsimd(i32 %x) nounwind readnone { + %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) +@@ -8,6 +9,13 @@ define i32 @cnt32_advsimd(i32 %x) nounwind readnon + ; CHECK: uaddlv.8b h0, v0 + ; CHECK: fmov w0, s0 + ; CHECK: ret ++; CHECK-NONEON-LABEL: cnt32_advsimd ++; CHECK-NONEON-NOT: 8b ++; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x55555555 ++; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x33333333 ++; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0xf0f0f0f ++; CHECK-NONEON: mul ++ + } + + define i64 @cnt64_advsimd(i64 %x) nounwind readnone { +@@ -18,6 +26,12 @@ define i64 @cnt64_advsimd(i64 %x) nounwind readnon + ; CHECK: uaddlv.8b h0, v0 + ; CHECK: fmov w0, s0 + ; CHECK: ret ++; CHECK-NONEON-LABEL: cnt64_advsimd ++; CHECK-NONEON-NOT: 8b ++; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x5555555555555555 ++; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x3333333333333333 ++; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0xf0f0f0f0f0f0f0f ++; CHECK-NONEON: mul + } + + ; Do not use AdvSIMD when -mno-implicit-float is specified. |
