diff options
| -rw-r--r-- | sys/amd64/amd64/identcpu.c | 22 | ||||
| -rw-r--r-- | sys/amd64/amd64/tsc.c | 23 | ||||
| -rw-r--r-- | sys/i386/i386/identcpu.c | 22 | ||||
| -rw-r--r-- | sys/i386/i386/tsc.c | 23 |
4 files changed, 46 insertions, 44 deletions
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c index 7e4319e..9c9d74a 100644 --- a/sys/amd64/amd64/identcpu.c +++ b/sys/amd64/amd64/identcpu.c @@ -392,28 +392,6 @@ printcpuinfo(void) * If this CPU supports P-state invariant TSC then * mention the capability. */ - switch (cpu_vendor_id) { - case CPU_VENDOR_AMD: - if ((amd_pminfo & AMDPM_TSC_INVARIANT) || - CPUID_TO_FAMILY(cpu_id) >= 0x10 || - cpu_id == 0x60fb2) - tsc_is_invariant = 1; - break; - case CPU_VENDOR_INTEL: - if ((amd_pminfo & AMDPM_TSC_INVARIANT) || - (CPUID_TO_FAMILY(cpu_id) == 0x6 && - CPUID_TO_MODEL(cpu_id) >= 0xe) || - (CPUID_TO_FAMILY(cpu_id) == 0xf && - CPUID_TO_MODEL(cpu_id) >= 0x3)) - tsc_is_invariant = 1; - break; - case CPU_VENDOR_CENTAUR: - if (CPUID_TO_FAMILY(cpu_id) == 0x6 && - CPUID_TO_MODEL(cpu_id) >= 0xf && - (rdmsr(0x1203) & 0x100000000ULL) == 0) - tsc_is_invariant = 1; - break; - } if (tsc_is_invariant) printf("\n TSC: P-state invariant"); diff --git a/sys/amd64/amd64/tsc.c b/sys/amd64/amd64/tsc.c index 9ed36eb..86c5390 100644 --- a/sys/amd64/amd64/tsc.c +++ b/sys/amd64/amd64/tsc.c @@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$"); #include <sys/power.h> #include <sys/smp.h> #include <machine/clock.h> +#include <machine/cputypes.h> #include <machine/md_var.h> #include <machine/specialreg.h> @@ -94,6 +95,28 @@ init_TSC(void) if (bootverbose) printf("TSC clock: %lu Hz\n", tsc_freq); + switch (cpu_vendor_id) { + case CPU_VENDOR_AMD: + if ((amd_pminfo & AMDPM_TSC_INVARIANT) || + CPUID_TO_FAMILY(cpu_id) >= 0x10 || cpu_id == 0x60fb2) + tsc_is_invariant = 1; + break; + case CPU_VENDOR_INTEL: + if ((amd_pminfo & AMDPM_TSC_INVARIANT) || + (CPUID_TO_FAMILY(cpu_id) == 0x6 && + CPUID_TO_MODEL(cpu_id) >= 0xe) || + (CPUID_TO_FAMILY(cpu_id) == 0xf && + CPUID_TO_MODEL(cpu_id) >= 0x3)) + tsc_is_invariant = 1; + break; + case CPU_VENDOR_CENTAUR: + if (CPUID_TO_FAMILY(cpu_id) == 0x6 && + CPUID_TO_MODEL(cpu_id) >= 0xf && + (rdmsr(0x1203) & 0x100000000ULL) == 0) + tsc_is_invariant = 1; + break; + } + /* * Inform CPU accounting about our boot-time clock rate. Once the * system is finished booting, we will get the real max clock rate diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index afdedc2..4fd6273 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -856,28 +856,6 @@ printcpuinfo(void) * If this CPU supports P-state invariant TSC then * mention the capability. */ - switch (cpu_vendor_id) { - case CPU_VENDOR_AMD: - if ((amd_pminfo & AMDPM_TSC_INVARIANT) || - CPUID_TO_FAMILY(cpu_id) >= 0x10 || - cpu_id == 0x60fb2) - tsc_is_invariant = 1; - break; - case CPU_VENDOR_INTEL: - if ((amd_pminfo & AMDPM_TSC_INVARIANT) || - (CPUID_TO_FAMILY(cpu_id) == 0x6 && - CPUID_TO_MODEL(cpu_id) >= 0xe) || - (CPUID_TO_FAMILY(cpu_id) == 0xf && - CPUID_TO_MODEL(cpu_id) >= 0x3)) - tsc_is_invariant = 1; - break; - case CPU_VENDOR_CENTAUR: - if (CPUID_TO_FAMILY(cpu_id) == 0x6 && - CPUID_TO_MODEL(cpu_id) >= 0xf && - (rdmsr(0x1203) & 0x100000000ULL) == 0) - tsc_is_invariant = 1; - break; - } if (tsc_is_invariant) printf("\n TSC: P-state invariant"); diff --git a/sys/i386/i386/tsc.c b/sys/i386/i386/tsc.c index 185f240..61dabd3 100644 --- a/sys/i386/i386/tsc.c +++ b/sys/i386/i386/tsc.c @@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$"); #include <sys/power.h> #include <sys/smp.h> #include <machine/clock.h> +#include <machine/cputypes.h> #include <machine/md_var.h> #include <machine/specialreg.h> @@ -103,6 +104,28 @@ init_TSC(void) if (bootverbose) printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq); + switch (cpu_vendor_id) { + case CPU_VENDOR_AMD: + if ((amd_pminfo & AMDPM_TSC_INVARIANT) || + CPUID_TO_FAMILY(cpu_id) >= 0x10 || cpu_id == 0x60fb2) + tsc_is_invariant = 1; + break; + case CPU_VENDOR_INTEL: + if ((amd_pminfo & AMDPM_TSC_INVARIANT) || + (CPUID_TO_FAMILY(cpu_id) == 0x6 && + CPUID_TO_MODEL(cpu_id) >= 0xe) || + (CPUID_TO_FAMILY(cpu_id) == 0xf && + CPUID_TO_MODEL(cpu_id) >= 0x3)) + tsc_is_invariant = 1; + break; + case CPU_VENDOR_CENTAUR: + if (CPUID_TO_FAMILY(cpu_id) == 0x6 && + CPUID_TO_MODEL(cpu_id) >= 0xf && + (rdmsr(0x1203) & 0x100000000ULL) == 0) + tsc_is_invariant = 1; + break; + } + /* * Inform CPU accounting about our boot-time clock rate. Once the * system is finished booting, we will get the real max clock rate |
