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-rw-r--r--sys/conf/files1
-rw-r--r--sys/dev/cxgb/common/cxgb_ael1002.c10
-rw-r--r--sys/dev/cxgb/common/cxgb_common.h71
-rw-r--r--sys/dev/cxgb/common/cxgb_mc5.c10
-rw-r--r--sys/dev/cxgb/common/cxgb_t3_hw.c304
-rw-r--r--sys/dev/cxgb/common/cxgb_vsc7323.c340
-rw-r--r--sys/dev/cxgb/common/cxgb_xgmac.c117
-rw-r--r--sys/dev/cxgb/cxgb_adapter.h16
-rw-r--r--sys/dev/cxgb/cxgb_config.h1
-rw-r--r--sys/dev/cxgb/cxgb_lro.c24
-rw-r--r--sys/dev/cxgb/cxgb_main.c281
-rw-r--r--sys/dev/cxgb/cxgb_offload.c10
-rw-r--r--sys/dev/cxgb/cxgb_offload.h2
-rw-r--r--sys/dev/cxgb/cxgb_sge.c88
-rw-r--r--sys/dev/cxgb/t3fw-4.0.0.bin.gz.uu483
-rw-r--r--sys/dev/cxgb/t3fw-4.1.0.bin.gz.uu482
-rw-r--r--sys/modules/cxgb/Makefile16
17 files changed, 1489 insertions, 767 deletions
diff --git a/sys/conf/files b/sys/conf/files
index 44301a7..9db5573 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -519,6 +519,7 @@ dev/cxgb/cxgb_l2t.c optional cxgb pci
dev/cxgb/cxgb_lro.c optional cxgb pci
dev/cxgb/cxgb_sge.c optional cxgb pci
dev/cxgb/common/cxgb_mc5.c optional cxgb pci
+dev/cxgb/common/cxgb_vsc7323.c optional cxgb pci
dev/cxgb/common/cxgb_vsc8211.c optional cxgb pci
dev/cxgb/common/cxgb_ael1002.c optional cxgb pci
dev/cxgb/common/cxgb_mv88e1xxx.c optional cxgb pci
diff --git a/sys/dev/cxgb/common/cxgb_ael1002.c b/sys/dev/cxgb/common/cxgb_ael1002.c
index 3d67b06..c570ed3 100644
--- a/sys/dev/cxgb/common/cxgb_ael1002.c
+++ b/sys/dev/cxgb/common/cxgb_ael1002.c
@@ -277,7 +277,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
unsigned int status;
status = t3_read_reg(phy->adapter,
- XGM_REG(A_XGM_SERDES_STAT0, phy->addr));
+ XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
+ t3_read_reg(phy->adapter,
+ XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
+ t3_read_reg(phy->adapter,
+ XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
+ t3_read_reg(phy->adapter,
+ XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
*link_ok = !(status & F_LOWSIG0);
}
if (speed)
@@ -323,5 +329,5 @@ static struct cphy_ops xaui_direct_ops = {
void t3_xaui_direct_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
const struct mdio_ops *mdio_ops)
{
- cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops);
+ cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
}
diff --git a/sys/dev/cxgb/common/cxgb_common.h b/sys/dev/cxgb/common/cxgb_common.h
index 1a04772..0a60a56 100644
--- a/sys/dev/cxgb/common/cxgb_common.h
+++ b/sys/dev/cxgb/common/cxgb_common.h
@@ -38,18 +38,19 @@ $FreeBSD$
#endif
enum {
- MAX_NPORTS = 2, /* max # of ports */
- MAX_FRAME_SIZE = 10240, /* max MAC frame size, including header + FCS */
+ MAX_NPORTS = 4,
+ TP_TMR_RES = 200, /* TP timer resolution in usec */
+ MAX_FRAME_SIZE = 10240, /* max MAC frame size, includes header + FCS */
EEPROMSIZE = 8192, /* Serial EEPROM size */
RSS_TABLE_SIZE = 64, /* size of RSS lookup and mapping tables */
TCB_SIZE = 128, /* TCB size */
NMTUS = 16, /* size of MTU table */
NCCTRL_WIN = 32, /* # of congestion control windows */
NTX_SCHED = 8, /* # of HW Tx scheduling queues */
- TP_TMR_RES = 200, /* TP timer resolution in usec */
+ PROTO_SRAM_LINES = 128, /* size of protocol sram */
};
-#define MAX_RX_COALESCING_LEN 16224U
+#define MAX_RX_COALESCING_LEN 12288U
enum {
PAUSE_RX = 1 << 0,
@@ -58,7 +59,7 @@ enum {
};
enum {
- SUPPORTED_IRQ = 1 << 25
+ SUPPORTED_IRQ = 1 << 24
};
enum { /* adapter interrupt-maintained statistics */
@@ -70,8 +71,32 @@ enum { /* adapter interrupt-maintained statistics */
};
enum {
+ TP_VERSION_MAJOR = 1,
+ TP_VERSION_MINOR = 0,
+ TP_VERSION_MICRO = 44
+};
+
+#define S_TP_VERSION_MAJOR 16
+#define M_TP_VERSION_MAJOR 0xFF
+#define V_TP_VERSION_MAJOR(x) ((x) << S_TP_VERSION_MAJOR)
+#define G_TP_VERSION_MAJOR(x) \
+ (((x) >> S_TP_VERSION_MAJOR) & M_TP_VERSION_MAJOR)
+
+#define S_TP_VERSION_MINOR 8
+#define M_TP_VERSION_MINOR 0xFF
+#define V_TP_VERSION_MINOR(x) ((x) << S_TP_VERSION_MINOR)
+#define G_TP_VERSION_MINOR(x) \
+ (((x) >> S_TP_VERSION_MINOR) & M_TP_VERSION_MINOR)
+
+#define S_TP_VERSION_MICRO 0
+#define M_TP_VERSION_MICRO 0xFF
+#define V_TP_VERSION_MICRO(x) ((x) << S_TP_VERSION_MICRO)
+#define G_TP_VERSION_MICRO(x) \
+ (((x) >> S_TP_VERSION_MICRO) & M_TP_VERSION_MICRO)
+
+enum {
FW_VERSION_MAJOR = 4,
- FW_VERSION_MINOR = 0,
+ FW_VERSION_MINOR = 1,
FW_VERSION_MICRO = 0
};
@@ -116,10 +141,11 @@ struct mdio_ops {
};
struct adapter_info {
- unsigned char nports; /* # of ports */
+ unsigned char nports0; /* # of ports on channel 0 */
+ unsigned char nports1; /* # of ports on channel 1 */
unsigned char phy_base_addr; /* MDIO PHY base address */
- unsigned char mdien;
- unsigned char mdiinv;
+ unsigned char mdien:1;
+ unsigned char mdiinv:1;
unsigned int gpio_out; /* GPIO output settings */
unsigned int gpio_intr; /* GPIO IRQ enable mask */
unsigned long caps; /* adapter capabilities */
@@ -271,11 +297,13 @@ struct tp_params {
unsigned int rx_num_pgs; /* # of Rx pages */
unsigned int tx_num_pgs; /* # of Tx pages */
unsigned int ntimer_qs; /* # of timer queues */
+ unsigned int tre; /* log2 of core clocks per TP tick */
unsigned int dack_re; /* DACK timer resolution */
};
struct qset_params { /* SGE queue set parameters */
unsigned int polling; /* polling/interrupt service for rspq */
+ unsigned int lro; /* large receive offload */
unsigned int coalesce_nsecs; /* irq coalescing timer */
unsigned int rspq_size; /* # of entries in response queue */
unsigned int fl_size; /* # of entries in regular free list */
@@ -354,6 +382,7 @@ struct adapter_params {
unsigned short b_wnd[NCCTRL_WIN];
#endif
unsigned int nports; /* # of ethernet ports */
+ unsigned int chan_map; /* bitmap of in-use Tx channels */
unsigned int stats_update_period; /* MAC stats accumulation period */
unsigned int linkpoll_period; /* link poll period in 0.1s */
unsigned int rev; /* chip revision */
@@ -430,7 +459,10 @@ static inline unsigned int t3_mc7_size(const struct mc7 *p)
struct cmac {
adapter_t *adapter;
unsigned int offset;
- unsigned int nucast; /* # of address filters for unicast MACs */
+ unsigned char nucast; /* # of address filters for unicast MACs */
+ unsigned char multiport; /* multiple ports connected to this MAC */
+ unsigned char ext_port; /* external MAC port */
+ unsigned char promisc_map; /* which external ports are promiscuous */
unsigned int tx_tcnt;
unsigned int tx_xcnt;
u64 tx_mcnt;
@@ -589,9 +621,6 @@ static inline unsigned int is_pcie(const adapter_t *adap)
}
void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
-void t3_read_indirect(adapter_t *adap, unsigned int addr_reg,
- unsigned int data_reg, u32 *vals, unsigned int nregs,
- unsigned int start_idx);
void t3_write_regs(adapter_t *adapter, const struct addr_val_pair *p, int n,
unsigned int offset);
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
@@ -627,13 +656,14 @@ int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
int t3_seeprom_wp(adapter_t *adapter, int enable);
int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
u32 *data, int byte_oriented);
+int t3_check_tpsram_version(adapter_t *adapter);
+int t3_check_tpsram(adapter_t *adapter, u8 *tp_ram, unsigned int size);
int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size);
int t3_get_fw_version(adapter_t *adapter, u32 *vers);
int t3_check_fw_version(adapter_t *adapter);
int t3_init_hw(adapter_t *adapter, u32 fw_params);
void mac_prep(struct cmac *mac, adapter_t *adapter, int index);
void early_hw_init(adapter_t *adapter, const struct adapter_info *ai);
-int t3_reset_adapter(adapter_t *adapter);
int t3_prep_adapter(adapter_t *adapter, const struct adapter_info *ai, int reset);
void t3_led_ready(adapter_t *adapter);
void t3_fatal_err(adapter_t *adapter);
@@ -641,6 +671,7 @@ void t3_set_vlan_accel(adapter_t *adapter, unsigned int ports, int on);
void t3_config_rss(adapter_t *adapter, unsigned int rss_config, const u8 *cpus,
const u16 *rspq);
int t3_read_rss(adapter_t *adapter, u8 *lkup, u16 *map);
+int t3_set_proto_sram(adapter_t *adap, u8 *data);
int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask);
void t3_port_failover(adapter_t *adapter, int port);
void t3_failover_done(adapter_t *adapter, int port);
@@ -657,7 +688,7 @@ int t3_mac_disable(struct cmac *mac, int which);
int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm);
int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]);
-int t3_mac_set_num_ucast(struct cmac *mac, int n);
+int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n);
const struct mac_stats *t3_mac_update_stats(struct cmac *mac);
int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
int fc);
@@ -718,6 +749,16 @@ int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
int t3_sge_cqcntxt_op(adapter_t *adapter, unsigned int id, unsigned int op,
unsigned int credits);
+int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
+int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
+int t3_vsc7323_init(adapter_t *adap, int nports);
+int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port);
+int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port);
+int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
+int t3_vsc7323_enable(adapter_t *adap, int port, int which);
+int t3_vsc7323_disable(adapter_t *adap, int port, int which);
+const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac);
+
void t3_mv88e1xxx_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
const struct mdio_ops *mdio_ops);
void t3_vsc8211_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
diff --git a/sys/dev/cxgb/common/cxgb_mc5.c b/sys/dev/cxgb/common/cxgb_mc5.c
index 9d3b94f..07a4d39 100644
--- a/sys/dev/cxgb/common/cxgb_mc5.c
+++ b/sys/dev/cxgb/common/cxgb_mc5.c
@@ -31,9 +31,11 @@ POSSIBILITY OF SUCH DAMAGE.
__FBSDID("$FreeBSD$");
#ifdef CONFIG_DEFINED
-#include <cxgb_include.h>
+#include <common/cxgb_common.h>
+#include <common/cxgb_regs.h>
#else
-#include <dev/cxgb/cxgb_include.h>
+#include <dev/cxgb/common/cxgb_common.h>
+#include <dev/cxgb/common/cxgb_regs.h>
#endif
enum {
@@ -328,9 +330,9 @@ int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
unsigned int tcam_size = mc5->tcam_size;
adapter_t *adap = mc5->adapter;
- if (tcam_size == 0)
+ if (!tcam_size)
return 0;
-
+
if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size)
return -EINVAL;
diff --git a/sys/dev/cxgb/common/cxgb_t3_hw.c b/sys/dev/cxgb/common/cxgb_t3_hw.c
index ac4a630..2e92187 100644
--- a/sys/dev/cxgb/common/cxgb_t3_hw.c
+++ b/sys/dev/cxgb/common/cxgb_t3_hw.c
@@ -30,12 +30,17 @@ POSSIBILITY OF SUCH DAMAGE.
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
+
#ifdef CONFIG_DEFINED
#include <cxgb_include.h>
#else
#include <dev/cxgb/cxgb_include.h>
#endif
+#define DENTER() printf("entered %s\n", __FUNCTION__);
+#define DEXIT() printf("exiting %s\n", __FUNCTION__);
+
+
/**
* t3_wait_op_done_val - wait until an operation is completed
* @adapter: the adapter performing the operation
@@ -119,7 +124,7 @@ void t3_set_reg_field(adapter_t *adapter, unsigned int addr, u32 mask, u32 val)
* Reads registers that are accessed indirectly through an address/data
* register pair.
*/
-void t3_read_indirect(adapter_t *adap, unsigned int addr_reg,
+static void t3_read_indirect(adapter_t *adap, unsigned int addr_reg,
unsigned int data_reg, u32 *vals, unsigned int nregs,
unsigned int start_idx)
{
@@ -202,7 +207,7 @@ static void mi1_init(adapter_t *adap, const struct adapter_info *ai)
t3_write_reg(adap, A_MI1_CFG, val);
}
-#define MDIO_ATTEMPTS 10
+#define MDIO_ATTEMPTS 20
/*
* MI1 read/write operations for direct-addressed PHYs.
@@ -219,7 +224,7 @@ static int mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr,
MDIO_LOCK(adapter);
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
if (!ret)
*valp = t3_read_reg(adapter, A_MI1_DATA);
MDIO_UNLOCK(adapter);
@@ -239,7 +244,7 @@ static int mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr,
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_DATA, val);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
MDIO_UNLOCK(adapter);
return ret;
}
@@ -262,11 +267,11 @@ static int mi1_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr,
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_DATA, reg_addr);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
if (!ret) {
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(3));
ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
- MDIO_ATTEMPTS, 20);
+ MDIO_ATTEMPTS, 10);
if (!ret)
*valp = t3_read_reg(adapter, A_MI1_DATA);
}
@@ -284,12 +289,12 @@ static int mi1_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr,
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_DATA, reg_addr);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
if (!ret) {
t3_write_reg(adapter, A_MI1_DATA, val);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
- MDIO_ATTEMPTS, 20);
+ MDIO_ATTEMPTS, 10);
}
MDIO_UNLOCK(adapter);
return ret;
@@ -435,27 +440,32 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
}
static struct adapter_info t3_adap_info[] = {
- { 2, 0, 0, 0,
+ { 1, 1, 0, 0, 0,
F_GPIO2_OEN | F_GPIO4_OEN |
F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
0,
&mi1_mdio_ops, "Chelsio PE9000" },
- { 2, 0, 0, 0,
+ { 1, 1, 0, 0, 0,
F_GPIO2_OEN | F_GPIO4_OEN |
F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
0,
&mi1_mdio_ops, "Chelsio T302" },
- { 1, 0, 0, 0,
+ { 1, 0, 0, 0, 0,
F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T310" },
- { 2, 0, 0, 0,
+ { 1, 1, 0, 0, 0,
F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T320" },
+ { 4, 0, 0, 0, 0,
+ F_GPIO5_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO5_OUT_VAL |
+ F_GPIO6_OUT_VAL | F_GPIO7_OUT_VAL,
+ F_GPIO1 | F_GPIO2 | F_GPIO3 | F_GPIO4, SUPPORTED_AUI,
+ &mi1_mdio_ops, "Chelsio T304" },
};
/*
@@ -472,7 +482,7 @@ const struct adapter_info *t3_get_adapter_info(unsigned int id)
#define CAPS_10G (SUPPORTED_10000baseT_Full | SUPPORTED_AUI)
static struct port_type_info port_types[] = {
- { NULL },
+ { NULL, 0, NULL },
{ t3_ael1002_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
"10GBASE-XR" },
{ t3_vsc8211_phy_prep, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
@@ -656,6 +666,8 @@ static int get_vpd_params(adapter_t *adapter, struct vpd_params *p)
} else {
p->port_type[0] = (u8)hex2int(vpd.port0_data[0]);
p->port_type[1] = (u8)hex2int(vpd.port1_data[0]);
+ p->port_type[2] = (u8)hex2int(vpd.port2_data[0]);
+ p->port_type[3] = (u8)hex2int(vpd.port3_data[0]);
p->xauicfg[0] = simple_strtoul(vpd.xaui0cfg_data, NULL, 16);
p->xauicfg[1] = simple_strtoul(vpd.xaui1cfg_data, NULL, 16);
}
@@ -847,6 +859,64 @@ static int t3_write_flash(adapter_t *adapter, unsigned int addr,
return 0;
}
+/**
+ * t3_check_tpsram_version - read the tp sram version
+ * @adapter: the adapter
+ *
+ * Reads the protocol sram version from serial eeprom.
+ */
+int t3_check_tpsram_version(adapter_t *adapter)
+{
+ int ret;
+ u32 vers;
+ unsigned int major, minor;
+
+ /* Get version loaded in SRAM */
+ t3_write_reg(adapter, A_TP_EMBED_OP_FIELD0, 0);
+ ret = t3_wait_op_done(adapter, A_TP_EMBED_OP_FIELD0,
+ 1, 1, 5, 1);
+ if (ret)
+ return ret;
+
+ vers = t3_read_reg(adapter, A_TP_EMBED_OP_FIELD1);
+
+ major = G_TP_VERSION_MAJOR(vers);
+ minor = G_TP_VERSION_MINOR(vers);
+
+ if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR)
+ return 0;
+
+ return -EINVAL;
+}
+
+/**
+ * t3_check_tpsram - check if provided protocol SRAM
+ * is compatible with this driver
+ * @adapter: the adapter
+ * @tp_sram: the firmware image to write
+ * @size: image size
+ *
+ * Checks if an adapter's tp sram is compatible with the driver.
+ * Returns 0 if the versions are compatible, a negative error otherwise.
+ */
+int t3_check_tpsram(adapter_t *adapter, u8 *tp_sram, unsigned int size)
+{
+ u32 csum;
+ unsigned int i;
+ const u32 *p = (const u32 *)tp_sram;
+
+ /* Verify checksum */
+ for (csum = 0, i = 0; i < size / sizeof(csum); i++)
+ csum += ntohl(p[i]);
+ if (csum != 0xffffffff) {
+ CH_ERR(adapter, "corrupted protocol SRAM image, checksum %u\n",
+ csum);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
enum fw_version_type {
FW_VERSION_N3,
FW_VERSION_T3
@@ -889,9 +959,9 @@ int t3_check_fw_version(adapter_t *adapter)
minor == FW_VERSION_MINOR)
return 0;
- CH_ERR(adapter, "found wrong FW version(%u.%u), "
- "driver needs version %d.%d\n", major, minor,
- FW_VERSION_MAJOR, FW_VERSION_MINOR);
+ CH_ERR(adapter, "found wrong FW version (%u.%u), "
+ "driver needs version %d.%d\n", major, minor,
+ FW_VERSION_MAJOR, FW_VERSION_MINOR);
return -EINVAL;
}
@@ -921,7 +991,7 @@ static int t3_flash_erase_sectors(adapter_t *adapter, int start, int end)
/*
* t3_load_fw - download firmware
* @adapter: the adapter
- * @fw_data: the firrware image to write
+ * @fw_data: the firmware image to write
* @size: image size
*
* Write the supplied firmware image to the card's serial flash.
@@ -936,7 +1006,7 @@ int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size)
const u32 *p = (const u32 *)fw_data;
int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16;
- if ((size & 3) || (size < FW_MIN_SIZE))
+ if ((size & 3) || size < FW_MIN_SIZE)
return -EINVAL;
if (size > FW_VERS_ADDR + 8 - FW_FLASH_BOOT_ADDR)
return -EFBIG;
@@ -1015,9 +1085,10 @@ int t3_cim_ctl_blk_read(adapter_t *adap, unsigned int addr, unsigned int n,
void t3_link_changed(adapter_t *adapter, int port_id)
{
int link_ok, speed, duplex, fc;
- struct cphy *phy = &adapter->port[port_id].phy;
- struct cmac *mac = &adapter->port[port_id].mac;
- struct link_config *lc = &adapter->port[port_id].link_config;
+ struct port_info *pi = adap2pinfo(adapter, port_id);
+ struct cphy *phy = &pi->phy;
+ struct cmac *mac = &pi->mac;
+ struct link_config *lc = &pi->link_config;
phy->ops->get_link_status(phy, &link_ok, &speed, &duplex, &fc);
@@ -1487,8 +1558,12 @@ static void mc7_intr_handler(struct mc7 *mc7)
*/
static int mac_intr_handler(adapter_t *adap, unsigned int idx)
{
- struct cmac *mac = &adap->port[idx].mac;
- u32 cause = t3_read_reg(adap, A_XGM_INT_CAUSE + mac->offset);
+ u32 cause;
+ struct cmac *mac;
+
+ idx = idx == 0 ? 0 : adapter_info(adap)->nports0; /* MAC idx -> port */
+ mac = &adap2pinfo(adap, idx)->mac;
+ cause = t3_read_reg(adap, A_XGM_INT_CAUSE + mac->offset);
if (cause & V_TXFIFO_PRTY_ERR(M_TXFIFO_PRTY_ERR)) {
mac->stats.tx_fifo_parity_err++;
@@ -1524,7 +1599,7 @@ int t3_phy_intr_handler(adapter_t *adapter)
u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
for_each_port(adapter, i) {
- struct port_info *p = &adapter->port[i];
+ struct port_info *p = adap2pinfo(adapter, i);
mask = gpi - (gpi & (gpi - 1));
gpi -= mask;
@@ -1556,7 +1631,6 @@ int t3_slow_intr_handler(adapter_t *adapter)
cause &= adapter->slow_intr_mask;
if (!cause)
return 0;
-
if (cause & F_PCIM0) {
if (is_pcie(adapter))
pcie_intr_handler(adapter);
@@ -1647,11 +1721,10 @@ void t3_intr_enable(adapter_t *adapter)
adapter_info(adapter)->gpio_intr);
t3_write_reg(adapter, A_T3DBG_INT_ENABLE,
adapter_info(adapter)->gpio_intr);
- if (is_pcie(adapter)) {
+ if (is_pcie(adapter))
t3_write_reg(adapter, A_PCIE_INT_ENABLE, PCIE_INTR_MASK);
- } else {
+ else
t3_write_reg(adapter, A_PCIX_INT_ENABLE, PCIX_INTR_MASK);
- }
t3_write_reg(adapter, A_PL_INT_ENABLE0, adapter->slow_intr_mask);
(void) t3_read_reg(adapter, A_PL_INT_ENABLE0); /* flush */
}
@@ -1719,8 +1792,10 @@ void t3_intr_clear(adapter_t *adapter)
*/
void t3_port_intr_enable(adapter_t *adapter, int idx)
{
- t3_write_reg(adapter, XGM_REG(A_XGM_INT_ENABLE, idx), XGM_INTR_MASK);
- adapter->port[idx].phy.ops->intr_enable(&adapter->port[idx].phy);
+ struct port_info *pi = adap2pinfo(adapter, idx);
+
+ t3_write_reg(adapter, A_XGM_INT_ENABLE + pi->mac.offset, XGM_INTR_MASK);
+ pi->phy.ops->intr_enable(&pi->phy);
}
/**
@@ -1733,8 +1808,10 @@ void t3_port_intr_enable(adapter_t *adapter, int idx)
*/
void t3_port_intr_disable(adapter_t *adapter, int idx)
{
- t3_write_reg(adapter, XGM_REG(A_XGM_INT_ENABLE, idx), 0);
- adapter->port[idx].phy.ops->intr_disable(&adapter->port[idx].phy);
+ struct port_info *pi = adap2pinfo(adapter, idx);
+
+ t3_write_reg(adapter, A_XGM_INT_ENABLE + pi->mac.offset, 0);
+ pi->phy.ops->intr_disable(&pi->phy);
}
/**
@@ -1747,10 +1824,11 @@ void t3_port_intr_disable(adapter_t *adapter, int idx)
*/
void t3_port_intr_clear(adapter_t *adapter, int idx)
{
- t3_write_reg(adapter, XGM_REG(A_XGM_INT_CAUSE, idx), 0xffffffff);
- adapter->port[idx].phy.ops->intr_clear(&adapter->port[idx].phy);
-}
+ struct port_info *pi = adap2pinfo(adapter, idx);
+ t3_write_reg(adapter, A_XGM_INT_CAUSE + pi->mac.offset, 0xffffffff);
+ pi->phy.ops->intr_clear(&pi->phy);
+}
/**
* t3_sge_write_context - write an SGE context
@@ -2344,6 +2422,14 @@ static inline void tp_wr_indirect(adapter_t *adap, unsigned int addr, u32 val)
t3_write_reg(adap, A_TP_PIO_DATA, val);
}
+static void tp_wr_bits_indirect(adapter_t *adap, unsigned int addr,
+ unsigned int mask, unsigned int val)
+{
+ t3_write_reg(adap, A_TP_PIO_ADDR, addr);
+ val |= t3_read_reg(adap, A_TP_PIO_DATA) & ~mask;
+ t3_write_reg(adap, A_TP_PIO_DATA, val);
+}
+
static void tp_config(adapter_t *adap, const struct tp_params *p)
{
t3_write_reg(adap, A_TP_GLOBAL_CONFIG, F_TXPACINGENABLE | F_PATHMTU |
@@ -2360,14 +2446,16 @@ static void tp_config(adapter_t *adap, const struct tp_params *p)
F_IPV6ENABLE | F_NICMODE);
t3_write_reg(adap, A_TP_TX_RESOURCE_LIMIT, 0x18141814);
t3_write_reg(adap, A_TP_PARA_REG4, 0x5050105);
- t3_set_reg_field(adap, A_TP_PARA_REG6,
- adap->params.rev > 0 ? F_ENABLEESND : F_T3A_ENABLEESND,
- 0);
+ t3_set_reg_field(adap, A_TP_PARA_REG6, 0,
+ adap->params.rev > 0 ? F_ENABLEESND :
+ F_T3A_ENABLEESND);
t3_set_reg_field(adap, A_TP_PC_CONFIG,
- F_ENABLEEPCMDAFULL | F_ENABLEOCSPIFULL,
- F_TXDEFERENABLE | F_HEARBEATDACK | F_TXCONGESTIONMODE |
- F_RXCONGESTIONMODE);
+ F_ENABLEEPCMDAFULL,
+ F_ENABLEOCSPIFULL |F_TXDEFERENABLE | F_HEARBEATDACK |
+ F_TXCONGESTIONMODE | F_RXCONGESTIONMODE);
t3_set_reg_field(adap, A_TP_PC_CONFIG2, F_CHDRAFULL, 0);
+ t3_write_reg(adap, A_TP_PROXY_FLOW_CNTL, 1080);
+ t3_write_reg(adap, A_TP_PROXY_FLOW_CNTL, 1000);
if (adap->params.rev > 0) {
tp_wr_indirect(adap, A_TP_EGRESS_CONFIG, F_REWRITEFORCETOSIZE);
@@ -2381,7 +2469,21 @@ static void tp_config(adapter_t *adap, const struct tp_params *p)
t3_write_reg(adap, A_TP_TX_MOD_QUEUE_WEIGHT1, 0);
t3_write_reg(adap, A_TP_TX_MOD_QUEUE_WEIGHT0, 0);
t3_write_reg(adap, A_TP_MOD_CHANNEL_WEIGHT, 0);
- t3_write_reg(adap, A_TP_MOD_RATE_LIMIT, 0);
+ t3_write_reg(adap, A_TP_MOD_RATE_LIMIT, 0xf2200000);
+
+ if (adap->params.nports > 2) {
+ t3_set_reg_field(adap, A_TP_PC_CONFIG2, 0,
+ F_ENABLETXPORTFROMDA | F_ENABLERXPORTFROMADDR);
+ tp_wr_bits_indirect(adap, A_TP_QOS_RX_MAP_MODE,
+ V_RXMAPMODE(M_RXMAPMODE), 0);
+ tp_wr_indirect(adap, A_TP_INGRESS_CONFIG, V_BITPOS0(48) |
+ V_BITPOS1(49) | V_BITPOS2(50) | V_BITPOS3(51) |
+ F_ENABLEEXTRACT | F_ENABLEEXTRACTIONSFD |
+ F_ENABLEINSERTION | F_ENABLEINSERTIONSFD);
+ tp_wr_indirect(adap, A_TP_PREAMBLE_MSB, 0xfb000000);
+ tp_wr_indirect(adap, A_TP_PREAMBLE_LSB, 0xd5);
+ tp_wr_indirect(adap, A_TP_INTF_FROM_TX_PKT, F_INTFFROMTXPKT);
+ }
}
/* TCP timer values in ms */
@@ -2398,7 +2500,7 @@ static void tp_config(adapter_t *adap, const struct tp_params *p)
*/
static void tp_set_timers(adapter_t *adap, unsigned int core_clk)
{
- unsigned int tre = fls(core_clk / (1000000 / TP_TMR_RES)) - 1;
+ unsigned int tre = adap->params.tp.tre;
unsigned int dack_re = adap->params.tp.dack_re;
unsigned int tstamp_re = fls(core_clk / 1000); /* 1ms, at least */
unsigned int tps = core_clk >> tre;
@@ -2456,6 +2558,7 @@ int t3_tp_set_coalescing_size(adapter_t *adap, unsigned int size, int psh)
val |= F_RXCOALESCEENABLE;
if (psh)
val |= F_RXCOALESCEPSHEN;
+ size = min(MAX_RX_COALESCING_LEN, size);
t3_write_reg(adap, A_TP_PARA_REG2, V_RXCOALESCESIZE(size) |
V_MAXRXDATA(MAX_RX_COALESCING_LEN));
}
@@ -2485,11 +2588,10 @@ static void __devinit init_mtus(unsigned short mtus[])
* are enabled and still have at least 8 bytes of payload.
*/
mtus[0] = 88;
- mtus[1] = 88; /* workaround for silicon starting at 1 */
+ mtus[1] = 88;
mtus[2] = 256;
mtus[3] = 512;
mtus[4] = 576;
- /* mtus[4] = 808; */
mtus[5] = 1024;
mtus[6] = 1280;
mtus[7] = 1492;
@@ -2705,6 +2807,33 @@ static void ulp_config(adapter_t *adap, const struct tp_params *p)
ulp_region(adap, PBL, m, p->chan_rx_size / 4);
t3_write_reg(adap, A_ULPRX_TDDP_TAGMASK, 0xffffffff);
}
+
+
+/**
+ * t3_set_proto_sram - set the contents of the protocol sram
+ * @adapter: the adapter
+ * @data: the protocol image
+ *
+ * Write the contents of the protocol SRAM.
+ */
+int t3_set_proto_sram(adapter_t *adap, u8 *data)
+{
+ int i;
+ u32 *buf = (u32 *)data;
+
+ for (i = 0; i < PROTO_SRAM_LINES; i++) {
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, htobe32(*buf++));
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, htobe32(*buf++));
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, htobe32(*buf++));
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, htobe32(*buf++));
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, htobe32(*buf++));
+
+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD0, i << 1 | 1 << 31);
+ if (t3_wait_op_done(adap, A_TP_EMBED_OP_FIELD0, 1, 1, 5, 1))
+ return -EIO;
+ }
+ return 0;
+}
#endif
void t3_config_trace_filter(adapter_t *adapter, const struct trace_params *tp,
@@ -2883,20 +3012,22 @@ int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask)
}
/*
- * Perform the bits of HW initialization that are dependent on the number
- * of available ports.
+ * Perform the bits of HW initialization that are dependent on the Tx
+ * channels being used.
*/
-static void init_hw_for_avail_ports(adapter_t *adap, int nports)
+static void chan_init_hw(adapter_t *adap, unsigned int chan_map)
{
int i;
- if (nports == 1) {
+ if (chan_map != 3) { /* one channel */
t3_set_reg_field(adap, A_ULPRX_CTL, F_ROUND_ROBIN, 0);
t3_set_reg_field(adap, A_ULPTX_CONFIG, F_CFG_RR_ARB, 0);
- t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_TPTXPORT0EN |
- F_PORT0ACTIVE | F_ENFORCEPKT);
- t3_write_reg(adap, A_PM1_TX_CFG, 0xc000c000);
- } else {
+ t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT |
+ (chan_map == 1 ? F_TPTXPORT0EN | F_PORT0ACTIVE :
+ F_TPTXPORT1EN | F_PORT1ACTIVE));
+ t3_write_reg(adap, A_PM1_TX_CFG,
+ chan_map == 1 ? 0xffffffff : 0);
+ } else { /* two channels */
t3_set_reg_field(adap, A_ULPRX_CTL, 0, F_ROUND_ROBIN);
t3_set_reg_field(adap, A_ULPTX_CONFIG, 0, F_CFG_RR_ARB);
t3_write_reg(adap, A_ULPTX_DMA_WEIGHT,
@@ -2999,9 +3130,9 @@ static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
adapter_t *adapter = mc7->adapter;
const struct mc7_timing_params *p = &mc7_timings[mem_type];
- if (mc7->size == 0)
+ if (!mc7->size)
return 0;
-
+
val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
slow = val & F_SLOW;
width = G_WIDTH(val);
@@ -3166,6 +3297,12 @@ int t3_init_hw(adapter_t *adapter, u32 fw_params)
else if (calibrate_xgm(adapter))
goto out_err;
+ if (adapter->params.nports > 2) {
+ t3_mac_reset(&adap2pinfo(adapter, 0)->mac);
+ if ((err = t3_vsc7323_init(adapter, adapter->params.nports)))
+ goto out_err;
+ }
+
if (vpd->mclk) {
partition_mem(adapter, &adapter->params.tp);
@@ -3194,8 +3331,8 @@ int t3_init_hw(adapter_t *adapter, u32 fw_params)
else
t3_set_reg_field(adapter, A_PCIX_CFG, 0, F_CLIDECEN);
- t3_write_reg(adapter, A_PM1_RX_CFG, 0xf000f000);
- init_hw_for_avail_ports(adapter, adapter->params.nports);
+ t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff);
+ chan_init_hw(adapter, adapter->params.chan_map);
t3_sge_init(adapter, &adapter->params.sge);
t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
@@ -3210,6 +3347,7 @@ int t3_init_hw(adapter_t *adapter, u32 fw_params)
CH_ERR(adapter, "uP initialization timed out\n");
goto out_err;
}
+
err = 0;
out_err:
return err;
@@ -3314,8 +3452,16 @@ static void __devinit mc7_prep(adapter_t *adapter, struct mc7 *mc7,
void mac_prep(struct cmac *mac, adapter_t *adapter, int index)
{
mac->adapter = adapter;
+ mac->multiport = adapter->params.nports > 2;
+
+ if (mac->multiport) {
+ mac->ext_port = (unsigned char)index;
+ mac->nucast = 8;
+ index = 0;
+ } else
+ mac->nucast = 1;
+
mac->offset = (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR) * index;
- mac->nucast = 1;
if (adapter->params.rev == 0 && uses_xaui(adapter)) {
t3_write_reg(adapter, A_XGM_SERDES_CTRL + mac->offset,
@@ -3327,7 +3473,8 @@ void mac_prep(struct cmac *mac, adapter_t *adapter, int index)
void early_hw_init(adapter_t *adapter, const struct adapter_info *ai)
{
- u32 val = V_PORTSPEED(is_10G(adapter) ? 3 : 2);
+ u32 val = V_PORTSPEED(is_10G(adapter) || adapter->params.nports > 2 ?
+ 3 : 2);
mi1_init(adapter, ai);
t3_write_reg(adapter, A_I2C_CFG, /* set for 80KHz */
@@ -3335,7 +3482,7 @@ void early_hw_init(adapter_t *adapter, const struct adapter_info *ai)
t3_write_reg(adapter, A_T3DBG_GPIO_EN,
ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL);
t3_write_reg(adapter, A_MC5_DB_SERVER_INDEX, 0);
-
+
if (adapter->params.rev == 0 || !uses_xaui(adapter))
val |= F_ENRGMII;
@@ -3354,9 +3501,9 @@ void early_hw_init(adapter_t *adapter, const struct adapter_info *ai)
* Reset the adapter. PCIe cards lose their config space during reset, PCI-X
* ones don't.
*/
-int t3_reset_adapter(adapter_t *adapter)
+static int t3_reset_adapter(adapter_t *adapter)
{
- int i, save_and_restore_pcie =
+ int i, save_and_restore_pcie =
adapter->params.rev < T3_REV_B2 && is_pcie(adapter);
uint16_t devid = 0;
@@ -3397,7 +3544,8 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
get_pci_mode(adapter, &adapter->params.pci);
adapter->params.info = ai;
- adapter->params.nports = ai->nports;
+ adapter->params.nports = ai->nports0 + ai->nports1;
+ adapter->params.chan_map = !!ai->nports0 | (!!ai->nports1 << 1);
adapter->params.rev = t3_read_reg(adapter, A_PL_REV);
adapter->params.linkpoll_period = 0;
adapter->params.stats_update_period = is_10G(adapter) ?
@@ -3406,9 +3554,10 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
t3_os_find_pci_capability(adapter, PCI_CAP_ID_VPD);
ret = get_vpd_params(adapter, &adapter->params.vpd);
- if (ret < 0)
+ if (ret < 0) {
+ printf("failed to get VPD params\n");
return ret;
-
+ }
if (reset && t3_reset_adapter(adapter))
return -1;
@@ -3421,7 +3570,7 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
mc7_prep(adapter, &adapter->pmtx, MC7_PMTX_BASE_ADDR, "PMTX");
mc7_prep(adapter, &adapter->cm, MC7_CM_BASE_ADDR, "CM");
- p->nchan = ai->nports;
+ p->nchan = adapter->params.chan_map == 3 ? 2 : 1;
p->pmrx_size = t3_mc7_size(&adapter->pmrx);
p->pmtx_size = t3_mc7_size(&adapter->pmtx);
p->cm_size = t3_mc7_size(&adapter->cm);
@@ -3433,11 +3582,14 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size);
p->ntimer_qs = p->cm_size >= (128 << 20) ||
adapter->params.rev > 0 ? 12 : 6;
+ p->tre = fls(adapter->params.vpd.cclk / (1000 / TP_TMR_RES)) -
+ 1;
p->dack_re = fls(adapter->params.vpd.cclk / 10) - 1; /* 100us */
}
+
adapter->params.offload = t3_mc7_size(&adapter->pmrx) &&
- t3_mc7_size(&adapter->pmtx) &&
- t3_mc7_size(&adapter->cm);
+ t3_mc7_size(&adapter->pmtx) &&
+ t3_mc7_size(&adapter->cm);
if (is_offload(adapter)) {
adapter->params.mc5.nservers = DEFAULT_NSERVERS;
@@ -3456,12 +3608,22 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
for_each_port(adapter, i) {
u8 hw_addr[6];
- struct port_info *p = &adapter->port[i];
+ struct port_info *p = adap2pinfo(adapter, i);
- while (!adapter->params.vpd.port_type[j])
+ while (adapter->params.vpd.port_type[j] == 0) {
++j;
+ }
+ if (adapter->params.vpd.port_type[j] > sizeof(port_types)/sizeof(port_types[0])) {
+ printf("bad port type idx=%d\n", adapter->params.vpd.port_type[j]);
+ printf("port types: ");
+ for (i = 0; i < j; i++)
+ printf("port[%d]=%d ", i, adapter->params.vpd.port_type[i]);
+ printf("\n");
+ return -1;
+ }
+
- p->port_type = &port_types[adapter->params.vpd.port_type[j]];
+ p->port_type = &port_types[adapter->params.vpd.port_type[j]];
p->port_type->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
ai->mdio_ops);
mac_prep(&p->mac, adapter, j);
diff --git a/sys/dev/cxgb/common/cxgb_vsc7323.c b/sys/dev/cxgb/common/cxgb_vsc7323.c
new file mode 100644
index 0000000..51e254e
--- /dev/null
+++ b/sys/dev/cxgb/common/cxgb_vsc7323.c
@@ -0,0 +1,340 @@
+
+/**************************************************************************
+
+Copyright (c) 2007, Chelsio Inc.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Neither the name of the Chelsio Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
+ this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+***************************************************************************/
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#ifdef CONFIG_DEFINED
+#include <common/cxgb_common.h>
+#else
+#include <dev/cxgb/common/cxgb_common.h>
+#endif
+
+enum {
+ ELMR_ADDR = 0,
+ ELMR_STAT = 1,
+ ELMR_DATA_LO = 2,
+ ELMR_DATA_HI = 3,
+
+ ELMR_MDIO_ADDR = 10
+};
+
+#define VSC_REG(block, subblock, reg) \
+ ((reg) | ((subblock) << 8) | ((block) << 12))
+
+int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n)
+{
+ int ret;
+ const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
+
+ ELMR_LOCK(adap);
+ ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
+ for ( ; !ret && n; n--, vals++) {
+ ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO,
+ *vals & 0xffff);
+ if (!ret)
+ ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
+ *vals >> 16);
+ }
+ ELMR_UNLOCK(adap);
+ return ret;
+}
+
+static int elmr_write(adapter_t *adap, int addr, u32 val)
+{
+ return t3_elmr_blk_write(adap, addr, &val, 1);
+}
+
+int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n)
+{
+ int ret;
+ unsigned int v;
+ const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
+
+ ELMR_LOCK(adap);
+
+ ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
+ if (ret)
+ goto out;
+ ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_STAT, &v);
+ if (ret)
+ goto out;
+ if (v != 1) {
+ ret = -ETIMEDOUT;
+ goto out;
+ }
+
+ for ( ; !ret && n; n--, vals++) {
+ ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO, vals);
+ if (!ret) {
+ ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
+ &v);
+ *vals |= v << 16;
+ }
+ }
+out: ELMR_UNLOCK(adap);
+ return ret;
+}
+
+int t3_vsc7323_init(adapter_t *adap, int nports)
+{
+ static struct addr_val_pair sys_avp[] = {
+ { VSC_REG(7, 15, 0xf), 2 },
+ { VSC_REG(7, 15, 0x19), 0xd6 },
+ { VSC_REG(7, 15, 7), 0xc },
+ { VSC_REG(7, 1, 0), 0x220 },
+ };
+ static struct addr_val_pair fifo_avp[] = {
+ { VSC_REG(2, 0, 0x2f), 0 },
+ { VSC_REG(2, 0, 0xf), 0xa0010291 },
+ { VSC_REG(2, 1, 0x2f), 1 },
+ { VSC_REG(2, 1, 0xf), 0xa0026301 }
+ };
+ static struct addr_val_pair xg_avp[] = {
+ { VSC_REG(1, 10, 0), 0x600b },
+ { VSC_REG(1, 10, 2), 0x4000 },
+ { VSC_REG(1, 10, 5), 0x65 },
+ { VSC_REG(1, 10, 7), 3 },
+ { VSC_REG(1, 10, 0x23), 0x800007bf },
+ { VSC_REG(1, 10, 0x24), 4 }
+ };
+
+ int i, ret, ing_step, egr_step, ing_bot, egr_bot;
+
+ for (i = 0; i < ARRAY_SIZE(sys_avp); i++)
+ if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr,
+ &sys_avp[i].val, 1)))
+ return ret;
+
+
+ ing_step = 0xc0 / nports;
+ egr_step = 0x40 / nports;
+ ing_bot = egr_bot = 0;
+// ing_wm = ing_step * 64;
+// egr_wm = egr_step * 64;
+
+ /* {ING,EGR}_CONTROL.CLR = 1 here */
+ for (i = 0; i < nports; i++)
+ if ((ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
+ ((ing_bot + ing_step) << 16) | ing_bot)) ||
+ (ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 0)) ||
+ (ret = elmr_write(adap, VSC_REG(2, 1, 0x10 + i),
+ ((egr_bot + egr_step) << 16) | egr_bot)) ||
+ (ret = elmr_write(adap, VSC_REG(2, 1, 0x40 + i),
+ 0x2000280)) ||
+ (ret = elmr_write(adap, VSC_REG(2, 1, 0x50 + i), 0)))
+ return ret;
+
+
+ for (i = 0; i < ARRAY_SIZE(fifo_avp); i++)
+ if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr,
+ &fifo_avp[i].val, 1)))
+ return ret;
+
+ for (i = 0; i < ARRAY_SIZE(xg_avp); i++)
+ if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr,
+ &xg_avp[i].val, 1)))
+ return ret;
+
+ for (i = 0; i < nports; i++)
+ if ((ret = elmr_write(adap, VSC_REG(1, i, 0), 0xa59c)) ||
+ (ret = elmr_write(adap, VSC_REG(1, i, 5),
+ (i << 12) | 0x63)) ||
+ (ret = elmr_write(adap, VSC_REG(1, i, 0xb), 0x96)) ||
+ (ret = elmr_write(adap, VSC_REG(1, i, 0x15), 0x21)))
+ return ret;
+ return ret;
+}
+
+int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port)
+{
+ int mode, clk, r;
+
+ if (speed >= 0) {
+ if (speed == SPEED_10)
+ mode = clk = 1;
+ else if (speed == SPEED_100)
+ mode = 1, clk = 2;
+ else if (speed == SPEED_1000)
+ mode = clk = 3;
+ else
+ return -EINVAL;
+
+ if ((r = elmr_write(adap, VSC_REG(1, port, 0),
+ 0xa590 | (mode << 2))) ||
+ (r = elmr_write(adap, VSC_REG(1, port, 0xb),
+ 0x91 | (clk << 1))) ||
+ (r = elmr_write(adap, VSC_REG(1, port, 0xb),
+ 0x90 | (clk << 1))) ||
+ (r = elmr_write(adap, VSC_REG(1, port, 0),
+ 0xa593 | (mode << 2))))
+ return r;
+ }
+
+ r = (fc & PAUSE_RX) ? 0x6ffff : 0x2ffff;
+ if (fc & PAUSE_TX)
+ r |= (1 << 19);
+ return elmr_write(adap, VSC_REG(1, port, 1), r);
+}
+
+int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port)
+{
+ return elmr_write(adap, VSC_REG(1, port, 2), mtu);
+}
+
+int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port)
+{
+ int ret;
+
+ ret = elmr_write(adap, VSC_REG(1, port, 3),
+ (addr[0] << 16) | (addr[1] << 8) | addr[2]);
+ if (!ret)
+ ret = elmr_write(adap, VSC_REG(1, port, 4),
+ (addr[3] << 16) | (addr[4] << 8) | addr[5]);
+ return ret;
+}
+
+int t3_vsc7323_enable(adapter_t *adap, int port, int which)
+{
+ int ret;
+ unsigned int v, orig;
+
+ ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
+ if (!ret) {
+ orig = v;
+ if (which & MAC_DIRECTION_TX)
+ v |= 1;
+ if (which & MAC_DIRECTION_RX)
+ v |= 2;
+ if (v != orig)
+ ret = elmr_write(adap, VSC_REG(1, port, 0), v);
+ }
+ return ret;
+}
+
+int t3_vsc7323_disable(adapter_t *adap, int port, int which)
+{
+ int ret;
+ unsigned int v, orig;
+
+ ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
+ if (!ret) {
+ orig = v;
+ if (which & MAC_DIRECTION_TX)
+ v &= ~1;
+ if (which & MAC_DIRECTION_RX)
+ v &= ~2;
+ if (v != orig)
+ ret = elmr_write(adap, VSC_REG(1, port, 0), v);
+ }
+ return ret;
+}
+
+#define STATS0_START 1
+#define STATS1_START 0x24
+#define NSTATS0 (0x1d - STATS0_START + 1)
+#define NSTATS1 (0x2a - STATS1_START + 1)
+
+const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac)
+{
+ int ret;
+ u64 rx_ucast, tx_ucast;
+ u32 stats0[NSTATS0], stats1[NSTATS1];
+
+ ret = t3_elmr_blk_read(mac->adapter,
+ VSC_REG(4, mac->ext_port, STATS0_START),
+ stats0, NSTATS0);
+ if (!ret)
+ ret = t3_elmr_blk_read(mac->adapter,
+ VSC_REG(4, mac->ext_port, STATS1_START),
+ stats1, NSTATS1);
+ if (ret)
+ goto out;
+
+ /*
+ * HW counts Rx/Tx unicast frames but we want all the frames.
+ */
+ rx_ucast = mac->stats.rx_frames - mac->stats.rx_mcast_frames -
+ mac->stats.rx_bcast_frames;
+ rx_ucast += (u64)(stats0[6 - STATS0_START] - (u32)rx_ucast);
+ tx_ucast = mac->stats.tx_frames - mac->stats.tx_mcast_frames -
+ mac->stats.tx_bcast_frames;
+ tx_ucast += (u64)(stats0[27 - STATS0_START] - (u32)tx_ucast);
+
+#define RMON_UPDATE(mac, name, hw_stat) \
+ mac->stats.name += (u64)((hw_stat) - (u32)(mac->stats.name))
+
+ RMON_UPDATE(mac, rx_octets, stats0[4 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames, stats0[6 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames, stats0[7 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames, stats0[8 - STATS0_START]);
+ RMON_UPDATE(mac, rx_mcast_frames, stats0[7 - STATS0_START]);
+ RMON_UPDATE(mac, rx_bcast_frames, stats0[8 - STATS0_START]);
+ RMON_UPDATE(mac, rx_fcs_errs, stats0[9 - STATS0_START]);
+ RMON_UPDATE(mac, rx_pause, stats0[2 - STATS0_START]);
+ RMON_UPDATE(mac, rx_jabber, stats0[16 - STATS0_START]);
+ RMON_UPDATE(mac, rx_short, stats0[11 - STATS0_START]);
+ RMON_UPDATE(mac, rx_symbol_errs, stats0[1 - STATS0_START]);
+ RMON_UPDATE(mac, rx_too_long, stats0[15 - STATS0_START]);
+
+ RMON_UPDATE(mac, rx_frames_64, stats0[17 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_65_127, stats0[18 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_128_255, stats0[19 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_256_511, stats0[20 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_512_1023, stats0[21 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_1024_1518, stats0[22 - STATS0_START]);
+ RMON_UPDATE(mac, rx_frames_1519_max, stats0[23 - STATS0_START]);
+
+ RMON_UPDATE(mac, tx_octets, stats0[26 - STATS0_START]);
+ RMON_UPDATE(mac, tx_frames, stats0[27 - STATS0_START]);
+ RMON_UPDATE(mac, tx_frames, stats0[28 - STATS0_START]);
+ RMON_UPDATE(mac, tx_frames, stats0[29 - STATS0_START]);
+ RMON_UPDATE(mac, tx_mcast_frames, stats0[28 - STATS0_START]);
+ RMON_UPDATE(mac, tx_bcast_frames, stats0[29 - STATS0_START]);
+ RMON_UPDATE(mac, tx_pause, stats0[25 - STATS0_START]);
+
+ RMON_UPDATE(mac, tx_underrun, 0);
+
+ RMON_UPDATE(mac, tx_frames_64, stats1[36 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_65_127, stats1[37 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_128_255, stats1[38 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_256_511, stats1[39 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_512_1023, stats1[40 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_1024_1518, stats1[41 - STATS1_START]);
+ RMON_UPDATE(mac, tx_frames_1519_max, stats1[42 - STATS1_START]);
+
+#undef RMON_UPDATE
+
+ mac->stats.rx_frames = rx_ucast + mac->stats.rx_mcast_frames +
+ mac->stats.rx_bcast_frames;
+ mac->stats.tx_frames = tx_ucast + mac->stats.tx_mcast_frames +
+ mac->stats.tx_bcast_frames;
+out: return &mac->stats;
+}
diff --git a/sys/dev/cxgb/common/cxgb_xgmac.c b/sys/dev/cxgb/common/cxgb_xgmac.c
index 22cd22e..34b05cd 100644
--- a/sys/dev/cxgb/common/cxgb_xgmac.c
+++ b/sys/dev/cxgb/common/cxgb_xgmac.c
@@ -1,3 +1,4 @@
+
/**************************************************************************
Copyright (c) 2007, Chelsio Inc.
@@ -128,8 +129,23 @@ int t3_mac_reset(struct cmac *mac)
xaui_serdes_reset(mac);
}
+
+ if (mac->multiport) {
+ t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + oft,
+ MAX_FRAME_SIZE - 4);
+ t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft, 0,
+ F_DISPREAMBLE);
+ t3_set_reg_field(adap, A_XGM_RX_CFG + oft, 0, F_COPYPREAMBLE |
+ F_ENNON802_3PREAMBLE);
+ t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft,
+ V_TXFIFOTHRESH(M_TXFIFOTHRESH),
+ V_TXFIFOTHRESH(64));
+ t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
+ t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN);
+ }
+
val = F_MAC_RESET_;
- if (is_10G(adap))
+ if (is_10G(adap) || mac->multiport)
val |= F_PCS_RESET_;
else if (uses_xaui(adap))
val |= F_PCS_RESET_ | F_XG2G_RESET_;
@@ -220,9 +236,14 @@ static void set_addr_filter(struct cmac *mac, int idx, const u8 *addr)
/* Set one of the station's unicast MAC addresses. */
int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6])
{
+ if (mac->multiport)
+ idx = mac->ext_port + idx * mac->adapter->params.nports;
if (idx >= mac->nucast)
return -EINVAL;
set_addr_filter(mac, idx, addr);
+ if (mac->multiport && idx < mac->adapter->params.nports)
+ t3_vsc7323_set_addr(mac->adapter, addr, idx);
+
return 0;
}
@@ -231,7 +252,7 @@ int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6])
* unicast addresses. Caller should reload the unicast and multicast addresses
* after calling this.
*/
-int t3_mac_set_num_ucast(struct cmac *mac, int n)
+int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n)
{
if (n > EXACT_ADDR_FILTERS)
return -EINVAL;
@@ -239,6 +260,28 @@ int t3_mac_set_num_ucast(struct cmac *mac, int n)
return 0;
}
+static void disable_exact_filters(struct cmac *mac)
+{
+ unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_LOW_1;
+
+ for (i = 0; i < EXACT_ADDR_FILTERS; i++, reg += 8) {
+ u32 v = t3_read_reg(mac->adapter, reg);
+ t3_write_reg(mac->adapter, reg, v);
+ }
+ t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
+}
+
+static void enable_exact_filters(struct cmac *mac)
+{
+ unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_HIGH_1;
+
+ for (i = 0; i < EXACT_ADDR_FILTERS; i++, reg += 8) {
+ u32 v = t3_read_reg(mac->adapter, reg);
+ t3_write_reg(mac->adapter, reg, v);
+ }
+ t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
+}
+
/* Calculate the RX hash filter index of an Ethernet address */
static int hash_hw_addr(const u8 *addr)
{
@@ -255,16 +298,18 @@ static int hash_hw_addr(const u8 *addr)
int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm)
{
- u32 val, hash_lo, hash_hi;
+ u32 hash_lo, hash_hi;
adapter_t *adap = mac->adapter;
unsigned int oft = mac->offset;
- val = t3_read_reg(adap, A_XGM_RX_CFG + oft) & ~F_COPYALLFRAMES;
if (promisc_rx_mode(rm))
- val |= F_COPYALLFRAMES;
- t3_write_reg(adap, A_XGM_RX_CFG + oft, val);
+ mac->promisc_map |= 1 << mac->ext_port;
+ else
+ mac->promisc_map &= ~(1 << mac->ext_port);
+ t3_set_reg_field(adap, A_XGM_RX_CFG + oft, F_COPYALLFRAMES,
+ mac->promisc_map ? F_COPYALLFRAMES : 0);
- if (allmulti_rx_mode(rm))
+ if (allmulti_rx_mode(rm) || mac->multiport)
hash_lo = hash_hi = 0xffffffff;
else {
u8 *addr;
@@ -289,7 +334,15 @@ int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm)
return 0;
}
-int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
+static int rx_fifo_hwm(int mtu)
+{
+ int hwm;
+
+ hwm = max(MAC_RXFIFO_SIZE - 3 * mtu, (MAC_RXFIFO_SIZE * 38) / 100);
+ return min(hwm, MAC_RXFIFO_SIZE - 8192);
+}
+
+int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
{
int hwm, lwm;
unsigned int thres, v;
@@ -300,17 +353,39 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
* packet size register includes header, but not FCS.
*/
mtu += 14;
+ if (mac->multiport)
+ mtu += 8; /* for preamble */
if (mtu > MAX_FRAME_SIZE - 4)
return -EINVAL;
- t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
+ if (mac->multiport)
+ return t3_vsc7323_set_mtu(adap, mtu - 4, mac->ext_port);
+
+ if (adap->params.rev == T3_REV_B2 &&
+ (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
+ disable_exact_filters(mac);
+ v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);
+ t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset,
+ F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST);
+
+ /* drain rx FIFO */
+ if (t3_wait_op_done(adap,
+ A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + mac->offset,
+ 1 << 31, 1, 20, 5)) {
+ t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
+ enable_exact_filters(mac);
+ return -EIO;
+ }
+ t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
+ t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
+ enable_exact_filters(mac);
+ } else
+ t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
/*
* Adjust the PAUSE frame watermarks. We always set the LWM, and the
* HWM only if flow-control is enabled.
*/
- hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu,
- MAC_RXFIFO_SIZE * 38 / 100);
- hwm = min(hwm, MAC_RXFIFO_SIZE - 8192);
+ hwm = rx_fifo_hwm(mtu);
lwm = min(3 * (int) mtu, MAC_RXFIFO_SIZE /4);
v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset);
v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM);
@@ -318,6 +393,7 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
if (G_RXFIFOPAUSEHWM(v))
v = (v & ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM)) |
V_RXFIFOPAUSEHWM(hwm / 8);
+
t3_write_reg(adap, A_XGM_RXFIFO_CFG + mac->offset, v);
/* Adjust the TX FIFO threshold based on the MTU */
@@ -335,7 +411,7 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
*/
if (adap->params.rev > 0)
t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset,
- (hwm-lwm) * 4 / 8);
+ (hwm - lwm) * 4 / 8);
t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset,
MAC_RXFIFO_SIZE * 4 * 8 / 512);
return 0;
@@ -349,6 +425,8 @@ int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc)
if (duplex >= 0 && duplex != DUPLEX_FULL)
return -EINVAL;
+ if (mac->multiport)
+ return t3_vsc7323_set_speed_fc(adap, speed, fc, mac->ext_port);
if (speed >= 0) {
if (speed == SPEED_10)
val = V_PORTSPEED(0);
@@ -364,13 +442,14 @@ int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc)
t3_set_reg_field(adap, A_XGM_PORT_CFG + oft,
V_PORTSPEED(M_PORTSPEED), val);
}
-#if 0
+
val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);
val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);
if (fc & PAUSE_TX)
- val |= V_RXFIFOPAUSEHWM(G_RXFIFOPAUSELWM(val) + 128); /* +1KB */
+ val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(t3_read_reg(adap,
+ A_XGM_RX_MAX_PKT_SIZE + oft)) / 8);
t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
-#endif
+
t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN,
(fc & PAUSE_RX) ? F_TXPAUSEEN : 0);
return 0;
@@ -383,6 +462,9 @@ int t3_mac_enable(struct cmac *mac, int which)
unsigned int oft = mac->offset;
struct mac_stats *s = &mac->stats;
+ if (mac->multiport)
+ return t3_vsc7323_enable(adap, mac->ext_port, which);
+
if (which & MAC_DIRECTION_TX) {
t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
@@ -415,6 +497,9 @@ int t3_mac_disable(struct cmac *mac, int which)
adapter_t *adap = mac->adapter;
int val;
+ if (mac->multiport)
+ return t3_vsc7323_disable(adap, mac->ext_port, which);
+
if (which & MAC_DIRECTION_TX) {
t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
diff --git a/sys/dev/cxgb/cxgb_adapter.h b/sys/dev/cxgb/cxgb_adapter.h
index e678003..9c3a8dd 100644
--- a/sys/dev/cxgb/cxgb_adapter.h
+++ b/sys/dev/cxgb/cxgb_adapter.h
@@ -56,9 +56,13 @@ __FBSDID("$FreeBSD$");
#include <dev/pci/pcivar.h>
#ifdef CONFIG_DEFINED
-#include <cxgb_include.h>
+#include <cxgb_osdep.h>
+#include <ulp/toecore/toedev.h>
+#include <sys/mbufq.h>
#else
-#include <dev/cxgb/cxgb_include.h>
+#include <dev/cxgb/cxgb_osdep.h>
+#include <dev/cxgb/sys/mbufq.h>
+#include <dev/cxgb/ulp/toecore/toedev.h>
#endif
struct adapter;
@@ -82,6 +86,7 @@ struct port_info {
uint8_t first_qset;
struct taskqueue *tq;
struct task start_task;
+ struct task timer_reclaim_task;
struct cdev *port_cdev;
};
@@ -277,7 +282,6 @@ struct adapter {
/* Tasks */
struct task ext_intr_task;
- struct task timer_reclaim_task;
struct task slow_intr_task;
struct task process_responses_task;
struct task mr_refresh_task;
@@ -287,6 +291,7 @@ struct adapter {
/* Register lock for use by the hardware layer */
struct mtx mdio_lock;
+ struct mtx elmer_lock;
/* Bookkeeping for the hardware layer */
struct adapter_params params;
@@ -319,6 +324,8 @@ struct t3_rx_mode {
#define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock)
#define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock)
+#define ELMR_LOCK(adapter) mtx_lock(&(adapter)->elmer_lock)
+#define ELMR_UNLOCK(adapter) mtx_unlock(&(adapter)->elmer_lock)
#define PORT_LOCK(port) mtx_lock(&(port)->lock);
#define PORT_UNLOCK(port) mtx_unlock(&(port)->lock);
@@ -413,7 +420,8 @@ void t3_intr_msi(void *data);
void t3_intr_msix(void *data);
int t3_encap(struct port_info *, struct mbuf **);
-int t3_sge_init_sw(adapter_t *);
+int t3_sge_init_adapter(adapter_t *);
+int t3_sge_init_port(struct port_info *);
void t3_sge_deinit_sw(adapter_t *);
void t3_rx_eth_lro(adapter_t *adap, struct sge_rspq *rq, struct mbuf *m,
diff --git a/sys/dev/cxgb/cxgb_config.h b/sys/dev/cxgb/cxgb_config.h
index 446c743..6b072c3 100644
--- a/sys/dev/cxgb/cxgb_config.h
+++ b/sys/dev/cxgb/cxgb_config.h
@@ -34,7 +34,6 @@ $FreeBSD$
#ifndef CONFIG_DEFINED
#define CONFIG_CHELSIO_T3_CORE
-#define DEFAULT_JUMBO
#endif
#endif
diff --git a/sys/dev/cxgb/cxgb_lro.c b/sys/dev/cxgb/cxgb_lro.c
index 9745cdf..9f64a0d 100644
--- a/sys/dev/cxgb/cxgb_lro.c
+++ b/sys/dev/cxgb/cxgb_lro.c
@@ -87,14 +87,12 @@ __FBSDID("$FreeBSD$");
static __inline int
lro_match(struct mbuf *m, struct ip *ih, struct tcphdr *th)
{
- struct ip *sih = (struct ip *)(m->m_data + IPH_OFFSET);
+ struct ip *sih = (struct ip *)(mtod(m, uint8_t *) + IPH_OFFSET);
struct tcphdr *sth = (struct tcphdr *) (sih + 1);
- /*
- * Why don't we check dest ports?
- */
- return (*(uint32_t *)&th->th_sport == *(uint32_t *)&sth->th_sport &&
- ih->ip_src.s_addr == ih->ip_src.s_addr &&
+ return (th->th_sport == sth->th_sport &&
+ th->th_dport == sth->th_dport &&
+ ih->ip_src.s_addr == sih->ip_src.s_addr &&
ih->ip_dst.s_addr == sih->ip_dst.s_addr);
}
@@ -164,7 +162,7 @@ can_lro_tcpsegment(struct tcphdr *th)
static __inline void
lro_new_session_init(struct t3_lro_session *s, struct mbuf *m)
{
- struct ip *ih = (struct ip *)(m->m_data + IPH_OFFSET);
+ struct ip *ih = (struct ip *)(mtod(m, uint8_t *) + IPH_OFFSET);
struct tcphdr *th = (struct tcphdr *) (ih + 1);
int ip_len = ntohs(ih->ip_len);
@@ -183,7 +181,7 @@ lro_flush_session(struct sge_qset *qs, struct t3_lro_session *s, struct mbuf *m)
{
struct lro_state *l = &qs->lro;
struct mbuf *sm = s->head;
- struct ip *ih = (struct ip *)(sm->m_data + IPH_OFFSET);
+ struct ip *ih = (struct ip *)(mtod(sm, uint8_t *) + IPH_OFFSET);
DPRINTF("%s(qs=%p, s=%p, ", __FUNCTION__,
@@ -253,9 +251,9 @@ static __inline int
lro_update_session(struct t3_lro_session *s, struct mbuf *m)
{
struct mbuf *sm = s->head;
- struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(sm->m_data + 2);
- struct cpl_rx_pkt *ncpl = (struct cpl_rx_pkt *)(m->m_data + 2);
- struct ip *nih = (struct ip *)(m->m_data + IPH_OFFSET);
+ struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(mtod(sm, uint8_t *) + 2);
+ struct cpl_rx_pkt *ncpl = (struct cpl_rx_pkt *)(mtod(m, uint8_t *) + 2);
+ struct ip *nih = (struct ip *)(mtod(m, uint8_t *) + IPH_OFFSET);
struct tcphdr *th, *nth = (struct tcphdr *)(nih + 1);
uint32_t seq = ntohl(nth->th_seq);
int plen, tcpiphlen, olen = (nth->th_off << 2) - sizeof (*nth);
@@ -271,7 +269,7 @@ lro_update_session(struct t3_lro_session *s, struct mbuf *m)
}
MBUF_HEADER_CHECK(sm);
- th = (struct tcphdr *)(sm->m_data + IPH_OFFSET + sizeof (struct ip));
+ th = (struct tcphdr *)(mtod(sm, uint8_t *) + IPH_OFFSET + sizeof (struct ip));
if (olen) {
uint32_t *ptr = (uint32_t *)(th + 1);
@@ -338,7 +336,7 @@ t3_rx_eth_lro(adapter_t *adap, struct sge_rspq *rq, struct mbuf *m,
int ethpad, uint32_t rss_hash, uint32_t rss_csum, int lro)
{
struct sge_qset *qs = rspq_to_qset(rq);
- struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(m->m_data + ethpad);
+ struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(mtod(m, uint8_t *) + ethpad);
struct ether_header *eh = (struct ether_header *)(cpl + 1);
struct ip *ih;
struct tcphdr *th;
diff --git a/sys/dev/cxgb/cxgb_main.c b/sys/dev/cxgb/cxgb_main.c
index fb3725b..def180d 100644
--- a/sys/dev/cxgb/cxgb_main.c
+++ b/sys/dev/cxgb/cxgb_main.c
@@ -83,6 +83,7 @@ __FBSDID("$FreeBSD$");
#endif
static int cxgb_setup_msix(adapter_t *, int);
+static void cxgb_teardown_msix(adapter_t *);
static void cxgb_init(void *);
static void cxgb_init_locked(struct port_info *);
static void cxgb_stop_locked(struct port_info *);
@@ -158,6 +159,17 @@ static driver_t cxgb_port_driver = {
};
static d_ioctl_t cxgb_extension_ioctl;
+static d_open_t cxgb_extension_open;
+static d_close_t cxgb_extension_close;
+
+static struct cdevsw cxgb_cdevsw = {
+ .d_version = D_VERSION,
+ .d_flags = 0,
+ .d_open = cxgb_extension_open,
+ .d_close = cxgb_extension_close,
+ .d_ioctl = cxgb_extension_ioctl,
+ .d_name = "cxgb",
+};
static devclass_t cxgb_port_devclass;
DRIVER_MODULE(cxgb, cxgbc, cxgb_port_driver, cxgb_port_devclass, 0, 0);
@@ -230,6 +242,7 @@ struct cxgb_ident {
{PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"},
{PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"},
{PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"},
+ {PCI_VENDOR_ID_CHELSIO, 0x0033, 4, "T3B04"},
{0, 0, 0, NULL}
};
@@ -267,17 +280,19 @@ cxgb_controller_probe(device_t dev)
{
const struct adapter_info *ai;
char *ports, buf[80];
-
+ int nports;
+
ai = cxgb_get_adapter_info(dev);
if (ai == NULL)
return (ENXIO);
- if (ai->nports == 1)
+ nports = ai->nports0 + ai->nports1;
+ if (nports == 1)
ports = "port";
else
ports = "ports";
- snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, ai->nports, ports);
+ snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, nports, ports);
device_set_desc_copy(dev, buf);
return (BUS_PROBE_DEFAULT);
}
@@ -341,7 +356,6 @@ cxgb_controller_attach(device_t dev)
}
pci_enable_busmaster(dev);
-
/*
* Allocate the registers and make them available to the driver.
* The registers that we care about for NIC mode are in BAR 0
@@ -356,6 +370,7 @@ cxgb_controller_attach(device_t dev)
mtx_init(&sc->sge.reg_lock, "SGE reg lock", NULL, MTX_DEF);
mtx_init(&sc->lock, "cxgb controller lock", NULL, MTX_DEF);
mtx_init(&sc->mdio_lock, "cxgb mdio", NULL, MTX_DEF);
+ mtx_init(&sc->elmer_lock, "cxgb elmer", NULL, MTX_DEF);
sc->bt = rman_get_bustag(sc->regs_res);
sc->bh = rman_get_bushandle(sc->regs_res);
@@ -363,10 +378,10 @@ cxgb_controller_attach(device_t dev)
ai = cxgb_get_adapter_info(dev);
if (t3_prep_adapter(sc, ai, 1) < 0) {
+ printf("prep adapter failed\n");
error = ENODEV;
goto out;
}
-
/* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
* enough messages for the queue sets. If that fails, try falling
* back to MSI. If that fails, then try falling back to the legacy
@@ -478,7 +493,7 @@ cxgb_controller_attach(device_t dev)
sc->params.stats_update_period = 1;
/* initialize sge private state */
- t3_sge_init_sw(sc);
+ t3_sge_init_adapter(sc);
t3_led_ready(sc);
@@ -554,12 +569,13 @@ cxgb_free(struct adapter *sc)
}
bus_generic_detach(sc->dev);
-
+#ifdef notyet
if (is_offload(sc)) {
cxgb_adapter_unofld(sc);
if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT))
offload_close(&sc->tdev);
}
+#endif
t3_free_sge_resources(sc);
t3_sge_free(sc);
@@ -616,6 +632,28 @@ setup_sge_qsets(adapter_t *sc)
return (0);
}
+static void
+cxgb_teardown_msix(adapter_t *sc)
+{
+ int i, nqsets;
+
+ for (nqsets = i = 0; i < (sc)->params.nports; i++)
+ nqsets += sc->port[i].nqsets;
+
+ for (i = 0; i < nqsets; i++) {
+ if (sc->msix_intr_tag[i] != NULL) {
+ bus_teardown_intr(sc->dev, sc->msix_irq_res[i],
+ sc->msix_intr_tag[i]);
+ sc->msix_intr_tag[i] = NULL;
+ }
+ if (sc->msix_irq_res[i] != NULL) {
+ bus_release_resource(sc->dev, SYS_RES_IRQ,
+ sc->msix_irq_rid[i], sc->msix_irq_res[i]);
+ sc->msix_irq_res[i] = NULL;
+ }
+ }
+}
+
static int
cxgb_setup_msix(adapter_t *sc, int msix_count)
{
@@ -637,9 +675,9 @@ cxgb_setup_msix(adapter_t *sc, int msix_count)
device_printf(sc->dev, "Cannot set up interrupt\n");
return (EINVAL);
}
- for (i = 0, k = 0; i < (sc)->params.nports; ++i) {
+ for (i = k = 0; i < (sc)->params.nports; i++) {
nqsets = sc->port[i].nqsets;
- for (j = 0; j < nqsets; ++j, k++) {
+ for (j = 0; j < nqsets; j++, k++) {
struct sge_qset *qs = &sc->sge.qs[k];
rid = k + 2;
@@ -653,7 +691,7 @@ cxgb_setup_msix(adapter_t *sc, int msix_count)
return (EINVAL);
}
sc->msix_irq_rid[k] = rid;
- if (bus_setup_intr(sc->dev, sc->msix_irq_res[j],
+ if (bus_setup_intr(sc->dev, sc->msix_irq_res[k],
INTR_MPSAFE|INTR_TYPE_NET,
#ifdef INTR_FILTERS
NULL,
@@ -687,17 +725,9 @@ cxgb_port_probe(device_t dev)
static int
cxgb_makedev(struct port_info *pi)
{
- struct cdevsw *cxgb_cdevsw;
-
- if ((cxgb_cdevsw = malloc(sizeof(struct cdevsw), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL)
- return (ENOMEM);
-
- cxgb_cdevsw->d_version = D_VERSION;
- cxgb_cdevsw->d_name = strdup(pi->ifp->if_xname, M_DEVBUF);
- cxgb_cdevsw->d_ioctl = cxgb_extension_ioctl;
- pi->port_cdev = make_dev(cxgb_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600,
- pi->ifp->if_xname);
+ pi->port_cdev = make_dev(&cxgb_cdevsw, pi->ifp->if_dunit,
+ UID_ROOT, GID_WHEEL, 0600, if_name(pi->ifp));
if (pi->port_cdev == NULL)
return (ENOMEM);
@@ -726,8 +756,7 @@ cxgb_port_attach(device_t dev)
{
struct port_info *p;
struct ifnet *ifp;
- int media_flags;
- int err;
+ int err, media_flags;
char buf[64];
p = device_get_softc(dev);
@@ -762,7 +791,6 @@ cxgb_port_attach(device_t dev)
ifp->if_capabilities |= CXGB_CAP;
ifp->if_capenable |= CXGB_CAP_ENABLE;
ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
- ifp->if_baudrate = 100000000;
ether_ifattach(ifp, p->hw_addr);
#ifdef DEFAULT_JUMBO
@@ -774,21 +802,36 @@ cxgb_port_attach(device_t dev)
}
ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change,
cxgb_media_status);
-
- if (!strcmp(p->port_type->desc, "10GBASE-CX4"))
- media_flags = IFM_ETHER | IFM_10G_CX4;
- else if (!strcmp(p->port_type->desc, "10GBASE-SR"))
- media_flags = IFM_ETHER | IFM_10G_SR;
- else if (!strcmp(p->port_type->desc, "10GBASE-XR"))
- media_flags = IFM_ETHER | IFM_10G_LR;
- else {
+
+ if (!strcmp(p->port_type->desc, "10GBASE-CX4")) {
+ media_flags = IFM_ETHER | IFM_10G_CX4 | IFM_FDX;
+ } else if (!strcmp(p->port_type->desc, "10GBASE-SR")) {
+ media_flags = IFM_ETHER | IFM_10G_SR | IFM_FDX;
+ } else if (!strcmp(p->port_type->desc, "10GBASE-XR")) {
+ media_flags = IFM_ETHER | IFM_10G_LR | IFM_FDX;
+ } else if (!strcmp(p->port_type->desc, "10/100/1000BASE-T")) {
+ ifmedia_add(&p->media, IFM_ETHER | IFM_10_T, 0, NULL);
+ ifmedia_add(&p->media, IFM_ETHER | IFM_10_T | IFM_FDX,
+ 0, NULL);
+ ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX,
+ 0, NULL);
+ ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
+ 0, NULL);
+ ifmedia_add(&p->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
+ 0, NULL);
+ media_flags = 0;
+ } else {
printf("unsupported media type %s\n", p->port_type->desc);
return (ENXIO);
}
-
- ifmedia_add(&p->media, media_flags, 0, NULL);
- ifmedia_add(&p->media, IFM_ETHER | IFM_AUTO, 0, NULL);
- ifmedia_set(&p->media, media_flags);
+ if (media_flags) {
+ ifmedia_add(&p->media, media_flags, 0, NULL);
+ ifmedia_set(&p->media, media_flags);
+ } else {
+ ifmedia_add(&p->media, IFM_ETHER | IFM_AUTO, 0, NULL);
+ ifmedia_set(&p->media, IFM_ETHER | IFM_AUTO);
+ }
+
snprintf(buf, sizeof(buf), "cxgb_port_taskq%d", p->port);
#ifdef TASKQUEUE_CURRENT
@@ -800,8 +843,7 @@ cxgb_port_attach(device_t dev)
p->tq = taskqueue_create_fast(buf, M_NOWAIT,
taskqueue_thread_enqueue, &p->tq);
#endif
-
-
+
if (p->tq == NULL) {
device_printf(dev, "failed to allocate port task queue\n");
return (ENOMEM);
@@ -810,7 +852,8 @@ cxgb_port_attach(device_t dev)
device_get_nameunit(dev));
TASK_INIT(&p->start_task, 0, cxgb_start_proc, ifp);
-
+ t3_sge_init_port(p);
+
return (0);
}
@@ -822,7 +865,8 @@ cxgb_port_detach(device_t dev)
p = device_get_softc(dev);
PORT_LOCK(p);
- cxgb_stop_locked(p);
+ if (p->ifp->if_drv_flags & IFF_DRV_RUNNING)
+ cxgb_stop_locked(p);
PORT_UNLOCK(p);
mtx_destroy(&p->lock);
@@ -835,9 +879,9 @@ cxgb_port_detach(device_t dev)
ether_ifdetach(p->ifp);
if_free(p->ifp);
- destroy_dev(p->port_cdev);
-
-
+ if (p->port_cdev != NULL)
+ destroy_dev(p->port_cdev);
+
return (0);
}
@@ -1007,7 +1051,7 @@ cxgb_link_start(struct port_info *p)
t3_init_rx_mode(&rm, p);
t3_mac_reset(mac);
- t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN);
+ t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
t3_mac_set_address(mac, 0, p->hw_addr);
t3_mac_set_rx_mode(mac, &rm);
t3_link_start(&p->phy, mac, &p->link_config);
@@ -1060,7 +1104,7 @@ offload_tx(struct toedev *tdev, struct mbuf *m)
critical_enter();
ret = t3_offload_tx(tdev, m);
critical_exit();
- return ret;
+ return (ret);
}
static int
@@ -1135,9 +1179,6 @@ bind_qsets(adapter_t *sc)
{
int i, j;
- if (singleq)
- return;
-
for (i = 0; i < (sc)->params.nports; ++i) {
const struct port_info *pi = adap2pinfo(sc, i);
@@ -1229,23 +1270,13 @@ static void
cxgb_down(struct adapter *sc)
{
int i;
-
+
t3_sge_stop(sc);
+ ADAPTER_LOCK(sc);
t3_intr_disable(sc);
+ ADAPTER_UNLOCK(sc);
- for (i = 0; i < SGE_QSETS; i++) {
- if (sc->msix_intr_tag[i] != NULL) {
- bus_teardown_intr(sc->dev, sc->msix_irq_res[i],
- sc->msix_intr_tag[i]);
- sc->msix_intr_tag[i] = NULL;
- }
- if (sc->msix_irq_res[i] != NULL) {
- bus_release_resource(sc->dev, SYS_RES_IRQ,
- sc->msix_irq_rid[i], sc->msix_irq_res[i]);
- sc->msix_irq_res[i] = NULL;
- }
- }
-
+
if (sc->intr_tag != NULL) {
bus_teardown_intr(sc->dev, sc->irq_res, sc->intr_tag);
sc->intr_tag = NULL;
@@ -1257,10 +1288,17 @@ cxgb_down(struct adapter *sc)
sc->irq_res);
sc->irq_res = NULL;
}
+
+ if (sc->flags & USING_MSIX)
+ cxgb_teardown_msix(sc);
callout_drain(&sc->sge_timer_ch);
- taskqueue_drain(sc->tq, &sc->slow_intr_task);
- taskqueue_drain(sc->tq, &sc->timer_reclaim_task);
+ if (sc->tq != NULL)
+ taskqueue_drain(sc->tq, &sc->slow_intr_task);
+ for (i = 0; i < sc->params.nports; i++)
+ if (sc->port[i].tq != NULL)
+ taskqueue_drain(sc->port[i].tq, &sc->port[i].timer_reclaim_task);
+
}
static int
@@ -1315,7 +1353,7 @@ offload_close(struct toedev *tdev)
struct adapter *adapter = tdev2adap(tdev);
if (!isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT))
- return 0;
+ return (0);
/* Call back all registered clients */
cxgb_remove_clients(tdev);
@@ -1330,7 +1368,7 @@ offload_close(struct toedev *tdev)
ADAPTER_UNLOCK(adapter);
cxgb_offload_deactivate(adapter);
- return 0;
+ return (0);
}
static void
@@ -1363,8 +1401,8 @@ cxgb_init_locked(struct port_info *p)
t3_intr_clear(sc);
setbit(&p->adapter->open_device_map, p->port);
-
ADAPTER_UNLOCK(p->adapter);
+
if (is_offload(sc) && !ofld_disable) {
err = offload_open(p);
if (err)
@@ -1372,6 +1410,9 @@ cxgb_init_locked(struct port_info *p)
"Could not initialize offload capabilities\n");
}
cxgb_link_start(p);
+ t3_link_changed(sc, p->port);
+ ifp->if_baudrate = p->link_config.speed * 1000000;
+
t3_port_intr_enable(sc, p->port);
callout_reset(&sc->cxgb_tick_ch, sc->params.stats_update_period * hz,
@@ -1388,7 +1429,7 @@ cxgb_set_rxmode(struct port_info *p)
struct cmac *mac = &p->mac;
mtx_assert(&p->lock, MA_OWNED);
-
+
t3_init_rx_mode(&rm, p);
t3_mac_set_rx_mode(mac, &rm);
}
@@ -1400,13 +1441,11 @@ cxgb_stop_locked(struct port_info *p)
mtx_assert(&p->lock, MA_OWNED);
mtx_assert(&p->adapter->lock, MA_NOTOWNED);
-
+
ifp = p->ifp;
t3_port_intr_disable(p->adapter, p->port);
- PORT_LOCK(p);
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
- PORT_UNLOCK(p);
p->phy.ops->power_down(&p->phy, 1);
t3_mac_disable(&p->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
@@ -1421,6 +1460,27 @@ cxgb_stop_locked(struct port_info *p)
}
static int
+cxgb_set_mtu(struct port_info *p, int mtu)
+{
+ struct ifnet *ifp = p->ifp;
+ int error = 0;
+
+ if ((mtu < ETHERMIN) || (mtu > ETHER_MAX_LEN_JUMBO))
+ error = EINVAL;
+ else if (ifp->if_mtu != mtu) {
+ PORT_LOCK(p);
+ ifp->if_mtu = mtu;
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ callout_stop(&p->adapter->cxgb_tick_ch);
+ cxgb_stop_locked(p);
+ cxgb_init_locked(p);
+ }
+ PORT_UNLOCK(p);
+ }
+ return (error);
+}
+
+static int
cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
{
struct port_info *p = ifp->if_softc;
@@ -1434,30 +1494,23 @@ cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
*/
switch (command) {
case SIOCSIFMTU:
- if ((ifr->ifr_mtu < ETHERMIN) ||
- (ifr->ifr_mtu > ETHER_MAX_LEN_JUMBO))
- error = EINVAL;
- else if (ifp->if_mtu != ifr->ifr_mtu) {
- PORT_LOCK(p);
- ifp->if_mtu = ifr->ifr_mtu;
- t3_mac_set_mtu(&p->mac, ifp->if_mtu + ETHER_HDR_LEN);
- PORT_UNLOCK(p);
- }
+ error = cxgb_set_mtu(p, ifr->ifr_mtu);
break;
case SIOCSIFADDR:
case SIOCGIFADDR:
+ PORT_LOCK(p);
if (ifa->ifa_addr->sa_family == AF_INET) {
ifp->if_flags |= IFF_UP;
- if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
- cxgb_init(p);
- }
+ if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
+ cxgb_init_locked(p);
arp_ifinit(ifp, ifa);
} else
error = ether_ioctl(ifp, command, data);
+ PORT_UNLOCK(p);
break;
case SIOCSIFFLAGS:
+ PORT_LOCK(p);
if (ifp->if_flags & IFF_UP) {
- PORT_LOCK(p);
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
flags = p->if_flags;
if (((ifp->if_flags ^ flags) & IFF_PROMISC) ||
@@ -1467,10 +1520,8 @@ cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
} else
cxgb_init_locked(p);
p->if_flags = ifp->if_flags;
- PORT_UNLOCK(p);
} else {
- callout_drain(&p->adapter->cxgb_tick_ch);
- PORT_LOCK(p);
+ callout_stop(&p->adapter->cxgb_tick_ch);
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
cxgb_stop_locked(p);
} else {
@@ -1479,10 +1530,8 @@ cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
sc->params.stats_update_period * hz,
cxgb_tick, sc);
}
- PORT_UNLOCK(p);
}
-
-
+ PORT_UNLOCK(p);
break;
case SIOCSIFMEDIA:
case SIOCGIFMEDIA:
@@ -1527,7 +1576,6 @@ cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
error = ether_ioctl(ifp, command, data);
break;
}
-
return (error);
}
@@ -1539,7 +1587,7 @@ cxgb_start_tx(struct ifnet *ifp, uint32_t txmax)
struct port_info *p = ifp->if_softc;
struct mbuf *m0, *m = NULL;
int err, in_use_init;
-
+
if (!p->link_config.link_ok)
return (ENXIO);
@@ -1598,13 +1646,12 @@ cxgb_start_tx(struct ifnet *ifp, uint32_t txmax)
IFQ_UNLOCK(&ifp->if_snd);
}
}
- if (err == 0 && m == NULL) {
- return (ENOBUFS);
- }
- if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC) &&
+ if (err == 0 && m == NULL)
+ err = ENOBUFS;
+ else if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC) &&
(ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
- return (ENOSPC);
+ err = ENOSPC;
}
return (err);
}
@@ -1616,18 +1663,18 @@ cxgb_start_proc(void *arg, int ncount)
struct port_info *pi = ifp->if_softc;
struct sge_qset *qs;
struct sge_txq *txq;
- int error = 0;
+ int error;
qs = &pi->adapter->sge.qs[pi->first_qset];
txq = &qs->txq[TXQ_ETH];
- while (error == 0) {
+ do {
if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
taskqueue_enqueue(pi->adapter->tq,
- &pi->adapter->timer_reclaim_task);
+ &pi->timer_reclaim_task);
error = cxgb_start_tx(ifp, TX_START_MAX_DESC);
- }
+ } while (error == 0);
}
static void
@@ -1643,7 +1690,7 @@ cxgb_start(struct ifnet *ifp)
if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
taskqueue_enqueue(pi->adapter->tq,
- &pi->adapter->timer_reclaim_task);
+ &pi->timer_reclaim_task);
err = cxgb_start_tx(ifp, TX_START_MAX_DESC);
@@ -1672,6 +1719,18 @@ cxgb_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
ifmr->ifm_status |= IFM_ACTIVE;
+ switch (p->link_config.speed) {
+ case 10:
+ ifmr->ifm_active |= IFM_10_T;
+ break;
+ case 100:
+ ifmr->ifm_active |= IFM_100_TX;
+ break;
+ case 1000:
+ ifmr->ifm_active |= IFM_1000_T;
+ break;
+ }
+
if (p->link_config.duplex)
ifmr->ifm_active |= IFM_FDX;
else
@@ -1718,8 +1777,9 @@ check_link_status(adapter_t *sc)
for (i = 0; i < (sc)->params.nports; ++i) {
struct port_info *p = &sc->port[i];
- if (!(p->port_type->caps & SUPPORTED_IRQ))
+ if (!(p->port_type->caps & SUPPORTED_IRQ))
t3_link_changed(sc, i);
+ p->ifp->if_baudrate = p->link_config.speed * 1000000;
}
}
@@ -1745,7 +1805,8 @@ check_t3b2_mac(struct adapter *adapter)
else if (status == 2) {
struct cmac *mac = &p->mac;
- t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN);
+ t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN
+ + ETHER_VLAN_ENCAP_LEN);
t3_mac_set_address(mac, 0, p->hw_addr);
cxgb_set_rxmode(p);
t3_link_start(&p->phy, mac, &p->link_config);
@@ -1773,9 +1834,9 @@ cxgb_tick(void *arg)
* port lock
*/
ADAPTER_UNLOCK(sc);
+
if (p->rev == T3_REV_B2)
check_t3b2_mac(sc);
-
}
static int
@@ -1785,6 +1846,18 @@ in_range(int val, int lo, int hi)
}
static int
+cxgb_extension_open(struct cdev *dev, int flags, int fmp, d_thread_t *td)
+{
+ return (0);
+}
+
+static int
+cxgb_extension_close(struct cdev *dev, int flags, int fmt, d_thread_t *td)
+{
+ return (0);
+}
+
+static int
cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data,
int fflag, struct thread *td)
{
diff --git a/sys/dev/cxgb/cxgb_offload.c b/sys/dev/cxgb/cxgb_offload.c
index a6d7a99..35e7fb6 100644
--- a/sys/dev/cxgb/cxgb_offload.c
+++ b/sys/dev/cxgb/cxgb_offload.c
@@ -720,8 +720,14 @@ static int
do_hwtid_rpl(struct toedev *dev, struct mbuf *m)
{
union opcode_tid *p = cplhdr(m);
- unsigned int hwtid = G_TID(ntohl(p->opcode_tid));
+ unsigned int hwtid;
struct toe_tid_entry *toe_tid;
+
+ printf("do_hwtid_rpl m=%p\n", m);
+ return (0);
+
+
+ hwtid = G_TID(ntohl(p->opcode_tid));
toe_tid = lookup_tid(&(TOE_DATA(dev))->tid_maps, hwtid);
if (toe_tid->ctx && toe_tid->client->handlers &&
@@ -1115,7 +1121,7 @@ process_rx(struct toedev *dev, struct mbuf **m, int n)
{
while (n--) {
struct mbuf *m0 = *m++;
- unsigned int opcode = G_OPCODE(ntohl(m0->m_pkthdr.csum_data));
+ unsigned int opcode = G_OPCODE(ntohl(m0->m_pkthdr.csum_data));
int ret = cpl_handlers[opcode] (dev, m0);
#if VALIDATE_TID
diff --git a/sys/dev/cxgb/cxgb_offload.h b/sys/dev/cxgb/cxgb_offload.h
index 2e4b44b..fdfea35 100644
--- a/sys/dev/cxgb/cxgb_offload.h
+++ b/sys/dev/cxgb/cxgb_offload.h
@@ -130,7 +130,7 @@ typedef int (*cpl_handler_func)(struct toedev *dev, struct mbuf *m);
*/
static inline void *cplhdr(struct mbuf *m)
{
- return m->m_data;
+ return mtod(m, uint8_t *);
}
void t3_register_cpl_handler(unsigned int opcode, cpl_handler_func h);
diff --git a/sys/dev/cxgb/cxgb_sge.c b/sys/dev/cxgb/cxgb_sge.c
index 4bd2a91..676ab09 100644
--- a/sys/dev/cxgb/cxgb_sge.c
+++ b/sys/dev/cxgb/cxgb_sge.c
@@ -307,7 +307,7 @@ get_imm_packet(adapter_t *sc, const struct rsp_desc *resp, struct mbuf *m, void
switch (sopeop) {
case RSPQ_SOP_EOP:
m->m_len = m->m_pkthdr.len = len;
- memcpy(m->m_data, resp->imm_data, len);
+ memcpy(mtod(m, uint8_t *), resp->imm_data, len);
break;
case RSPQ_EOP:
memcpy(cl, resp->imm_data, len);
@@ -666,6 +666,7 @@ static void
sge_timer_cb(void *arg)
{
adapter_t *sc = arg;
+ struct port_info *p;
struct sge_qset *qs;
struct sge_txq *txq;
int i, j;
@@ -680,11 +681,11 @@ sge_timer_cb(void *arg)
refill_rx = ((qs->fl[0].credits < qs->fl[0].size) ||
(qs->fl[1].credits < qs->fl[1].size));
if (reclaim_eth || reclaim_ofl || refill_rx) {
- taskqueue_enqueue(sc->tq, &sc->timer_reclaim_task);
- goto done;
+ p = &sc->port[i];
+ taskqueue_enqueue(p->tq, &p->timer_reclaim_task);
+ break;
}
}
-done:
callout_reset(&sc->sge_timer_ch, TX_RECLAIM_PERIOD, sge_timer_cb, sc);
}
@@ -694,24 +695,31 @@ done:
*
*/
int
-t3_sge_init_sw(adapter_t *sc)
+t3_sge_init_adapter(adapter_t *sc)
{
-
callout_init(&sc->sge_timer_ch, CALLOUT_MPSAFE);
callout_reset(&sc->sge_timer_ch, TX_RECLAIM_PERIOD, sge_timer_cb, sc);
- TASK_INIT(&sc->timer_reclaim_task, 0, sge_timer_reclaim, sc);
TASK_INIT(&sc->slow_intr_task, 0, sge_slow_intr_handler, sc);
return (0);
}
+int
+t3_sge_init_port(struct port_info *p)
+{
+ TASK_INIT(&p->timer_reclaim_task, 0, sge_timer_reclaim, p);
+}
+
void
t3_sge_deinit_sw(adapter_t *sc)
{
+ int i;
+
callout_drain(&sc->sge_timer_ch);
- if (sc->tq) {
- taskqueue_drain(sc->tq, &sc->timer_reclaim_task);
+ if (sc->tq)
taskqueue_drain(sc->tq, &sc->slow_intr_task);
- }
+ for (i = 0; i < sc->params.nports; i++)
+ if (sc->port[i].tq != NULL)
+ taskqueue_drain(sc->port[i].tq, &sc->port[i].timer_reclaim_task);
}
/**
@@ -736,38 +744,34 @@ refill_rspq(adapter_t *sc, const struct sge_rspq *q, u_int credits)
static void
sge_timer_reclaim(void *arg, int ncount)
{
- adapter_t *sc = arg;
- int i, nqsets = 0;
+ struct port_info *p = arg;
+ int i, nqsets = p->nqsets;
+ adapter_t *sc = p->adapter;
struct sge_qset *qs;
struct sge_txq *txq;
struct mtx *lock;
struct mbuf *m_vec[TX_CLEAN_MAX_DESC];
int n, reclaimable;
- /*
- * XXX assuming these quantities are allowed to change during operation
- */
- for (i = 0; i < sc->params.nports; i++)
- nqsets += sc->port[i].nqsets;
for (i = 0; i < nqsets; i++) {
qs = &sc->sge.qs[i];
txq = &qs->txq[TXQ_ETH];
reclaimable = desc_reclaimable(txq);
if (reclaimable > 0) {
- mtx_lock(&txq->lock);
+ mtx_lock(&txq->lock);
n = reclaim_completed_tx(sc, txq, TX_CLEAN_MAX_DESC, m_vec);
mtx_unlock(&txq->lock);
- for (i = 0; i < n; i++) {
+ for (i = 0; i < n; i++)
m_freem_vec(m_vec[i]);
- }
- if (qs->port->ifp->if_drv_flags & IFF_DRV_OACTIVE &&
+
+ if (p->ifp->if_drv_flags & IFF_DRV_OACTIVE &&
txq->size - txq->in_use >= TX_START_MAX_DESC) {
- qs->port->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
- taskqueue_enqueue(qs->port->tq, &qs->port->start_task);
+ p->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+ taskqueue_enqueue(p->tq, &p->start_task);
}
- }
-
+ }
+
txq = &qs->txq[TXQ_OFLD];
reclaimable = desc_reclaimable(txq);
if (reclaimable > 0) {
@@ -775,9 +779,8 @@ sge_timer_reclaim(void *arg, int ncount)
n = reclaim_completed_tx(sc, txq, TX_CLEAN_MAX_DESC, m_vec);
mtx_unlock(&txq->lock);
- for (i = 0; i < n; i++) {
+ for (i = 0; i < n; i++)
m_freem_vec(m_vec[i]);
- }
}
lock = (sc->flags & USING_MSIX) ? &qs->rspq.lock :
@@ -1149,7 +1152,7 @@ t3_encap(struct port_info *p, struct mbuf **m)
pkthdr = &tmp[0];
m_copydata(m0, 0, TCPPKTHDRSIZE, pkthdr);
} else {
- pkthdr = m0->m_data;
+ pkthdr = mtod(m0, uint8_t *);
}
if (__predict_false(m0->m_flags & M_VLANTAG)) {
@@ -1178,7 +1181,7 @@ t3_encap(struct port_info *p, struct mbuf **m)
m_set_priority(m0, txqs.pidx);
if (m0->m_len == m0->m_pkthdr.len)
- memcpy(&txd->flit[2], m0->m_data, mlen);
+ memcpy(&txd->flit[2], mtod(m0, uint8_t *), mlen);
else
m_copydata(m0, 0, mlen, (caddr_t)&txd->flit[2]);
@@ -1343,7 +1346,7 @@ static int
ctrl_xmit(adapter_t *adap, struct sge_txq *q, struct mbuf *m)
{
int ret;
- struct work_request_hdr *wrp = (struct work_request_hdr *)m->m_data;
+ struct work_request_hdr *wrp = mtod(m, struct work_request_hdr *);
if (__predict_false(!immediate(m))) {
m_freem(m);
@@ -1547,6 +1550,9 @@ t3_sge_stop(adapter_t *sc)
int i;
t3_set_reg_field(sc, A_SG_CONTROL, F_GLOBALENABLE, 0);
+ if (sc->tq == NULL)
+ return;
+
for (i = 0; i < SGE_QSETS; ++i) {
struct sge_qset *qs = &sc->sge.qs[i];
@@ -2105,12 +2111,12 @@ err:
void
t3_rx_eth(struct port_info *pi, struct sge_rspq *rq, struct mbuf *m, int ethpad)
{
- struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(m->m_data + ethpad);
+ struct cpl_rx_pkt *cpl = (struct cpl_rx_pkt *)(mtod(m, uint8_t *) + ethpad);
struct ifnet *ifp = pi->ifp;
- DPRINTF("rx_eth m=%p m->m_data=%p p->iff=%d\n", m, m->m_data, cpl->iff);
+ DPRINTF("rx_eth m=%p m->m_data=%p p->iff=%d\n", m, mtod(m, uint8_t *), cpl->iff);
if (&pi->adapter->port[cpl->iff] != pi)
- panic("bad port index %d m->m_data=%p\n", cpl->iff, m->m_data);
+ panic("bad port index %d m->m_data=%p\n", cpl->iff, mtod(m, uint8_t *));
if ((ifp->if_capenable & IFCAP_RXCSUM) && !cpl->fragment &&
cpl->csum_valid && cpl->csum == 0xffff) {
@@ -2130,7 +2136,7 @@ t3_rx_eth(struct port_info *pi, struct sge_rspq *rq, struct mbuf *m, int ethpad)
#endif
m->m_pkthdr.rcvif = ifp;
- m->m_pkthdr.header = m->m_data + sizeof(*cpl) + ethpad;
+ m->m_pkthdr.header = mtod(m, uint8_t *) + sizeof(*cpl) + ethpad;
m_explode(m);
/*
* adjust after conversion to mbuf chain
@@ -2215,7 +2221,6 @@ done:
return (ret);
}
-
/**
* handle_rsp_cntrl_info - handles control information in a response
* @qs: the queue set corresponding to the response
@@ -2239,7 +2244,7 @@ handle_rsp_cntrl_info(struct sge_qset *qs, uint32_t flags)
qs->txq[TXQ_ETH].processed += credits;
if (desc_reclaimable(&qs->txq[TXQ_ETH]) > TX_START_MAX_DESC)
taskqueue_enqueue(qs->port->adapter->tq,
- &qs->port->adapter->timer_reclaim_task);
+ &qs->port->timer_reclaim_task);
}
credits = G_RSPD_TXQ2_CR(flags);
@@ -2361,8 +2366,8 @@ process_responses(adapter_t *adap, struct sge_qset *qs, int budget)
}
if (eop) {
- prefetch(rspq->m->m_data);
- prefetch(rspq->m->m_data + L1_CACHE_BYTES);
+ prefetch(mtod(rspq->m, uint8_t *));
+ prefetch(mtod(rspq->m, uint8_t *) + L1_CACHE_BYTES);
if (eth) {
t3_rx_eth_lro(adap, rspq, rspq->m, ethpad,
@@ -2388,7 +2393,6 @@ process_responses(adapter_t *adap, struct sge_qset *qs, int budget)
}
--budget_left;
}
-
deliver_partial_bundle(&adap->tdev, rspq, offload_mbufs, ngathered);
t3_lro_flush(adap, qs, &qs->lro);
@@ -2520,9 +2524,8 @@ t3_lro_enable(SYSCTL_HANDLER_ARGS)
enabled = sc->sge.qs[0].lro.enabled;
err = sysctl_handle_int(oidp, &enabled, arg2, req);
- if (err != 0) {
+ if (err != 0)
return (err);
- }
if (enabled == sc->sge.qs[0].lro.enabled)
return (0);
@@ -2530,9 +2533,8 @@ t3_lro_enable(SYSCTL_HANDLER_ARGS)
for (j = 0; j < sc->port[i].nqsets; j++)
nqsets++;
- for (i = 0; i < nqsets; i++) {
+ for (i = 0; i < nqsets; i++)
sc->sge.qs[i].lro.enabled = enabled;
- }
return (0);
}
diff --git a/sys/dev/cxgb/t3fw-4.0.0.bin.gz.uu b/sys/dev/cxgb/t3fw-4.0.0.bin.gz.uu
deleted file mode 100644
index fae25c0..0000000
--- a/sys/dev/cxgb/t3fw-4.0.0.bin.gz.uu
+++ /dev/null
@@ -1,483 +0,0 @@
-/**************************************************************************
-
-Copyright (c) 2007, Chelsio Inc.
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
- 2. Neither the name of the Chelsio Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-$FreeBSD$
-
-***************************************************************************/
-
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-!````
-`
-end
diff --git a/sys/dev/cxgb/t3fw-4.1.0.bin.gz.uu b/sys/dev/cxgb/t3fw-4.1.0.bin.gz.uu
new file mode 100644
index 0000000..e434c1d
--- /dev/null
+++ b/sys/dev/cxgb/t3fw-4.1.0.bin.gz.uu
@@ -0,0 +1,482 @@
+/**************************************************************************
+
+Copyright (c) 2007, Chelsio Inc.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Neither the name of the Chelsio Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
+ this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+$FreeBSD$
+
+***************************************************************************/
+
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+`
+end
diff --git a/sys/modules/cxgb/Makefile b/sys/modules/cxgb/Makefile
index 5df8112..cd2081e 100644
--- a/sys/modules/cxgb/Makefile
+++ b/sys/modules/cxgb/Makefile
@@ -5,22 +5,22 @@ CXGB = ${.CURDIR}/../../dev/cxgb
KMOD= if_cxgb
SRCS= cxgb_mc5.c cxgb_vsc8211.c cxgb_ael1002.c cxgb_mv88e1xxx.c
-SRCS+= cxgb_xgmac.c cxgb_t3_hw.c cxgb_main.c cxgb_sge.c cxgb_lro.c
-SRCS+= cxgb_offload.c cxgb_l2t.c
+SRCS+= cxgb_xgmac.c cxgb_vsc7323.c cxgb_t3_hw.c cxgb_main.c
+SRCS+= cxgb_sge.c cxgb_lro.c cxgb_offload.c cxgb_l2t.c
SRCS+= device_if.h bus_if.h pci_if.h opt_zero.h
SRCS+= uipc_mvec.c
-CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DDEFAULT_JUMBO -DCONFIG_DEFINED -I${CXGB}
-#CFLAGS+= -DINVARIANT_SUPPORT -DINVARIANTS -DDEBUG
+CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DCONFIG_DEFINED -DDEFAULT_JUMBO -I${CXGB}
+#CFLAGS+= -DINVARIANT_SUPPORT -DINVARIANTS
.if ${MACHINE_ARCH} != "ia64"
# ld is broken on ia64
-t3fw-4.0.0.bin: ${CXGB}/t3fw-4.0.0.bin.gz.uu
- uudecode -p < ${CXGB}/t3fw-4.0.0.bin.gz.uu \
+t3fw-4.1.0.bin: ${CXGB}/t3fw-4.1.0.bin.gz.uu
+ uudecode -p < ${CXGB}/t3fw-4.1.0.bin.gz.uu \
| gzip -dc > ${.TARGET}
-FIRMWS= t3fw-4.0.0.bin:t3fw400
-CLEANFILES+= t3fw-4.0.0.bin
+FIRMWS= t3fw-4.1.0.bin:t3fw410
+CLEANFILES+= t3fw-4.1.0.bin
.endif
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