diff options
| -rw-r--r-- | sys/amd64/pci/pci_cfgreg.c | 16 | ||||
| -rw-r--r-- | sys/dev/pci/pcireg.h | 1 | ||||
| -rw-r--r-- | sys/i386/pci/pci_cfgreg.c | 14 |
3 files changed, 16 insertions, 15 deletions
diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index be9e404..3e29a58 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -181,9 +181,9 @@ pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes) { int dataport = 0; - if (bus <= PCI_BUSMAX && slot < 32 && func <= PCI_FUNCMAX && - reg <= PCI_REGMAX && bytes != 3 && (unsigned) bytes <= 4 && - (reg & (bytes - 1)) == 0) { + if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX && + (unsigned)reg <= PCI_REGMAX && bytes != 3 && + (unsigned)bytes <= 4 && (reg & (bytes - 1)) == 0) { outl(CONF1_ADDR_PORT, (1 << 31) | (bus << 16) | (slot << 11) | (func << 8) | (reg & ~0x03)); dataport = CONF1_DATA_PORT + (reg & 0x03); @@ -281,7 +281,7 @@ pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus) * fall back to using type 1 config access instead. */ if (pci_cfgregopen() != 0) { - for (slot = 0; slot < 32; slot++) { + for (slot = 0; slot <= PCI_SLOTMAX; slot++) { val1 = pcireg_cfgread(0, slot, 0, 0, 4); if (val1 == 0xffffffff) continue; @@ -309,8 +309,8 @@ pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, volatile vm_offset_t va; int data = -1; - if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 || - func > PCI_FUNCMAX || reg >= 0x1000) + if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || + func > PCI_FUNCMAX || reg > PCIE_REGMAX) return (-1); va = PCIE_VADDR(pcie_base, reg, bus, slot, func); @@ -336,8 +336,8 @@ pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, { volatile vm_offset_t va; - if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 || - func > PCI_FUNCMAX || reg >= 0x1000) + if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || + func > PCI_FUNCMAX || reg > PCIE_REGMAX) return; va = PCIE_VADDR(pcie_base, reg, bus, slot, func); diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index c7a7245..981d1e0 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -44,6 +44,7 @@ #define PCI_SLOTMAX 31 /* highest supported slot number */ #define PCI_FUNCMAX 7 /* highest supported function number */ #define PCI_REGMAX 255 /* highest supported config register addr. */ +#define PCIE_REGMAX 4095 /* highest supported config register addr. */ #define PCI_MAXHDRTYPE 2 /* PCI config header registers for all devices */ diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index 20050e6..ae56990 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -299,9 +299,9 @@ pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes) if (bus <= PCI_BUSMAX && slot < devmax && func <= PCI_FUNCMAX - && reg <= PCI_REGMAX + && (unsigned)reg <= PCI_REGMAX && bytes != 3 - && (unsigned) bytes <= 4 + && (unsigned)bytes <= 4 && (reg & (bytes - 1)) == 0) { switch (cfgmech) { case CFGMECH_PCIE: @@ -595,7 +595,7 @@ pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus) * fall back to using type 1 config access instead. */ if (pci_cfgregopen() != 0) { - for (slot = 0; slot < 32; slot++) { + for (slot = 0; slot <= PCI_SLOTMAX; slot++) { val1 = pcireg_cfgread(0, slot, 0, 0, 4); if (val1 == 0xffffffff) continue; @@ -661,8 +661,8 @@ pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, vm_paddr_t pa, papage; int data = -1; - if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 || - func > PCI_FUNCMAX || reg >= 0x1000 || bytes > 4 || bytes == 3) + if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || + func > PCI_FUNCMAX || reg > PCIE_REGMAX) return (-1); critical_enter(); @@ -695,8 +695,8 @@ pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, volatile vm_offset_t va; vm_paddr_t pa, papage; - if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 || - func > PCI_FUNCMAX || reg >= 0x1000) + if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || + func > PCI_FUNCMAX || reg > PCIE_REGMAX) return; critical_enter(); |
