diff options
| -rw-r--r-- | sys/amd64/amd64/initcpu.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 8868cd3..e20a271 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -125,6 +125,20 @@ init_amd(void) wrmsr(MSR_NB_CFG1, msr); } } + + /* + * BIOS may configure Family 10h processors to convert WC+ cache type + * to CD. That can hurt performance of guest VMs using nested paging. + * The relevant MSR bit is not documented in the BKDG, + * the fix is borrowed from Linux. + */ + if (CPUID_TO_FAMILY(cpu_id) == 0x10) { + if ((cpu_feature2 & CPUID2_HV) == 0) { + msr = rdmsr(0xc001102a); + msr &= ~((uint64_t)1 << 24); + wrmsr(0xc001102a, msr); + } + } } /* |
