diff options
-rw-r--r-- | sys/arm/arm/locore.S | 41 | ||||
-rw-r--r-- | sys/arm/arm/trap.c | 21 | ||||
-rw-r--r-- | sys/arm/freescale/imx/imx_machdep.h | 3 | ||||
-rw-r--r-- | sys/arm/freescale/imx/imx_sdhci.c | 73 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_anadig.c | 35 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_common.h | 3 | ||||
-rw-r--r-- | sys/arm/include/armreg.h | 2 | ||||
-rw-r--r-- | sys/boot/fdt/dts/imx6.dtsi | 124 | ||||
-rw-r--r-- | sys/boot/fdt/dts/wandboard-dual.dts | 4 | ||||
-rw-r--r-- | sys/boot/fdt/dts/wandboard-quad.dts | 4 | ||||
-rw-r--r-- | sys/boot/fdt/dts/wandboard-solo.dts | 4 | ||||
-rw-r--r-- | sys/dev/sdhci/sdhci.h | 5 |
12 files changed, 224 insertions, 95 deletions
diff --git a/sys/arm/arm/locore.S b/sys/arm/arm/locore.S index 31f13f1..2813dec 100644 --- a/sys/arm/arm/locore.S +++ b/sys/arm/arm/locore.S @@ -148,15 +148,31 @@ Lunmapped: * Build page table from scratch. */ - /* Load the page tables physical address */ - ldr r1, Lstartup_pagetable - ldr r2, =(KERNVIRTADDR - KERNPHYSADDR) + /* Find the delta between VA and PA */ + adr r0, Lpagetable + ldr r1, [r0] + sub r2, r1, r0 + /* At this point: r2 = VA - PA */ + + /* + * Find the physical address of the table. After these two + * instructions: + * r1 = va(pagetable) + * + * r0 = va(pagetable) - (VA - PA) + * = va(pagetable) - VA + PA + * = pa(pagetable) + */ + ldr r1, [r0, #4] sub r0, r1, r2 /* * Map PA == VA */ - ldr r5, =(PHYSADDR) + /* Find the start kernels load address */ + adr r5, _start + ldr r2, =(L1_S_OFFSET) + bic r5, r2 mov r1, r5 mov r2, r5 /* Map 64MiB, preserved over calls to build_pagetables */ @@ -165,7 +181,7 @@ Lunmapped: /* Create the kernel map to jump to */ mov r1, r5 - ldr r2, =(KERNBASE) + ldr r2, =(KERNVIRTADDR) bl build_pagetables #if defined(SOCDEV_PA) && defined(SOCDEV_VA) @@ -223,16 +239,16 @@ mmu_done: virt_done: mov r1, #28 /* loader info size is 28 bytes also second arg */ subs sp, sp, r1 /* allocate arm_boot_params struct on stack */ - bic sp, sp, #7 /* align stack to 8 bytes */ mov r0, sp /* loader info pointer is first arg */ + bic sp, sp, #7 /* align stack to 8 bytes */ str r1, [r0] /* Store length of loader info */ str r9, [r0, #4] /* Store r0 from boot loader */ str r8, [r0, #8] /* Store r1 from boot loader */ str ip, [r0, #12] /* store r2 from boot loader */ str fp, [r0, #16] /* store r3 from boot loader */ - ldr r5, =KERNPHYSADDR /* load KERNPHYSADDR as the physical address */ str r5, [r0, #20] /* store the physical address */ - ldr r5, Lstartup_pagetable + adr r4, Lpagetable /* load the pagetable address */ + ldr r5, [r4, #4] str r5, [r0, #24] /* store the pagetable address */ mov fp, #0 /* trace back starts here */ bl _C_LABEL(initarm) /* Off we go */ @@ -279,16 +295,19 @@ build_pagetables: RET +Lpagetable: + .word . + .word pagetable + Lvirtaddr: .word KERNVIRTADDR Lphysaddr: .word KERNPHYSADDR Lreal_start: .word _start -Lend: +Lend: .word _edata -Lstartup_pagetable: - .word pagetable + #ifdef SMP Lstartup_pagetable_secondary: .word temp_pagetable diff --git a/sys/arm/arm/trap.c b/sys/arm/arm/trap.c index eb5b36d..423e3de 100644 --- a/sys/arm/arm/trap.c +++ b/sys/arm/arm/trap.c @@ -108,6 +108,7 @@ __FBSDID("$FreeBSD$"); #include <vm/vm_map.h> #include <vm/vm_extern.h> +#include <machine/armreg.h> #include <machine/cpuconf.h> #include <machine/vmparam.h> #include <machine/frame.h> @@ -386,17 +387,16 @@ data_abort_handler(struct trapframe *tf) } /* - * We need to know whether the page should be mapped - * as R or R/W. The MMU does not give us the info as - * to whether the fault was caused by a read or a write. - * - * However, we know that a permission fault can only be - * the result of a write to a read-only location, so - * we can deal with those quickly. - * - * Otherwise we need to disassemble the instruction - * responsible to determine if it was a write. + * We need to know whether the page should be mapped as R or R/W. On + * armv6 and later the fault status register indicates whether the + * access was a read or write. Prior to armv6, we know that a + * permission fault can only be the result of a write to a read-only + * location, so we can deal with those quickly. Otherwise we need to + * disassemble the faulting instruction to determine if it was a write. */ +#if ARM_ARCH_6 || ARM_ARCH_7A + ftype = (fsr & FAULT_WNR) ? VM_PROT_READ | VM_PROT_WRITE : VM_PROT_READ; +#else if (IS_PERMISSION_FAULT(fsr)) ftype = VM_PROT_WRITE; else { @@ -413,6 +413,7 @@ data_abort_handler(struct trapframe *tf) ftype = VM_PROT_READ; } } +#endif /* * See if the fault is as a result of ref/mod emulation, diff --git a/sys/arm/freescale/imx/imx_machdep.h b/sys/arm/freescale/imx/imx_machdep.h index bb99111..b78f0da 100644 --- a/sys/arm/freescale/imx/imx_machdep.h +++ b/sys/arm/freescale/imx/imx_machdep.h @@ -33,7 +33,6 @@ /* Common functions, implemented in imx_machdep.c. */ -void imx_devmap_addentry(vm_paddr_t _pa, vm_size_t _sz); void imx_wdog_cpu_reset(vm_offset_t _wdcr_phys) __attribute__((__noreturn__)); /* From here down, routines are implemented in imxNN_machdep.c. */ @@ -57,8 +56,6 @@ void imx_wdog_cpu_reset(vm_offset_t _wdcr_phys) __attribute__((__noreturn__)); u_int imx_soc_type(void); u_int imx_soc_family(void); -void imx_devmap_init(void); - /* * We need a clock management system that works across unrelated SoCs and * devices. For now, to keep imx development moving, define some barebones diff --git a/sys/arm/freescale/imx/imx_sdhci.c b/sys/arm/freescale/imx/imx_sdhci.c index baa9162..7c9af18 100644 --- a/sys/arm/freescale/imx/imx_sdhci.c +++ b/sys/arm/freescale/imx/imx_sdhci.c @@ -71,6 +71,7 @@ struct imx_sdhci_softc { uint32_t r1bfix_intmask; uint8_t r1bfix_type; uint8_t hwtype; + boolean_t force_card_present; }; #define R1BFIX_NONE 0 /* No fix needed at next interrupt. */ @@ -89,6 +90,27 @@ struct imx_sdhci_softc { #define SDHC_VEND_HCKEN (1 << 12) #define SDHC_VEND_PEREN (1 << 13) +#define SDHC_PRES_STATE 0x24 +#define SDHC_PRES_CIHB (1 << 0) +#define SDHC_PRES_CDIHB (1 << 1) +#define SDHC_PRES_DLA (1 << 2) +#define SDHC_PRES_SDSTB (1 << 3) +#define SDHC_PRES_IPGOFF (1 << 4) +#define SDHC_PRES_HCKOFF (1 << 5) +#define SDHC_PRES_PEROFF (1 << 6) +#define SDHC_PRES_SDOFF (1 << 7) +#define SDHC_PRES_WTA (1 << 8) +#define SDHC_PRES_RTA (1 << 9) +#define SDHC_PRES_BWEN (1 << 10) +#define SDHC_PRES_BREN (1 << 11) +#define SDHC_PRES_RTR (1 << 12) +#define SDHC_PRES_CINST (1 << 16) +#define SDHC_PRES_CDPL (1 << 18) +#define SDHC_PRES_WPSPL (1 << 19) +#define SDHC_PRES_CLSL (1 << 23) +#define SDHC_PRES_DLSL_SHIFT 24 +#define SDHC_PRES_DLSL_MASK (0xffU << SDHC_PRES_DLSL_SHIFT) + #define SDHC_PROT_CTRL 0x28 #define SDHC_PROT_LED (1 << 0) #define SDHC_PROT_WIDTH_1BIT (0 << 1) @@ -254,8 +276,8 @@ imx_sdhci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) wrk32 = RD4(sc, SDHC_VEND_SPEC); if (wrk32 & SDHC_VEND_FRC_SDCLK_ON) val32 |= SDHCI_CLOCK_INT_EN | SDHCI_CLOCK_CARD_EN; - wrk32 = RD4(sc, SDHCI_PRESENT_STATE); - if (wrk32 & 0x08) + wrk32 = RD4(sc, SDHC_PRES_STATE); + if (wrk32 & SDHC_PRES_SDSTB) val32 |= SDHCI_CLOCK_INT_STABLE; val32 |= sc->sdclockreg_freq_bits; return (val32); @@ -268,7 +290,9 @@ static uint32_t imx_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) { struct imx_sdhci_softc *sc = device_get_softc(dev); - uint32_t val32; + uint32_t val32, wrk32; + + val32 = RD4(sc, off); /* * The hardware leaves the base clock frequency out of the capabilities @@ -280,7 +304,6 @@ imx_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) * doesn't yet handle (1.8v, suspend/resume, etc). */ if (off == SDHCI_CAPABILITIES) { - val32 = RD4(sc, off); val32 &= ~SDHCI_CAN_VDD_180; val32 &= ~SDHCI_CAN_DO_SUSPEND; val32 |= SDHCI_CAN_DO_8BITBUS; @@ -288,14 +311,30 @@ imx_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) return (val32); } - val32 = RD4(sc, off); + /* + * The hardware moves bits around in the present state register to make + * room for all 8 data line state bits. To translate, mask out all the + * bits which are not in the same position in both registers (this also + * masks out some freescale-specific bits in locations defined as + * reserved by sdhci), then shift the data line and retune request bits + * down to their standard locations. + */ + if (off == SDHCI_PRESENT_STATE) { + wrk32 = val32; + val32 &= 0x000F0F07; + val32 |= (wrk32 >> 4) & SDHCI_STATE_DAT_MASK; + val32 |= (wrk32 >> 9) & SDHCI_RETUNE_REQUEST; + if (sc->force_card_present) + val32 |= SDHCI_CARD_PRESENT; + return (val32); + } /* * imx_sdhci_intr() can synthesize a DATA_END interrupt following a * command with an R1B response, mix it into the hardware status. */ if (off == SDHCI_INT_STATUS) { - val32 |= sc->r1bfix_intmask; + return (val32 | sc->r1bfix_intmask); } return val32; @@ -522,7 +561,7 @@ imx_sdhci_intr(void *arg) count = 0; /* XXX use a callout or something instead of busy-waiting. */ while (count < 250000 && - (RD4(sc, SDHCI_PRESENT_STATE) & SDHCI_DAT_ACTIVE)) { + (RD4(sc, SDHC_PRES_STATE) & SDHC_PRES_DLA)) { ++count; DELAY(1); } @@ -555,6 +594,7 @@ imx_sdhci_attach(device_t dev) { struct imx_sdhci_softc *sc = device_get_softc(dev); int rid, err; + phandle_t node; sc->dev = dev; @@ -621,6 +661,25 @@ imx_sdhci_attach(device_t dev) sdhci_init_slot(dev, &sc->slot, 0); + /* + * If the slot is flagged with the non-removable property, set our flag + * to always force the SDHCI_CARD_PRESENT bit on. + * + * XXX Workaround for gpio-based card detect... + * + * We don't have gpio support yet. If there's a cd-gpios property just + * force the SDHCI_CARD_PRESENT bit on for now. If there isn't really a + * card there it will fail to probe at the mmc layer and nothing bad + * happens except instantiating a /dev/mmcN device for an empty slot. + */ + node = ofw_bus_get_node(dev); + if (OF_hasprop(node, "non-removable")) + sc->force_card_present = true; + else if (OF_hasprop(node, "cd-gpios")) { + /* XXX put real gpio hookup here. */ + sc->force_card_present = true; + } + bus_generic_probe(dev); bus_generic_attach(dev); diff --git a/sys/arm/freescale/vybrid/vf_anadig.c b/sys/arm/freescale/vybrid/vf_anadig.c index e5c563c..0d5fda8 100644 --- a/sys/arm/freescale/vybrid/vf_anadig.c +++ b/sys/arm/freescale/vybrid/vf_anadig.c @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> + * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com> * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -99,14 +99,19 @@ __FBSDID("$FreeBSD$"); #define CTRL_PLL_EN (1 << 13) #define EN_USB_CLKS (1 << 6) +#define PLL4_CTRL_DIV_SEL_S 0 +#define PLL4_CTRL_DIV_SEL_M 0x7f + struct anadig_softc { struct resource *res[1]; bus_space_tag_t bst; bus_space_handle_t bsh; }; +struct anadig_softc *anadig_sc; + static struct resource_spec anadig_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_MEMORY, 0, RF_ACTIVE }, { -1, 0 } }; @@ -148,6 +153,28 @@ enable_pll(struct anadig_softc *sc, int pll_ctrl) return (0); } +uint32_t +pll4_configure_output(uint32_t mfi, uint32_t mfn, uint32_t mfd) +{ + struct anadig_softc *sc; + int reg; + + sc = anadig_sc; + + /* + * PLLout = Fsys * (MFI+(MFN/MFD)) + */ + + reg = READ4(sc, ANADIG_PLL4_CTRL); + reg &= ~(PLL4_CTRL_DIV_SEL_M << PLL4_CTRL_DIV_SEL_S); + reg |= (mfi << PLL4_CTRL_DIV_SEL_S); + WRITE4(sc, ANADIG_PLL4_CTRL, reg); + WRITE4(sc, ANADIG_PLL4_NUM, mfn); + WRITE4(sc, ANADIG_PLL4_DENOM, mfd); + + return (0); +} + static int anadig_attach(device_t dev) { @@ -165,11 +192,13 @@ anadig_attach(device_t dev) sc->bst = rman_get_bustag(sc->res[0]); sc->bsh = rman_get_bushandle(sc->res[0]); + anadig_sc = sc; + /* Enable USB PLLs */ enable_pll(sc, ANADIG_PLL3_CTRL); enable_pll(sc, ANADIG_PLL7_CTRL); - /* Enable other */ + /* Enable other PLLs */ enable_pll(sc, ANADIG_PLL1_CTRL); enable_pll(sc, ANADIG_PLL2_CTRL); enable_pll(sc, ANADIG_PLL4_CTRL); diff --git a/sys/arm/freescale/vybrid/vf_common.h b/sys/arm/freescale/vybrid/vf_common.h index c1cba1b..44593be 100644 --- a/sys/arm/freescale/vybrid/vf_common.h +++ b/sys/arm/freescale/vybrid/vf_common.h @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> + * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com> * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -39,4 +39,5 @@ #define WRITE1(_sc, _reg, _val) \ bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val) +uint32_t pll4_configure_output(uint32_t mfi, uint32_t mfn, uint32_t mfd); uint32_t tcon_bypass(void); diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h index 9397678..7b52be1 100644 --- a/sys/arm/include/armreg.h +++ b/sys/arm/include/armreg.h @@ -403,6 +403,8 @@ #define FAULT_PERM_P 0x0f /* Permission -- Page */ #define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ +#define FAULT_EXTERNAL 0x400 /* External abort (armv6+) */ +#define FAULT_WNR 0x800 /* Write-not-Read access (armv6+) */ /* * Address of the vector page, low and high versions. diff --git a/sys/boot/fdt/dts/imx6.dtsi b/sys/boot/fdt/dts/imx6.dtsi index a1aeaf2..e46c55b 100644 --- a/sys/boot/fdt/dts/imx6.dtsi +++ b/sys/boot/fdt/dts/imx6.dtsi @@ -112,58 +112,75 @@ // status = "disabled"; // }; -// /* -// * GPIO modules moved up - to have it attached for -// * drivers which rely on GPIO -// */ -// gpio1: gpio@0209C000 { -// compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; -// reg = <0x0209C000 0x4000>; -// interrupt-parent = <&gic>; -// interrupts = <50 51 42 43 44 45 46 47 48 49>; -// /* TODO: use <> also */ -// gpio-controller; -// #gpio-cells = <2>; -// interrupt-controller; -// #interrupt-cells = <1>; -// status = "disabled"; -// }; -// -// gpio2: gpio@020A0000 { -// compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; -// reg = <0x020A0000 0x4000>; -// interrupt-parent = <&gic>; -// interrupts = <52 53>; -// gpio-controller; -// #gpio-cells = <2>; -// interrupt-controller; -// #interrupt-cells = <1>; -// status = "disabled"; -// }; -// -// gpio3: gpio@020A4000 { -// compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; -// reg = <0x020A4000 0x4000>; -// interrupt-parent = <&gic>; -// interrupts = <54 55>; -// gpio-controller; -// #gpio-cells = <2>; -// interrupt-controller; -// #interrupt-cells = <1>; -// status = "disabled"; -// }; -// -// gpio4: gpio@020A8000 { -// compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; -// reg = <0x020A8000 0x4000>; -// interrupt-parent = <&gic>; -// interrupts = <56 57>; -// gpio-controller; -// #gpio-cells = <2>; -// interrupt-controller; -// #interrupt-cells = <1>; -// status = "disabled"; -// }; + gpio1: gpio@0209c000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x0209c000 0x4000>; + interrupts = <0 66 0x04 0 67 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@020a0000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a0000 0x4000>; + interrupts = <0 68 0x04 0 69 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@020a4000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a4000 0x4000>; + interrupts = <0 70 0x04 0 71 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@020a8000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a8000 0x4000>; + interrupts = <0 72 0x04 0 73 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio5: gpio@020ac000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020ac000 0x4000>; + interrupts = <0 74 0x04 0 75 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio6: gpio@020b0000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020b0000 0x4000>; + interrupts = <0 76 0x04 0 77 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio7: gpio@020b4000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020b4000 0x4000>; + interrupts = <0 78 0x04 0 79 0x04>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; uart1: serial@02020000 { compatible = "fsl,imx6q-uart"; @@ -287,6 +304,7 @@ reg = <0x02190000 0x4000>; interrupt-parent = <&gic>; interrupts = <54>; + cd-gpios = <&gpio1 2 0>; bus-width = <0x4>; status ="disabled"; }; @@ -296,6 +314,7 @@ reg = <0x02194000 0x4000>; interrupt-parent = <&gic>; interrupts = <55>; + non-removable; bus-width = <0x4>; status ="disabled"; }; @@ -305,6 +324,7 @@ reg = <0x02198000 0x4000>; interrupt-parent = <&gic>; interrupts = <56>; + cd-gpios = <&gpio3 9 0>; bus-width = <0x4>; status ="disabled"; }; diff --git a/sys/boot/fdt/dts/wandboard-dual.dts b/sys/boot/fdt/dts/wandboard-dual.dts index 3ffdd69..65a88c4 100644 --- a/sys/boot/fdt/dts/wandboard-dual.dts +++ b/sys/boot/fdt/dts/wandboard-dual.dts @@ -67,8 +67,8 @@ usb@02184200 { status = "okay"; }; usb@02184400 { status = "disabled"; }; usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "disabled"; }; - usdhc@02194000 { status = "okay"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; usdhc@02198000 { status = "okay"; }; usdhc@0219c000 { status = "disabled"; }; }; diff --git a/sys/boot/fdt/dts/wandboard-quad.dts b/sys/boot/fdt/dts/wandboard-quad.dts index 9b447ac..71c5156 100644 --- a/sys/boot/fdt/dts/wandboard-quad.dts +++ b/sys/boot/fdt/dts/wandboard-quad.dts @@ -67,8 +67,8 @@ usb@02184200 { status = "okay"; }; usb@02184400 { status = "disabled"; }; usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "disabled"; }; - usdhc@02194000 { status = "okay"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; usdhc@02198000 { status = "okay"; }; usdhc@0219c000 { status = "disabled"; }; }; diff --git a/sys/boot/fdt/dts/wandboard-solo.dts b/sys/boot/fdt/dts/wandboard-solo.dts index 21e1ad8..70e05e0 100644 --- a/sys/boot/fdt/dts/wandboard-solo.dts +++ b/sys/boot/fdt/dts/wandboard-solo.dts @@ -67,8 +67,8 @@ usb@02184200 { status = "okay"; }; usb@02184400 { status = "disabled"; }; usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "disabled"; }; - usdhc@02194000 { status = "okay"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; usdhc@02198000 { status = "okay"; }; usdhc@0219c000 { status = "disabled"; }; }; diff --git a/sys/dev/sdhci/sdhci.h b/sys/dev/sdhci/sdhci.h index d136409..8ad2429 100644 --- a/sys/dev/sdhci/sdhci.h +++ b/sys/dev/sdhci/sdhci.h @@ -104,6 +104,7 @@ #define SDHCI_CMD_INHIBIT 0x00000001 #define SDHCI_DAT_INHIBIT 0x00000002 #define SDHCI_DAT_ACTIVE 0x00000004 +#define SDHCI_RETUNE_REQUEST 0x00000008 #define SDHCI_DOING_WRITE 0x00000100 #define SDHCI_DOING_READ 0x00000200 #define SDHCI_SPACE_AVAILABLE 0x00000400 @@ -112,8 +113,8 @@ #define SDHCI_CARD_STABLE 0x00020000 #define SDHCI_CARD_PIN 0x00040000 #define SDHCI_WRITE_PROTECT 0x00080000 -#define SDHCI_STATE_DAT 0x00700000 -#define SDHCI_STATE_CMD 0x00800000 +#define SDHCI_STATE_DAT_MASK 0x00f00000 +#define SDHCI_STATE_CMD 0x01000000 #define SDHCI_HOST_CONTROL 0x28 #define SDHCI_CTRL_LED 0x01 |