diff options
39 files changed, 2412 insertions, 3424 deletions
diff --git a/sys/conf/options b/sys/conf/options index 5ce34ee..64504fd 100644 --- a/sys/conf/options +++ b/sys/conf/options @@ -762,7 +762,7 @@ AH_WRITE_EEPROM opt_ah.h AH_PRIVATE_DIAG opt_ah.h AH_NEED_DESC_SWAP opt_ah.h AH_USE_INIPDGAIN opt_ah.h -AH_SUPPORT_11D opt_ah.h +AH_MAXCHAN opt_ah.h # options for the Marvell 8335 wireless driver MALO_DEBUG opt_malo.h diff --git a/sys/dev/ath/ath_hal/ah.c b/sys/dev/ath/ath_hal/ah.c index 668ace7..c1eac72 100644 --- a/sys/dev/ath/ath_hal/ah.c +++ b/sys/dev/ath/ath_hal/ah.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -78,6 +78,15 @@ ath_hal_attach(uint16_t devid, HAL_SOFTC sc, return AH_NULL; } +/* + * Return the mask of available modes based on the hardware capabilities. + */ +u_int +ath_hal_getwirelessmodes(struct ath_hal*ah) +{ + return ath_hal_getWirelessModes(ah); +} + /* linker set of registered RF backends */ OS_SET_DECLARE(ah_rfs, struct ath_hal_rf); @@ -152,8 +161,10 @@ ath_hal_computetxtime(struct ath_hal *ah, kbps = rates->info[rateix].rateKbps; /* * index can be invalid duting dynamic Turbo transitions. + * XXX */ - if(kbps == 0) return 0; + if (kbps == 0) + return 0; switch (rates->info[rateix].phy) { case IEEE80211_T_CCK: @@ -187,8 +198,8 @@ ath_hal_computetxtime(struct ath_hal *ah, #define OFDM_PLCP_BITS_QUARTER 22 #define OFDM_SYMBOL_TIME_QUARTER 16 - if (AH_PRIVATE(ah)->ah_curchan && - IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan)) { + if (AH_PRIVATE(ah)->ah_curchan != AH_NULL && + IEEE80211_IS_CHAN_QUARTER(AH_PRIVATE(ah)->ah_curchan)) { bitsPerSymbol = (kbps * OFDM_SYMBOL_TIME_QUARTER) / 1000; HALASSERT(bitsPerSymbol != 0); @@ -197,8 +208,8 @@ ath_hal_computetxtime(struct ath_hal *ah, txTime = OFDM_SIFS_TIME_QUARTER + OFDM_PREAMBLE_TIME_QUARTER + (numSymbols * OFDM_SYMBOL_TIME_QUARTER); - } else if (AH_PRIVATE(ah)->ah_curchan && - IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) { + } else if (AH_PRIVATE(ah)->ah_curchan != AH_NULL && + IEEE80211_IS_CHAN_HALF(AH_PRIVATE(ah)->ah_curchan)) { bitsPerSymbol = (kbps * OFDM_SYMBOL_TIME_HALF) / 1000; HALASSERT(bitsPerSymbol != 0); @@ -252,71 +263,6 @@ ath_hal_computetxtime(struct ath_hal *ah, return txTime; } -static __inline int -mapgsm(u_int freq, u_int flags) -{ - freq *= 10; - if (flags & CHANNEL_QUARTER) - freq += 5; - else if (flags & CHANNEL_HALF) - freq += 10; - else - freq += 20; - return (freq - 24220) / 5; -} - -static __inline int -mappsb(u_int freq, u_int flags) -{ - return ((freq * 10) + (((freq % 5) == 2) ? 5 : 0) - 49400) / 5; -} - -/* - * Convert GHz frequency to IEEE channel number. - */ -int -ath_hal_mhz2ieee(struct ath_hal *ah, u_int freq, u_int flags) -{ - if (flags & CHANNEL_2GHZ) { /* 2GHz band */ - if (freq == 2484) - return 14; - if (freq < 2484) { - if (ath_hal_isgsmsku(ah)) - return mapgsm(freq, flags); - return ((int)freq - 2407) / 5; - } else - return 15 + ((freq - 2512) / 20); - } else if (flags & CHANNEL_5GHZ) {/* 5Ghz band */ - if (ath_hal_ispublicsafetysku(ah) && - IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) { - return mappsb(freq, flags); - } else if ((flags & CHANNEL_A) && (freq <= 5000)) { - return (freq - 4000) / 5; - } else { - return (freq - 5000) / 5; - } - } else { /* either, guess */ - if (freq == 2484) - return 14; - if (freq < 2484) { - if (ath_hal_isgsmsku(ah)) - return mapgsm(freq, flags); - return ((int)freq - 2407) / 5; - } - if (freq < 5000) { - if (ath_hal_ispublicsafetysku(ah) && - IS_CHAN_IN_PUBLIC_SAFETY_BAND(freq)) { - return mappsb(freq, flags); - } else if (freq > 4900) { - return (freq - 4000) / 5; - } else { - return 15 + ((freq - 2512) / 20); - } - } - return (freq - 5000) / 5; - } -} - typedef enum { WIRELESS_MODE_11a = 0, WIRELESS_MODE_TURBO = 1, @@ -328,15 +274,15 @@ typedef enum { } WIRELESS_MODE; static WIRELESS_MODE -ath_hal_chan2wmode(struct ath_hal *ah, const HAL_CHANNEL *chan) +ath_hal_chan2wmode(struct ath_hal *ah, const struct ieee80211_channel *chan) { - if (IS_CHAN_CCK(chan)) + if (IEEE80211_IS_CHAN_B(chan)) return WIRELESS_MODE_11b; - if (IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_G(chan)) return WIRELESS_MODE_11g; - if (IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_108G(chan)) return WIRELESS_MODE_108g; - if (IS_CHAN_TURBO(chan)) + if (IEEE80211_IS_CHAN_TURBO(chan)) return WIRELESS_MODE_TURBO; return WIRELESS_MODE_11a; } @@ -350,17 +296,17 @@ static const uint8_t CLOCK_RATE[] = { 40, 80, 22, 44, 88 }; u_int ath_hal_mac_clks(struct ath_hal *ah, u_int usecs) { - const HAL_CHANNEL *c = (const HAL_CHANNEL *) AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *c = AH_PRIVATE(ah)->ah_curchan; u_int clks; /* NB: ah_curchan may be null when called attach time */ if (c != AH_NULL) { clks = usecs * CLOCK_RATE[ath_hal_chan2wmode(ah, c)]; - if (IS_CHAN_HT40(c)) + if (IEEE80211_IS_CHAN_HT40(c)) clks <<= 1; - else if (IS_CHAN_HALF_RATE(c)) + else if (IEEE80211_IS_CHAN_HALF(c)) clks >>= 1; - else if (IS_CHAN_QUARTER_RATE(c)) + else if (IEEE80211_IS_CHAN_QUARTER(c)) clks >>= 2; } else clks = usecs * CLOCK_RATE[WIRELESS_MODE_11b]; @@ -370,17 +316,17 @@ ath_hal_mac_clks(struct ath_hal *ah, u_int usecs) u_int ath_hal_mac_usec(struct ath_hal *ah, u_int clks) { - const HAL_CHANNEL *c = (const HAL_CHANNEL *) AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *c = AH_PRIVATE(ah)->ah_curchan; u_int usec; /* NB: ah_curchan may be null when called attach time */ if (c != AH_NULL) { usec = clks / CLOCK_RATE[ath_hal_chan2wmode(ah, c)]; - if (IS_CHAN_HT40(c)) + if (IEEE80211_IS_CHAN_HT40(c)) usec >>= 1; - else if (IS_CHAN_HALF_RATE(c)) + else if (IEEE80211_IS_CHAN_HALF(c)) usec <<= 1; - else if (IS_CHAN_QUARTER_RATE(c)) + else if (IEEE80211_IS_CHAN_QUARTER(c)) usec <<= 2; } else usec = clks / CLOCK_RATE[WIRELESS_MODE_11b]; @@ -505,11 +451,7 @@ ath_hal_getcapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, } return HAL_ENOTSUPP; case HAL_CAP_11D: -#ifdef AH_SUPPORT_11D return HAL_OK; -#else - return HAL_ENOTSUPP; -#endif case HAL_CAP_RXORN_FATAL: /* HAL_INT_RXORN treated as fatal */ return AH_PRIVATE(ah)->ah_rxornIsFatal ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_HT: @@ -764,7 +706,7 @@ static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93 }; * implement the ah_getChanNoise method. */ int16_t -ath_hal_getChanNoise(struct ath_hal *ah, HAL_CHANNEL *chan) +ath_hal_getChanNoise(struct ath_hal *ah, const struct ieee80211_channel *chan) { HAL_CHANNEL_INTERNAL *ichan; @@ -772,7 +714,7 @@ ath_hal_getChanNoise(struct ath_hal *ah, HAL_CHANNEL *chan) if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_NFCAL, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); return 0; } if (ichan->rawNoiseFloor == 0) { @@ -811,8 +753,8 @@ ath_hal_process_noisefloor(struct ath_hal *ah) c = &AH_PRIVATE(ah)->ah_channels[i]; if (c->rawNoiseFloor >= 0) continue; - mode = ath_hal_chan2wmode(ah, (HAL_CHANNEL *) c); - HALASSERT(mode < WIRELESS_MODE_MAX); + /* XXX can't identify proper mode */ + mode = IS_CHAN_5GHZ(c) ? WIRELESS_MODE_11a : WIRELESS_MODE_11g; nf = c->rawNoiseFloor + NOISE_FLOOR[mode] + ath_hal_getNfAdjust(ah, c); if (IS_CHAN_5GHZ(c)) { @@ -838,9 +780,8 @@ ath_hal_process_noisefloor(struct ath_hal *ah) /* Apply correction factor */ c->noiseFloorAdjust = ath_hal_getNfAdjust(ah, c) + (IS_CHAN_5GHZ(c) ? correct5 : correct2); - HALDEBUG(ah, HAL_DEBUG_NFCAL, "%u/0x%x raw nf %d adjust %d\n", - c->channel, c->channelFlags, c->rawNoiseFloor, - c->noiseFloorAdjust); + HALDEBUG(ah, HAL_DEBUG_NFCAL, "%u raw nf %d adjust %d\n", + c->channel, c->rawNoiseFloor, c->noiseFloorAdjust); } } diff --git a/sys/dev/ath/ath_hal/ah.h b/sys/dev/ath/ath_hal/ah.h index 52d6607..f39db8c 100644 --- a/sys/dev/ath/ath_hal/ah.h +++ b/sys/dev/ath/ath_hal/ah.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ah.h,v 1.15 2008/11/15 03:43:50 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AH_H_ @@ -63,6 +63,8 @@ typedef enum { HAL_ENOTSUPP = 13, /* Hardware revision not supported */ HAL_ESELFTEST = 14, /* Hardware self-test failed */ HAL_EINPROGRESS = 15, /* Operation incomplete */ + HAL_EEBADREG = 16, /* EEPROM invalid regulatory contents */ + HAL_EEBADCC = 17, /* EEPROM invalid country code */ } HAL_STATUS; typedef enum { @@ -362,64 +364,8 @@ typedef enum { HAL_RFGAIN_NEED_CHANGE = 2 } HAL_RFGAIN; -/* - * Channels are specified by frequency. - */ -typedef struct { - uint32_t channelFlags; /* see below */ - uint16_t channel; /* setting in Mhz */ - uint8_t privFlags; - int8_t maxRegTxPower; /* max regulatory tx power in dBm */ - int8_t maxTxPower; /* max true tx power in 0.5 dBm */ - int8_t minTxPower; /* min true tx power in 0.5 dBm */ -} HAL_CHANNEL; - -/* channelFlags */ -#define CHANNEL_CW_INT 0x00002 /* CW interference detected on channel */ -#define CHANNEL_TURBO 0x00010 /* Turbo Channel */ -#define CHANNEL_CCK 0x00020 /* CCK channel */ -#define CHANNEL_OFDM 0x00040 /* OFDM channel */ -#define CHANNEL_2GHZ 0x00080 /* 2 GHz spectrum channel */ -#define CHANNEL_5GHZ 0x00100 /* 5 GHz spectrum channel */ -#define CHANNEL_PASSIVE 0x00200 /* Only passive scan allowed in the channel */ -#define CHANNEL_DYN 0x00400 /* dynamic CCK-OFDM channel */ -#define CHANNEL_STURBO 0x02000 /* Static turbo, no 11a-only usage */ -#define CHANNEL_HALF 0x04000 /* Half rate channel */ -#define CHANNEL_QUARTER 0x08000 /* Quarter rate channel */ -#define CHANNEL_HT20 0x10000 /* 11n 20MHZ channel */ -#define CHANNEL_HT40PLUS 0x20000 /* 11n 40MHZ channel w/ ext chan above */ -#define CHANNEL_HT40MINUS 0x40000 /* 11n 40MHZ channel w/ ext chan below */ - -/* privFlags */ -#define CHANNEL_INTERFERENCE 0x01 /* Software use: channel interference - used for as AR as well as RADAR - interference detection */ -#define CHANNEL_DFS 0x02 /* DFS required on channel */ -#define CHANNEL_4MS_LIMIT 0x04 /* 4msec packet limit on this channel */ -#define CHANNEL_DFS_CLEAR 0x08 /* if channel has been checked for DFS */ - -#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) -#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) -#define CHANNEL_PUREG (CHANNEL_2GHZ|CHANNEL_OFDM) -#ifdef notdef -#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_DYN) -#else -#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) -#endif -#define CHANNEL_T (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_TURBO) -#define CHANNEL_ST (CHANNEL_T|CHANNEL_STURBO) -#define CHANNEL_108G (CHANNEL_2GHZ|CHANNEL_OFDM|CHANNEL_TURBO) -#define CHANNEL_108A CHANNEL_T -#define CHANNEL_G_HT20 (CHANNEL_G|CHANNEL_HT20) -#define CHANNEL_A_HT20 (CHANNEL_A|CHANNEL_HT20) -#define CHANNEL_G_HT40PLUS (CHANNEL_G|CHANNEL_HT40PLUS) -#define CHANNEL_G_HT40MINUS (CHANNEL_G|CHANNEL_HT40MINUS) -#define CHANNEL_A_HT40PLUS (CHANNEL_A|CHANNEL_HT40PLUS) -#define CHANNEL_A_HT40MINUS (CHANNEL_A|CHANNEL_HT40MINUS) -#define CHANNEL_ALL \ - (CHANNEL_OFDM | CHANNEL_CCK| CHANNEL_2GHZ | CHANNEL_5GHZ | \ - CHANNEL_TURBO | CHANNEL_HT20 | CHANNEL_HT40PLUS | CHANNEL_HT40MINUS) -#define CHANNEL_ALL_NOTURBO (CHANNEL_ALL &~ CHANNEL_TURBO) +typedef uint16_t HAL_CTRY_CODE; /* country code */ +typedef uint16_t HAL_REG_DOMAIN; /* regulatory domain code */ #define HAL_ANTENNA_MIN_MODE 0 #define HAL_ANTENNA_FIXED_A 1 @@ -434,14 +380,6 @@ typedef struct { uint32_t beacons; } HAL_MIB_STATS; -typedef uint16_t HAL_CTRY_CODE; /* country code */ -typedef uint16_t HAL_REG_DOMAIN; /* regulatory domain code */ - -enum { - CTRY_DEBUG = 0x1ff, /* debug country code */ - CTRY_DEFAULT = 0 /* default country code */ -}; - enum { HAL_MODE_11A = 0x001, /* 11a channels */ HAL_MODE_TURBO = 0x002, /* 11a turbo-only channels */ @@ -630,6 +568,7 @@ typedef struct { struct ath_desc; struct ath_tx_status; struct ath_rx_status; +struct ieee80211_channel; /* * Hardware Access Layer (HAL) API. @@ -665,16 +604,18 @@ struct ath_hal { /* Reset functions */ HAL_BOOL __ahdecl(*ah_reset)(struct ath_hal *, HAL_OPMODE, - HAL_CHANNEL *, HAL_BOOL bChannelChange, - HAL_STATUS *status); + struct ieee80211_channel *, + HAL_BOOL bChannelChange, HAL_STATUS *status); HAL_BOOL __ahdecl(*ah_phyDisable)(struct ath_hal *); HAL_BOOL __ahdecl(*ah_disable)(struct ath_hal *); void __ahdecl(*ah_setPCUConfig)(struct ath_hal *); - HAL_BOOL __ahdecl(*ah_perCalibration)(struct ath_hal*, HAL_CHANNEL *, - HAL_BOOL *); - HAL_BOOL __ahdecl(*ah_perCalibrationN)(struct ath_hal *, HAL_CHANNEL *, - u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); - HAL_BOOL __ahdecl(*ah_resetCalValid)(struct ath_hal *, HAL_CHANNEL *); + HAL_BOOL __ahdecl(*ah_perCalibration)(struct ath_hal*, + struct ieee80211_channel *, HAL_BOOL *); + HAL_BOOL __ahdecl(*ah_perCalibrationN)(struct ath_hal *, + struct ieee80211_channel *, u_int chainMask, + HAL_BOOL longCal, HAL_BOOL *isCalDone); + HAL_BOOL __ahdecl(*ah_resetCalValid)(struct ath_hal *, + const struct ieee80211_channel *); HAL_BOOL __ahdecl(*ah_setTxPowerLimit)(struct ath_hal *, uint32_t); /* Transmit functions */ @@ -735,7 +676,8 @@ struct ath_hal { struct ath_desc *next, uint64_t tsf, struct ath_rx_status *); void __ahdecl(*ah_rxMonitor)(struct ath_hal *, - const HAL_NODE_STATS *, HAL_CHANNEL *); + const HAL_NODE_STATS *, + const struct ieee80211_channel *); void __ahdecl(*ah_procMibEvent)(struct ath_hal *, const HAL_NODE_STATS *); @@ -804,7 +746,8 @@ struct ath_hal { HAL_BOOL __ahdecl(*ah_setPowerMode)(struct ath_hal*, HAL_POWER_MODE mode, int setChip); HAL_POWER_MODE __ahdecl(*ah_getPowerMode)(struct ath_hal*); - int16_t __ahdecl(*ah_getChanNoise)(struct ath_hal *, HAL_CHANNEL *); + int16_t __ahdecl(*ah_getChanNoise)(struct ath_hal *, + const struct ieee80211_channel *); /* Beacon Management Functions */ void __ahdecl(*ah_setBeaconTimers)(struct ath_hal*, @@ -847,53 +790,64 @@ extern struct ath_hal * __ahdecl ath_hal_attach(uint16_t devid, HAL_SOFTC, HAL_BUS_TAG, HAL_BUS_HANDLE, HAL_STATUS* status); /* - * Return a list of channels available for use with the hardware. - * The list is based on what the hardware is capable of, the specified - * country code, the modeSelect mask, and whether or not outdoor - * channels are to be permitted. + * Regulatory interfaces. Drivers should use ath_hal_init_channels to + * request a set of channels for a particular country code and/or + * regulatory domain. If CTRY_DEFAULT and SKU_NONE are specified then + * this list is constructed according to the contents of the EEPROM. + * ath_hal_getchannels acts similarly but does not alter the operating + * state; this can be used to collect information for a particular + * regulatory configuration. Finally ath_hal_set_channels installs a + * channel list constructed outside the driver. The HAL will adopt the + * channel list and setup internal state according to the specified + * regulatory configuration (e.g. conformance test limits). * - * The channel list is returned in the supplied array. maxchans - * defines the maximum size of this array. nchans contains the actual - * number of channels returned. If a problem occurred or there were - * no channels that met the criteria then AH_FALSE is returned. + * For all interfaces the channel list is returned in the supplied array. + * maxchans defines the maximum size of this array. nchans contains the + * actual number of channels returned. If a problem occurred then a + * status code != HAL_OK is returned. */ -extern HAL_BOOL __ahdecl ath_hal_init_channels(struct ath_hal *, - HAL_CHANNEL *chans, u_int maxchans, u_int *nchans, - uint8_t *regclassids, u_int maxregids, u_int *nregids, - HAL_CTRY_CODE cc, u_int modeSelect, - HAL_BOOL enableOutdoor, HAL_BOOL enableExtendedChannels); +struct ieee80211_channel; /* - * Calibrate noise floor data following a channel scan or similar. - * This must be called prior retrieving noise floor data. + * Return a list of channels according to the specified regulatory. */ -extern void __ahdecl ath_hal_process_noisefloor(struct ath_hal *ah); +extern HAL_STATUS __ahdecl ath_hal_getchannels(struct ath_hal *, + struct ieee80211_channel *chans, u_int maxchans, int *nchans, + u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, + HAL_BOOL enableExtendedChannels); /* - * Return bit mask of wireless modes supported by the hardware. + * Return a list of channels and install it as the current operating + * regulatory list. */ -extern u_int __ahdecl ath_hal_getwirelessmodes(struct ath_hal*, HAL_CTRY_CODE); +extern HAL_STATUS __ahdecl ath_hal_init_channels(struct ath_hal *, + struct ieee80211_channel *chans, u_int maxchans, int *nchans, + u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN rd, + HAL_BOOL enableExtendedChannels); /* - * Calculate the transmit duration of a frame. + * Install the list of channels as the current operating regulatory + * and setup related state according to the country code and sku. */ -extern uint16_t __ahdecl ath_hal_computetxtime(struct ath_hal *, - const HAL_RATE_TABLE *rates, uint32_t frameLen, - uint16_t rateix, HAL_BOOL shortPreamble); +extern HAL_STATUS __ahdecl ath_hal_set_channels(struct ath_hal *, + struct ieee80211_channel *chans, int nchans, + HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn); /* - * Return if device is public safety. + * Calibrate noise floor data following a channel scan or similar. + * This must be called prior retrieving noise floor data. */ -extern HAL_BOOL __ahdecl ath_hal_ispublicsafetysku(struct ath_hal *); +extern void __ahdecl ath_hal_process_noisefloor(struct ath_hal *ah); /* - * Return if device is operating in 900 MHz band. + * Return bit mask of wireless modes supported by the hardware. */ -extern HAL_BOOL ath_hal_isgsmsku(struct ath_hal *); +extern u_int __ahdecl ath_hal_getwirelessmodes(struct ath_hal*); /* - * Convert between IEEE channel number and channel frequency - * using the specified channel flags; e.g. CHANNEL_2GHZ. + * Calculate the transmit duration of a frame. */ -extern int __ahdecl ath_hal_mhz2ieee(struct ath_hal *, u_int mhz, u_int flags); +extern uint16_t __ahdecl ath_hal_computetxtime(struct ath_hal *, + const HAL_RATE_TABLE *rates, uint32_t frameLen, + uint16_t rateix, HAL_BOOL shortPreamble); #endif /* _ATH_AH_H_ */ diff --git a/sys/dev/ath/ath_hal/ah_internal.h b/sys/dev/ath/ath_hal/ah_internal.h index 9feb295..6f7a60a 100644 --- a/sys/dev/ath/ath_hal/ah_internal.h +++ b/sys/dev/ath/ath_hal/ah_internal.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -27,6 +27,8 @@ #define AH_MIN(a,b) ((a)<(b)?(a):(b)) #define AH_MAX(a,b) ((a)>(b)?(a):(b)) +#include <net80211/_ieee80211.h> + #ifndef NBBY #define NBBY 8 /* number of bits/byte */ #endif @@ -108,32 +110,44 @@ OS_DATA_SET(ah_rfs, _name##_rf) struct ath_hal_rf *ath_hal_rfprobe(struct ath_hal *ah, HAL_STATUS *ecode); /* - * Internal form of a HAL_CHANNEL. Note that the structure - * must be defined such that you can cast references to a - * HAL_CHANNEL so don't shuffle the first two members. + * Maximum number of internal channels. Entries are per unique + * frequency so this might be need to be increased to handle all + * usage cases; typically no more than 32 are really needed but + * dynamically allocating the data structures is a bit painful + * right now. + */ +#ifndef AH_MAXCHAN +#define AH_MAXCHAN 96 +#endif + +/* + * Internal per-channel state. These are found + * using ic_devdata in the ieee80211_channel. */ typedef struct { - uint32_t channelFlags; - uint16_t channel; /* NB: must be first for casting */ + uint16_t channel; /* h/w frequency, NB: may be mapped */ uint8_t privFlags; - int8_t maxRegTxPower; - int8_t maxTxPower; - int8_t minTxPower; /* as above... */ - - HAL_BOOL bssSendHere; - uint8_t gainI; - HAL_BOOL iqCalValid; - uint8_t calValid; /* bitmask of cal types */ +#define CHANNEL_IQVALID 0x01 /* IQ calibration valid */ +#define CHANNEL_ANI_INIT 0x02 /* ANI state initialized */ +#define CHANNEL_ANI_SETUP 0x04 /* ANI state setup */ + uint8_t calValid; /* bitmask of cal types */ int8_t iCoff; int8_t qCoff; int16_t rawNoiseFloor; int16_t noiseFloorAdjust; - int8_t antennaMax; - uint32_t regDmnFlags; /* Flags for channel use in reg */ - uint32_t conformanceTestLimit; /* conformance test limit from reg domain */ - uint16_t mainSpur; /* cached spur value for this cahnnel */ + uint16_t mainSpur; /* cached spur value for this channel */ } HAL_CHANNEL_INTERNAL; +/* channel requires noise floor check */ +#define CHANNEL_NFCREQUIRED IEEE80211_CHAN_PRIV0 + +/* all full-width channels */ +#define IEEE80211_CHAN_ALLFULL \ + (IEEE80211_CHAN_ALL - (IEEE80211_CHAN_HALF | IEEE80211_CHAN_QUARTER)) +#define IEEE80211_CHAN_ALLTURBOFULL \ + (IEEE80211_CHAN_ALLTURBO - \ + (IEEE80211_CHAN_HALF | IEEE80211_CHAN_QUARTER)) + typedef struct { uint32_t halChanSpreadSupport : 1, halSleepAfterBeaconBroken : 1, @@ -189,6 +203,8 @@ typedef struct { uint8_t halNumAntCfg5GHz; } HAL_CAPABILITIES; +struct regDomain; + /* * The ``private area'' follows immediately after the ``public area'' * in the data structure returned by ath_hal_attach. Private data are @@ -228,7 +244,7 @@ struct ath_hal_private { uint32_t gpio, uint32_t val); void (*ah_gpioSetIntr)(struct ath_hal*, u_int, uint32_t); HAL_BOOL (*ah_getChipPowerLimits)(struct ath_hal *, - HAL_CHANNEL *, uint32_t); + struct ieee80211_channel *); int16_t (*ah_getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL*); void (*ah_getNoiseFloor)(struct ath_hal *, @@ -255,8 +271,8 @@ struct ath_hal_private { uint16_t ah_analog5GhzRev; /* 2GHz radio revision */ uint16_t ah_analog2GhzRev; /* 5GHz radio revision */ - HAL_OPMODE ah_opmode; /* operating mode from reset */ + const struct ieee80211_channel *ah_curchan;/* operating channel */ HAL_CAPABILITIES ah_caps; /* device capabilities */ uint32_t ah_diagreg; /* user-specified AR_DIAG_SW */ int16_t ah_powerLimit; /* tx power cap */ @@ -267,14 +283,13 @@ struct ath_hal_private { /* * State for regulatory domain handling. */ - HAL_REG_DOMAIN ah_currentRD; /* Current regulatory domain */ - HAL_CTRY_CODE ah_countryCode; /* current country code */ - HAL_CHANNEL_INTERNAL ah_channels[256]; /* calculated channel list */ - u_int ah_nchan; /* valid channels in list */ - HAL_CHANNEL_INTERNAL *ah_curchan; /* current channel */ + HAL_REG_DOMAIN ah_currentRD; /* EEPROM regulatory domain */ + HAL_CHANNEL_INTERNAL ah_channels[AH_MAXCHAN]; /* private chan state */ + u_int ah_nchan; /* valid items in ah_channels */ + const struct regDomain *ah_rd2GHz; /* reg state for 2G band */ + const struct regDomain *ah_rd5GHz; /* reg state for 5G band */ uint8_t ah_coverageClass; /* coverage class */ - HAL_BOOL ah_regdomainUpdate; /* regdomain is updated? */ /* * RF Silent handling; setup according to the EEPROM. */ @@ -307,8 +322,8 @@ struct ath_hal_private { AH_PRIVATE(_ah)->ah_gpioGet(_ah, _gpio, _val) #define ath_hal_gpioSetIntr(_ah, _gpio, _ilevel) \ AH_PRIVATE(_ah)->ah_gpioSetIntr(_ah, _gpio, _ilevel) -#define ath_hal_getpowerlimits(_ah, _chans, _nchan) \ - AH_PRIVATE(_ah)->ah_getChipPowerLimits(_ah, _chans, _nchan) +#define ath_hal_getpowerlimits(_ah, _chan) \ + AH_PRIVATE(_ah)->ah_getChipPowerLimits(_ah, _chan) #define ath_hal_getNfAdjust(_ah, _c) \ AH_PRIVATE(_ah)->ah_getNfAdjust(_ah, _c) #define ath_hal_getNoiseFloor(_ah, _nfArray) \ @@ -327,38 +342,22 @@ struct ath_hal_private { #define ath_hal_eepromDiag(_ah, _request, _a, _asize, _r, _rsize) \ AH_PRIVATE(_ah)->ah_eepromDiag(_ah, _request, _a, _asize, _r, _rsize) -#if !defined(_NET_IF_IEEE80211_H_) && !defined(_NET80211__IEEE80211_H_) +#ifndef _NET_IF_IEEE80211_H_ /* * Stuff that would naturally come from _ieee80211.h */ #define IEEE80211_ADDR_LEN 6 -#define IEEE80211_WEP_KEYLEN 5 /* 40bit */ #define IEEE80211_WEP_IVLEN 3 /* 24bit */ #define IEEE80211_WEP_KIDLEN 1 /* 1 octet */ #define IEEE80211_WEP_CRCLEN 4 /* CRC-32 */ #define IEEE80211_CRC_LEN 4 -#define IEEE80211_MTU 1500 #define IEEE80211_MAX_LEN (2300 + IEEE80211_CRC_LEN + \ (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN + IEEE80211_WEP_CRCLEN)) - -enum { - IEEE80211_T_DS, /* direct sequence spread spectrum */ - IEEE80211_T_FH, /* frequency hopping */ - IEEE80211_T_OFDM, /* frequency division multiplexing */ - IEEE80211_T_TURBO, /* high rate DS */ - IEEE80211_T_HT, /* HT - full GI */ -}; -#define IEEE80211_T_CCK IEEE80211_T_DS /* more common nomenclatur */ #endif /* _NET_IF_IEEE80211_H_ */ -/* NB: these are defined privately until XR support is announced */ -enum { - ATHEROS_T_XR = IEEE80211_T_HT+1, /* extended range */ -}; - #define HAL_TXQ_USE_LOCKOUT_BKOFF_DIS 0x00000001 #define INIT_AIFS 2 @@ -411,43 +410,11 @@ typedef enum { #define HAL_BIN_WIDTH_TURBO_100HZ 6250 #define HAL_MAX_BINS_ALLOWED 28 -/* - * A = 5GHZ|OFDM - * T = 5GHZ|OFDM|TURBO - * - * IS_CHAN_A(T) will return TRUE. This is probably - * not the default behavior we want. We should migrate to a better mask -- - * perhaps CHANNEL_ALL. - * - * For now, IS_CHAN_G() masks itself with CHANNEL_108G. - * - */ - -#define IS_CHAN_A(_c) (((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) -#define IS_CHAN_B(_c) (((_c)->channelFlags & CHANNEL_B) == CHANNEL_B) -#define IS_CHAN_G(_c) (((_c)->channelFlags & (CHANNEL_108G|CHANNEL_G)) == CHANNEL_G) -#define IS_CHAN_108G(_c)(((_c)->channelFlags & CHANNEL_108G) == CHANNEL_108G) -#define IS_CHAN_T(_c) (((_c)->channelFlags & CHANNEL_T) == CHANNEL_T) -#define IS_CHAN_PUREG(_c) \ - (((_c)->channelFlags & CHANNEL_PUREG) == CHANNEL_PUREG) - -#define IS_CHAN_TURBO(_c) (((_c)->channelFlags & CHANNEL_TURBO) != 0) -#define IS_CHAN_CCK(_c) (((_c)->channelFlags & CHANNEL_CCK) != 0) -#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0) -#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0) -#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) -#define IS_CHAN_PASSIVE(_c) (((_c)->channelFlags & CHANNEL_PASSIVE) != 0) -#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) -#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) +#define IS_CHAN_5GHZ(_c) ((_c)->channel > 4900) +#define IS_CHAN_2GHZ(_c) (!IS_CHAN_5GHZ(_c)) #define IS_CHAN_IN_PUBLIC_SAFETY_BAND(_c) ((_c) > 4940 && (_c) < 4990) -#define CHANNEL_HT40 (CHANNEL_HT40PLUS | CHANNEL_HT40MINUS) -#define CHANNEL_HT (CHANNEL_HT20 | CHANNEL_HT40) -#define IS_CHAN_HT(_c) (((_c)->channelFlags & CHANNEL_HT) != 0) -#define IS_CHAN_HT20(_c) (((_c)->channelFlags & CHANNEL_HT) == CHANNEL_HT20) -#define IS_CHAN_HT40(_c) (((_c)->channelFlags & CHANNEL_HT40) != 0) - /* * Deduce if the host cpu has big- or litt-endian byte order. */ @@ -486,37 +453,6 @@ isBigEndian(void) #define OS_REG_CLR_BIT(_a, _r, _f) \ OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) &~ (_f)) -/* - * Regulatory domain support. - */ - -/* - * Return the max allowed antenna gain based on the current - * regulatory domain. - */ -extern u_int ath_hal_getantennareduction(struct ath_hal *, - HAL_CHANNEL *, u_int twiceGain); -/* - * Return the test group for the specific channel based on - * the current regulator domain. - */ -extern u_int ath_hal_getctl(struct ath_hal *, HAL_CHANNEL *); -/* - * Return whether or not a noise floor check is required - * based on the current regulatory domain for the specified - * channel. - */ -extern u_int ath_hal_getnfcheckrequired(struct ath_hal *, HAL_CHANNEL *); - -/* - * Map a public channel definition to the corresponding - * internal data structure. This implicitly specifies - * whether or not the specified channel is ok to use - * based on the current regulatory domain constraints. - */ -extern HAL_CHANNEL_INTERNAL *ath_hal_checkchannel(struct ath_hal *, - const HAL_CHANNEL *); - /* system-configurable parameters */ extern int ath_hal_dma_beacon_response_time; /* in TU's */ extern int ath_hal_sw_beacon_response_time; /* in TU's */ @@ -575,6 +511,57 @@ extern void ath_hal_assert_failed(const char* filename, #define HALASSERT(_x) #endif /* AH_ASSERT */ +/* + * Regulatory domain support. + */ + +/* + * Return the max allowed antenna gain and apply any regulatory + * domain specific changes. + */ +u_int ath_hal_getantennareduction(struct ath_hal *ah, + const struct ieee80211_channel *chan, u_int twiceGain); + +/* + * Return the test group for the specific channel based on + * the current regulatory setup. + */ +u_int ath_hal_getctl(struct ath_hal *, const struct ieee80211_channel *); + +/* + * Map a public channel definition to the corresponding + * internal data structure. This implicitly specifies + * whether or not the specified channel is ok to use + * based on the current regulatory domain constraints. + */ +#ifndef AH_DEBUG +static OS_INLINE HAL_CHANNEL_INTERNAL * +ath_hal_checkchannel(struct ath_hal *ah, const struct ieee80211_channel *c) +{ + HAL_CHANNEL_INTERNAL *cc; + + HALASSERT(c->ic_devdata < AH_PRIVATE(ah)->ah_nchan); + cc = &AH_PRIVATE(ah)->ah_channels[c->ic_devdata]; + HALASSERT(c->ic_freq == cc->channel || IEEE80211_IS_CHAN_GSM(c)); + return cc; +} +#else +/* NB: non-inline version that checks state */ +HAL_CHANNEL_INTERNAL *ath_hal_checkchannel(struct ath_hal *, + const struct ieee80211_channel *); +#endif /* AH_DEBUG */ + +/* + * Return the h/w frequency for a channel. This may be + * different from ic_freq if this is a GSM device that + * takes 2.4GHz frequencies and down-converts them. + */ +static OS_INLINE uint16_t +ath_hal_gethwchannel(struct ath_hal *ah, const struct ieee80211_channel *c) +{ + return ath_hal_checkchannel(ah, c)->channel; +} + /* * Convert between microseconds and core system clocks. */ @@ -733,7 +720,7 @@ extern void ath_hal_setupratetable(struct ath_hal *ah, HAL_RATE_TABLE *rt); /* * Common routine for implementing getChanNoise api. */ -extern int16_t ath_hal_getChanNoise(struct ath_hal *ah, HAL_CHANNEL *chan); +int16_t ath_hal_getChanNoise(struct ath_hal *, const struct ieee80211_channel *); /* * Initialization support. diff --git a/sys/dev/ath/ath_hal/ah_regdomain.c b/sys/dev/ath/ath_hal/ah_regdomain.c index 707626c..d01227f 100644 --- a/sys/dev/ath/ath_hal/ah_regdomain.c +++ b/sys/dev/ath/ath_hal/ah_regdomain.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2005-2006 Atheros Communications, Inc. * All rights reserved. * @@ -20,6 +20,10 @@ #include "opt_ah.h" #include "ah.h" + +#include <net80211/_ieee80211.h> +#include <net80211/ieee80211_regdomain.h> + #include "ah_internal.h" #include "ah_eeprom.h" #include "ah_devid.h" @@ -34,10 +38,6 @@ #define HAL_MODE_11A_TURBO HAL_MODE_108A #define HAL_MODE_11G_TURBO HAL_MODE_108G -/* 10MHz is half the 11A bandwidth used to determine upper edge freq - of the outdoor channel */ -#define HALF_MAXCHANBW 10 - /* * BMLEN defines the size of the bitmask used to hold frequency * band specifications. Note this must agree with the BM macro @@ -76,160 +76,6 @@ typedef uint64_t chanbmask_t[BMLEN]; W1(_fg) | W1(_fh) } /* - * Country/Region Codes - * Numbering from ISO 3166 - */ -enum { - CTRY_ALBANIA = 8, /* Albania */ - CTRY_ALGERIA = 12, /* Algeria */ - CTRY_ARGENTINA = 32, /* Argentina */ - CTRY_ARMENIA = 51, /* Armenia */ - CTRY_AUSTRALIA = 36, /* Australia */ - CTRY_AUSTRIA = 40, /* Austria */ - CTRY_AZERBAIJAN = 31, /* Azerbaijan */ - CTRY_BAHRAIN = 48, /* Bahrain */ - CTRY_BELARUS = 112, /* Belarus */ - CTRY_BELGIUM = 56, /* Belgium */ - CTRY_BELIZE = 84, /* Belize */ - CTRY_BOLIVIA = 68, /* Bolivia */ - CTRY_BRAZIL = 76, /* Brazil */ - CTRY_BRUNEI_DARUSSALAM = 96, /* Brunei Darussalam */ - CTRY_BULGARIA = 100, /* Bulgaria */ - CTRY_CANADA = 124, /* Canada */ - CTRY_CHILE = 152, /* Chile */ - CTRY_CHINA = 156, /* People's Republic of China */ - CTRY_COLOMBIA = 170, /* Colombia */ - CTRY_COSTA_RICA = 188, /* Costa Rica */ - CTRY_CROATIA = 191, /* Croatia */ - CTRY_CYPRUS = 196, - CTRY_CZECH = 203, /* Czech Republic */ - CTRY_DENMARK = 208, /* Denmark */ - CTRY_DOMINICAN_REPUBLIC = 214, /* Dominican Republic */ - CTRY_ECUADOR = 218, /* Ecuador */ - CTRY_EGYPT = 818, /* Egypt */ - CTRY_EL_SALVADOR = 222, /* El Salvador */ - CTRY_ESTONIA = 233, /* Estonia */ - CTRY_FAEROE_ISLANDS = 234, /* Faeroe Islands */ - CTRY_FINLAND = 246, /* Finland */ - CTRY_FRANCE = 250, /* France */ - CTRY_FRANCE2 = 255, /* France2 */ - CTRY_GEORGIA = 268, /* Georgia */ - CTRY_GERMANY = 276, /* Germany */ - CTRY_GREECE = 300, /* Greece */ - CTRY_GUATEMALA = 320, /* Guatemala */ - CTRY_HONDURAS = 340, /* Honduras */ - CTRY_HONG_KONG = 344, /* Hong Kong S.A.R., P.R.C. */ - CTRY_HUNGARY = 348, /* Hungary */ - CTRY_ICELAND = 352, /* Iceland */ - CTRY_INDIA = 356, /* India */ - CTRY_INDONESIA = 360, /* Indonesia */ - CTRY_IRAN = 364, /* Iran */ - CTRY_IRAQ = 368, /* Iraq */ - CTRY_IRELAND = 372, /* Ireland */ - CTRY_ISRAEL = 376, /* Israel */ - CTRY_ITALY = 380, /* Italy */ - CTRY_JAMAICA = 388, /* Jamaica */ - CTRY_JAPAN = 392, /* Japan */ - CTRY_JAPAN1 = 393, /* Japan (JP1) */ - CTRY_JAPAN2 = 394, /* Japan (JP0) */ - CTRY_JAPAN3 = 395, /* Japan (JP1-1) */ - CTRY_JAPAN4 = 396, /* Japan (JE1) */ - CTRY_JAPAN5 = 397, /* Japan (JE2) */ - CTRY_JAPAN6 = 399, /* Japan (JP6) */ - - CTRY_JAPAN7 = 4007, /* Japan (J7) */ - CTRY_JAPAN8 = 4008, /* Japan (J8) */ - CTRY_JAPAN9 = 4009, /* Japan (J9) */ - - CTRY_JAPAN10 = 4010, /* Japan (J10) */ - CTRY_JAPAN11 = 4011, /* Japan (J11) */ - CTRY_JAPAN12 = 4012, /* Japan (J12) */ - - CTRY_JAPAN13 = 4013, /* Japan (J13) */ - CTRY_JAPAN14 = 4014, /* Japan (J14) */ - CTRY_JAPAN15 = 4015, /* Japan (J15) */ - - CTRY_JAPAN16 = 4016, /* Japan (J16) */ - CTRY_JAPAN17 = 4017, /* Japan (J17) */ - CTRY_JAPAN18 = 4018, /* Japan (J18) */ - - CTRY_JAPAN19 = 4019, /* Japan (J19) */ - CTRY_JAPAN20 = 4020, /* Japan (J20) */ - CTRY_JAPAN21 = 4021, /* Japan (J21) */ - - CTRY_JAPAN22 = 4022, /* Japan (J22) */ - CTRY_JAPAN23 = 4023, /* Japan (J23) */ - CTRY_JAPAN24 = 4024, /* Japan (J24) */ - - CTRY_JORDAN = 400, /* Jordan */ - CTRY_KAZAKHSTAN = 398, /* Kazakhstan */ - CTRY_KENYA = 404, /* Kenya */ - CTRY_KOREA_NORTH = 408, /* North Korea */ - CTRY_KOREA_ROC = 410, /* South Korea */ - CTRY_KOREA_ROC2 = 411, /* South Korea */ - CTRY_KOREA_ROC3 = 412, /* South Korea */ - CTRY_KUWAIT = 414, /* Kuwait */ - CTRY_LATVIA = 428, /* Latvia */ - CTRY_LEBANON = 422, /* Lebanon */ - CTRY_LIBYA = 434, /* Libya */ - CTRY_LIECHTENSTEIN = 438, /* Liechtenstein */ - CTRY_LITHUANIA = 440, /* Lithuania */ - CTRY_LUXEMBOURG = 442, /* Luxembourg */ - CTRY_MACAU = 446, /* Macau */ - CTRY_MACEDONIA = 807, /* the Former Yugoslav Republic of Macedonia */ - CTRY_MALAYSIA = 458, /* Malaysia */ - CTRY_MALTA = 470, /* Malta */ - CTRY_MEXICO = 484, /* Mexico */ - CTRY_MONACO = 492, /* Principality of Monaco */ - CTRY_MOROCCO = 504, /* Morocco */ - CTRY_NETHERLANDS = 528, /* Netherlands */ - CTRY_NEW_ZEALAND = 554, /* New Zealand */ - CTRY_NICARAGUA = 558, /* Nicaragua */ - CTRY_NORWAY = 578, /* Norway */ - CTRY_OMAN = 512, /* Oman */ - CTRY_PAKISTAN = 586, /* Islamic Republic of Pakistan */ - CTRY_PANAMA = 591, /* Panama */ - CTRY_PARAGUAY = 600, /* Paraguay */ - CTRY_PERU = 604, /* Peru */ - CTRY_PHILIPPINES = 608, /* Republic of the Philippines */ - CTRY_POLAND = 616, /* Poland */ - CTRY_PORTUGAL = 620, /* Portugal */ - CTRY_PUERTO_RICO = 630, /* Puerto Rico */ - CTRY_QATAR = 634, /* Qatar */ - CTRY_ROMANIA = 642, /* Romania */ - CTRY_RUSSIA = 643, /* Russia */ - CTRY_SAUDI_ARABIA = 682, /* Saudi Arabia */ - CTRY_SINGAPORE = 702, /* Singapore */ - CTRY_SLOVAKIA = 703, /* Slovak Republic */ - CTRY_SLOVENIA = 705, /* Slovenia */ - CTRY_SOUTH_AFRICA = 710, /* South Africa */ - CTRY_SPAIN = 724, /* Spain */ - CTRY_SR9 = 5000, /* Ubiquiti SR9 (900MHz/GSM) */ - CTRY_SWEDEN = 752, /* Sweden */ - CTRY_SWITZERLAND = 756, /* Switzerland */ - CTRY_SYRIA = 760, /* Syria */ - CTRY_TAIWAN = 158, /* Taiwan */ - CTRY_THAILAND = 764, /* Thailand */ - CTRY_TRINIDAD_Y_TOBAGO = 780, /* Trinidad y Tobago */ - CTRY_TUNISIA = 788, /* Tunisia */ - CTRY_TURKEY = 792, /* Turkey */ - CTRY_UAE = 784, /* U.A.E. */ - CTRY_UKRAINE = 804, /* Ukraine */ - CTRY_UNITED_KINGDOM = 826, /* United Kingdom */ - CTRY_UNITED_STATES = 840, /* United States */ - CTRY_UNITED_STATES_FCC49 = 842, /* United States (Public Safety)*/ - CTRY_URUGUAY = 858, /* Uruguay */ - CTRY_UZBEKISTAN = 860, /* Uzbekistan */ - CTRY_VENEZUELA = 862, /* Venezuela */ - CTRY_VIET_NAM = 704, /* Viet Nam */ - CTRY_XR9 = 5001, /* Ubiquiti XR9 (900MHz/GSM) */ - CTRY_GZ901 = 5002, /* Zcomax GZ-901 (900MHz/GSM) */ - CTRY_YEMEN = 887, /* Yemen */ - CTRY_ZIMBABWE = 716 /* Zimbabwe */ -}; - - -/* * Mask to check whether a domain is a multidomain or a single domain */ #define MULTI_DOMAIN_MASK 0xFF00 @@ -299,9 +145,9 @@ enum { APL2_ETSIC = 0x56, /* Venezuela */ APL5_WORLD = 0x58, /* Chile */ APL6_WORLD = 0x5B, /* Singapore */ - APL7_FCCA = 0x5C, /* Taiwan 5.47 Band */ - APL8_WORLD = 0x5D, /* Malaysia 5GHz */ - APL9_WORLD = 0x5E, /* Korea 5GHz */ + APL7_FCCA = 0x5C, /* Taiwan 5.47 Band */ + APL8_WORLD = 0x5D, /* Malaysia 5GHz */ + APL9_WORLD = 0x5E, /* Korea 5GHz */ /* * World mode SKUs @@ -407,9 +253,6 @@ enum { NULL1 = 0x0198, WORLD = 0x0199, - SR9_WORLD = 0x0298, - XR9_WORLD = 0x0299, - GZ901_WORLD = 0x029a, DEBUG_REG_DMN = 0x01ff, }; @@ -429,12 +272,11 @@ enum { /* conformance test limits */ */ enum { NO_REQ = 0x00000000, /* NB: must be zero */ - DISALLOW_ADHOC_11A = 0x00000001, - DISALLOW_ADHOC_11A_TURB = 0x00000002, - NEED_NFC = 0x00000004, - ADHOC_PER_11D = 0x00000008, /* Start Ad-Hoc mode */ - ADHOC_NO_11A = 0x00000010, - LIMIT_FRAME_4MS = 0x00000020, /* 4msec limit on frame length*/ + DISALLOW_ADHOC_11A = 0x00000001, /* adhoc not allowed in 5GHz */ + DISALLOW_ADHOC_11A_TURB = 0x00000002, /* not allowed w/ 5GHz turbo */ + NEED_NFC = 0x00000004, /* need noise floor check */ + ADHOC_PER_11D = 0x00000008, /* must receive 11d beacon */ + LIMIT_FRAME_4MS = 0x00000020, /* 4msec tx burst limit */ NO_HOSTAP = 0x00000040, /* No HOSTAP mode opereation */ }; @@ -466,7 +308,7 @@ enum { * THE following table is the mapping of regdomain pairs specified by * an 8 bit regdomain value to the individual unitary reg domains */ -typedef struct { +typedef struct regDomainPair { HAL_REG_DOMAIN regDmnEnum; /* 16 bit reg domain pair */ HAL_REG_DOMAIN regDmn5GHz; /* 5GHz reg domain */ HAL_REG_DOMAIN regDmn2GHz; /* 2GHz reg domain */ @@ -486,44 +328,44 @@ typedef struct { } REG_DMN_PAIR_MAPPING; static REG_DMN_PAIR_MAPPING regDomainPairs[] = { - {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - - {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC4_FCCA, FCC4, FCCA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {FCC5_FCCB, FCC5, FCCB, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - - {ETSI1_WORLD, ETSI1, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {ETSI2_WORLD, ETSI2, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {ETSI3_WORLD, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {ETSI4_WORLD, ETSI4, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {ETSI5_WORLD, ETSI5, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {ETSI6_WORLD, ETSI6, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - - {ETSI3_ETSIA, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - - {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - - {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER, }, + {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + + {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC4_FCCA, FCC4, FCCA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC5_FCCB, FCC5, FCCB, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + + {ETSI1_WORLD, ETSI1, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {ETSI2_WORLD, ETSI2, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {ETSI3_WORLD, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {ETSI4_WORLD, ETSI4, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {ETSI5_WORLD, ETSI5, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {ETSI6_WORLD, ETSI6, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + + {ETSI3_ETSIA, ETSI3, WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + + {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + + {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, {MKK1_MKKA, MKK1, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA, CTRY_JAPAN }, {MKK1_MKKB, MKK1, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN1 }, @@ -536,19 +378,19 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { {MKK2_MKKA, MKK2, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN3 }, /* MKK3 */ - {MKK3_MKKA, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC , PSCAN_MKKA, 0 }, + {MKK3_MKKA, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC , PSCAN_MKKA, CTRY_DEFAULT }, {MKK3_MKKB, MKK3, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN7 }, - {MKK3_MKKA1, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, 0 }, + {MKK3_MKKA1, MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_DEFAULT }, {MKK3_MKKA2,MKK3, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN8 }, {MKK3_MKKC, MKK3, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, NO_PSCAN, CTRY_JAPAN9 }, - {MKK3_FCCA, MKK3, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, NO_PSCAN, 0 }, + {MKK3_FCCA, MKK3, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, NO_PSCAN, CTRY_DEFAULT }, /* MKK4 */ {MKK4_MKKB, MKK4, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN10 }, - {MKK4_MKKA1, MKK4, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, 0 }, + {MKK4_MKKA1, MKK4, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_DEFAULT }, {MKK4_MKKA2, MKK4, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 |PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 }, {MKK4_MKKC, MKK4, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN12 }, - {MKK4_FCCA, MKK4, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, 0 }, + {MKK4_FCCA, MKK4, FCCA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3, CTRY_DEFAULT }, /* MKK5 */ {MKK5_MKKB, MKK5, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN13 }, @@ -570,24 +412,21 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { {MKK8_MKKA2,MKK8, MKKA, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN23 }, {MKK8_MKKC, MKK8, MKKC, DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 , CTRY_JAPAN24 }, - {MKK9_MKKA, MKK9, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 0 }, - {MKK10_MKKA, MKK10, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, 0 }, + {MKK9_MKKA, MKK9, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_DEFAULT }, + {MKK10_MKKA, MKK10, MKKA, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_DEFAULT }, /* These are super domains */ - {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0 }, - {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {WORA_WORLD, WORA_WORLD, WORA_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, 0 }, - {SR9_WORLD, NULL1, SR9_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_SR9 }, - {XR9_WORLD, NULL1, XR9_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_XR9 }, - {GZ901_WORLD, NULL1, GZ901_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_GZ901 }, + {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, + {WORA_WORLD, WORA_WORLD, WORA_WORLD, DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT }, }; /* @@ -597,171 +436,152 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { */ #define DEF_REGDMN FCC1_FCCA -#define DEF_DMN_5 FCC1 -#define DEF_DMN_2 FCCA #define COUNTRY_ERD_FLAG 0x8000 #define WORLDWIDE_ROAMING_FLAG 0x4000 -#define SUPER_DOMAIN_MASK 0x0fff -#define COUNTRY_CODE_MASK 0x3fff - -#define YES AH_TRUE -#define NO AH_FALSE typedef struct { HAL_CTRY_CODE countryCode; HAL_REG_DOMAIN regDmnEnum; - HAL_BOOL allow11g; - HAL_BOOL allow11aTurbo; - HAL_BOOL allow11gTurbo; - HAL_BOOL allow11ng20; - HAL_BOOL allow11ng40; - HAL_BOOL allow11na20; - HAL_BOOL allow11na40; - uint16_t outdoorChanStart; } COUNTRY_CODE_TO_ENUM_RD; static COUNTRY_CODE_TO_ENUM_RD allCountries[] = { - {CTRY_DEBUG, NO_ENUMRD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_DEFAULT, DEF_REGDMN, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_ALBANIA, NULL1_WORLD, YES, NO, YES, YES, NO, NO, NO, 7000 }, - {CTRY_ALGERIA, NULL1_WORLD, YES, NO, YES, YES, NO, NO, NO, 7000 }, - {CTRY_ARGENTINA, APL3_WORLD, NO, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_ARMENIA, ETSI4_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_AUSTRALIA, FCC2_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_AUSTRIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_AZERBAIJAN, ETSI4_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_BAHRAIN, APL6_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_BELARUS, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_BELGIUM, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_BELIZE, APL1_ETSIC, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_BOLIVIA, APL1_ETSIC, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_BRAZIL, FCC3_WORLD, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_BRUNEI_DARUSSALAM,APL1_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_BULGARIA, ETSI6_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_CANADA, FCC2_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_CHILE, APL6_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_CHINA, APL1_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_COLOMBIA, FCC1_FCCA, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_COSTA_RICA, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_CROATIA, ETSI3_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_CYPRUS, ETSI1_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_CZECH, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_DENMARK, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_DOMINICAN_REPUBLIC,FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_ECUADOR, NULL1_WORLD, NO, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_EGYPT, ETSI3_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_EL_SALVADOR, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_ESTONIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_FINLAND, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_FRANCE, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_FRANCE2, ETSI3_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_GEORGIA, ETSI4_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_GERMANY, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_GREECE, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_GUATEMALA, FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_GZ901, GZ901_WORLD, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_HONDURAS, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_HONG_KONG, FCC2_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_HUNGARY, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_ICELAND, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_INDIA, APL6_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_INDONESIA, APL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_IRAN, APL1_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_IRELAND, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_ISRAEL, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_ITALY, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_JAPAN, MKK1_MKKA, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_JAPAN1, MKK1_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN2, MKK1_FCCA, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN3, MKK2_MKKA, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN4, MKK1_MKKA1, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN5, MKK1_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN6, MKK1_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN7, MKK3_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN8, MKK3_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN9, MKK3_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN10, MKK4_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN11, MKK4_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN12, MKK4_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN13, MKK5_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN14, MKK5_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN15, MKK5_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN16, MKK6_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN17, MKK6_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN18, MKK6_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN19, MKK7_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN20, MKK7_MKKA2, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_JAPAN21, MKK7_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JAPAN22, MKK8_MKKB, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN23, MKK8_MKKA2, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN24, MKK8_MKKC, YES, NO, NO, NO, NO, NO, NO, 7000 }, - - {CTRY_JORDAN, APL4_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_KAZAKHSTAN, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_KOREA_NORTH, APL2_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_KOREA_ROC, APL2_WORLD, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_KOREA_ROC2, APL2_WORLD, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_KOREA_ROC3, APL9_WORLD, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_KUWAIT, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_LATVIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_LEBANON, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_LIECHTENSTEIN,ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_LITHUANIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_LUXEMBOURG, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_MACAU, FCC2_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_MACEDONIA, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_MALAYSIA, APL8_WORLD, YES, NO, NO, YES, NO, YES, NO, 7000 }, - {CTRY_MALTA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_MEXICO, FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_MONACO, ETSI4_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_MOROCCO, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_NETHERLANDS, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_NEW_ZEALAND, FCC2_ETSIC, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_NORWAY, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_OMAN, APL6_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_PAKISTAN, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_PANAMA, FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_PERU, APL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_PHILIPPINES, FCC3_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_POLAND, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_PORTUGAL, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_PUERTO_RICO, FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_QATAR, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_ROMANIA, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_RUSSIA, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_SAUDI_ARABIA,FCC2_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_SINGAPORE, APL6_WORLD, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SLOVAKIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SLOVENIA, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SOUTH_AFRICA,FCC3_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_SPAIN, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SR9, SR9_WORLD, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_SWEDEN, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SWITZERLAND, ETSI1_WORLD, YES, NO, YES, YES,YES, YES,YES, 7000 }, - {CTRY_SYRIA, NULL1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_TAIWAN, APL3_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_THAILAND, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_TRINIDAD_Y_TOBAGO,ETSI4_WORLD,YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_TUNISIA, ETSI3_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_TURKEY, ETSI3_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_UKRAINE, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_UAE, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_UNITED_KINGDOM, ETSI1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_UNITED_STATES, FCC1_FCCA, YES, YES, YES, YES,YES, YES,YES, 5825 }, - {CTRY_UNITED_STATES_FCC49,FCC4_FCCA,YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_URUGUAY, FCC1_WORLD, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_UZBEKISTAN, FCC3_FCCA, YES, YES, YES, YES,YES, YES,YES, 7000 }, - {CTRY_VENEZUELA, APL2_ETSIC, YES, NO, YES, YES,YES, YES, NO, 7000 }, - {CTRY_VIET_NAM, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_XR9, XR9_WORLD, YES, NO, NO, NO, NO, NO, NO, 7000 }, - {CTRY_YEMEN, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 }, - {CTRY_ZIMBABWE, NULL1_WORLD, YES, NO, YES, YES,YES, NO, NO, 7000 } + { CTRY_DEBUG, NO_ENUMRD }, + { CTRY_DEFAULT, DEF_REGDMN }, + { CTRY_ALBANIA, NULL1_WORLD }, + { CTRY_ALGERIA, NULL1_WORLD }, + { CTRY_ARGENTINA, APL3_WORLD }, + { CTRY_ARMENIA, ETSI4_WORLD }, + { CTRY_AUSTRALIA, FCC2_WORLD }, + { CTRY_AUSTRIA, ETSI1_WORLD }, + { CTRY_AZERBAIJAN, ETSI4_WORLD }, + { CTRY_BAHRAIN, APL6_WORLD }, + { CTRY_BELARUS, NULL1_WORLD }, + { CTRY_BELGIUM, ETSI1_WORLD }, + { CTRY_BELIZE, APL1_ETSIC }, + { CTRY_BOLIVIA, APL1_ETSIC }, + { CTRY_BRAZIL, FCC3_WORLD }, + { CTRY_BRUNEI_DARUSSALAM,APL1_WORLD }, + { CTRY_BULGARIA, ETSI6_WORLD }, + { CTRY_CANADA, FCC2_FCCA }, + { CTRY_CHILE, APL6_WORLD }, + { CTRY_CHINA, APL1_WORLD }, + { CTRY_COLOMBIA, FCC1_FCCA }, + { CTRY_COSTA_RICA, NULL1_WORLD }, + { CTRY_CROATIA, ETSI3_WORLD }, + { CTRY_CYPRUS, ETSI1_WORLD }, + { CTRY_CZECH, ETSI1_WORLD }, + { CTRY_DENMARK, ETSI1_WORLD }, + { CTRY_DOMINICAN_REPUBLIC,FCC1_FCCA }, + { CTRY_ECUADOR, NULL1_WORLD }, + { CTRY_EGYPT, ETSI3_WORLD }, + { CTRY_EL_SALVADOR, NULL1_WORLD }, + { CTRY_ESTONIA, ETSI1_WORLD }, + { CTRY_FINLAND, ETSI1_WORLD }, + { CTRY_FRANCE, ETSI1_WORLD }, + { CTRY_FRANCE2, ETSI3_WORLD }, + { CTRY_GEORGIA, ETSI4_WORLD }, + { CTRY_GERMANY, ETSI1_WORLD }, + { CTRY_GREECE, ETSI1_WORLD }, + { CTRY_GUATEMALA, FCC1_FCCA }, + { CTRY_HONDURAS, NULL1_WORLD }, + { CTRY_HONG_KONG, FCC2_WORLD }, + { CTRY_HUNGARY, ETSI1_WORLD }, + { CTRY_ICELAND, ETSI1_WORLD }, + { CTRY_INDIA, APL6_WORLD }, + { CTRY_INDONESIA, APL1_WORLD }, + { CTRY_IRAN, APL1_WORLD }, + { CTRY_IRELAND, ETSI1_WORLD }, + { CTRY_ISRAEL, NULL1_WORLD }, + { CTRY_ITALY, ETSI1_WORLD }, + { CTRY_JAPAN, MKK1_MKKA }, + { CTRY_JAPAN1, MKK1_MKKB }, + { CTRY_JAPAN2, MKK1_FCCA }, + { CTRY_JAPAN3, MKK2_MKKA }, + { CTRY_JAPAN4, MKK1_MKKA1 }, + { CTRY_JAPAN5, MKK1_MKKA2 }, + { CTRY_JAPAN6, MKK1_MKKC }, + + { CTRY_JAPAN7, MKK3_MKKB }, + { CTRY_JAPAN8, MKK3_MKKA2 }, + { CTRY_JAPAN9, MKK3_MKKC }, + + { CTRY_JAPAN10, MKK4_MKKB }, + { CTRY_JAPAN11, MKK4_MKKA2 }, + { CTRY_JAPAN12, MKK4_MKKC }, + + { CTRY_JAPAN13, MKK5_MKKB }, + { CTRY_JAPAN14, MKK5_MKKA2 }, + { CTRY_JAPAN15, MKK5_MKKC }, + + { CTRY_JAPAN16, MKK6_MKKB }, + { CTRY_JAPAN17, MKK6_MKKA2 }, + { CTRY_JAPAN18, MKK6_MKKC }, + + { CTRY_JAPAN19, MKK7_MKKB }, + { CTRY_JAPAN20, MKK7_MKKA2 }, + { CTRY_JAPAN21, MKK7_MKKC }, + + { CTRY_JAPAN22, MKK8_MKKB }, + { CTRY_JAPAN23, MKK8_MKKA2 }, + { CTRY_JAPAN24, MKK8_MKKC }, + + { CTRY_JORDAN, APL4_WORLD }, + { CTRY_KAZAKHSTAN, NULL1_WORLD }, + { CTRY_KOREA_NORTH, APL2_WORLD }, + { CTRY_KOREA_ROC, APL2_WORLD }, + { CTRY_KOREA_ROC2, APL2_WORLD }, + { CTRY_KOREA_ROC3, APL9_WORLD }, + { CTRY_KUWAIT, NULL1_WORLD }, + { CTRY_LATVIA, ETSI1_WORLD }, + { CTRY_LEBANON, NULL1_WORLD }, + { CTRY_LIECHTENSTEIN,ETSI1_WORLD }, + { CTRY_LITHUANIA, ETSI1_WORLD }, + { CTRY_LUXEMBOURG, ETSI1_WORLD }, + { CTRY_MACAU, FCC2_WORLD }, + { CTRY_MACEDONIA, NULL1_WORLD }, + { CTRY_MALAYSIA, APL8_WORLD }, + { CTRY_MALTA, ETSI1_WORLD }, + { CTRY_MEXICO, FCC1_FCCA }, + { CTRY_MONACO, ETSI4_WORLD }, + { CTRY_MOROCCO, NULL1_WORLD }, + { CTRY_NETHERLANDS, ETSI1_WORLD }, + { CTRY_NEW_ZEALAND, FCC2_ETSIC }, + { CTRY_NORWAY, ETSI1_WORLD }, + { CTRY_OMAN, APL6_WORLD }, + { CTRY_PAKISTAN, NULL1_WORLD }, + { CTRY_PANAMA, FCC1_FCCA }, + { CTRY_PERU, APL1_WORLD }, + { CTRY_PHILIPPINES, FCC3_WORLD }, + { CTRY_POLAND, ETSI1_WORLD }, + { CTRY_PORTUGAL, ETSI1_WORLD }, + { CTRY_PUERTO_RICO, FCC1_FCCA }, + { CTRY_QATAR, NULL1_WORLD }, + { CTRY_ROMANIA, NULL1_WORLD }, + { CTRY_RUSSIA, NULL1_WORLD }, + { CTRY_SAUDI_ARABIA,FCC2_WORLD }, + { CTRY_SINGAPORE, APL6_WORLD }, + { CTRY_SLOVAKIA, ETSI1_WORLD }, + { CTRY_SLOVENIA, ETSI1_WORLD }, + { CTRY_SOUTH_AFRICA,FCC3_WORLD }, + { CTRY_SPAIN, ETSI1_WORLD }, + { CTRY_SWEDEN, ETSI1_WORLD }, + { CTRY_SWITZERLAND, ETSI1_WORLD }, + { CTRY_SYRIA, NULL1_WORLD }, + { CTRY_TAIWAN, APL3_FCCA }, + { CTRY_THAILAND, NULL1_WORLD }, + { CTRY_TRINIDAD_Y_TOBAGO,ETSI4_WORLD }, + { CTRY_TUNISIA, ETSI3_WORLD }, + { CTRY_TURKEY, ETSI3_WORLD }, + { CTRY_UKRAINE, NULL1_WORLD }, + { CTRY_UAE, NULL1_WORLD }, + { CTRY_UNITED_KINGDOM, ETSI1_WORLD }, + { CTRY_UNITED_STATES, FCC1_FCCA }, + { CTRY_UNITED_STATES_FCC49,FCC4_FCCA }, + { CTRY_URUGUAY, FCC1_WORLD }, + { CTRY_UZBEKISTAN, FCC3_FCCA }, + { CTRY_VENEZUELA, APL2_ETSIC }, + { CTRY_VIET_NAM, NULL1_WORLD }, + { CTRY_ZIMBABWE, NULL1_WORLD } }; /* Bit masks for DFS per regdomain */ @@ -800,136 +620,134 @@ typedef struct { if corresponding bit is set */ uint64_t usePassScan; /* Use Passive Scan in the RegDomain if corresponding bit is set */ - uint8_t regClassId; /* Regulatory class id */ } REG_DMN_FREQ_BAND; /* * 5GHz 11A channel tags */ static REG_DMN_FREQ_BAND regDmn5GhzFreq[] = { - { 4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16 }, + { 4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 }, #define F1_4915_4925 0 - { 4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16 }, + { 4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 }, #define F1_4935_4945 AFTER(F1_4915_4925) - { 4920, 4980, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 7 }, + { 4920, 4980, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2 }, #define F1_4920_4980 AFTER(F1_4935_4945) - { 4942, 4987, 27, 6, 5, 5, NO_DFS, PSCAN_FCC, 0 }, + { 4942, 4987, 27, 6, 5, 5, NO_DFS, PSCAN_FCC }, #define F1_4942_4987 AFTER(F1_4920_4980) - { 4945, 4985, 30, 6, 10, 5, NO_DFS, PSCAN_FCC, 0 }, + { 4945, 4985, 30, 6, 10, 5, NO_DFS, PSCAN_FCC }, #define F1_4945_4985 AFTER(F1_4942_4987) - { 4950, 4980, 33, 6, 20, 5, NO_DFS, PSCAN_FCC, 0 }, + { 4950, 4980, 33, 6, 20, 5, NO_DFS, PSCAN_FCC }, #define F1_4950_4980 AFTER(F1_4945_4985) - { 5035, 5040, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12 }, + { 5035, 5040, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 }, #define F1_5035_5040 AFTER(F1_4950_4980) - { 5040, 5080, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 2 }, + { 5040, 5080, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2 }, #define F1_5040_5080 AFTER(F1_5035_5040) - { 5055, 5055, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12 }, + { 5055, 5055, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 }, #define F1_5055_5055 AFTER(F1_5040_5080) - { 5120, 5240, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5120, 5240, 5, 6, 20, 20, NO_DFS, NO_PSCAN }, #define F1_5120_5240 AFTER(F1_5055_5055) - { 5120, 5240, 5, 6, 10, 10, NO_DFS, NO_PSCAN, 0 }, + { 5120, 5240, 5, 6, 10, 10, NO_DFS, NO_PSCAN }, #define F2_5120_5240 AFTER(F1_5120_5240) - { 5120, 5240, 5, 6, 5, 5, NO_DFS, NO_PSCAN, 0 }, + { 5120, 5240, 5, 6, 5, 5, NO_DFS, NO_PSCAN }, #define F3_5120_5240 AFTER(F2_5120_5240) - { 5170, 5230, 23, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1 }, + { 5170, 5230, 23, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2 }, #define F1_5170_5230 AFTER(F3_5120_5240) - { 5170, 5230, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1 }, + { 5170, 5230, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2 }, #define F2_5170_5230 AFTER(F1_5170_5230) - { 5180, 5240, 15, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5180, 5240, 15, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI }, #define F1_5180_5240 AFTER(F2_5170_5230) - { 5180, 5240, 17, 6, 20, 20, NO_DFS, PSCAN_FCC, 1 }, + { 5180, 5240, 17, 6, 20, 20, NO_DFS, PSCAN_FCC }, #define F2_5180_5240 AFTER(F1_5180_5240) - { 5180, 5240, 18, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5180, 5240, 18, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI }, #define F3_5180_5240 AFTER(F2_5180_5240) - { 5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI }, #define F4_5180_5240 AFTER(F3_5180_5240) - { 5180, 5240, 23, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5180, 5240, 23, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI }, #define F5_5180_5240 AFTER(F4_5180_5240) - { 5180, 5240, 23, 6, 20, 20, NO_DFS, PSCAN_FCC, 0 }, + { 5180, 5240, 23, 6, 20, 20, NO_DFS, PSCAN_FCC }, #define F6_5180_5240 AFTER(F5_5180_5240) - { 5180, 5240, 17, 6, 20, 10, NO_DFS, PSCAN_FCC, 1 }, + { 5180, 5240, 17, 6, 20, 10, NO_DFS, PSCAN_FCC }, #define F7_5180_5240 AFTER(F6_5180_5240) - { 5180, 5240, 17, 6, 20, 5, NO_DFS, PSCAN_FCC, 1 }, + { 5180, 5240, 17, 6, 20, 5, NO_DFS, PSCAN_FCC }, #define F8_5180_5240 AFTER(F7_5180_5240) + { 5180, 5320, 20, 6, 20, 20, DFS_ETSI, PSCAN_ETSI }, - { 5180, 5320, 20, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0 }, #define F1_5180_5320 AFTER(F8_5180_5240) + { 5240, 5280, 23, 0, 20, 20, DFS_FCC3, PSCAN_FCC | PSCAN_ETSI }, - { 5240, 5280, 23, 0, 20, 20, DFS_FCC3, PSCAN_FCC | PSCAN_ETSI, 0 }, #define F1_5240_5280 AFTER(F1_5180_5320) + { 5260, 5280, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI }, - { 5260, 5280, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI, 0 }, #define F1_5260_5280 AFTER(F1_5240_5280) + { 5260, 5320, 18, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI }, - { 5260, 5320, 18, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI, 0 }, #define F1_5260_5320 AFTER(F1_5260_5280) - - { 5260, 5320, 20, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, PSCAN_FCC | PSCAN_ETSI | PSCAN_MKK3 , 0 }, + { 5260, 5320, 20, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, PSCAN_FCC | PSCAN_ETSI | PSCAN_MKK3 }, #define F2_5260_5320 AFTER(F1_5260_5320) - { 5260, 5320, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2 }, + { 5260, 5320, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F3_5260_5320 AFTER(F2_5260_5320) - { 5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2 }, + { 5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F4_5260_5320 AFTER(F3_5260_5320) - { 5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0 }, + { 5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F5_5260_5320 AFTER(F4_5260_5320) - { 5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN }, #define F6_5260_5320 AFTER(F5_5260_5320) - { 5260, 5320, 23, 6, 20, 10, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2 }, + { 5260, 5320, 23, 6, 20, 10, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F7_5260_5320 AFTER(F6_5260_5320) - { 5260, 5320, 23, 6, 20, 5, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2 }, + { 5260, 5320, 23, 6, 20, 5, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F8_5260_5320 AFTER(F7_5260_5320) - { 5260, 5700, 5, 6, 20, 20, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0 }, + { 5260, 5700, 5, 6, 20, 20, DFS_FCC3 | DFS_ETSI, NO_PSCAN }, #define F1_5260_5700 AFTER(F8_5260_5320) - { 5260, 5700, 5, 6, 10, 10, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0 }, + { 5260, 5700, 5, 6, 10, 10, DFS_FCC3 | DFS_ETSI, NO_PSCAN }, #define F2_5260_5700 AFTER(F1_5260_5700) - { 5260, 5700, 5, 6, 5, 5, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0 }, + { 5260, 5700, 5, 6, 5, 5, DFS_FCC3 | DFS_ETSI, NO_PSCAN }, #define F3_5260_5700 AFTER(F2_5260_5700) - { 5280, 5320, 17, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0 }, + { 5280, 5320, 17, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F1_5280_5320 AFTER(F3_5260_5700) - { 5500, 5620, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0 }, + { 5500, 5620, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI }, #define F1_5500_5620 AFTER(F1_5280_5320) - { 5500, 5700, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 4 }, + { 5500, 5700, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC }, #define F1_5500_5700 AFTER(F1_5500_5620) - { 5500, 5700, 27, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5500, 5700, 27, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI }, #define F2_5500_5700 AFTER(F1_5500_5700) - { 5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI, 0 }, + { 5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC | PSCAN_ETSI }, #define F3_5500_5700 AFTER(F2_5500_5700) - { 5500, 5700, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, PSCAN_MKK3 | PSCAN_FCC, 0 }, + { 5500, 5700, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4, PSCAN_MKK3 | PSCAN_FCC }, #define F4_5500_5700 AFTER(F3_5500_5700) - { 5745, 5805, 23, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5805, 23, 0, 20, 20, NO_DFS, NO_PSCAN }, #define F1_5745_5805 AFTER(F4_5500_5700) - { 5745, 5805, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5805, 30, 6, 20, 20, NO_DFS, NO_PSCAN }, #define F2_5745_5805 AFTER(F1_5745_5805) - { 5745, 5805, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0 }, + { 5745, 5805, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI }, #define F3_5745_5805 AFTER(F2_5745_5805) - { 5745, 5825, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 5, 6, 20, 20, NO_DFS, NO_PSCAN }, #define F1_5745_5825 AFTER(F3_5745_5805) - { 5745, 5825, 17, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 17, 0, 20, 20, NO_DFS, NO_PSCAN }, #define F2_5745_5825 AFTER(F1_5745_5825) - { 5745, 5825, 20, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 20, 0, 20, 20, NO_DFS, NO_PSCAN }, #define F3_5745_5825 AFTER(F2_5745_5825) - { 5745, 5825, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 30, 0, 20, 20, NO_DFS, NO_PSCAN }, #define F4_5745_5825 AFTER(F3_5745_5825) - { 5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 3 }, + { 5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN }, #define F5_5745_5825 AFTER(F4_5745_5825) - { 5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN }, #define F6_5745_5825 AFTER(F5_5745_5825) - { 5745, 5825, 5, 6, 10, 10, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 5, 6, 10, 10, NO_DFS, NO_PSCAN }, #define F7_5745_5825 AFTER(F6_5745_5825) - { 5745, 5825, 5, 6, 5, 5, NO_DFS, NO_PSCAN, 0 }, + { 5745, 5825, 5, 6, 5, 5, NO_DFS, NO_PSCAN }, #define F8_5745_5825 AFTER(F7_5745_5825) - { 5745, 5825, 30, 6, 20, 10, NO_DFS, NO_PSCAN, 3 }, + { 5745, 5825, 30, 6, 20, 10, NO_DFS, NO_PSCAN }, #define F9_5745_5825 AFTER(F8_5745_5825) - { 5745, 5825, 30, 6, 20, 5, NO_DFS, NO_PSCAN, 3 }, + { 5745, 5825, 30, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F10_5745_5825 AFTER(F9_5745_5825) /* @@ -937,25 +755,25 @@ static REG_DMN_FREQ_BAND regDmn5GhzFreq[] = { * All WWR domains have no power limit, instead use the card's CTL * or max power settings. */ - { 4920, 4980, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0 }, + { 4920, 4980, 30, 0, 20, 20, NO_DFS, PSCAN_WWR }, #define W1_4920_4980 AFTER(F10_5745_5825) - { 5040, 5080, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0 }, + { 5040, 5080, 30, 0, 20, 20, NO_DFS, PSCAN_WWR }, #define W1_5040_5080 AFTER(W1_4920_4980) - { 5170, 5230, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0 }, + { 5170, 5230, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define W1_5170_5230 AFTER(W1_5040_5080) - { 5180, 5240, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0 }, + { 5180, 5240, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define W1_5180_5240 AFTER(W1_5170_5230) - { 5260, 5320, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0 }, + { 5260, 5320, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define W1_5260_5320 AFTER(W1_5180_5240) - { 5745, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0 }, + { 5745, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR }, #define W1_5745_5825 AFTER(W1_5260_5320) - { 5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0 }, + { 5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define W1_5500_5700 AFTER(W1_5745_5825) - { 5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN }, #define W2_5260_5320 AFTER(W1_5500_5700) - { 5180, 5240, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0 }, + { 5180, 5240, 30, 0, 20, 20, NO_DFS, NO_PSCAN }, #define W2_5180_5240 AFTER(W2_5260_5320) - { 5825, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0 }, + { 5825, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR }, #define W2_5825_5825 AFTER(W2_5180_5240) }; @@ -963,66 +781,66 @@ static REG_DMN_FREQ_BAND regDmn5GhzFreq[] = { * 5GHz Turbo (dynamic & static) tags */ static REG_DMN_FREQ_BAND regDmn5GhzTurboFreq[] = { - { 5130, 5210, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5130, 5210, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5130_5210 0 - { 5250, 5330, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0}, + { 5250, 5330, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN }, #define T1_5250_5330 AFTER(T1_5130_5210) - { 5370, 5490, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5370, 5490, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5370_5490 AFTER(T1_5250_5330) - { 5530, 5650, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0}, + { 5530, 5650, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN }, #define T1_5530_5650 AFTER(T1_5370_5490) - { 5150, 5190, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5150, 5190, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5150_5190 AFTER(T1_5530_5650) - { 5230, 5310, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0}, + { 5230, 5310, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN }, #define T1_5230_5310 AFTER(T1_5150_5190) - { 5350, 5470, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5350, 5470, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5350_5470 AFTER(T1_5230_5310) - { 5510, 5670, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0}, + { 5510, 5670, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN }, #define T1_5510_5670 AFTER(T1_5350_5470) - { 5200, 5240, 17, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5200, 5240, 17, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5200_5240 AFTER(T1_5510_5670) - { 5200, 5240, 23, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5200, 5240, 23, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T2_5200_5240 AFTER(T1_5200_5240) - { 5210, 5210, 17, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5210, 5210, 17, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5210_5210 AFTER(T2_5200_5240) - { 5210, 5210, 23, 0, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5210, 5210, 23, 0, 40, 40, NO_DFS, NO_PSCAN }, #define T2_5210_5210 AFTER(T1_5210_5210) - { 5280, 5280, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5280, 5280, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T1_5280_5280 AFTER(T2_5210_5210) - { 5280, 5280, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5280, 5280, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T2_5280_5280 AFTER(T1_5280_5280) - { 5250, 5250, 17, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5250, 5250, 17, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T1_5250_5250 AFTER(T2_5280_5280) - { 5290, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5290, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T1_5290_5290 AFTER(T1_5250_5250) - { 5250, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5250, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T1_5250_5290 AFTER(T1_5290_5290) - { 5250, 5290, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5250, 5290, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T2_5250_5290 AFTER(T1_5250_5290) - { 5540, 5660, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0}, + { 5540, 5660, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T }, #define T1_5540_5660 AFTER(T2_5250_5290) - { 5760, 5800, 20, 0, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5760, 5800, 20, 0, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5760_5800 AFTER(T1_5540_5660) - { 5760, 5800, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5760, 5800, 30, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T2_5760_5800 AFTER(T1_5760_5800) - { 5765, 5805, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 5765, 5805, 30, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_5765_5805 AFTER(T2_5760_5800) /* * Below are the WWR frequencies */ - { 5210, 5250, 15, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0}, + { 5210, 5250, 15, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define WT1_5210_5250 AFTER(T1_5765_5805) - { 5290, 5290, 18, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0}, + { 5290, 5290, 18, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define WT1_5290_5290 AFTER(WT1_5210_5250) - { 5540, 5660, 20, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0}, + { 5540, 5660, 20, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR }, #define WT1_5540_5660 AFTER(WT1_5290_5290) - { 5760, 5800, 20, 0, 40, 40, NO_DFS, PSCAN_WWR, 0}, + { 5760, 5800, 20, 0, 40, 40, NO_DFS, PSCAN_WWR }, #define WT1_5760_5800 AFTER(WT1_5540_5660) }; @@ -1030,67 +848,67 @@ static REG_DMN_FREQ_BAND regDmn5GhzTurboFreq[] = { * 2GHz 11b channel tags */ static REG_DMN_FREQ_BAND regDmn2GhzFreq[] = { - { 2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2312_2372 0 - { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define F2_2312_2372 AFTER(F1_2312_2372) - { 2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2412_2472 AFTER(F2_2312_2372) - { 2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0}, + { 2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA }, #define F2_2412_2472 AFTER(F1_2412_2472) - { 2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN }, #define F3_2412_2472 AFTER(F2_2412_2472) - { 2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2412_2462 AFTER(F3_2412_2472) - { 2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0}, + { 2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA }, #define F2_2412_2462 AFTER(F1_2412_2462) - { 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2432_2442 AFTER(F2_2412_2462) - { 2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2457_2472 AFTER(F1_2432_2442) - { 2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0}, + { 2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA }, #define F1_2467_2472 AFTER(F1_2457_2472) - { 2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2484_2484 AFTER(F1_2467_2472) - { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2, 0}, + { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2 }, #define F2_2484_2484 AFTER(F1_2484_2484) - { 2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define F1_2512_2732 AFTER(F2_2484_2484) /* * WWR have powers opened up to 20dBm. * Limits should often come from CTL/Max powers */ - { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2312_2372 AFTER(F1_2512_2732) - { 2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2412_2412 AFTER(W1_2312_2372) - { 2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2417_2432 AFTER(W1_2412_2412) - { 2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2437_2442 AFTER(W1_2417_2432) - { 2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2447_2457 AFTER(W1_2437_2442) - { 2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define W1_2462_2462 AFTER(W1_2447_2457) - { 2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, + { 2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN }, #define W1_2467_2467 AFTER(W1_2462_2462) - { 2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, + { 2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN }, #define W2_2467_2467 AFTER(W1_2467_2467) - { 2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, + { 2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN }, #define W1_2472_2472 AFTER(W2_2467_2467) - { 2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, + { 2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN }, #define W2_2472_2472 AFTER(W1_2472_2472) - { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, + { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN }, #define W1_2484_2484 AFTER(W2_2472_2472) - { 2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, + { 2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN }, #define W2_2484_2484 AFTER(W1_2484_2484) }; @@ -1098,112 +916,89 @@ static REG_DMN_FREQ_BAND regDmn2GhzFreq[] = { * 2GHz 11g channel tags */ static REG_DMN_FREQ_BAND regDmn2Ghz11gFreq[] = { - { 2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2312_2372 0 - { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define G2_2312_2372 AFTER(G1_2312_2372) - { 2312, 2372, 5, 6, 10, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 5, 6, 10, 5, NO_DFS, NO_PSCAN }, #define G3_2312_2372 AFTER(G2_2312_2372) - { 2312, 2372, 5, 6, 5, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 5, 6, 5, 5, NO_DFS, NO_PSCAN }, #define G4_2312_2372 AFTER(G3_2312_2372) - { 2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2412_2472 AFTER(G4_2312_2372) - { 2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0}, + { 2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G }, #define G2_2412_2472 AFTER(G1_2412_2472) - { 2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN }, #define G3_2412_2472 AFTER(G2_2412_2472) - { 2412, 2472, 5, 6, 10, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 5, 6, 10, 5, NO_DFS, NO_PSCAN }, #define G4_2412_2472 AFTER(G3_2412_2472) - { 2412, 2472, 5, 6, 5, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2472, 5, 6, 5, 5, NO_DFS, NO_PSCAN }, #define G5_2412_2472 AFTER(G4_2412_2472) - { 2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2412_2462 AFTER(G5_2412_2472) - { 2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0}, + { 2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G }, #define G2_2412_2462 AFTER(G1_2412_2462) - { 2412, 2462, 27, 6, 10, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2462, 27, 6, 10, 5, NO_DFS, NO_PSCAN }, #define G3_2412_2462 AFTER(G2_2412_2462) - { 2412, 2462, 27, 6, 5, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2462, 27, 6, 5, 5, NO_DFS, NO_PSCAN }, #define G4_2412_2462 AFTER(G3_2412_2462) - { 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2432_2442 AFTER(G4_2412_2462) - { 2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2457_2472 AFTER(G1_2432_2442) - { 2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN }, #define G1_2512_2732 AFTER(G1_2457_2472) - { 2512, 2732, 5, 6, 10, 5, NO_DFS, NO_PSCAN, 0}, + { 2512, 2732, 5, 6, 10, 5, NO_DFS, NO_PSCAN }, #define G2_2512_2732 AFTER(G1_2512_2732) - { 2512, 2732, 5, 6, 5, 5, NO_DFS, NO_PSCAN, 0}, + { 2512, 2732, 5, 6, 5, 5, NO_DFS, NO_PSCAN }, #define G3_2512_2732 AFTER(G2_2512_2732) - { 2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0 }, + { 2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA }, #define G1_2467_2472 AFTER(G3_2512_2732) /* * WWR open up the power to 20dBm */ - { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2312_2372 AFTER(G1_2467_2472) - { 2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2412_2412 AFTER(WG1_2312_2372) - { 2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2417_2432 AFTER(WG1_2412_2412) - { 2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2437_2442 AFTER(WG1_2417_2432) - { 2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2447_2457 AFTER(WG1_2437_2442) - { 2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0}, + { 2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN }, #define WG1_2462_2462 AFTER(WG1_2447_2457) - { 2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, + { 2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN }, #define WG1_2467_2467 AFTER(WG1_2462_2462) - { 2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, + { 2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN }, #define WG2_2467_2467 AFTER(WG1_2467_2467) - { 2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0}, + { 2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN }, #define WG1_2472_2472 AFTER(WG2_2467_2467) - { 2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0}, + { 2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN }, #define WG2_2472_2472 AFTER(WG1_2472_2472) - - /* - * Mapping for 900MHz cards like Ubiquiti SR9 and XR9 - * and ZComax GZ-901. - */ - { 2422, 2437, 30, 0, 5, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_907_922_5 AFTER(WG2_2472_2472) - { 2422, 2437, 30, 0, 10, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_907_922_10 AFTER(S1_907_922_5) - { 2427, 2432, 30, 0, 20, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_912_917 AFTER(S1_907_922_10) - { 2427, 2442, 30, 0, 5, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S2_907_922_5 AFTER(S1_912_917) - { 2427, 2442, 30, 0, 10, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S2_907_922_10 AFTER(S2_907_922_5) - { 2432, 2437, 30, 0, 20, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S2_912_917 AFTER(S2_907_922_10) - { 2452, 2467, 30, 0, 5, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_908_923_5 AFTER(S2_912_917) - { 2457, 2467, 30, 0, 10, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_913_918_10 AFTER(S1_908_923_5) - { 2457, 2467, 30, 0, 20, 5, NO_DFS, PSCAN_FCC, 0 }, -#define S1_913_918 AFTER(S1_913_918_10) }; /* * 2GHz Dynamic turbo tags */ static REG_DMN_FREQ_BAND regDmn2Ghz11gTurboFreq[] = { - { 2312, 2372, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 2312, 2372, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_2312_2372 0 - { 2437, 2437, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 2437, 2437, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_2437_2437 AFTER(T1_2312_2372) - { 2437, 2437, 20, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 2437, 2437, 20, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T2_2437_2437 AFTER(T1_2437_2437) - { 2437, 2437, 18, 6, 40, 40, NO_DFS, PSCAN_WWR, 0}, + { 2437, 2437, 18, 6, 40, 40, NO_DFS, PSCAN_WWR }, #define T3_2437_2437 AFTER(T2_2437_2437) - { 2512, 2732, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0}, + { 2512, 2732, 5, 6, 40, 40, NO_DFS, NO_PSCAN }, #define T1_2512_2732 AFTER(T3_2437_2437) }; @@ -1231,18 +1026,9 @@ static REG_DOMAIN regDomains[] = { {.regDmnEnum = DEBUG_REG_DMN, .conformanceTestLimit = FCC, .dfsMask = DFS_FCC3, - .chan11a = BM4(F1_4950_4980, - F1_5120_5240, - F1_5260_5700, - F1_5745_5825), - .chan11a_half = BM4(F1_4945_4985, - F2_5120_5240, - F2_5260_5700, - F7_5745_5825), - .chan11a_quarter = BM4(F1_4942_4987, - F3_5120_5240, - F3_5260_5700, - F8_5745_5825), + .chan11a = BM3(F1_5120_5240, F1_5260_5700, F1_5745_5825), + .chan11a_half = BM3(F2_5120_5240, F2_5260_5700, F7_5745_5825), + .chan11a_quarter = BM3(F3_5120_5240, F3_5260_5700, F8_5745_5825), .chan11a_turbo = BM8(T1_5130_5210, T1_5250_5330, T1_5370_5490, @@ -1419,7 +1205,7 @@ static REG_DOMAIN regDomains[] = { .pscan = PSCAN_MKK2, .flags = DISALLOW_ADHOC_11A_TURB, .chan11a = BM3(F1_4920_4980, F1_5040_5080, F1_5170_5230), - .chan11a_half = BM4(F1_4915_4925, + .chan11a_half = BM4(F1_4915_4925, F1_4935_4945, F1_5035_5040, F1_5055_5055), @@ -1704,7 +1490,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM5(W1_5260_5320, W1_5180_5240, W1_5170_5230, @@ -1732,7 +1518,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM5(W1_5260_5320, W1_5180_5240, W1_5170_5230, @@ -1790,7 +1576,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM4(W2_5260_5320, W2_5180_5240, F2_5745_5805, @@ -1814,7 +1600,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM3(W1_5260_5320, W2_5180_5240, F6_5745_5825), .chan11b = BM7(W1_2412_2412, W1_2437_2442, @@ -1836,7 +1622,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM4(W1_5260_5320, W1_5180_5240, W1_5745_5825, @@ -1860,7 +1646,7 @@ static REG_DOMAIN regDomains[] = { .conformanceTestLimit = NO_CTL, .dfsMask = DFS_FCC3 | DFS_ETSI, .pscan = PSCAN_WWR, - .flags = ADHOC_NO_11A, + .flags = DISALLOW_ADHOC_11A, .chan11a = BM4(W1_5260_5320, W1_5180_5240, W1_5745_5825, @@ -1881,30 +1667,6 @@ static REG_DOMAIN regDomains[] = { WG1_2467_2467), .chan11g_turbo = BM1(T3_2437_2437)}, - {.regDmnEnum = SR9_WORLD, - .conformanceTestLimit = NO_CTL, - .pscan = PSCAN_FCC | PSCAN_FCC_T, - .chan11g = BM1(S1_912_917), - .chan11g_half = BM1(S1_907_922_10), - .chan11g_quarter = BM1(S1_907_922_5), - }, - - {.regDmnEnum = XR9_WORLD, - .conformanceTestLimit = NO_CTL, - .pscan = PSCAN_FCC | PSCAN_FCC_T, - .chan11g = BM1(S2_912_917), - .chan11g_half = BM1(S2_907_922_10), - .chan11g_quarter = BM1(S2_907_922_5), - }, - - {.regDmnEnum = GZ901_WORLD, - .conformanceTestLimit = NO_CTL, - .pscan = PSCAN_FCC | PSCAN_FCC_T, - .chan11g = BM1(S1_913_918), - .chan11g_half = BM1(S1_913_918_10), - .chan11g_quarter = BM1(S1_908_923_5), - }, - {.regDmnEnum = NULL1, .conformanceTestLimit = NO_CTL, } @@ -1916,44 +1678,33 @@ struct cmode { }; static const struct cmode modes[] = { - { HAL_MODE_TURBO, CHANNEL_ST}, /* NB: 11a Static Turbo */ - { HAL_MODE_11A, CHANNEL_A}, - { HAL_MODE_11B, CHANNEL_B}, - { HAL_MODE_11G, CHANNEL_G}, - { HAL_MODE_11G_TURBO, CHANNEL_108G}, - { HAL_MODE_11A_TURBO, CHANNEL_108A}, - { HAL_MODE_11A_QUARTER_RATE, CHANNEL_A | CHANNEL_QUARTER}, - { HAL_MODE_11A_HALF_RATE, CHANNEL_A | CHANNEL_HALF}, - { HAL_MODE_11G_QUARTER_RATE, CHANNEL_G | CHANNEL_QUARTER}, - { HAL_MODE_11G_HALF_RATE, CHANNEL_G | CHANNEL_HALF}, - { HAL_MODE_11NG_HT20, CHANNEL_G_HT20}, - { HAL_MODE_11NG_HT40PLUS, CHANNEL_G_HT40PLUS}, - { HAL_MODE_11NG_HT40MINUS, CHANNEL_G_HT40MINUS}, - { HAL_MODE_11NA_HT20, CHANNEL_A_HT20}, - { HAL_MODE_11NA_HT40PLUS, CHANNEL_A_HT40PLUS}, - { HAL_MODE_11NA_HT40MINUS, CHANNEL_A_HT40MINUS}, + { HAL_MODE_TURBO, IEEE80211_CHAN_ST }, + { HAL_MODE_11A, IEEE80211_CHAN_A }, + { HAL_MODE_11B, IEEE80211_CHAN_B }, + { HAL_MODE_11G, IEEE80211_CHAN_G }, + { HAL_MODE_11G_TURBO, IEEE80211_CHAN_108G }, + { HAL_MODE_11A_TURBO, IEEE80211_CHAN_108A }, + { HAL_MODE_11A_QUARTER_RATE, + IEEE80211_CHAN_A | IEEE80211_CHAN_QUARTER }, + { HAL_MODE_11A_HALF_RATE, + IEEE80211_CHAN_A | IEEE80211_CHAN_HALF }, + { HAL_MODE_11G_QUARTER_RATE, + IEEE80211_CHAN_G | IEEE80211_CHAN_QUARTER }, + { HAL_MODE_11G_HALF_RATE, + IEEE80211_CHAN_G | IEEE80211_CHAN_HALF }, + { HAL_MODE_11NG_HT20, IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_HT20 }, + { HAL_MODE_11NG_HT40PLUS, + IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_HT40U }, + { HAL_MODE_11NG_HT40MINUS, + IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_HT40D }, + { HAL_MODE_11NA_HT20, IEEE80211_CHAN_5GHZ | IEEE80211_CHAN_HT20 }, + { HAL_MODE_11NA_HT40PLUS, + IEEE80211_CHAN_5GHZ | IEEE80211_CHAN_HT40U }, + { HAL_MODE_11NA_HT40MINUS, + IEEE80211_CHAN_5GHZ | IEEE80211_CHAN_HT40D }, }; -static int -chansort(const void *a, const void *b) -{ -#define CHAN_FLAGS (CHANNEL_ALL|CHANNEL_HALF|CHANNEL_QUARTER) - const HAL_CHANNEL_INTERNAL *ca = a; - const HAL_CHANNEL_INTERNAL *cb = b; - - return (ca->channel == cb->channel) ? - (ca->channelFlags & CHAN_FLAGS) - - (cb->channelFlags & CHAN_FLAGS) : - ca->channel - cb->channel; -#undef CHAN_FLAGS -} -typedef int ath_hal_cmp_t(const void *, const void *); -static void ath_hal_sort(void *a, size_t n, size_t es, ath_hal_cmp_t *cmp); -static COUNTRY_CODE_TO_ENUM_RD* findCountry(HAL_CTRY_CODE countryCode); -static HAL_BOOL getWmRD(struct ath_hal *ah, COUNTRY_CODE_TO_ENUM_RD *country, uint16_t channelFlag, REG_DOMAIN *rd); - - -static uint16_t +static OS_INLINE uint16_t getEepromRD(struct ath_hal *ah) { return AH_PRIVATE(ah)->ah_currentRD &~ WORLDWIDE_ROAMING_FLAG; @@ -2001,220 +1752,45 @@ isEepromValid(struct ath_hal *ah) } /* - * Returns whether or not the specified country code - * is allowed by the EEPROM setting - */ -static HAL_BOOL -isCountryCodeValid(struct ath_hal *ah, HAL_CTRY_CODE cc) -{ - uint16_t rd; - - /* Default setting requires no checks */ - if (cc == CTRY_DEFAULT) - return AH_TRUE; -#ifdef AH_DEBUG_COUNTRY - if (cc == CTRY_DEBUG) - return AH_TRUE; -#endif - rd = getEepromRD(ah); - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: EEPROM regdomain 0x%x\n", - __func__, rd); - - if (rd & COUNTRY_ERD_FLAG) { - /* EEP setting is a country - config shall match */ - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: EEPROM setting is country code %u\n", __func__, - rd &~ COUNTRY_ERD_FLAG); - return (cc == (rd & ~COUNTRY_ERD_FLAG)); - } else if (rd == DEBUG_REG_DMN || rd == NO_ENUMRD) { - /* Set to Debug or AllowAnyCountry mode - allow any setting */ - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: rd %d allowed\n", - __func__, rd); - return AH_TRUE; -#ifdef AH_SUPPORT_11D - } else if ((rd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX) { - int i; - for (i=0; i < N(allCountries); i++) { - if (cc == allCountries[i].countryCode) - return AH_TRUE; - } -#endif - } else { - int i; - for (i = 0; i < N(allCountries); i++) { - if (cc == allCountries[i].countryCode && - allCountries[i].regDmnEnum == rd) - return AH_TRUE; - } - } - return AH_FALSE; -} - -/* - * Return the mask of available modes based on the hardware - * capabilities and the specified country code and reg domain. - */ -static u_int -ath_hal_getwmodesnreg(struct ath_hal *ah, - const COUNTRY_CODE_TO_ENUM_RD *country, const REG_DOMAIN *rd5GHz) -{ -#define HAL_MODE_11G_ALL \ - (HAL_MODE_11G | HAL_MODE_11G_TURBO | HAL_MODE_11G_QUARTER_RATE | \ - HAL_MODE_11G_HALF_RATE) -#define HAL_MODE_11A_ALL \ - (HAL_MODE_11A | HAL_MODE_11A_TURBO | HAL_MODE_TURBO | \ - HAL_MODE_11A_QUARTER_RATE | HAL_MODE_11A_HALF_RATE) - u_int modesAvail; - - /* Get modes that HW is capable of */ - modesAvail = ath_hal_getWirelessModes(ah); - - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: wireless modes 0x%x cc %u rd %u\n", - __func__, modesAvail, country->countryCode, country->regDmnEnum); - - /* Check country regulations for allowed modes */ - if (!country->allow11g && (modesAvail & HAL_MODE_11G_ALL)) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow all 11g\n", __func__); - modesAvail &= ~HAL_MODE_11G_ALL; - } - if (isChanBitMaskZero(rd5GHz->chan11a) && - (modesAvail & HAL_MODE_11A_ALL)) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow all 11a\n", __func__); - modesAvail &= ~HAL_MODE_11A_ALL; - } - if ((modesAvail & (HAL_MODE_11A_TURBO | HAL_MODE_TURBO)) && - !country->allow11aTurbo) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11aTurbo\n", __func__); - modesAvail &= ~(HAL_MODE_11A_TURBO | HAL_MODE_TURBO); - } - if ((modesAvail & HAL_MODE_11G_TURBO) && !country->allow11gTurbo) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11gTurbo\n", __func__); - modesAvail &= ~HAL_MODE_11G_TURBO; - } - - /* Check 11n operation */ - if ((modesAvail & HAL_MODE_11NG_HT20) && !country->allow11ng20) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11g HT20\n", __func__); - modesAvail &= ~HAL_MODE_11NG_HT20; - } - if ((modesAvail & HAL_MODE_11NA_HT20) && !country->allow11na20) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11a HT20\n", __func__); - modesAvail &= ~HAL_MODE_11NA_HT20; - } - if ((modesAvail & HAL_MODE_11NG_HT40PLUS) && !country->allow11ng40) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11g HT40+\n", __func__); - modesAvail &= ~HAL_MODE_11NG_HT40PLUS; - } - if ((modesAvail & HAL_MODE_11NG_HT40MINUS) && !country->allow11ng40) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11g HT40-\n", __func__); - modesAvail &= ~HAL_MODE_11NG_HT40MINUS; - } - if ((modesAvail & HAL_MODE_11NA_HT40PLUS) && !country->allow11na40) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11a HT40+\n", __func__); - modesAvail &= ~HAL_MODE_11NA_HT40PLUS; - } - if ((modesAvail & HAL_MODE_11NA_HT40MINUS) && !country->allow11na40) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: disallow 11a HT40-\n", __func__); - modesAvail &= ~HAL_MODE_11NA_HT40MINUS; - } - - return modesAvail; -#undef HAL_MODE_11A_ALL -#undef HAL_MODE_11G_ALL -} - -/* - * Return the mask of available modes based on the hardware - * capabilities and the specified country code. - */ - -u_int -ath_hal_getwirelessmodes(struct ath_hal *ah, HAL_CTRY_CODE cc) -{ - COUNTRY_CODE_TO_ENUM_RD *country = AH_NULL; - u_int mode = 0; - REG_DOMAIN rd; - - country = findCountry(cc); - if (country != AH_NULL) { - if (getWmRD(ah, country, ~CHANNEL_2GHZ, &rd)) - mode = ath_hal_getwmodesnreg(ah, country, &rd); - } - return mode; -} - -/* - * Return if device is public safety. + * Find the pointer to the country element in the country table + * corresponding to the country code */ -HAL_BOOL -ath_hal_ispublicsafetysku(struct ath_hal *ah) +static COUNTRY_CODE_TO_ENUM_RD* +findCountry(HAL_CTRY_CODE countryCode) { - uint16_t rd = getEepromRD(ah); + int i; - switch (rd) { - case FCC4_FCCA: - case CTRY_UNITED_STATES_FCC49 | COUNTRY_ERD_FLAG: - return AH_TRUE; - case DEBUG_REG_DMN: - case NO_ENUMRD: - if (AH_PRIVATE(ah)->ah_countryCode == CTRY_UNITED_STATES_FCC49) - return AH_TRUE; - break; + for (i = 0; i < N(allCountries); i++) { + if (allCountries[i].countryCode == countryCode) + return &allCountries[i]; } - return AH_FALSE; + return AH_NULL; } -/* - * Return if device is actually operating in 900 MHz band. - */ -HAL_BOOL -ath_hal_isgsmsku(struct ath_hal *ah) +static REG_DOMAIN * +findRegDmn(int regDmn) { - uint16_t rd = getEepromRD(ah); + int i; - switch (rd) { - case SR9_WORLD: - case XR9_WORLD: - case GZ901_WORLD: - case CTRY_SR9 | COUNTRY_ERD_FLAG: - case CTRY_XR9 | COUNTRY_ERD_FLAG: - case CTRY_GZ901 | COUNTRY_ERD_FLAG: - return AH_TRUE; - case DEBUG_REG_DMN: - case NO_ENUMRD: - return AH_PRIVATE(ah)->ah_countryCode == CTRY_SR9 - || AH_PRIVATE(ah)->ah_countryCode == CTRY_XR9 - || AH_PRIVATE(ah)->ah_countryCode == CTRY_GZ901 - ; + for (i = 0; i < N(regDomains); i++) { + if (regDomains[i].regDmnEnum == regDmn) + return ®Domains[i]; } - return AH_FALSE; + return AH_NULL; } -/* - * Find the pointer to the country element in the country table - * corresponding to the country code - */ -static COUNTRY_CODE_TO_ENUM_RD* -findCountry(HAL_CTRY_CODE countryCode) +static REG_DMN_PAIR_MAPPING * +findRegDmnPair(int regDmnPair) { int i; - for (i = 0; i < N(allCountries); i++) { - if (allCountries[i].countryCode == countryCode) - return &allCountries[i]; + if (regDmnPair != NO_ENUMRD) { + for (i = 0; i < N(regDomainPairs); i++) { + if (regDomainPairs[i].regDmnEnum == regDmnPair) + return ®DomainPairs[i]; + } } - return AH_NULL; /* Not found */ + return AH_NULL; } /* @@ -2223,14 +1799,13 @@ findCountry(HAL_CTRY_CODE countryCode) static HAL_CTRY_CODE getDefaultCountry(struct ath_hal *ah) { + REG_DMN_PAIR_MAPPING *regpair; uint16_t rd; - int i; rd = getEepromRD(ah); if (rd & COUNTRY_ERD_FLAG) { - COUNTRY_CODE_TO_ENUM_RD *country = AH_NULL; + COUNTRY_CODE_TO_ENUM_RD *country; uint16_t cc = rd & ~COUNTRY_ERD_FLAG; - country = findCountry(cc); if (country != AH_NULL) return cc; @@ -2238,247 +1813,174 @@ getDefaultCountry(struct ath_hal *ah) /* * Check reg domains that have only one country */ - for (i = 0; i < N(regDomainPairs); i++) - if (regDomainPairs[i].regDmnEnum == rd) { - if (regDomainPairs[i].singleCC != 0) - return regDomainPairs[i].singleCC; - else - i = N(regDomainPairs); - } - return CTRY_DEFAULT; + regpair = findRegDmnPair(rd); + return (regpair != AH_NULL) ? regpair->singleCC : CTRY_DEFAULT; } static HAL_BOOL -isValidRegDmn(int regDmn, REG_DOMAIN *rd) -{ - int i; - - for (i = 0; i < N(regDomains); i++) { - if (regDomains[i].regDmnEnum == regDmn) { - if (rd != AH_NULL) { - OS_MEMCPY(rd, ®Domains[i], - sizeof(REG_DOMAIN)); - } - return AH_TRUE; - } - } - return AH_FALSE; -} - -static HAL_BOOL -isValidRegDmnPair(int regDmnPair) +IS_BIT_SET(int bit, const uint64_t bitmask[]) { - int i; + int byteOffset, bitnum; + uint64_t val; - if (regDmnPair == NO_ENUMRD) - return AH_FALSE; - for (i = 0; i < N(regDomainPairs); i++) { - if (regDomainPairs[i].regDmnEnum == regDmnPair) - return AH_TRUE; - } - return AH_FALSE; + byteOffset = bit/64; + bitnum = bit - byteOffset*64; + val = ((uint64_t) 1) << bitnum; + return (bitmask[byteOffset] & val) != 0; } -/* - * Return the Wireless Mode Regulatory Domain based - * on the country code and the wireless mode. - */ -static HAL_BOOL -getWmRD(struct ath_hal *ah, COUNTRY_CODE_TO_ENUM_RD *country, - uint16_t channelFlag, REG_DOMAIN *rd) +static HAL_STATUS +getregstate(struct ath_hal *ah, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, + COUNTRY_CODE_TO_ENUM_RD **pcountry, + REG_DOMAIN **prd2GHz, REG_DOMAIN **prd5GHz) { - int regDmn; - REG_DMN_PAIR_MAPPING *regPair; - uint64_t flags; + COUNTRY_CODE_TO_ENUM_RD *country; + REG_DOMAIN *rd5GHz, *rd2GHz; - if (country->countryCode == CTRY_DEFAULT) { - uint16_t rdnum = getEepromRD(ah); + if (cc == CTRY_DEFAULT && regDmn == SKU_NONE) { + /* + * Validate the EEPROM setting and setup defaults + */ + if (!isEepromValid(ah)) { + /* + * Don't return any channels if the EEPROM has an + * invalid regulatory domain/country code setting. + */ + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: invalid EEPROM contents\n",__func__); + return HAL_EEBADREG; + } - if ((rdnum & COUNTRY_ERD_FLAG) == 0) { - if (isValidRegDmn(rdnum, AH_NULL) || - isValidRegDmnPair(rdnum)) - regDmn = rdnum; - else - regDmn = country->regDmnEnum; - } else - regDmn = country->regDmnEnum; - } else + cc = getDefaultCountry(ah); + country = findCountry(cc); + if (country == AH_NULL) { + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "NULL Country!, cc %d\n", cc); + return HAL_EEBADCC; + } regDmn = country->regDmnEnum; - regPair = AH_NULL; - flags = NO_REQ; - if ((regDmn & MULTI_DOMAIN_MASK) == 0) { - int i; - - for (i = 0; i < N(regDomainPairs); i++) { - if (regDomainPairs[i].regDmnEnum == regDmn) { - regPair = ®DomainPairs[i]; - break; + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: EEPROM cc %u rd 0x%x\n", + __func__, cc, regDmn); + + if (country->countryCode == CTRY_DEFAULT) { + /* + * Check EEPROM; SKU may be for a country, single + * domain, or multiple domains (WWR). + */ + uint16_t rdnum = getEepromRD(ah); + if ((rdnum & COUNTRY_ERD_FLAG) == 0 && + (findRegDmn(rdnum) != AH_NULL || + findRegDmnPair(rdnum) != AH_NULL)) { + regDmn = rdnum; + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: EEPROM rd 0x%x\n", __func__, rdnum); } } - if (regPair == AH_NULL) { + } else { + country = findCountry(cc); + if (country == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: Failed to find reg domain pair %u\n", - __func__, regDmn); - return AH_FALSE; - } - if (channelFlag & CHANNEL_2GHZ) { - regDmn = regPair->regDmn2GHz; - flags = regPair->flags2GHz; - } else { - regDmn = regPair->regDmn5GHz; - flags = regPair->flags5GHz; + "unknown country, cc %d\n", cc); + return HAL_EINVAL; } + if (regDmn == SKU_NONE) + regDmn = country->regDmnEnum; + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u rd 0x%x\n", + __func__, cc, regDmn); } /* - * We either started with a unitary reg domain or we've found the - * unitary reg domain of the pair + * Setup per-band state. */ - if (isValidRegDmn(regDmn, rd)) { - if (regPair != AH_NULL) - rd->pscan &= regPair->pscanMask; - if ((country->regDmnEnum & MULTI_DOMAIN_MASK) == 0 && - flags != NO_REQ) - rd->flags = flags; - return AH_TRUE; + if ((regDmn & MULTI_DOMAIN_MASK) == 0) { + REG_DMN_PAIR_MAPPING *regpair = findRegDmnPair(regDmn); + if (regpair == AH_NULL) { + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: no reg domain pair %u for country %u\n", + __func__, regDmn, country->countryCode); + return HAL_EINVAL; + } + rd5GHz = findRegDmn(regpair->regDmn5GHz); + if (rd5GHz == AH_NULL) { + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: no 5GHz reg domain %u for country %u\n", + __func__, regpair->regDmn5GHz, country->countryCode); + return HAL_EINVAL; + } + rd2GHz = findRegDmn(regpair->regDmn2GHz); + if (rd2GHz == AH_NULL) { + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: no 2GHz reg domain %u for country %u\n", + __func__, regpair->regDmn2GHz, country->countryCode); + return HAL_EINVAL; + } } else { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: Failed to find unitary reg domain %u\n", __func__, - country->regDmnEnum); - return AH_FALSE; - } -} - -static HAL_BOOL -IS_BIT_SET(int bit, const uint64_t bitmask[]) -{ - int byteOffset, bitnum; - uint64_t val; - - byteOffset = bit/64; - bitnum = bit - byteOffset*64; - val = ((uint64_t) 1) << bitnum; - return (bitmask[byteOffset] & val) != 0; -} - -/* Add given regclassid into regclassids array upto max of maxregids */ -static void -ath_add_regclassid(uint8_t *regclassids, u_int maxregids, - u_int *nregids, uint8_t regclassid) -{ - int i; - - /* Is regclassid valid? */ - if (regclassid == 0) - return; - - for (i = 0; i < maxregids; i++) { - if (regclassids[i] == regclassid) /* already present */ - return; - if (regclassids[i] == 0) { /* free slot */ - regclassids[i] = regclassid; - (*nregids)++; - return; + rd5GHz = rd2GHz = findRegDmn(regDmn); + if (rd2GHz == AH_NULL) { + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: no unitary reg domain %u for country %u\n", + __func__, regDmn, country->countryCode); + return HAL_EINVAL; } } + if (pcountry != AH_NULL) + *pcountry = country; + *prd2GHz = rd2GHz; + *prd5GHz = rd5GHz; + return HAL_OK; } /* - * Setup the channel list based on the information in the EEPROM and - * any supplied country code. Note that we also do a bunch of EEPROM - * verification here and setup certain regulatory-related access - * control data used later on. + * Construct the channel list for the specified regulatory config. */ - -HAL_BOOL -ath_hal_init_channels(struct ath_hal *ah, - HAL_CHANNEL *chans, u_int maxchans, u_int *nchans, - uint8_t *regclassids, u_int maxregids, u_int *nregids, - HAL_CTRY_CODE cc, u_int modeSelect, - HAL_BOOL enableOutdoor, HAL_BOOL enableExtendedChannels) +static HAL_STATUS +getchannels(struct ath_hal *ah, + struct ieee80211_channel chans[], u_int maxchans, int *nchans, + u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, + HAL_BOOL enableExtendedChannels, + COUNTRY_CODE_TO_ENUM_RD **pcountry, + REG_DOMAIN **prd2GHz, REG_DOMAIN **prd5GHz) { #define CHANNEL_HALF_BW 10 #define CHANNEL_QUARTER_BW 5 +#define HAL_MODE_11A_ALL \ + (HAL_MODE_11A | HAL_MODE_11A_TURBO | HAL_MODE_TURBO | \ + HAL_MODE_11A_QUARTER_RATE | HAL_MODE_11A_HALF_RATE) + REG_DOMAIN *rd5GHz, *rd2GHz; u_int modesAvail; - uint16_t maxChan; - COUNTRY_CODE_TO_ENUM_RD *country = AH_NULL; - REG_DOMAIN rd5GHz, rd2GHz; const struct cmode *cm; - HAL_CHANNEL_INTERNAL *ichans = &AH_PRIVATE(ah)->ah_channels[0]; + struct ieee80211_channel *ic; int next, b; - uint8_t ctl; - - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u mode 0x%x%s%s\n", - __func__, cc, modeSelect, enableOutdoor? " Enable outdoor" : " ", - enableExtendedChannels ? " Enable ecm" : ""); - - /* - * Validate the EEPROM setting and setup defaults - */ - if (!isEepromValid(ah)) { - /* - * Don't return any channels if the EEPROM has an - * invalid regulatory domain/country code setting. - */ - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: invalid EEPROM contents\n",__func__); - return AH_FALSE; - } - - AH_PRIVATE(ah)->ah_countryCode = getDefaultCountry(ah); + HAL_STATUS status; -#ifndef AH_SUPPORT_11D - if (AH_PRIVATE(ah)->ah_countryCode == CTRY_DEFAULT) { -#endif - /* - * We now have enough state to validate any country code - * passed in by the caller. - */ - if (!isCountryCodeValid(ah, cc)) { - /* NB: Atheros silently ignores invalid country codes */ - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: invalid country code %d\n", __func__, cc); - return AH_FALSE; - } - AH_PRIVATE(ah)->ah_countryCode = cc & COUNTRY_CODE_MASK; -#ifndef AH_SUPPORT_11D - } -#endif + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u regDmn 0x%x mode 0x%x%s\n", + __func__, cc, regDmn, modeSelect, + enableExtendedChannels ? " ecm" : ""); - /* Get pointers to the country element and the reg domain elements */ - country = findCountry(AH_PRIVATE(ah)->ah_countryCode); - - if (country == AH_NULL) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "NULL Country!, cc= %d\n", - AH_PRIVATE(ah)->ah_countryCode); - return AH_FALSE; - } + status = getregstate(ah, cc, regDmn, pcountry, &rd2GHz, &rd5GHz); + if (status != HAL_OK) + return status; - if (!getWmRD(ah, country, ~CHANNEL_2GHZ, &rd5GHz)) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: no unitary 5GHz regdomain for country %u\n", - __func__, AH_PRIVATE(ah)->ah_countryCode); - return AH_FALSE; - } - if (!getWmRD(ah, country, CHANNEL_2GHZ, &rd2GHz)) { + /* get modes that HW is capable of */ + modesAvail = ath_hal_getWirelessModes(ah); + /* optimize work below if no 11a channels */ + if (isChanBitMaskZero(rd5GHz->chan11a) && + (modesAvail & HAL_MODE_11A_ALL)) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: no unitary 2GHz regdomain for country %u\n", - __func__, AH_PRIVATE(ah)->ah_countryCode); - return AH_FALSE; + "%s: disallow all 11a\n", __func__); + modesAvail &= ~HAL_MODE_11A_ALL; } - modesAvail = ath_hal_getwmodesnreg(ah, country, &rd5GHz); - maxChan = !enableOutdoor ? country->outdoorChanStart : 7000; - - if (maxchans > N(AH_PRIVATE(ah)->ah_channels)) - maxchans = N(AH_PRIVATE(ah)->ah_channels); next = 0; + ic = &chans[0]; for (cm = modes; cm < &modes[N(modes)]; cm++) { uint16_t c, c_hi, c_lo; uint64_t *channelBM = AH_NULL; - REG_DOMAIN *rd = AH_NULL; REG_DMN_FREQ_BAND *fband = AH_NULL,*freqs; int low_adj, hi_adj, channelSep, lastc; + uint32_t rdflags; + uint64_t dfsMask; + uint64_t pscan; if ((cm->mode & modeSelect) == 0) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, @@ -2501,10 +2003,22 @@ ath_hal_init_channels(struct ath_hal *ah, } switch (cm->mode) { case HAL_MODE_TURBO: - rd = &rd5GHz; - channelBM = rd->chan11a_turbo; + case HAL_MODE_11A_TURBO: + rdflags = rd5GHz->flags; + dfsMask = rd5GHz->dfsMask; + pscan = rd5GHz->pscan; + if (cm->mode == HAL_MODE_TURBO) + channelBM = rd5GHz->chan11a_turbo; + else + channelBM = rd5GHz->chan11a_dyn_turbo; freqs = ®Dmn5GhzTurboFreq[0]; - ctl = rd->conformanceTestLimit | CTL_TURBO; + break; + case HAL_MODE_11G_TURBO: + rdflags = rd2GHz->flags; + dfsMask = rd2GHz->dfsMask; + pscan = rd2GHz->pscan; + channelBM = rd2GHz->chan11g_turbo; + freqs = ®Dmn2Ghz11gTurboFreq[0]; break; case HAL_MODE_11A: case HAL_MODE_11A_HALF_RATE: @@ -2512,49 +2026,39 @@ ath_hal_init_channels(struct ath_hal *ah, case HAL_MODE_11NA_HT20: case HAL_MODE_11NA_HT40PLUS: case HAL_MODE_11NA_HT40MINUS: - rd = &rd5GHz; + rdflags = rd5GHz->flags; + dfsMask = rd5GHz->dfsMask; + pscan = rd5GHz->pscan; if (cm->mode == HAL_MODE_11A_HALF_RATE) - channelBM = rd->chan11a_half; + channelBM = rd5GHz->chan11a_half; else if (cm->mode == HAL_MODE_11A_QUARTER_RATE) - channelBM = rd->chan11a_quarter; + channelBM = rd5GHz->chan11a_quarter; else - channelBM = rd->chan11a; + channelBM = rd5GHz->chan11a; freqs = ®Dmn5GhzFreq[0]; - ctl = rd->conformanceTestLimit; break; case HAL_MODE_11B: - rd = &rd2GHz; - channelBM = rd->chan11b; - freqs = ®Dmn2GhzFreq[0]; - ctl = rd->conformanceTestLimit | CTL_11B; - break; case HAL_MODE_11G: case HAL_MODE_11G_HALF_RATE: case HAL_MODE_11G_QUARTER_RATE: case HAL_MODE_11NG_HT20: case HAL_MODE_11NG_HT40PLUS: case HAL_MODE_11NG_HT40MINUS: - rd = &rd2GHz; + rdflags = rd2GHz->flags; + dfsMask = rd2GHz->dfsMask; + pscan = rd2GHz->pscan; if (cm->mode == HAL_MODE_11G_HALF_RATE) - channelBM = rd->chan11g_half; + channelBM = rd2GHz->chan11g_half; else if (cm->mode == HAL_MODE_11G_QUARTER_RATE) - channelBM = rd->chan11g_quarter; + channelBM = rd2GHz->chan11g_quarter; + else if (cm->mode == HAL_MODE_11B) + channelBM = rd2GHz->chan11b; else - channelBM = rd->chan11g; - freqs = ®Dmn2Ghz11gFreq[0]; - ctl = rd->conformanceTestLimit | CTL_11G; - break; - case HAL_MODE_11G_TURBO: - rd = &rd2GHz; - channelBM = rd->chan11g_turbo; - freqs = ®Dmn2Ghz11gTurboFreq[0]; - ctl = rd->conformanceTestLimit | CTL_108G; - break; - case HAL_MODE_11A_TURBO: - rd = &rd5GHz; - channelBM = rd->chan11a_dyn_turbo; - freqs = ®Dmn5GhzTurboFreq[0]; - ctl = rd->conformanceTestLimit | CTL_108G; + channelBM = rd2GHz->chan11g; + if (cm->mode == HAL_MODE_11B) + freqs = ®Dmn2GhzFreq[0]; + else + freqs = ®Dmn2Ghz11gFreq[0]; break; default: HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, @@ -2580,26 +2084,15 @@ ath_hal_init_channels(struct ath_hal *ah, fband = &freqs[b]; lastc = 0; - ath_add_regclassid(regclassids, maxregids, - nregids, fband->regClassId); - for (c = fband->lowChannel + low_adj; c <= fband->highChannel + hi_adj; c += fband->channelSep) { - HAL_CHANNEL_INTERNAL icv; - if (!(c_lo <= c && c <= c_hi)) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: c %u out of range [%u..%u]\n", __func__, c, c_lo, c_hi); continue; } - if (((c+fband->channelSep)/2) > (maxChan+HALF_MAXCHANBW)) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: c %u > maxChan %u\n", - __func__, c, maxChan); - continue; - } if (next >= maxchans){ HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: too many channels for channel table\n", @@ -2609,14 +2102,14 @@ ath_hal_init_channels(struct ath_hal *ah, if ((fband->usePassScan & IS_ECM_CHAN) && !enableExtendedChannels) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "Skipping ecm channel\n"); + "skip ecm channel\n"); continue; } - /* XXX needs to be in ath_hal_checkchannel */ - if ((rd->flags & NO_HOSTAP) && - (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP)) { + if ((fband->useDfs & dfsMask) && + (cm->flags & IEEE80211_CHAN_HT40)) { + /* NB: DFS and HT40 don't mix */ HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "Skipping HOSTAP channel\n"); + "skip HT40 chan, DFS required\n"); continue; } /* @@ -2626,245 +2119,288 @@ ath_hal_init_channels(struct ath_hal *ah, if (lastc && channelSep && (c-lastc) < channelSep) continue; - - OS_MEMZERO(&icv, sizeof(icv)); - icv.channel = c; - icv.channelFlags = cm->flags; - icv.maxRegTxPower = fband->powerDfs; - icv.antennaMax = fband->antennaMax; - icv.regDmnFlags = rd->flags; - icv.conformanceTestLimit = ctl; - if (fband->usePassScan & rd->pscan) - icv.channelFlags |= CHANNEL_PASSIVE; - else - icv.channelFlags &= ~CHANNEL_PASSIVE; lastc = c; - if (fband->useDfs & rd->dfsMask) { - /* DFS and HT40 don't mix */ - if (cm->mode == HAL_MODE_11NA_HT40PLUS || - cm->mode == HAL_MODE_11NA_HT40MINUS) - continue; - icv.privFlags = CHANNEL_DFS; - } else - icv.privFlags = 0; - if (rd->flags & LIMIT_FRAME_4MS) - icv.privFlags |= CHANNEL_4MS_LIMIT; - - ichans[next++] = icv; + + OS_MEMZERO(ic, sizeof(*ic)); + ic->ic_freq = c; + ic->ic_flags = cm->flags; + ic->ic_maxregpower = fband->powerDfs; + ath_hal_getpowerlimits(ah, ic); + ic->ic_maxantgain = fband->antennaMax; + if (fband->usePassScan & pscan) + ic->ic_flags |= IEEE80211_CHAN_PASSIVE; + if (fband->useDfs & dfsMask) + ic->ic_flags |= IEEE80211_CHAN_DFS; + if (IEEE80211_IS_CHAN_5GHZ(ic) && + (rdflags & DISALLOW_ADHOC_11A)) + ic->ic_flags |= IEEE80211_CHAN_NOADHOC; + if (IEEE80211_IS_CHAN_TURBO(ic) && + (rdflags & DISALLOW_ADHOC_11A_TURB)) + ic->ic_flags |= IEEE80211_CHAN_NOADHOC; + if (rdflags & NO_HOSTAP) + ic->ic_flags |= IEEE80211_CHAN_NOHOSTAP; + if (rdflags & LIMIT_FRAME_4MS) + ic->ic_flags |= IEEE80211_CHAN_4MSXMIT; + if (rdflags & NEED_NFC) + ic->ic_flags |= CHANNEL_NFCREQUIRED; + + ic++, next++; } } } done: - if (next != 0) { - int i; - - /* XXX maxchans set above so this cannot happen? */ - if (next > N(AH_PRIVATE(ah)->ah_channels)) { - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, - "%s: too many channels %u; truncating to %u\n", - __func__, next, - (int) N(AH_PRIVATE(ah)->ah_channels)); - next = N(AH_PRIVATE(ah)->ah_channels); - } - - /* - * Keep a private copy of the channel list so we can - * constrain future requests to only these channels - */ - ath_hal_sort(ichans, next, sizeof(HAL_CHANNEL_INTERNAL), - chansort); - AH_PRIVATE(ah)->ah_nchan = next; - - /* - * Copy the channel list to the public channel list - */ - for (i = 0; i < next; i++) { - chans[i].channel = ichans[i].channel; - chans[i].channelFlags = ichans[i].channelFlags; - chans[i].privFlags = ichans[i].privFlags; - chans[i].maxRegTxPower = ichans[i].maxRegTxPower; - } - /* - * Retrieve power limits. - */ - ath_hal_getpowerlimits(ah, chans, next); - for (i = 0; i < next; i++) { - ichans[i].maxTxPower = chans[i].maxTxPower; - ichans[i].minTxPower = chans[i].minTxPower; - } - } *nchans = next; - /* XXX copy private setting to public area */ - ah->ah_countryCode = AH_PRIVATE(ah)->ah_countryCode; - return (next != 0); + /* NB: pcountry set above by getregstate */ + if (prd2GHz != AH_NULL) + *prd2GHz = rd2GHz; + if (prd5GHz != AH_NULL) + *prd5GHz = rd5GHz; + return HAL_OK; +#undef HAL_MODE_11A_ALL #undef CHANNEL_HALF_BW #undef CHANNEL_QUARTER_BW } /* - * Return whether or not the specified channel is ok to use - * based on the current regulatory domain constraints and - * DFS interference. + * Retrieve a channel list without affecting runtime state. */ -HAL_CHANNEL_INTERNAL * -ath_hal_checkchannel(struct ath_hal *ah, const HAL_CHANNEL *c) +HAL_STATUS +ath_hal_getchannels(struct ath_hal *ah, + struct ieee80211_channel chans[], u_int maxchans, int *nchans, + u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, + HAL_BOOL enableExtendedChannels) { -#define CHAN_FLAGS (CHANNEL_ALL|CHANNEL_HALF|CHANNEL_QUARTER) - HAL_CHANNEL_INTERNAL *base, *cc; - /* NB: be wary of user-specified channel flags */ - int flags = c->channelFlags & CHAN_FLAGS; - int n, lim, d; + return getchannels(ah, chans, maxchans, nchans, modeSelect, + cc, regDmn, enableExtendedChannels, AH_NULL, AH_NULL, AH_NULL); +} - /* - * Check current channel to avoid the lookup. - */ - cc = AH_PRIVATE(ah)->ah_curchan; - if (cc != AH_NULL && cc->channel == c->channel && - (cc->channelFlags & CHAN_FLAGS) == flags) { - if ((cc->privFlags & CHANNEL_INTERFERENCE) && - (cc->channelFlags & CHANNEL_DFS)) - return AH_NULL; - else - return cc; - } +/* + * Handle frequency mapping from 900Mhz range to 2.4GHz range + * for GSM radios. This is done when we need the h/w frequency + * and the channel is marked IEEE80211_CHAN_GSM. + */ +static int +ath_hal_mapgsm(int sku, int freq) +{ + if (sku == SKU_XR9) + return 1520 + freq; + if (sku == SKU_GZ901) + return 1544 + freq; + if (sku == SKU_SR9) + return 3344 - freq; + HALDEBUG(AH_NULL, HAL_DEBUG_ANY, + "%s: cannot map freq %u unknown gsm sku %u\n", + __func__, freq, sku); + return freq; +} - /* binary search based on known sorting order */ - base = AH_PRIVATE(ah)->ah_channels; - n = AH_PRIVATE(ah)->ah_nchan; - /* binary search based on known sorting order */ - for (lim = n; lim != 0; lim >>= 1) { - cc = &base[lim>>1]; - d = c->channel - cc->channel; - if (d == 0) { - if ((cc->channelFlags & CHAN_FLAGS) == flags) { - if ((cc->privFlags & CHANNEL_INTERFERENCE) && - (cc->channelFlags & CHANNEL_DFS)) - return AH_NULL; - else - return cc; +/* + * Setup the internal/private channel state given a table of + * net80211 channels. We collapse entries for the same frequency + * and record the frequency for doing noise floor processing + * where we don't have net80211 channel context. + */ +static HAL_BOOL +assignPrivateChannels(struct ath_hal *ah, + struct ieee80211_channel chans[], int nchans, int sku) +{ + HAL_CHANNEL_INTERNAL *ic; + int i, j, next, freq; + + next = 0; + for (i = 0; i < nchans; i++) { + struct ieee80211_channel *c = &chans[i]; + for (j = i-1; j >= 0; j--) + if (chans[j].ic_freq == c->ic_freq) { + c->ic_devdata = chans[j].ic_devdata; + break; } - d = flags - (cc->channelFlags & CHAN_FLAGS); - } - if (d > 0) { - base = cc + 1; - lim--; + if (j < 0) { + /* new entry, assign a private channel entry */ + if (next >= N(AH_PRIVATE(ah)->ah_channels)) { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: too many channels, max %u\n", + __func__, N(AH_PRIVATE(ah)->ah_channels)); + return AH_FALSE; + } + /* + * Handle frequency mapping for 900MHz devices. + * The hardware uses 2.4GHz frequencies that are + * down-converted. The 802.11 layer uses the + * true frequencies. + */ + freq = IEEE80211_IS_CHAN_GSM(c) ? + ath_hal_mapgsm(sku, c->ic_freq) : c->ic_freq; + + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, + "%s: private[%3u] %u/0x%x -> channel %u\n", + __func__, next, c->ic_freq, c->ic_flags, freq); + + ic = &AH_PRIVATE(ah)->ah_channels[next]; + /* + * NB: This clears privFlags which means ancillary + * code like ANI and IQ calibration will be + * restarted and re-setup any per-channel state. + */ + OS_MEMZERO(ic, sizeof(*ic)); + ic->channel = freq; + c->ic_devdata = next; + next++; } } - HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: no match for %u/0x%x\n", - __func__, c->channel, c->channelFlags); - return AH_NULL; -#undef CHAN_FLAGS + AH_PRIVATE(ah)->ah_nchan = next; + HALDEBUG(ah, HAL_DEBUG_ANY, "%s: %u public, %u private channels\n", + __func__, nchans, next); + return AH_TRUE; } /* - * Return the max allowed antenna gain and apply any regulatory - * domain specific changes. - * - * NOTE: a negative reduction is possible in RD's that only - * measure radiated power (e.g., ETSI) which would increase - * that actual conducted output power (though never beyond - * the calibrated target power). + * Setup the channel list based on the information in the EEPROM. */ -u_int -ath_hal_getantennareduction(struct ath_hal *ah, HAL_CHANNEL *chan, u_int twiceGain) +HAL_STATUS +ath_hal_init_channels(struct ath_hal *ah, + struct ieee80211_channel chans[], u_int maxchans, int *nchans, + u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, + HAL_BOOL enableExtendedChannels) { - HAL_CHANNEL_INTERNAL *ichan=AH_NULL; - int8_t antennaMax; - - if ((ichan = ath_hal_checkchannel(ah, chan)) != AH_NULL) { - antennaMax = twiceGain - ichan->antennaMax*2; - return (antennaMax < 0) ? 0 : antennaMax; - } else { - /* Failed to find the correct index - may be a debug channel */ - return 0; - } + COUNTRY_CODE_TO_ENUM_RD *country; + REG_DOMAIN *rd5GHz, *rd2GHz; + HAL_STATUS status; + + status = getchannels(ah, chans, maxchans, nchans, modeSelect, + cc, regDmn, enableExtendedChannels, &country, &rd2GHz, &rd5GHz); + if (status == HAL_OK && + assignPrivateChannels(ah, chans, *nchans, AH_PRIVATE(ah)->ah_currentRD)) { + AH_PRIVATE(ah)->ah_rd2GHz = rd2GHz; + AH_PRIVATE(ah)->ah_rd5GHz = rd5GHz; + + ah->ah_countryCode = country->countryCode; + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u\n", + __func__, ah->ah_countryCode); + } else + status = HAL_EINVAL; + return status; } +/* + * Set the channel list. + */ +HAL_STATUS +ath_hal_set_channels(struct ath_hal *ah, + struct ieee80211_channel chans[], int nchans, + HAL_CTRY_CODE cc, HAL_REG_DOMAIN rd) +{ + COUNTRY_CODE_TO_ENUM_RD *country; + REG_DOMAIN *rd5GHz, *rd2GHz; + HAL_STATUS status; -/* XXX - maybe move ctl decision into channel set area or - into the tables so no decision is needed in the code */ - -#define isWwrSKU(_ah) \ - ((getEepromRD((_ah)) & WORLD_SKU_MASK) == WORLD_SKU_PREFIX || \ - getEepromRD(_ah) == WORLD) + switch (rd) { + case SKU_SR9: + case SKU_XR9: + case SKU_GZ901: + /* + * Map 900MHz sku's. The frequencies will be mapped + * according to the sku to compensate for the down-converter. + * We use the FCC for these sku's as the mapped channel + * list is known compatible (will need to change if/when + * vendors do different mapping in different locales). + */ + status = getregstate(ah, CTRY_DEFAULT, SKU_FCC, + &country, &rd2GHz, &rd5GHz); + break; + default: + status = getregstate(ah, cc, rd, + &country, &rd2GHz, &rd5GHz); + rd = AH_PRIVATE(ah)->ah_currentRD; + break; + } + if (status == HAL_OK && assignPrivateChannels(ah, chans, nchans, rd)) { + AH_PRIVATE(ah)->ah_rd2GHz = rd2GHz; + AH_PRIVATE(ah)->ah_rd5GHz = rd5GHz; + ah->ah_countryCode = country->countryCode; + HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u\n", + __func__, ah->ah_countryCode); + } else + status = HAL_EINVAL; + return status; +} +#ifdef AH_DEBUG /* - * Return the test group from the specified channel from - * the regulatory table. - * - * TODO: CTL for 11B CommonMode when regulatory domain is unknown + * Return the internal channel corresponding to a public channel. + * NB: normally this routine is inline'd (see ah_internal.h) */ -u_int -ath_hal_getctl(struct ath_hal *ah, HAL_CHANNEL *chan) +HAL_CHANNEL_INTERNAL * +ath_hal_checkchannel(struct ath_hal *ah, const struct ieee80211_channel *c) { - u_int ctl = NO_CTL; - HAL_CHANNEL_INTERNAL *ichan; - - /* Special CTL to signify WWR SKU without a known country */ - if (AH_PRIVATE(ah)->ah_countryCode == CTRY_DEFAULT && isWwrSKU(ah)) { - if (IS_CHAN_B(chan)) { - ctl = SD_NO_CTL | CTL_11B; - } else if (IS_CHAN_G(chan)) { - ctl = SD_NO_CTL | CTL_11G; - } else if (IS_CHAN_108G(chan)) { - ctl = SD_NO_CTL | CTL_108G; - } else if (IS_CHAN_T(chan)) { - ctl = SD_NO_CTL | CTL_TURBO; - } else { - ctl = SD_NO_CTL | CTL_11A; - } + HAL_CHANNEL_INTERNAL *cc = &AH_PRIVATE(ah)->ah_channels[c->ic_devdata]; + + if (c->ic_devdata < AH_PRIVATE(ah)->ah_nchan && + (c->ic_freq == cc->channel || IEEE80211_IS_CHAN_GSM(c))) + return cc; + if (c->ic_devdata >= AH_PRIVATE(ah)->ah_nchan) { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: bad mapping, devdata %u nchans %u\n", + __func__, c->ic_devdata, AH_PRIVATE(ah)->ah_nchan); + HALASSERT(c->ic_devdata < AH_PRIVATE(ah)->ah_nchan); } else { - if ((ichan = ath_hal_checkchannel(ah, chan)) != AH_NULL) { - ctl = ichan->conformanceTestLimit; - /* limit 11G OFDM power */ - if (IS_CHAN_PUREG(chan) && - (ctl & CTL_MODE_M) == CTL_11B) - ctl = (ctl &~ CTL_MODE_M) | CTL_11G; - } + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: no match for %u/0x%x devdata %u channel %u\n", + __func__, c->ic_freq, c->ic_flags, c->ic_devdata, + cc->channel); + HALASSERT(c->ic_freq == cc->channel || IEEE80211_IS_CHAN_GSM(c)); } - return ctl; + return AH_NULL; } +#endif /* AH_DEBUG */ + +#define isWwrSKU(_ah) \ + ((getEepromRD((_ah)) & WORLD_SKU_MASK) == WORLD_SKU_PREFIX || \ + getEepromRD(_ah) == WORLD) /* - * Return whether or not a noise floor check is required in - * the current regulatory domain for the specified channel. + * Return the test group for the specific channel based on + * the current regulatory setup. */ -HAL_BOOL -ath_hal_getnfcheckrequired(struct ath_hal *ah, HAL_CHANNEL *chan) +u_int +ath_hal_getctl(struct ath_hal *ah, const struct ieee80211_channel *c) { - HAL_CHANNEL_INTERNAL *ichan; - - if ((ichan = ath_hal_checkchannel(ah, chan)) != AH_NULL) - return ((ichan->regDmnFlags & NEED_NFC) ? AH_TRUE : AH_FALSE); - return AH_FALSE; + u_int ctl; + + if (AH_PRIVATE(ah)->ah_rd2GHz == AH_PRIVATE(ah)->ah_rd5GHz || + (ah->ah_countryCode == CTRY_DEFAULT && isWwrSKU(ah))) + ctl = SD_NO_CTL; + else if (IEEE80211_IS_CHAN_2GHZ(c)) + ctl = AH_PRIVATE(ah)->ah_rd2GHz->conformanceTestLimit; + else + ctl = AH_PRIVATE(ah)->ah_rd5GHz->conformanceTestLimit; + if (IEEE80211_IS_CHAN_B(c)) + return ctl | CTL_11B; + if (IEEE80211_IS_CHAN_G(c)) + return ctl | CTL_11G; + if (IEEE80211_IS_CHAN_108G(c)) + return ctl | CTL_108G; + if (IEEE80211_IS_CHAN_TURBO(c)) + return ctl | CTL_TURBO; + if (IEEE80211_IS_CHAN_A(c)) + return ctl | CTL_11A; + return ctl; } /* - * Insertion sort. + * Return the max allowed antenna gain and apply any regulatory + * domain specific changes. + * + * NOTE: a negative reduction is possible in RD's that only + * measure radiated power (e.g., ETSI) which would increase + * that actual conducted output power (though never beyond + * the calibrated target power). */ -#define swap(_a, _b, _size) { \ - uint8_t *s = _b; \ - int i = _size; \ - do { \ - uint8_t tmp = *_a; \ - *_a++ = *s; \ - *s++ = tmp; \ - } while (--i); \ - _a -= _size; \ -} - -static void -ath_hal_sort(void *a, size_t n, size_t size, ath_hal_cmp_t *cmp) +u_int +ath_hal_getantennareduction(struct ath_hal *ah, + const struct ieee80211_channel *chan, u_int twiceGain) { - uint8_t *aa = a; - uint8_t *ai, *t; - - for (ai = aa+size; --n >= 1; ai += size) - for (t = ai; t > aa; t -= size) { - uint8_t *u = t - size; - if (cmp(u, t) <= 0) - break; - swap(u, t, size); - } + int8_t antennaMax = twiceGain - chan->ic_maxantgain*2; + return (antennaMax < 0) ? 0 : antennaMax; } diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210.h b/sys/dev/ath/ath_hal/ar5210/ar5210.h index 857cf3c..5156e74 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210.h +++ b/sys/dev/ath/ath_hal/ar5210/ar5210.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5210.h,v 1.8 2008/11/11 02:40:13 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AR5210_H_ #define _ATH_AR5210_H_ @@ -128,20 +128,21 @@ struct ath_hal; extern void ar5210Detach(struct ath_hal *ah); extern HAL_BOOL ar5210Reset(struct ath_hal *, HAL_OPMODE, - HAL_CHANNEL *, HAL_BOOL bChannelChange, HAL_STATUS *); + struct ieee80211_channel *, HAL_BOOL bChannelChange, HAL_STATUS *); extern void ar5210SetPCUConfig(struct ath_hal *); extern HAL_BOOL ar5210PhyDisable(struct ath_hal *); extern HAL_BOOL ar5210Disable(struct ath_hal *); -extern HAL_BOOL ar5210ChipReset(struct ath_hal *, HAL_CHANNEL *); -extern HAL_BOOL ar5210PerCalibration(struct ath_hal *, HAL_CHANNEL *, HAL_BOOL *); -extern HAL_BOOL ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, +extern HAL_BOOL ar5210ChipReset(struct ath_hal *, struct ieee80211_channel *); +extern HAL_BOOL ar5210PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *); +extern HAL_BOOL ar5210PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); -extern HAL_BOOL ar5210ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan); +extern HAL_BOOL ar5210ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *); extern int16_t ar5210GetNoiseFloor(struct ath_hal *); extern int16_t ar5210GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5210SetTxPowerLimit(struct ath_hal *, uint32_t limit); -extern HAL_BOOL ar5210SetTransmitPower(struct ath_hal *, HAL_CHANNEL *); +extern HAL_BOOL ar5210SetTransmitPower(struct ath_hal *, + const struct ieee80211_channel *); extern HAL_BOOL ar5210CalNoiseFloor(struct ath_hal *, HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5210ResetDma(struct ath_hal *, HAL_OPMODE); @@ -273,6 +274,7 @@ extern HAL_INT ar5210SetInterrupts(struct ath_hal *, HAL_INT ints); extern const HAL_RATE_TABLE *ar5210GetRateTable(struct ath_hal *, u_int mode); extern HAL_BOOL ar5210AniControl(struct ath_hal *, HAL_ANI_CMD, int ); -extern void ar5210AniPoll(struct ath_hal *, const HAL_NODE_STATS *, HAL_CHANNEL *); +extern void ar5210AniPoll(struct ath_hal *, const HAL_NODE_STATS *, + const struct ieee80211_channel *); extern void ar5210MibEvent(struct ath_hal *, const HAL_NODE_STATS *); #endif /* _ATH_AR5210_H_ */ diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c index ba75526..555c14c 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5210_attach.c,v 1.9 2008/11/11 02:40:13 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -31,12 +31,11 @@ static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *, uint16_t flags, uint16_t *low, uint16_t *high); static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah, - HAL_CHANNEL *chans, uint32_t nchans); + struct ieee80211_channel *chan); static const struct ath_hal_private ar5210hal = {{ .ah_magic = AR5210_MAGIC, .ah_abi = HAL_ABI_VERSION, - .ah_countryCode = CTRY_DEFAULT, .ah_getRateTable = ar5210GetRateTable, .ah_detach = ar5210Detach, @@ -303,7 +302,7 @@ static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high) { - if (flags & CHANNEL_5GHZ) { + if (flags & IEEE80211_CHAN_5GHZ) { *low = 5120; *high = 5430; return AH_TRUE; @@ -313,20 +312,14 @@ ar5210GetChannelEdges(struct ath_hal *ah, } static HAL_BOOL -ar5210GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans) +ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) { - HAL_CHANNEL *chan; - int i; - /* XXX fill in, this is just a placeholder */ - for (i = 0; i < nchans; i++) { - chan = &chans[i]; - HALDEBUG(ah, HAL_DEBUG_ATTACH, - "%s: no min/max power for %u/0x%x\n", - __func__, chan->channel, chan->channelFlags); - chan->maxTxPower = AR5210_MAX_RATE_POWER; - chan->minTxPower = 0; - } + HALDEBUG(ah, HAL_DEBUG_ATTACH, + "%s: no min/max power for %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + chan->ic_maxpower = AR5210_MAX_RATE_POWER; + chan->ic_minpower = 0; return AH_TRUE; } diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c b/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c index a673917..bdd58ac 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5210_misc.c,v 1.6 2008/11/27 22:29:37 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -561,7 +561,8 @@ ar5210AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) } void -ar5210AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, HAL_CHANNEL *chan) +ar5210AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, + const struct ieee80211_channel *chan) { } diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c index 6a082e0..dd35e2b 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -55,7 +55,7 @@ static const uint8_t ar5k0007_pwrSettings[17] = { static HAL_BOOL ar5210SetResetReg(struct ath_hal *, uint32_t resetMask, u_int delay); -static HAL_BOOL ar5210SetChannel(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +static HAL_BOOL ar5210SetChannel(struct ath_hal *, struct ieee80211_channel *); static void ar5210SetOperatingMode(struct ath_hal *, int opmode); /* @@ -68,7 +68,8 @@ static void ar5210SetOperatingMode(struct ath_hal *, int opmode); */ HAL_BOOL ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status) + struct ieee80211_channel *chan, HAL_BOOL bChannelChange, + HAL_STATUS *status) { #define N(a) (sizeof (a) /sizeof (a[0])) #define FAIL(_code) do { ecode = _code; goto bad; } while (0) @@ -81,10 +82,10 @@ ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, HALDEBUG(ah, HAL_DEBUG_RESET, "%s: opmode %u channel %u/0x%x %s channel\n", __func__, - opmode, chan->channel, chan->channelFlags, + opmode, chan->ic_freq, chan->ic_flags, bChannelChange ? "change" : "same"); - if ((chan->channelFlags & CHANNEL_5GHZ) == 0) { + if (!IEEE80211_IS_CHAN_5GHZ(chan)) { /* Only 11a mode */ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: channel not 5Ghz\n", __func__); FAIL(HAL_EINVAL); @@ -96,7 +97,7 @@ ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); FAIL(HAL_EINVAL); } switch (opmode) { @@ -232,17 +233,13 @@ ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, (OS_REG_READ(ah, AR_PHY(68)) & 0xFFFFFFFC) | (ee->ee_antenna & 0x3)); - if (!ar5210SetChannel(ah, ichan)) { + if (!ar5210SetChannel(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unable to set channel\n", __func__); FAIL(HAL_EIO); } - if (bChannelChange) { - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - } + if (bChannelChange && !IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; /* Activate the PHY */ OS_REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ENABLE); @@ -256,7 +253,7 @@ ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* Perform noise floor calibration and set status */ if (!ar5210CalNoiseFloor(ah, ichan)) { - chan->channelFlags |= CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; HALDEBUG(ah, HAL_DEBUG_ANY, "%s: noise floor calibration failed\n", __func__); FAIL(HAL_EIO); @@ -385,19 +382,20 @@ ar5210Disable(struct ath_hal *ah) * Places the hardware into reset and then pulls it out of reset */ HAL_BOOL -ar5210ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5210ChipReset(struct ath_hal *ah, struct ieee80211_channel *chan) { #define AR_RC_HW (AR_RC_RPCU | AR_RC_RDMA | AR_RC_RPHY | AR_RC_RMAC) HALDEBUG(ah, HAL_DEBUG_RESET, "%s turbo %s\n", __func__, - chan && IS_CHAN_TURBO(chan) ? "enabled" : "disabled"); + chan && IEEE80211_IS_CHAN_TURBO(chan) ? + "enabled" : "disabled"); if (!ar5210SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) return AH_FALSE; /* Place chip in turbo before reset to cleanly reset clocks */ OS_REG_WRITE(ah, AR_PHY_FRCTL, - chan && IS_CHAN_TURBO(chan) ? AR_PHY_TURBO_MODE : 0); + chan && IEEE80211_IS_CHAN_TURBO(chan) ? AR_PHY_TURBO_MODE : 0); /* * Reset the HW. @@ -444,7 +442,8 @@ enum { * changes. */ HAL_BOOL -ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, +ar5210PerCalibrationN(struct ath_hal *ah, + struct ieee80211_channel *chan, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone) { uint32_t regBeacon; @@ -452,12 +451,8 @@ ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, HAL_CHANNEL_INTERNAL *ichan; ichan = ath_hal_checkchannel(ah, chan); - if (ichan == AH_NULL) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + if (ichan == AH_NULL) return AH_FALSE; - } /* Disable tx and rx */ OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) | (AR_DIAG_SW_DIS_TX | AR_DIAG_SW_DIS_RX)); @@ -475,7 +470,7 @@ ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, OS_DELAY(10); /* Change Channel to relock synth */ - if (!ar5210SetChannel(ah, ichan)) + if (!ar5210SetChannel(ah, chan)) return AH_FALSE; /* wait for the synthesizer lock to stabilize */ @@ -551,7 +546,7 @@ ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, "%s: Performing 2nd Noise Cal\n", __func__); OS_DELAY(5000); if (!ar5210CalNoiseFloor(ah, ichan)) - chan->channelFlags |= CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; } /* Clear tx and rx disable bit */ @@ -567,13 +562,14 @@ ar5210PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, } HAL_BOOL -ar5210PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_BOOL *isIQdone) +ar5210PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan, + HAL_BOOL *isIQdone) { return ar5210PerCalibrationN(ah, chan, 0x1, AH_TRUE, isIQdone); } HAL_BOOL -ar5210ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5210ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan) { return AH_TRUE; } @@ -729,8 +725,10 @@ ar5210SetTxPowerLimit(struct ath_hal *ah, uint32_t limit) * Get TXPower values and set them in the radio */ static HAL_BOOL -setupPowerSettings(struct ath_hal *ah, HAL_CHANNEL *chan, uint8_t cp[17]) +setupPowerSettings(struct ath_hal *ah, const struct ieee80211_channel *chan, + uint8_t cp[17]) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); const HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom; uint8_t gainFRD, gainF36, gainF48, gainF54; uint8_t dBmRD, dBm36, dBm48, dBm54, dontcare; @@ -741,9 +739,9 @@ setupPowerSettings(struct ath_hal *ah, HAL_CHANNEL *chan, uint8_t cp[17]) cp[15] = (ee->ee_biasCurrents >> 4) & 0x7; cp[16] = ee->ee_biasCurrents & 0x7; - if (chan->channel < 5170 || chan->channel > 5320) { + if (freq < 5170 || freq > 5320) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -763,7 +761,7 @@ setupPowerSettings(struct ath_hal *ah, HAL_CHANNEL *chan, uint8_t cp[17]) #endif return AH_FALSE; } - group = ((chan->channel - 5170) / 10); + group = ((freq - 5170) / 10); if (group > 11) { /* Pull 5.29 into the 5.27 group */ @@ -829,7 +827,7 @@ setupPowerSettings(struct ath_hal *ah, HAL_CHANNEL *chan, uint8_t cp[17]) * vectors (as determined by the mode), and station configuration */ HAL_BOOL -ar5210SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5210SetTransmitPower(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define N(a) (sizeof (a) / sizeof (a[0])) static const uint32_t pwr_regs_start[17] = { @@ -917,12 +915,13 @@ ar5210SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) * or by disabling the AGC. */ static HAL_BOOL -ar5210SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5210SetChannel(struct ath_hal *ah, struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t data; /* Set the Channel */ - data = ath_hal_reverseBits((chan->channel - 5120)/10, 5); + data = ath_hal_reverseBits((freq - 5120)/10, 5); data = (data << 1) | 0x41; OS_REG_WRITE(ah, AR_PHY(0x27), data); OS_REG_WRITE(ah, AR_PHY(0x30), 0); @@ -949,7 +948,7 @@ ar5210GetNoiseFloor(struct ath_hal *ah) * Returns: TRUE for a successful noise floor calibration; else FALSE */ HAL_BOOL -ar5210CalNoiseFloor(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5210CalNoiseFloor(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) { int32_t nf, nfLoops; @@ -980,10 +979,10 @@ ar5210CalNoiseFloor(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) if (nf > NORMAL_NF_THRESH) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: Bad noise cal %d\n", __func__, nf); - chan->rawNoiseFloor = 0; + ichan->rawNoiseFloor = 0; return AH_FALSE; } - chan->rawNoiseFloor = nf; + ichan->rawNoiseFloor = nf; return AH_TRUE; } diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_xmit.c b/sys/dev/ath/ath_hal/ar5210/ar5210_xmit.c index 7ce9c83..63cd9fd 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_xmit.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_xmit.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5210_xmit.c,v 1.5 2008/11/10 04:08:02 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -154,7 +154,7 @@ HAL_BOOL ar5210ResetTxQueue(struct ath_hal *ah, u_int q) { struct ath_hal_5210 *ahp = AH5210(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; HAL_TX_QUEUE_INFO *qi; uint32_t cwMin; @@ -177,7 +177,7 @@ ar5210ResetTxQueue(struct ath_hal *ah, u_int q) return AH_TRUE; /* Set turbo mode / base mode parameters on or off */ - if (IS_CHAN_TURBO(chan)) { + if (IEEE80211_IS_CHAN_TURBO(chan)) { OS_REG_WRITE(ah, AR_SLOT_TIME, INIT_SLOT_TIME_TURBO); OS_REG_WRITE(ah, AR_TIME_OUT, INIT_ACK_CTS_TIMEOUT_TURBO); OS_REG_WRITE(ah, AR_USEC, INIT_TRANSMIT_LATENCY_TURBO); diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211.h b/sys/dev/ath/ath_hal/ar5211/ar5211.h index e71d78c..b9aad1e 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211.h +++ b/sys/dev/ath/ath_hal/ar5211/ar5211.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5211.h,v 1.8 2008/11/10 22:08:47 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AR5211_H_ #define _ATH_AR5211_H_ @@ -123,7 +123,6 @@ struct ath_hal_5211 { HAL_ANT_SETTING ah_diversityControl; /* antenna setting */ uint32_t ah_calibrationTime; HAL_BOOL ah_bIQCalibration; - HAL_CHANNEL ah_curchan; /* XXX */ int ah_rfgainState; uint32_t ah_tx6PowerInHalfDbm; /* power output for 6Mb tx */ uint32_t ah_staId1Defaults; /* STA_ID1 default settings */ @@ -150,19 +149,21 @@ extern struct ath_hal *ar5211Attach(uint16_t, HAL_SOFTC, extern void ar5211Detach(struct ath_hal *); extern HAL_BOOL ar5211Reset(struct ath_hal *, HAL_OPMODE, - HAL_CHANNEL *, HAL_BOOL bChannelChange, HAL_STATUS *); + struct ieee80211_channel *, HAL_BOOL bChannelChange, + HAL_STATUS *); extern HAL_BOOL ar5211PhyDisable(struct ath_hal *); extern HAL_BOOL ar5211Disable(struct ath_hal *); -extern HAL_BOOL ar5211ChipReset(struct ath_hal *, uint16_t); -extern HAL_BOOL ar5211PerCalibration(struct ath_hal *, HAL_CHANNEL *, HAL_BOOL *); -extern HAL_BOOL ar5211PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, +extern HAL_BOOL ar5211ChipReset(struct ath_hal *, + const struct ieee80211_channel *); +extern HAL_BOOL ar5211PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *); +extern HAL_BOOL ar5211PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); -extern HAL_BOOL ar5211ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan); +extern HAL_BOOL ar5211ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *); extern HAL_BOOL ar5211SetTxPowerLimit(struct ath_hal *, uint32_t limit); -extern HAL_BOOL ar5211SetTransmitPower(struct ath_hal *, HAL_CHANNEL *); -extern HAL_BOOL ar5211CalNoiseFloor(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +extern HAL_BOOL ar5211CalNoiseFloor(struct ath_hal *, + const struct ieee80211_channel *); extern HAL_BOOL ar5211SetAntennaSwitchInternal(struct ath_hal *, - HAL_ANT_SETTING, const HAL_CHANNEL *); + HAL_ANT_SETTING, const struct ieee80211_channel *); extern int16_t ar5211GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5211ResetDma(struct ath_hal *, HAL_OPMODE); @@ -303,6 +304,7 @@ extern HAL_INT ar5211SetInterrupts(struct ath_hal *, HAL_INT ints); extern const HAL_RATE_TABLE *ar5211GetRateTable(struct ath_hal *, u_int mode); extern HAL_BOOL ar5211AniControl(struct ath_hal *, HAL_ANI_CMD, int ); -extern void ar5211AniPoll(struct ath_hal *, const HAL_NODE_STATS *, HAL_CHANNEL *); +extern void ar5211AniPoll(struct ath_hal *, const HAL_NODE_STATS *, + const struct ieee80211_channel *); extern void ar5211MibEvent(struct ath_hal *, const HAL_NODE_STATS *); #endif /* _ATH_AR5211_H_ */ diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c index 74b139b..8164ca4 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5211_attach.c,v 1.11 2008/11/27 22:29:52 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -31,12 +31,11 @@ static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high); static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, - HAL_CHANNEL *chans, uint32_t nchans); + struct ieee80211_channel *chan); static const struct ath_hal_private ar5211hal = {{ .ah_magic = AR5211_MAGIC, .ah_abi = HAL_ABI_VERSION, - .ah_countryCode = CTRY_DEFAULT, .ah_getRateTable = ar5211GetRateTable, .ah_detach = ar5211Detach, @@ -232,7 +231,7 @@ ar5211Attach(uint16_t devid, HAL_SOFTC sc, ahp->ah_acktimeout = (u_int) -1; ahp->ah_ctstimeout = (u_int) -1; - if (!ar5211ChipReset(ah, AH_FALSE)) { /* reset chip */ + if (!ar5211ChipReset(ah, AH_NULL)) { /* reset chip */ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); ecode = HAL_EIO; goto bad; @@ -420,12 +419,13 @@ static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high) { - if (flags & CHANNEL_5GHZ) { + if (flags & IEEE80211_CHAN_5GHZ) { *low = 4920; *high = 6100; return AH_TRUE; } - if (flags & CHANNEL_2GHZ && ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { + if (flags & IEEE80211_CHAN_2GHZ && + ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { *low = 2312; *high = 2732; return AH_TRUE; @@ -434,20 +434,14 @@ ar5211GetChannelEdges(struct ath_hal *ah, } static HAL_BOOL -ar5211GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans) +ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) { - HAL_CHANNEL *chan; - int i; - /* XXX fill in, this is just a placeholder */ - for (i = 0; i < nchans; i++) { - chan = &chans[i]; - HALDEBUG(ah, HAL_DEBUG_ATTACH, - "%s: no min/max power for %u/0x%x\n", - __func__, chan->channel, chan->channelFlags); - chan->maxTxPower = MAX_RATE_POWER; - chan->minTxPower = 0; - } + HALDEBUG(ah, HAL_DEBUG_ATTACH, + "%s: no min/max power for %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + chan->ic_maxpower = MAX_RATE_POWER; + chan->ic_minpower = 0; return AH_TRUE; } diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c index b16b4b8..81d29b8 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -432,7 +432,7 @@ ar5211SetSifsTime(struct ath_hal *ah, u_int us) } else { /* convert to system clocks */ OS_REG_WRITE(ah, AR_D_GBL_IFS_SIFS, ath_hal_mac_clks(ah, us)); - ahp->ah_sifstime = us; + ahp->ah_slottime = us; return AH_TRUE; } } @@ -564,7 +564,8 @@ ar5211AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) } void -ar5211AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, HAL_CHANNEL *chan) +ar5211AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, + const struct ieee80211_channel *chan) { } @@ -603,8 +604,7 @@ ar5211GetAntennaSwitch(struct ath_hal *ah) HAL_BOOL ar5211SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) { - const HAL_CHANNEL *chan = - (const HAL_CHANNEL *) AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; if (chan == AH_NULL) { AH5211(ah)->ah_diversityControl = settings; diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c b/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c index f048a51..1ed6214 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -105,17 +105,23 @@ const static CHAN_INFO_2GHZ chan2GHzData[] = { #define NUM_RATES 8 static HAL_BOOL ar5211SetResetReg(struct ath_hal *ah, uint32_t resetMask); -static HAL_BOOL ar5211SetChannel(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +static HAL_BOOL ar5211SetChannel(struct ath_hal *, + const struct ieee80211_channel *); static int16_t ar5211RunNoiseFloor(struct ath_hal *, uint8_t runTime, int16_t startingNF); -static HAL_BOOL ar5211IsNfGood(struct ath_hal *, HAL_CHANNEL_INTERNAL *chan); -static HAL_BOOL ar5211SetRf6and7(struct ath_hal *, HAL_CHANNEL *chan); -static HAL_BOOL ar5211SetBoardValues(struct ath_hal *, HAL_CHANNEL *chan); +static HAL_BOOL ar5211IsNfGood(struct ath_hal *, + struct ieee80211_channel *chan); +static HAL_BOOL ar5211SetRf6and7(struct ath_hal *, + const struct ieee80211_channel *chan); +static HAL_BOOL ar5211SetBoardValues(struct ath_hal *, + const struct ieee80211_channel *chan); static void ar5211SetPowerTable(struct ath_hal *, PCDACS_EEPROM *pSrcStruct, uint16_t channel); +static HAL_BOOL ar5211SetTransmitPower(struct ath_hal *, + const struct ieee80211_channel *); static void ar5211SetRateTable(struct ath_hal *, RD_EDGES_POWER *pRdEdgesPower, TRGT_POWER_INFO *pPowerInfo, - uint16_t numChannels, HAL_CHANNEL *chan); + uint16_t numChannels, const struct ieee80211_channel *chan); static uint16_t ar5211GetScaledPower(uint16_t channel, uint16_t pcdacValue, const PCDACS_EEPROM *pSrcStruct); static HAL_BOOL ar5211FindValueInList(uint16_t channel, uint16_t pcdacValue, @@ -147,7 +153,8 @@ static void ar5211SetOperatingMode(struct ath_hal *, int opmode); */ HAL_BOOL ar5211Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status) + struct ieee80211_channel *chan, HAL_BOOL bChannelChange, + HAL_STATUS *status) { uint32_t softLedCfg, softLedState; #define N(a) (sizeof (a) /sizeof (a[0])) @@ -167,34 +174,16 @@ uint32_t softLedCfg, softLedState; HALDEBUG(ah, HAL_DEBUG_RESET, "%s: opmode %u channel %u/0x%x %s channel\n", - __func__, opmode, chan->channel, chan->channelFlags, + __func__, opmode, chan->ic_freq, chan->ic_flags, bChannelChange ? "change" : "same"); OS_MARK(ah, AH_MARK_RESET, bChannelChange); -#define IS(_c,_f) (((_c)->channelFlags & _f) || 0) - if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan,CHANNEL_5GHZ)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as 2GHz or 5GHz\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } - if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as OFDM or CCK\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } -#undef IS /* * Map public channel to private. */ ichan = ath_hal_checkchannel(ah, chan); - if (ichan == AH_NULL) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + if (ichan == AH_NULL) FAIL(HAL_EINVAL); - } switch (opmode) { case HAL_M_STA: case HAL_M_IBSS: @@ -236,10 +225,8 @@ uint32_t softLedCfg, softLedState; for (i = 0; i < AR_NUM_DCU; i++) saveFrameSeqCount[i] = OS_REG_READ(ah, AR_DSEQNUM(i)); } - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; + if (!IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; } /* @@ -259,33 +246,36 @@ uint32_t softLedCfg, softLedState; softLedCfg = OS_REG_READ(ah, AR_GPIOCR); softLedState = OS_REG_READ(ah, AR_GPIODO); - if (!ar5211ChipReset(ah, chan->channelFlags)) { + if (!ar5211ChipReset(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); FAIL(HAL_EIO); } /* Setup the indices for the next set of register array writes */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - modesIndex = 1; - freqIndex = 1; - break; - case CHANNEL_T: - modesIndex = 2; - freqIndex = 1; - break; - case CHANNEL_B: - modesIndex = 3; - freqIndex = 2; - break; - case CHANNEL_PUREG: - modesIndex = 4; - freqIndex = 2; - break; - default: - /* Ah, a new wireless mode */ - HALASSERT(0); - break; + if (IEEE80211_IS_CHAN_5GHZ(chan)) { + freqIndex = 1; + if (IEEE80211_IS_CHAN_TURBO(chan)) + modesIndex = 2; + else if (IEEE80211_IS_CHAN_A(chan)) + modesIndex = 1; + else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: invalid channel %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + FAIL(HAL_EINVAL); + } + } else { + freqIndex = 2; + if (IEEE80211_IS_CHAN_B(chan)) + modesIndex = 3; + else if (IEEE80211_IS_CHAN_PUREG(chan)) + modesIndex = 4; + else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: invalid channel %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + FAIL(HAL_EINVAL); + } } /* Set correct Baseband to analog shift setting to access analog chips. */ @@ -297,12 +287,12 @@ uint32_t softLedCfg, softLedState; /* Write parameters specific to AR5211 */ if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) { - if (IS_CHAN_2GHZ(chan) && + if (IEEE80211_IS_CHAN_2GHZ(chan) && AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3_1) { HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint32_t ob2GHz, db2GHz; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { ob2GHz = ee->ee_ob2GHz[0]; db2GHz = ee->ee_db2GHz[0]; } else { @@ -437,14 +427,15 @@ uint32_t softLedCfg, softLedState; /* Setup board specific options for EEPROM version 3 */ ar5211SetBoardValues(ah, chan); - if (!ar5211SetChannel(ah, ichan)) { + if (!ar5211SetChannel(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unable to set channel\n", __func__); FAIL(HAL_EIO); } /* Activate the PHY */ - if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B && IS_CHAN_2GHZ(chan)) + if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B && + IEEE80211_IS_CHAN_2GHZ(chan)) OS_REG_WRITE(ah, 0xd808, 0x502); /* required for FPGA */ OS_REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); @@ -454,7 +445,7 @@ uint32_t softLedCfg, softLedState; * Value is in 100ns increments. */ data = OS_REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_M; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { synthDelay = (4 * data) / 22; } else { synthDelay = data / 10; @@ -473,9 +464,9 @@ uint32_t softLedCfg, softLedState; (void) ath_hal_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0); /* Perform noise floor and set status */ - if (!ar5211CalNoiseFloor(ah, ichan)) { - if (!IS_CHAN_CCK(chan)) - chan->channelFlags |= CHANNEL_CW_INT; + if (!ar5211CalNoiseFloor(ah, chan)) { + if (!IEEE80211_IS_CHAN_CCK(chan)) + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; HALDEBUG(ah, HAL_DEBUG_ANY, "%s: noise floor calibration failed\n", __func__); FAIL(HAL_EIO); @@ -599,49 +590,31 @@ ar5211Disable(struct ath_hal *ah) * us in the correct mode and we cannot check the hwchannel flags. */ HAL_BOOL -ar5211ChipReset(struct ath_hal *ah, uint16_t channelFlags) +ar5211ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan) { if (!ar5211SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) return AH_FALSE; - /* Set CCK and Turbo modes correctly */ - switch (channelFlags & CHANNEL_ALL) { - case CHANNEL_2GHZ|CHANNEL_CCK: - case CHANNEL_2GHZ|CHANNEL_CCK|CHANNEL_TURBO: - OS_REG_WRITE(ah, AR_PHY_TURBO, 0); - OS_REG_WRITE(ah, AR5211_PHY_MODE, - AR5211_PHY_MODE_CCK | AR5211_PHY_MODE_RF2GHZ); - OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); - /* Wait for the PLL to settle */ - OS_DELAY(DELAY_PLL_SETTLE); - break; - case CHANNEL_2GHZ|CHANNEL_OFDM: - case CHANNEL_2GHZ|CHANNEL_OFDM|CHANNEL_TURBO: - OS_REG_WRITE(ah, AR_PHY_TURBO, 0); - if (AH_PRIVATE(ah)->ah_devid == AR5211_DEVID) { - OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40); - OS_DELAY(DELAY_PLL_SETTLE); + /* NB: called from attach with chan null */ + if (chan != AH_NULL) { + /* Set CCK and Turbo modes correctly */ + OS_REG_WRITE(ah, AR_PHY_TURBO, IEEE80211_IS_CHAN_TURBO(chan) ? + AR_PHY_FC_TURBO_MODE | AR_PHY_FC_TURBO_SHORT : 0); + if (IEEE80211_IS_CHAN_B(chan)) { OS_REG_WRITE(ah, AR5211_PHY_MODE, - AR5211_PHY_MODE_OFDM | AR5211_PHY_MODE_RF2GHZ); - } - break; - case CHANNEL_A: - case CHANNEL_T: - if (channelFlags & CHANNEL_TURBO) { - OS_REG_WRITE(ah, AR_PHY_TURBO, - AR_PHY_FC_TURBO_MODE | AR_PHY_FC_TURBO_SHORT); - } else { /* 5 GHZ OFDM Mode */ - OS_REG_WRITE(ah, AR_PHY_TURBO, 0); - } - if (AH_PRIVATE(ah)->ah_devid == AR5211_DEVID) { + AR5211_PHY_MODE_CCK | AR5211_PHY_MODE_RF2GHZ); + OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); + /* Wait for the PLL to settle */ + OS_DELAY(DELAY_PLL_SETTLE); + } else if (AH_PRIVATE(ah)->ah_devid == AR5211_DEVID) { OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40); OS_DELAY(DELAY_PLL_SETTLE); OS_REG_WRITE(ah, AR5211_PHY_MODE, - AR5211_PHY_MODE_OFDM | AR5211_PHY_MODE_RF5GHZ); + AR5211_PHY_MODE_OFDM | (IEEE80211_IS_CHAN_2GHZ(chan) ? + AR5211_PHY_MODE_RF2GHZ : + AR5211_PHY_MODE_RF5GHZ)); } - break; } - /* NB: else no flags set - must be attach calling - do nothing */ /* * Reset the HW - PCI must be reset after the rest of the @@ -664,8 +637,8 @@ ar5211ChipReset(struct ath_hal *ah, uint16_t channelFlags) * changes. */ HAL_BOOL -ar5211PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, - HAL_BOOL longCal, HAL_BOOL *isCalDone) +ar5211PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, + u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone) { struct ath_hal_5211 *ahp = AH5211(ah); HAL_CHANNEL_INTERNAL *ichan; @@ -679,7 +652,7 @@ ar5211PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); return AH_FALSE; } /* IQ calibration in progress. Check to see if it has finished. */ @@ -733,22 +706,21 @@ ar5211PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, if (longCal) { /* Perform noise floor and set status */ - if (!ar5211IsNfGood(ah, ichan)) { + if (!ar5211IsNfGood(ah, chan)) { /* report up and clear internal state */ - chan->channelFlags |= CHANNEL_CW_INT; - ichan->channelFlags &= ~CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; return AH_FALSE; } - if (!ar5211CalNoiseFloor(ah, ichan)) { + if (!ar5211CalNoiseFloor(ah, chan)) { /* * Delay 5ms before retrying the noise floor * just to make sure, as we are in an error * condition here. */ OS_DELAY(5000); - if (!ar5211CalNoiseFloor(ah, ichan)) { - if (!IS_CHAN_CCK(chan)) - chan->channelFlags |= CHANNEL_CW_INT; + if (!ar5211CalNoiseFloor(ah, chan)) { + if (!IEEE80211_IS_CHAN_CCK(chan)) + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; return AH_FALSE; } } @@ -758,13 +730,14 @@ ar5211PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, } HAL_BOOL -ar5211PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_BOOL *isIQdone) +ar5211PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan, + HAL_BOOL *isIQdone) { return ar5211PerCalibrationN(ah, chan, 0x1, AH_TRUE, isIQdone); } HAL_BOOL -ar5211ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5211ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan) { /* XXX */ return AH_TRUE; @@ -810,13 +783,13 @@ ar5211SetResetReg(struct ath_hal *ah, uint32_t resetMask) * or by disabling the AGC. */ static HAL_BOOL -ar5211SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5211SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t refClk, reg32, data2111; int16_t chan5111, chanIEEE; - chanIEEE = ath_hal_mhz2ieee(ah, chan->channel, chan->channelFlags); - if (IS_CHAN_2GHZ(chan)) { + chanIEEE = chan->ic_ieee; + if (IEEE80211_IS_CHAN_2GHZ(chan)) { const CHAN_INFO_2GHZ* ci = &chan2GHzData[chanIEEE + CI_2GHZ_INDEX_CORRECTION]; @@ -903,7 +876,7 @@ ar5211RunNoiseFloor(struct ath_hal *ah, uint8_t runTime, int16_t startingNF) if (i >= 60) { HALDEBUG(ah, HAL_DEBUG_NFCAL, "NF with runTime %d failed to end on channel %d\n", - runTime, AH_PRIVATE(ah)->ah_curchan->channel); + runTime, AH_PRIVATE(ah)->ah_curchan->ic_freq); HALDEBUG(ah, HAL_DEBUG_NFCAL, " PHY NF Reg state: 0x%x\n", OS_REG_READ(ah, AR_PHY_AGC_CONTROL)); @@ -917,23 +890,24 @@ ar5211RunNoiseFloor(struct ath_hal *ah, uint8_t runTime, int16_t startingNF) } static HAL_BOOL -getNoiseFloorThresh(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, int16_t *nft) +getNoiseFloorThresh(struct ath_hal *ah, const struct ieee80211_channel *chan, + int16_t *nft) { HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: *nft = ee->ee_noiseFloorThresh[0]; break; - case CHANNEL_CCK|CHANNEL_2GHZ: + case IEEE80211_CHAN_B: *nft = ee->ee_noiseFloorThresh[1]; break; - case CHANNEL_OFDM|CHANNEL_2GHZ: + case IEEE80211_CHAN_PUREG: *nft = ee->ee_noiseFloorThresh[2]; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } return AH_TRUE; @@ -945,8 +919,9 @@ getNoiseFloorThresh(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, int16_t *nft * Returns: TRUE if the NF is good */ static HAL_BOOL -ar5211IsNfGood(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5211IsNfGood(struct ath_hal *ah, struct ieee80211_channel *chan) { + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); int16_t nf, nfThresh; if (!getNoiseFloorThresh(ah, chan, &nfThresh)) @@ -964,9 +939,9 @@ ar5211IsNfGood(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * happens it indicates a problem regardless * of the band. */ - chan->channelFlags |= CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; } - chan->rawNoiseFloor = nf; + ichan->rawNoiseFloor = nf; return (nf <= nfThresh); } @@ -980,13 +955,14 @@ ar5211IsNfGood(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * Returns: TRUE for a successful noise floor calibration; else FALSE */ HAL_BOOL -ar5211CalNoiseFloor(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5211CalNoiseFloor(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define N(a) (sizeof (a) / sizeof (a[0])) /* Check for Carrier Wave interference in MKK regulatory zone */ if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_OAHU && - ath_hal_getnfcheckrequired(ah, (HAL_CHANNEL *) chan)) { + (chan->ic_flags & CHANNEL_NFCREQUIRED)) { static const uint8_t runtime[3] = { 0, 2, 7 }; + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); int16_t nf, nfThresh; int i; @@ -1003,9 +979,9 @@ ar5211CalNoiseFloor(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) "%s: run failed with %u > threshold %u " "(runtime %u)\n", __func__, nf, nfThresh, runtime[i]); - chan->rawNoiseFloor = 0; + ichan->rawNoiseFloor = 0; } else - chan->rawNoiseFloor = nf; + ichan->rawNoiseFloor = nf; } return (i <= N(runtime)); } else { @@ -1054,9 +1030,10 @@ ar5211GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) * REQUIRES: Access to the analog device */ static HAL_BOOL -ar5211SetRf6and7(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5211SetRf6and7(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define N(a) (sizeof (a) / sizeof (a[0])) + uint16_t freq = ath_hal_gethwchannel(ah, chan); HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; struct ath_hal_5211 *ahp = AH5211(ah); uint16_t rfXpdGain, rfPloSel, rfPwdXpd; @@ -1064,25 +1041,25 @@ ar5211SetRf6and7(struct ath_hal *ah, HAL_CHANNEL *chan) uint16_t freqIndex; int i; - freqIndex = (chan->channelFlags & CHANNEL_2GHZ) ? 2 : 1; + freqIndex = IEEE80211_IS_CHAN_2GHZ(chan) ? 2 : 1; /* * TODO: This array mode correspondes with the index used * during the read. * For readability, this should be changed to an enum or #define */ - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: - if (chan->channel > 4000 && chan->channel < 5260) { + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: + if (freq > 4000 && freq < 5260) { tempOB = ee->ee_ob1; tempDB = ee->ee_db1; - } else if (chan->channel >= 5260 && chan->channel < 5500) { + } else if (freq >= 5260 && freq < 5500) { tempOB = ee->ee_ob2; tempDB = ee->ee_db2; - } else if (chan->channel >= 5500 && chan->channel < 5725) { + } else if (freq >= 5500 && freq < 5725) { tempOB = ee->ee_ob3; tempDB = ee->ee_db3; - } else if (chan->channel >= 5725) { + } else if (freq >= 5725) { tempOB = ee->ee_ob4; tempDB = ee->ee_db4; } else { @@ -1104,14 +1081,14 @@ ar5211SetRf6and7(struct ath_hal *ah, HAL_CHANNEL *chan) (ar5211Rf6n7[21][freqIndex] & ~0x08) | (ee->ee_cornerCal.gSel << 3); break; - case CHANNEL_CCK|CHANNEL_2GHZ: + case IEEE80211_CHAN_B: tempOB = ee->ee_obFor24; tempDB = ee->ee_dbFor24; rfXpdGain = ee->ee_xgain[1]; rfPloSel = ee->ee_xpd[1]; rfPwdXpd = !ee->ee_xpd[1]; break; - case CHANNEL_OFDM|CHANNEL_2GHZ: + case IEEE80211_CHAN_PUREG: tempOB = ee->ee_obFor24g; tempDB = ee->ee_dbFor24g; rfXpdGain = ee->ee_xgain[2]; @@ -1120,7 +1097,7 @@ ar5211SetRf6and7(struct ath_hal *ah, HAL_CHANNEL *chan) break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -1160,7 +1137,7 @@ ar5211SetRf6and7(struct ath_hal *ah, HAL_CHANNEL *chan) HAL_BOOL ar5211SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, - const HAL_CHANNEL *chan) + const struct ieee80211_channel *chan) { #define ANT_SWITCH_TABLE1 0x9960 #define ANT_SWITCH_TABLE2 0x9964 @@ -1169,13 +1146,13 @@ ar5211SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, uint32_t antSwitchA, antSwitchB; int ix; - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: ix = 0; break; - case CHANNEL_B: ix = 1; break; - case CHANNEL_PUREG: ix = 2; break; + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: ix = 0; break; + case IEEE80211_CHAN_B: ix = 1; break; + case IEEE80211_CHAN_PUREG: ix = 2; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -1223,27 +1200,27 @@ ar5211SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, * given the channel value */ static HAL_BOOL -ar5211SetBoardValues(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5211SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan) { HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; struct ath_hal_5211 *ahp = AH5211(ah); int arrayMode, falseDectectBackoff; - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: arrayMode = 0; OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_TX_CLIP, ee->ee_cornerCal.clip); break; - case CHANNEL_CCK|CHANNEL_2GHZ: + case IEEE80211_CHAN_B: arrayMode = 1; break; - case CHANNEL_OFDM|CHANNEL_2GHZ: + case IEEE80211_CHAN_PUREG: arrayMode = 2; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -1295,10 +1272,11 @@ ar5211SetBoardValues(struct ath_hal *ah, HAL_CHANNEL *chan) falseDectectBackoff = NO_FALSE_DETECT_BACKOFF; if (AH_PRIVATE(ah)->ah_eeversion < AR_EEPROM_VER3_3) { if (AH_PRIVATE(ah)->ah_subvendorid == 0x1022 && - IS_CHAN_OFDM(chan)) + IEEE80211_IS_CHAN_OFDM(chan)) falseDectectBackoff += CB22_FALSE_DETECT_BACKOFF; } else { - uint32_t remainder = chan->channel % 32; + uint16_t freq = ath_hal_gethwchannel(ah, chan); + uint32_t remainder = freq % 32; if (remainder && (remainder < 10 || remainder > 22)) falseDectectBackoff += ee->ee_falseDetectBackoff[arrayMode]; @@ -1331,9 +1309,10 @@ ar5211SetTxPowerLimit(struct ath_hal *ah, uint32_t limit) * Sets the transmit power in the baseband for the given * operating channel and mode. */ -HAL_BOOL -ar5211SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) +static HAL_BOOL +ar5211SetTransmitPower(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; TRGT_POWER_INFO *pi; RD_EDGES_POWER *rep; @@ -1342,22 +1321,22 @@ ar5211SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) int i; /* setup the pcdac struct to point to the correct info, based on mode */ - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: eepromPcdacs.numChannels = ee->ee_numChannels11a; eepromPcdacs.pChannelList= ee->ee_channels11a; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11a; nchan = ee->ee_numTargetPwr_11a; pi = ee->ee_trgtPwr_11a; break; - case CHANNEL_OFDM|CHANNEL_2GHZ: + case IEEE80211_CHAN_PUREG: eepromPcdacs.numChannels = ee->ee_numChannels2_4; eepromPcdacs.pChannelList= ee->ee_channels11g; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11g; nchan = ee->ee_numTargetPwr_11g; pi = ee->ee_trgtPwr_11g; break; - case CHANNEL_CCK|CHANNEL_2GHZ: + case IEEE80211_CHAN_B: eepromPcdacs.numChannels = ee->ee_numChannels2_4; eepromPcdacs.pChannelList= ee->ee_channels11b; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11b; @@ -1366,11 +1345,11 @@ ar5211SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } - ar5211SetPowerTable(ah, &eepromPcdacs, chan->channel); + ar5211SetPowerTable(ah, &eepromPcdacs, freq); rep = AH_NULL; /* Match CTL to EEPROM value */ @@ -1392,7 +1371,8 @@ ar5211SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL *chan) * table for writing into the hardware. */ void -ar5211SetPowerTable(struct ath_hal *ah, PCDACS_EEPROM *pSrcStruct, uint16_t channel) +ar5211SetPowerTable(struct ath_hal *ah, PCDACS_EEPROM *pSrcStruct, + uint16_t channel) { static FULL_PCDAC_STRUCT pcdacStruct; static uint16_t pcdacTable[PWR_TABLE_SIZE]; @@ -1509,11 +1489,12 @@ ar5211SetPowerTable(struct ath_hal *ah, PCDACS_EEPROM *pSrcStruct, uint16_t chan * Set the transmit power in the baseband for the given * operating channel and mode. */ -void +static void ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, TRGT_POWER_INFO *pPowerInfo, uint16_t numChannels, - HAL_CHANNEL *chan) + const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; struct ath_hal_5211 *ahp = AH5211(ah); static uint16_t ratesArray[NUM_RATES]; @@ -1534,9 +1515,9 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, int8_t twiceAntennaGain, twiceAntennaReduction = 0; pRatesPower = ratesArray; - twiceMaxRDPower = chan->maxRegTxPower * 2; + twiceMaxRDPower = chan->ic_maxregpower * 2; - if (IS_CHAN_5GHZ(chan)) { + if (IEEE80211_IS_CHAN_5GHZ(chan)) { twiceAntennaGain = ee->ee_antennaGainMax[0]; } else { twiceAntennaGain = ee->ee_antennaGainMax[1]; @@ -1553,7 +1534,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, } numEdges = i; - ar5211GetLowerUpperValues(chan->channel, tempChannelList, + ar5211GetLowerUpperValues(freq, tempChannelList, numEdges, &lowerChannel, &upperChannel); /* Get the index for this channel */ for (i = 0; i < numEdges; i++) @@ -1562,7 +1543,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, HALASSERT(i != numEdges); if ((lowerChannel == upperChannel && - lowerChannel == chan->channel) || + lowerChannel == freq) || pRdEdgesPower[i].flag) { twiceMaxEdgePower = pRdEdgesPower[i].twice_rdEdgePower; HALASSERT(twiceMaxEdgePower > 0); @@ -1573,7 +1554,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, for (i = 0; i < numChannels; i++) tempChannelList[i] = pPowerInfo[i].testChannel; - ar5211GetLowerUpperValues(chan->channel, tempChannelList, + ar5211GetLowerUpperValues(freq, tempChannelList, numChannels, &lowerChannel, &upperChannel); /* get the index for the channel */ @@ -1587,7 +1568,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, } for (i = 0; i < NUM_RATES; i++) { - if (IS_CHAN_OFDM(chan)) { + if (IEEE80211_IS_CHAN_OFDM(chan)) { /* power for rates 6,9,12,18,24 is all the same */ if (i < 5) { lowerPower = pPowerInfo[lowerIndex].twicePwr6_24; @@ -1627,7 +1608,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, } } - twicePower = ar5211GetInterpolatedValue(chan->channel, + twicePower = ar5211GetInterpolatedValue(freq, lowerChannel, upperChannel, lowerPower, upperPower, 0); /* Reduce power by band edge restrictions */ @@ -1639,7 +1620,7 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, * this unless specially configured. Then we limit * power only for non-AP operation. */ - if (IS_CHAN_TURBO(chan) && + if (IEEE80211_IS_CHAN_TURBO(chan) && AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3_1 #ifdef AH_ENABLE_AP_SUPPORT && AH_PRIVATE(ah)->ah_opmode != HAL_M_HOSTAP @@ -1669,14 +1650,14 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, #ifdef AH_DEBUG HALDEBUG(ah, HAL_DEBUG_RESET, "%s: final output power setting %d MHz:\n", - __func__, chan->channel); + __func__, chan->ic_freq); HALDEBUG(ah, HAL_DEBUG_RESET, "6 Mb %d dBm, MaxRD: %d dBm, MaxEdge %d dBm\n", scaledPower / 2, twiceMaxRDPower / 2, twiceMaxEdgePower / 2); HALDEBUG(ah, HAL_DEBUG_RESET, "TPC Scale %d dBm - Ant Red %d dBm\n", tpcScaleReductionTable[AH_PRIVATE(ah)->ah_tpScale] * 2, twiceAntennaReduction / 2); - if (IS_CHAN_TURBO(chan) && + if (IEEE80211_IS_CHAN_TURBO(chan) && AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3_1) HALDEBUG(ah, HAL_DEBUG_RESET, "Max Turbo %d dBm\n", ee->ee_turbo2WMaxPower5); @@ -1709,7 +1690,8 @@ ar5211SetRateTable(struct ath_hal *ah, RD_EDGES_POWER *pRdEdgesPower, * Get or interpolate the pcdac value from the calibrated data */ uint16_t -ar5211GetScaledPower(uint16_t channel, uint16_t pcdacValue, const PCDACS_EEPROM *pSrcStruct) +ar5211GetScaledPower(uint16_t channel, uint16_t pcdacValue, + const PCDACS_EEPROM *pSrcStruct) { uint16_t powerValue; uint16_t lFreq, rFreq; /* left and right frequency values */ @@ -1940,11 +1922,11 @@ ar5211InitializeGainValues(struct ath_hal *ah) static HAL_BOOL ar5211InvalidGainReadback(struct ath_hal *ah, GAIN_VALUES *gv) { - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; uint32_t gStep, g; uint32_t L1, L2, L3, L4; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { gStep = 0x18; L1 = 0; L2 = gStep + 4; diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c b/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c index 7f75bd0..5d70564 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5211_xmit.c,v 1.6 2008/11/10 04:08:03 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -233,7 +233,7 @@ HAL_BOOL ar5211ResetTxQueue(struct ath_hal *ah, u_int q) { struct ath_hal_5211 *ahp = AH5211(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; HAL_TX_QUEUE_INFO *qi; uint32_t cwMin, chanCwMin, value; @@ -254,7 +254,7 @@ ar5211ResetTxQueue(struct ath_hal *ah, u_int q) * Select cwmin according to channel type. * NB: chan can be NULL during attach */ - if (chan && IS_CHAN_B(chan)) + if (chan && IEEE80211_IS_CHAN_B(chan)) chanCwMin = INIT_CWMIN_11B; else chanCwMin = INIT_CWMIN; diff --git a/sys/dev/ath/ath_hal/ar5212/ar2316.c b/sys/dev/ath/ath_hal/ar5212/ar2316.c index c724a95..9bfc482 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar2316.c +++ b/sys/dev/ath/ath_hal/ar5212/ar2316.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar2316.c,v 1.9 2008/11/15 22:15:46 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -88,28 +88,29 @@ ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar2316SetChannel(struct ath_hal *ah, struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - if (((chan->channel - 2192) % 5) == 0) { - channelSel = ((chan->channel - 672) * 2 - 3040)/10; + if (((freq - 2192) % 5) == 0) { + channelSel = ((freq - 672) * 2 - 3040)/10; bModeSynth = 0; - } else if (((chan->channel - 2224) % 5) == 0) { - channelSel = ((chan->channel - 704) * 2 - 3040) / 10; + } else if (((freq - 2224) % 5) == 0) { + channelSel = ((freq - 704) * 2 - 3040) / 10; bModeSynth = 1; } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -117,7 +118,7 @@ ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -125,21 +126,21 @@ ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(3, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(2, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -161,7 +162,8 @@ ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) +ar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, + uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ int i; \ @@ -174,27 +176,18 @@ ar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn struct ar2316State *priv = AR2316(ah); int regWrites = 0; - HALDEBUG(ah, HAL_DEBUG_RFPARAM, - "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", - __func__, chan->channel, chan->channelFlags, modesIndex); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); HALASSERT(priv != AH_NULL); /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_B: + if (IEEE80211_IS_CHAN_B(chan)) { ob2GHz = ee->ee_obFor24; db2GHz = ee->ee_dbFor24; - break; - case CHANNEL_G: - case CHANNEL_108G: + } else { ob2GHz = ee->ee_obFor24g; db2GHz = ee->ee_dbFor24g; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - return AH_FALSE; } /* Bank 1 Write */ @@ -507,7 +500,8 @@ ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, static HAL_BOOL ar2316SetPowerTable(struct ath_hal *ah, - int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *minPower, int16_t *maxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { struct ath_hal_5212 *ahp = AH5212(ah); @@ -524,11 +518,11 @@ ar2316SetPowerTable(struct ath_hal *ah, #endif HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", - __func__, chan->channel,chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); @@ -646,9 +640,11 @@ ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data) } static HAL_BOOL -ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar2316GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL; const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL; @@ -657,9 +653,9 @@ ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, *maxPow = 0; - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else return(AH_FALSE); @@ -673,9 +669,9 @@ ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = ar2316GetMaxPower(ah, &data[0]); *minPow = ar2316GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -687,19 +683,19 @@ ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Linearly interpolate the power value now */ - for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); + for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); last = i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]); - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + ar2316GetMaxPower(ah, &data[last])*totalD)/totalD); totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar2316GetMinPower(ah, &data[last])*totalD)/totalD); return(AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = ar2316GetMaxPower(ah, &data[i]); *minPow = ar2316GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5212/ar2317.c b/sys/dev/ath/ath_hal/ar5212/ar2317.c index c83cff0..fdf88e3 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar2317.c +++ b/sys/dev/ath/ath_hal/ar5212/ar2317.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar2317.c,v 1.8 2008/11/15 22:15:46 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -79,22 +79,23 @@ ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar2317SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar2317SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - channelSel = chan->channel - 2272 ; + channelSel = freq - 2272 ; channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -102,21 +103,21 @@ ar2317SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(3, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(2, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -138,7 +139,9 @@ ar2317SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar2317SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) +ar2317SetRfRegs(struct ath_hal *ah, + const struct ieee80211_channel *chan, + uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ int i; \ @@ -151,27 +154,18 @@ ar2317SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn struct ar2317State *priv = AR2317(ah); int regWrites = 0; - HALDEBUG(ah, HAL_DEBUG_RFPARAM, - "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", - __func__, chan->channel, chan->channelFlags, modesIndex); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); HALASSERT(priv); /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_B: + if (IEEE80211_IS_CHAN_B(chan)) { ob2GHz = ee->ee_obFor24; db2GHz = ee->ee_dbFor24; - break; - case CHANNEL_G: - case CHANNEL_108G: + } else { ob2GHz = ee->ee_obFor24g; db2GHz = ee->ee_dbFor24g; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - return AH_FALSE; } /* Bank 1 Write */ @@ -484,7 +478,8 @@ ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, static HAL_BOOL ar2317SetPowerTable(struct ath_hal *ah, - int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *minPower, int16_t *maxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { struct ath_hal_5212 *ahp = AH5212(ah); @@ -501,11 +496,11 @@ ar2317SetPowerTable(struct ath_hal *ah, #endif HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", - __func__, chan->channel,chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); @@ -625,9 +620,11 @@ ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data) } static HAL_BOOL -ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar2317GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL; const RAW_DATA_PER_CHANNEL_2317 *data=AH_NULL; @@ -636,9 +633,9 @@ ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, *maxPow = 0; - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else return(AH_FALSE); @@ -652,9 +649,9 @@ ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = ar2317GetMaxPower(ah, &data[0]); *minPow = ar2317GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -666,19 +663,19 @@ ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Linearly interpolate the power value now */ - for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); + for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); last = i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = ar2317GetMaxPower(ah, &data[i]) - ar2317GetMaxPower(ah, &data[last]); - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + ar2317GetMaxPower(ah, &data[last])*totalD)/totalD); totalMin = ar2317GetMinPower(ah, &data[i]) - ar2317GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar2317GetMinPower(ah, &data[last])*totalD)/totalD); return(AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = ar2317GetMaxPower(ah, &data[i]); *minPow = ar2317GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5212/ar2413.c b/sys/dev/ath/ath_hal/ar5212/ar2413.c index a9e4686..e069444 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar2413.c +++ b/sys/dev/ath/ath_hal/ar5212/ar2413.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar2413.c,v 1.8 2008/11/15 22:15:46 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -75,29 +75,29 @@ ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar2413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar2413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - uint16_t freq; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - if (((chan->channel - 2192) % 5) == 0) { - channelSel = ((chan->channel - 672) * 2 - 3040)/10; + if (((freq - 2192) % 5) == 0) { + channelSel = ((freq - 672) * 2 - 3040)/10; bModeSynth = 0; - } else if (((chan->channel - 2224) % 5) == 0) { - channelSel = ((chan->channel - 704) * 2 - 3040) / 10; + } else if (((freq - 2224) % 5) == 0) { + channelSel = ((freq - 704) * 2 - 3040) / 10; bModeSynth = 1; } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -105,7 +105,7 @@ ar2413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -113,26 +113,26 @@ ar2413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { - freq = chan->channel - 2; /* Align to even 5MHz raster */ + } else if (((freq % 5) == 2) && (freq <= 5435)) { + freq = freq - 2; /* Align to even 5MHz raster */ channelSel = ath_hal_reverseBits( (uint32_t)(((freq - 4800)*10)/25 + 1), 8); aModeRefSel = ath_hal_reverseBits(0, 2); - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(3, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(2, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -155,7 +155,9 @@ ar2413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar2413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) +ar2413SetRfRegs(struct ath_hal *ah, + const struct ieee80211_channel *chan, + uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ int i; \ @@ -168,27 +170,18 @@ ar2413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn struct ar2413State *priv = AR2413(ah); int regWrites = 0; - HALDEBUG(ah, HAL_DEBUG_RFPARAM, - "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", - __func__, chan->channel, chan->channelFlags, modesIndex); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); HALASSERT(priv); /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_B: + if (IEEE80211_IS_CHAN_B(chan)) { ob2GHz = ee->ee_obFor24; db2GHz = ee->ee_dbFor24; - break; - case CHANNEL_G: - case CHANNEL_108G: + } else { ob2GHz = ee->ee_obFor24g; db2GHz = ee->ee_dbFor24g; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - return AH_FALSE; } /* Bank 1 Write */ @@ -501,9 +494,11 @@ ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, static HAL_BOOL ar2413SetPowerTable(struct ath_hal *ah, - int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *minPower, int16_t *maxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; @@ -518,11 +513,11 @@ ar2413SetPowerTable(struct ath_hal *ah, #endif HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", - __func__, chan->channel,chan->channelFlags); + __func__, freq, chan->ic_flags); - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); @@ -533,7 +528,7 @@ ar2413SetPowerTable(struct ath_hal *ah, AR_PHY_TPCRG5_PD_GAIN_OVERLAP); numPdGainsUsed = ar2413getGainBoundariesAndPdadcsForPowers(ah, - chan->channel, pRawDataset, pdGainOverlap_t2, + freq, pRawDataset, pdGainOverlap_t2, &minCalPower2413_t2,gainBoundaries, rfXpdGain, pdadcValues); HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); @@ -640,9 +635,11 @@ ar2413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) } static HAL_BOOL -ar2413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar2413GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; @@ -651,9 +648,9 @@ ar2413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, *maxPow = 0; - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else return(AH_FALSE); @@ -667,9 +664,9 @@ ar2413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = ar2413GetMaxPower(ah, &data[0]); *minPow = ar2413GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -681,19 +678,19 @@ ar2413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Linearly interpolate the power value now */ - for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); + for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); last = i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = ar2413GetMaxPower(ah, &data[i]) - ar2413GetMaxPower(ah, &data[last]); - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + ar2413GetMaxPower(ah, &data[last])*totalD)/totalD); totalMin = ar2413GetMinPower(ah, &data[i]) - ar2413GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar2413GetMinPower(ah, &data[last])*totalD)/totalD); return(AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = ar2413GetMaxPower(ah, &data[i]); *minPow = ar2413GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5212/ar2425.c b/sys/dev/ath/ath_hal/ar5212/ar2425.c index adb41b5..8d29474 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar2425.c +++ b/sys/dev/ath/ath_hal/ar5212/ar2425.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar2425.c,v 1.8 2008/11/16 21:33:05 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -82,24 +82,24 @@ ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar2425SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - uint16_t freq; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - channelSel = chan->channel - 2272; + channelSel = freq - 2272; channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { // Enable channel spreading for channel 14 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -108,26 +108,26 @@ ar2425SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { - freq = chan->channel - 2; /* Align to even 5MHz raster */ + } else if (((freq % 5) == 2) && (freq <= 5435)) { + freq = freq - 2; /* Align to even 5MHz raster */ channelSel = ath_hal_reverseBits( (uint32_t)(((freq - 4800)*10)/25 + 1), 8); aModeRefSel = ath_hal_reverseBits(0, 2); - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(1, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(1, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -149,7 +149,9 @@ ar2425SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar2425SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) +ar2425SetRfRegs(struct ath_hal *ah, + const struct ieee80211_channel *chan, + uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ int i; \ @@ -162,27 +164,18 @@ ar2425SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn uint16_t ob2GHz = 0, db2GHz = 0; int regWrites = 0; - HALDEBUG(ah, HAL_DEBUG_RFPARAM, - "==>%s:chan 0x%x flag 0x%x modesIndex 0x%x\n", - __func__, chan->channel, chan->channelFlags, modesIndex); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); HALASSERT(priv); /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_B: + if (IEEE80211_IS_CHAN_B(chan)) { ob2GHz = ee->ee_obFor24; db2GHz = ee->ee_dbFor24; - break; - case CHANNEL_G: - case CHANNEL_108G: + } else { ob2GHz = ee->ee_obFor24g; db2GHz = ee->ee_dbFor24g; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - return AH_FALSE; } /* Bank 1 Write */ @@ -501,9 +494,11 @@ ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, /* Same as 2413 set power table */ static HAL_BOOL ar2425SetPowerTable(struct ath_hal *ah, - int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *minPower, int16_t *maxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; @@ -514,11 +509,11 @@ ar2425SetPowerTable(struct ath_hal *ah, uint32_t i, reg32, regoffset; HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n", - __func__, chan->channel,chan->channelFlags); + __func__, freq, chan->ic_flags); - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__); @@ -528,7 +523,7 @@ ar2425SetPowerTable(struct ath_hal *ah, pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), AR_PHY_TPCRG5_PD_GAIN_OVERLAP); - ar2425getGainBoundariesAndPdadcsForPowers(ah, chan->channel, + ar2425getGainBoundariesAndPdadcsForPowers(ah, freq, pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries, rfXpdGain, pdadcValues); @@ -603,9 +598,11 @@ ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) static HAL_BOOL -ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, - int16_t *maxPow, int16_t *minPow) +ar2425GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, + int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; @@ -614,9 +611,9 @@ ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, *maxPow = 0; - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else return(AH_FALSE); @@ -630,9 +627,9 @@ ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = ar2425GetMaxPower(ah, &data[0]); *minPow = ar2425GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -644,19 +641,19 @@ ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Linearly interpolate the power value now */ - for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); + for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); last = i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]); - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + ar2425GetMaxPower(ah, &data[last])*totalD)/totalD); totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar2425GetMinPower(ah, &data[last])*totalD)/totalD); return(AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = ar2425GetMaxPower(ah, &data[i]); *minPow = ar2425GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5212/ar5111.c b/sys/dev/ath/ath_hal/ar5212/ar5111.c index f009ebe..f9fd3f3 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5111.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5111.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -74,9 +74,10 @@ ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar5111SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5111SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define CI_2GHZ_INDEX_CORRECTION 19 + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t refClk, reg32, data2111; int16_t chan5111, chanIEEE; @@ -140,10 +141,10 @@ ar5111SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) { 1, 0x46, 180 } /* 2732 26 */ }; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - chanIEEE = ath_hal_mhz2ieee(ah, chan->channel, chan->channelFlags); - if (IS_CHAN_2GHZ(chan)) { + chanIEEE = chan->ic_ieee; + if (IEEE80211_IS_CHAN_2GHZ(chan)) { const CHAN_INFO_2GHZ* ci = &chan2GHzData[chanIEEE + CI_2GHZ_INDEX_CORRECTION]; uint32_t txctl; @@ -153,7 +154,7 @@ ar5111SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) | (ci->refClkSel << 4); chan5111 = ci->channel5111; txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -214,9 +215,10 @@ ar5111GetRfBank(struct ath_hal *ah, int bank) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint16_t rfXpdGainFixed, rfPloSel, rfPwdXpd, gainI; @@ -224,20 +226,22 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint32_t ob2GHz, db2GHz, rfReg[N(ar5212Bank6_5111)]; int i, regWrites = 0; + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); + /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: - if (4000 < chan->channel && chan->channel < 5260) { + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: + if (4000 < freq && freq < 5260) { tempOB = ee->ee_ob1; tempDB = ee->ee_db1; - } else if (5260 <= chan->channel && chan->channel < 5500) { + } else if (5260 <= freq && freq < 5500) { tempOB = ee->ee_ob2; tempDB = ee->ee_db2; - } else if (5500 <= chan->channel && chan->channel < 5725) { + } else if (5500 <= freq && freq < 5725) { tempOB = ee->ee_ob3; tempDB = ee->ee_db3; - } else if (chan->channel >= 5725) { + } else if (freq >= 5725) { tempOB = ee->ee_ob4; tempDB = ee->ee_db4; } else { @@ -251,7 +255,7 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, rfPwdXpd = !ee->ee_xpd[headerInfo11A]; gainI = ee->ee_gainI[headerInfo11A]; break; - case CHANNEL_B: + case IEEE80211_CHAN_B: tempOB = ee->ee_obFor24; tempDB = ee->ee_dbFor24; ob2GHz = ee->ee_ob2GHz[0]; @@ -262,7 +266,8 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, rfPwdXpd = !ee->ee_xpd[headerInfo11B]; gainI = ee->ee_gainI[headerInfo11B]; break; - case CHANNEL_G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_PUREG: /* NB: really 108G */ tempOB = ee->ee_obFor24g; tempDB = ee->ee_dbFor24g; ob2GHz = ee->ee_ob2GHz[1]; @@ -275,7 +280,7 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -285,7 +290,7 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, /* Bank 0 Write */ for (i = 0; i < N(ar5212Bank0_5111); i++) rfReg[i] = ar5212Bank0_5111[i][modesIndex]; - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ar5212ModifyRfBuffer(rfReg, ob2GHz, 3, 119, 0); ar5212ModifyRfBuffer(rfReg, db2GHz, 3, 122, 0); } @@ -303,7 +308,7 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, /* Bank 6 Write */ for (i = 0; i < N(ar5212Bank6_5111); i++) rfReg[i] = ar5212Bank6_5111[i][modesIndex]; - if (IS_CHAN_A(chan)) { /* NB: CHANNEL_A | CHANNEL_T */ + if (IEEE80211_IS_CHAN_A(chan)) { /* NB: CHANNEL_A | CHANNEL_T */ ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd84, 1, 51, 3); ar5212ModifyRfBuffer(rfReg, ee->ee_cornerCal.pd90, 1, 45, 3); } @@ -320,11 +325,11 @@ ar5111SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, ar5212ModifyRfBuffer(rfReg, gainI, 6, 29, 0); ar5212ModifyRfBuffer(rfReg, rfPloSel, 1, 4, 0); - if (IS_CHAN_QUARTER_RATE(chan) || IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_QUARTER(chan) || IEEE80211_IS_CHAN_HALF(chan)) { uint32_t rfWaitI, rfWaitS, rfMaxTime; rfWaitS = 0x1f; - rfWaitI = (IS_CHAN_HALF_RATE(chan)) ? 0x10 : 0x1f; + rfWaitI = (IEEE80211_IS_CHAN_HALF(chan)) ? 0x10 : 0x1f; rfMaxTime = 3; ar5212ModifyRfBuffer(rfReg, rfWaitS, 5, 19, 0); ar5212ModifyRfBuffer(rfReg, rfWaitI, 5, 24, 0); @@ -383,9 +388,11 @@ interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, */ static HAL_BOOL ar5111SetPowerTable(struct ath_hal *ah, - int16_t *pMinPower, int16_t *pMaxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *pMinPower, int16_t *pMaxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; FULL_PCDAC_STRUCT pcdacStruct; @@ -404,27 +411,27 @@ ar5111SetPowerTable(struct ath_hal *ah, PCDACS_EEPROM eepromPcdacs; /* setup the pcdac struct to point to the correct info, based on mode */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: + switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) { + case IEEE80211_CHAN_A: + case IEEE80211_CHAN_ST: eepromPcdacs.numChannels = ee->ee_numChannels11a; eepromPcdacs.pChannelList = ee->ee_channels11a; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11a; break; - case CHANNEL_B: + case IEEE80211_CHAN_B: eepromPcdacs.numChannels = ee->ee_numChannels2_4; eepromPcdacs.pChannelList = ee->ee_channels11b; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11b; break; - case CHANNEL_G: - case CHANNEL_108G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_108G: eepromPcdacs.numChannels = ee->ee_numChannels2_4; eepromPcdacs.pChannelList = ee->ee_channels11g; eepromPcdacs.pDataPerChannel = ee->ee_dataPerChannel11g; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -444,7 +451,7 @@ ar5111SetPowerTable(struct ath_hal *ah, /* Fill out the power values for this channel */ for (j = 0; j < pcdacStruct.numPcdacValues; j++ ) - pScaledUpDbm[j] = ar5212GetScaledPower(chan->channel, + pScaledUpDbm[j] = ar5212GetScaledPower(freq, pPcdacValues[j], pSrcStruct); /* Now scale the pcdac values to fit in the 64 entry power table */ @@ -617,7 +624,8 @@ ar5212GetLowerUpperPcdacs(uint16_t pcdac, uint16_t channel, } static HAL_BOOL -ar5111GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar5111GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { /* XXX - Get 5111 power limits! */ diff --git a/sys/dev/ath/ath_hal/ar5212/ar5112.c b/sys/dev/ath/ath_hal/ar5212/ar5112.c index b124b1a..c1920b9 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5112.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5112.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5112.c,v 1.7 2008/11/10 04:08:03 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -75,29 +75,29 @@ ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar5112SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5112SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - uint16_t freq; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - if (((chan->channel - 2192) % 5) == 0) { - channelSel = ((chan->channel - 672) * 2 - 3040)/10; + if (((freq - 2192) % 5) == 0) { + channelSel = ((freq - 672) * 2 - 3040)/10; bModeSynth = 0; - } else if (((chan->channel - 2224) % 5) == 0) { - channelSel = ((chan->channel - 704) * 2 - 3040) / 10; + } else if (((freq - 2224) % 5) == 0) { + channelSel = ((freq - 704) * 2 - 3040) / 10; bModeSynth = 1; } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -105,7 +105,7 @@ ar5112SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -113,26 +113,26 @@ ar5112SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { - freq = chan->channel - 2; /* Align to even 5MHz raster */ + } else if (((freq % 5) == 2) && (freq <= 5435)) { + freq = freq - 2; /* Align to even 5MHz raster */ channelSel = ath_hal_reverseBits( (uint32_t)(((freq - 4800)*10)/25 + 1), 8); aModeRefSel = ath_hal_reverseBits(0, 2); - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(3, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(2, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -175,7 +175,8 @@ ar5112GetRfBank(struct ath_hal *ah, int bank) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar5112SetRfRegs(struct ath_hal *ah, + const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ @@ -183,6 +184,7 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, for (i = 0; i < N(ar5212Bank##_ix##_5112); i++) \ (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5112[i][_col];\ } while (0) + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint16_t rfXpdSel, gainI; @@ -194,20 +196,22 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, HALASSERT(priv); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); + /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: - if (chan->channel > 4000 && chan->channel < 5260) { + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: + if (freq > 4000 && freq < 5260) { ob5GHz = ee->ee_ob1; db5GHz = ee->ee_db1; - } else if (chan->channel >= 5260 && chan->channel < 5500) { + } else if (freq >= 5260 && freq < 5500) { ob5GHz = ee->ee_ob2; db5GHz = ee->ee_db2; - } else if (chan->channel >= 5500 && chan->channel < 5725) { + } else if (freq >= 5500 && freq < 5725) { ob5GHz = ee->ee_ob3; db5GHz = ee->ee_db3; - } else if (chan->channel >= 5725) { + } else if (freq >= 5725) { ob5GHz = ee->ee_ob4; db5GHz = ee->ee_db4; } else { @@ -216,14 +220,14 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, rfXpdSel = ee->ee_xpd[headerInfo11A]; gainI = ee->ee_gainI[headerInfo11A]; break; - case CHANNEL_B: + case IEEE80211_CHAN_B: ob2GHz = ee->ee_ob2GHz[0]; db2GHz = ee->ee_db2GHz[0]; rfXpdSel = ee->ee_xpd[headerInfo11B]; gainI = ee->ee_gainI[headerInfo11B]; break; - case CHANNEL_G: - case CHANNEL_108G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_PUREG: /* NB: really 108G */ ob2GHz = ee->ee_ob2GHz[1]; db2GHz = ee->ee_ob2GHz[1]; rfXpdSel = ee->ee_xpd[headerInfo11G]; @@ -231,7 +235,7 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -252,7 +256,7 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[0], 2, 270, 0); ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[1], 2, 257, 0); - if (IS_CHAN_OFDM(chan)) { + if (IEEE80211_IS_CHAN_OFDM(chan)) { ar5212ModifyRfBuffer(priv->Bank6Data, gv->currStep->paramVal[GP_PWD_138], 1, 168, 3); ar5212ModifyRfBuffer(priv->Bank6Data, @@ -268,7 +272,7 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, } /* Only the 5 or 2 GHz OB/DB need to be set for a mode */ - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 287, 0); ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 290, 0); } else { @@ -296,18 +300,18 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, /* Setup Bank 7 Setup */ RF_BANK_SETUP(priv, 7, modesIndex); - if (IS_CHAN_OFDM(chan)) + if (IEEE80211_IS_CHAN_OFDM(chan)) ar5212ModifyRfBuffer(priv->Bank7Data, gv->currStep->paramVal[GP_MIXGAIN_OVR], 2, 37, 0); ar5212ModifyRfBuffer(priv->Bank7Data, gainI, 6, 14, 0); /* Adjust params for Derby TX power control */ - if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan)) { uint32_t rfDelay, rfPeriod; rfDelay = 0xf; - rfPeriod = (IS_CHAN_HALF_RATE(chan)) ? 0x8 : 0xf; + rfPeriod = (IEEE80211_IS_CHAN_HALF(chan)) ? 0x8 : 0xf; ar5212ModifyRfBuffer(priv->Bank7Data, rfDelay, 4, 58, 0); ar5212ModifyRfBuffer(priv->Bank7Data, rfPeriod, 4, 70, 0); } @@ -338,9 +342,11 @@ ar5112SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, */ static HAL_BOOL ar5112SetPowerTable(struct ath_hal *ah, - int16_t *pPowerMin, int16_t *pPowerMax, HAL_CHANNEL_INTERNAL *chan, + int16_t *pPowerMin, int16_t *pPowerMax, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint32_t numXpdGain = IS_RADX112_REV2(ah) ? 2 : 1; @@ -367,24 +373,24 @@ ar5112SetPowerTable(struct ath_hal *ah, uint16_t xgainList[2]; uint16_t xpdMask; - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: + switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) { + case IEEE80211_CHAN_A: + case IEEE80211_CHAN_ST: pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11A]; xpdGainMask = ee->ee_xgain[headerInfo11A]; break; - case CHANNEL_B: + case IEEE80211_CHAN_B: pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11B]; xpdGainMask = ee->ee_xgain[headerInfo11B]; break; - case CHANNEL_G: - case CHANNEL_108G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_108G: pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11G]; xpdGainMask = ee->ee_xgain[headerInfo11G]; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown channel flags 0x%x\n", - __func__, chan->channelFlags & CHANNEL_ALL); + __func__, chan->ic_flags); return AH_FALSE; } @@ -416,7 +422,7 @@ ar5112SetPowerTable(struct ath_hal *ah, } } - ar5212GetLowerUpperIndex(chan->channel, &pPowerExpn->pChannels[0], + ar5212GetLowerUpperIndex(freq, &pPowerExpn->pChannels[0], pPowerExpn->numChannels, &chan_idx_L, &chan_idx_R); kk = 0; @@ -474,7 +480,7 @@ ar5112SetPowerTable(struct ath_hal *ah, if (xgainList[1] == 0xDEAD) { for (jj = 0; jj < 64; jj++) { pwr_table0[jj] = interpolate_signed( - chan->channel, chan_L, chan_R, + freq, chan_L, chan_R, powTableLXPD[0][jj], powTableLXPD[kk][jj]); } Pmin = getPminAndPcdacTableFromPowerTable(&pwr_table0[0], @@ -487,10 +493,10 @@ ar5112SetPowerTable(struct ath_hal *ah, } else { for (jj = 0; jj < 64; jj++) { pwr_table0[jj] = interpolate_signed( - chan->channel, chan_L, chan_R, + freq, chan_L, chan_R, powTableLXPD[0][jj], powTableLXPD[kk][jj]); pwr_table1[jj] = interpolate_signed( - chan->channel, chan_L, chan_R, + freq, chan_L, chan_R, powTableHXPD[0][jj], powTableHXPD[kk][jj]); } if (numXpdGain == 2) { @@ -757,9 +763,11 @@ ar5112GetMinPower(struct ath_hal *ah, const EXPN_DATA_PER_CHANNEL_5112 *data) } static HAL_BOOL -ar5112GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar5112GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; int numChannels=0,i,last; int totalD, totalF,totalMin; @@ -767,16 +775,16 @@ ar5112GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, const EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL; *maxPow = 0; - if (IS_CHAN_A(chan)) { + if (IEEE80211_IS_CHAN_A(chan)) { powerArray = ee->ee_modePowerArray5112; data = powerArray[headerInfo11A].pDataPerChannel; numChannels = powerArray[headerInfo11A].numChannels; - } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) { + } else if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) { /* XXX - is this correct? Should we also use the same power for turbo G? */ powerArray = ee->ee_modePowerArray5112; data = powerArray[headerInfo11G].pDataPerChannel; numChannels = powerArray[headerInfo11G].numChannels; - } else if (IS_CHAN_B(chan)) { + } else if (IEEE80211_IS_CHAN_B(chan)) { powerArray = ee->ee_modePowerArray5112; data = powerArray[headerInfo11B].pDataPerChannel; numChannels = powerArray[headerInfo11B].numChannels; @@ -789,9 +797,9 @@ ar5112GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = data[0].maxPower_t4; *minPow = ar5112GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -804,18 +812,18 @@ ar5112GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, /* Linearly interpolate the power value now */ for (last=0,i=0; - (i<numChannels) && (chan->channel > data[i].channelValue); + (i<numChannels) && (freq > data[i].channelValue); last=i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = data[i].maxPower_t4 - data[last].maxPower_t4; - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD); + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD); totalMin = ar5112GetMinPower(ah,&data[i]) - ar5112GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar5112GetMinPower(ah, &data[last])*totalD)/totalD); + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar5112GetMinPower(ah, &data[last])*totalD)/totalD); return (AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = data[i].maxPower_t4; *minPow = ar5112GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212.h b/sys/dev/ath/ath_hal/ar5212/ar5212.h index 6645b76..c73b68c 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212.h +++ b/sys/dev/ath/ath_hal/ar5212/ar5212.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5212.h,v 1.16 2008/11/22 07:42:00 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AR5212_H_ #define _ATH_AR5212_H_ @@ -133,16 +133,18 @@ typedef struct RfHalFuncs { void (*rfDetach)(struct ath_hal *ah); void (*writeRegs)(struct ath_hal *, - u_int modeIndex, u_int freqIndex, int regWrites); + u_int modeIndex, u_int freqIndex, int regWrites); uint32_t *(*getRfBank)(struct ath_hal *ah, int bank); - HAL_BOOL (*setChannel)(struct ath_hal *, HAL_CHANNEL_INTERNAL *); + HAL_BOOL (*setChannel)(struct ath_hal *, + const struct ieee80211_channel *); HAL_BOOL (*setRfRegs)(struct ath_hal *, - HAL_CHANNEL_INTERNAL *, uint16_t modesIndex, + const struct ieee80211_channel *, uint16_t modesIndex, uint16_t *rfXpdGain); HAL_BOOL (*setPowerTable)(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, - HAL_CHANNEL_INTERNAL *, uint16_t *rfXpdGain); - HAL_BOOL (*getChannelMaxMinPower)(struct ath_hal *ah, HAL_CHANNEL *, + const struct ieee80211_channel *, uint16_t *rfXpdGain); + HAL_BOOL (*getChannelMaxMinPower)(struct ath_hal *ah, + const const struct ieee80211_channel *, int16_t *maxPow, int16_t *minPow); int16_t (*getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL*); } RF_HAL_FUNCS; @@ -186,8 +188,6 @@ struct ar5212AniState { uint32_t listenTime; /* NB: intentionally ordered so data exported to user space is first */ - HAL_CHANNEL c; - HAL_BOOL isSetup; /* has state to do a restore */ uint32_t txFrameCount; /* Last txFrameCount */ uint32_t rxFrameCount; /* Last rx Frame count */ uint32_t cycleCount; /* Last cycleCount @@ -319,7 +319,7 @@ struct ath_hal_5212 { struct ar5212AniParams ah_aniParams24; /* 2.4GHz parameters */ struct ar5212AniParams ah_aniParams5; /* 5GHz parameters */ struct ar5212AniState *ah_curani; /* cached last reference */ - struct ar5212AniState ah_ani[64]; /* per-channel state */ + struct ar5212AniState ah_ani[AH_MAXCHAN]; /* per-channel state */ /* * Transmit power state. Note these are maintained @@ -395,16 +395,16 @@ struct ath_hal_5212 { */ #define SAVE_CCK(_ah, _chan, _flag) do { \ if ((IS_2425(_ah) || IS_2417(_ah)) && \ - (((_chan)->channelFlags) & CHANNEL_CCK)) { \ - (_chan)->channelFlags &= ~CHANNEL_CCK; \ - (_chan)->channelFlags |= CHANNEL_OFDM; \ + (((_chan)->ic_flags) & IEEE80211_CHAN_CCK)) { \ + (_chan)->ic_flags &= ~IEEE80211_CHAN_CCK; \ + (_chan)->ic_flags |= IEEE80211_CHAN_DYN; \ (_flag) = AH_TRUE; \ } \ } while (0) #define RESTORE_CCK(_ah, _chan, _flag) do { \ - if ((IS_2425(_ah) || IS_2417(_ah)) && (_flag) == AH_TRUE) {\ - (_chan)->channelFlags &= ~CHANNEL_OFDM; \ - (_chan)->channelFlags |= CHANNEL_CCK; \ + if ((IS_2425(_ah) || IS_2417(_ah)) && (_flag)) { \ + (_chan)->ic_flags &= ~IEEE80211_CHAN_DYN; \ + (_chan)->ic_flags |= IEEE80211_CHAN_CCK; \ } \ } while (0) @@ -525,26 +525,32 @@ extern HAL_STATUS ar5212ProcRxDesc(struct ath_hal *ah, struct ath_desc *, struct ath_rx_status *); extern HAL_BOOL ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status); -extern HAL_BOOL ar5212SetChannel(struct ath_hal *, HAL_CHANNEL_INTERNAL *); + struct ieee80211_channel *chan, HAL_BOOL bChannelChange, + HAL_STATUS *status); +extern HAL_BOOL ar5212SetChannel(struct ath_hal *, + const struct ieee80211_channel *); extern void ar5212SetOperatingMode(struct ath_hal *ah, int opmode); extern HAL_BOOL ar5212PhyDisable(struct ath_hal *ah); extern HAL_BOOL ar5212Disable(struct ath_hal *ah); -extern HAL_BOOL ar5212ChipReset(struct ath_hal *ah, HAL_CHANNEL *); -extern HAL_BOOL ar5212PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, - HAL_BOOL *isIQdone); -extern HAL_BOOL ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, - u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); -extern HAL_BOOL ar5212ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan); +extern HAL_BOOL ar5212ChipReset(struct ath_hal *ah, + const struct ieee80211_channel *); +extern HAL_BOOL ar5212PerCalibration(struct ath_hal *ah, + struct ieee80211_channel *chan, HAL_BOOL *isIQdone); +extern HAL_BOOL ar5212PerCalibrationN(struct ath_hal *ah, + struct ieee80211_channel *chan, u_int chainMask, + HAL_BOOL longCal, HAL_BOOL *isCalDone); +extern HAL_BOOL ar5212ResetCalValid(struct ath_hal *ah, + const struct ieee80211_channel *); extern int16_t ar5212GetNoiseFloor(struct ath_hal *ah); extern void ar5212InitNfCalHistBuffer(struct ath_hal *); extern int16_t ar5212GetNfHistMid(const int16_t calData[]); -extern void ar5212SetSpurMitigation(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +extern void ar5212SetSpurMitigation(struct ath_hal *, + const struct ieee80211_channel *); extern HAL_BOOL ar5212SetAntennaSwitchInternal(struct ath_hal *ah, - HAL_ANT_SETTING settings, const HAL_CHANNEL_INTERNAL *ichan); + HAL_ANT_SETTING settings, const struct ieee80211_channel *); extern HAL_BOOL ar5212SetTxPowerLimit(struct ath_hal *ah, uint32_t limit); extern HAL_BOOL ar5212GetChipPowerLimits(struct ath_hal *ah, - HAL_CHANNEL *chans, uint32_t nchans); + struct ieee80211_channel *chan); extern void ar5212InitializeGainValues(struct ath_hal *); extern HAL_RFGAIN ar5212GetRfgain(struct ath_hal *ah); extern void ar5212RequestRfgain(struct ath_hal *); @@ -597,7 +603,7 @@ extern void ar5212AniPhyErrReport(struct ath_hal *ah, const struct ath_rx_status *rs); extern void ar5212ProcessMibIntr(struct ath_hal *, const HAL_NODE_STATS *); extern void ar5212AniPoll(struct ath_hal *, const HAL_NODE_STATS *, - HAL_CHANNEL *); -extern void ar5212AniReset(struct ath_hal *, HAL_CHANNEL_INTERNAL *, + const struct ieee80211_channel *); +extern void ar5212AniReset(struct ath_hal *, const struct ieee80211_channel *, HAL_OPMODE, int); #endif /* _ATH_AR5212_H_ */ diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c b/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c index bef9c28e..14a26e9 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -99,43 +99,6 @@ disableAniMIBCounters(struct ath_hal *ah) } /* - * This routine returns the index into the aniState array that - * corresponds to the channel in *chan. If no match is found and the - * array is still not fully utilized, a new entry is created for the - * channel. We assume the attach function has already initialized the - * ah_ani values and only the channel field needs to be set. - */ -static int -ar5212GetAniChannelIndex(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) -{ -#define N(a) (sizeof(a) / sizeof(a[0])) - struct ath_hal_5212 *ahp = AH5212(ah); - int i; - - for (i = 0; i < N(ahp->ah_ani); i++) { - struct ar5212AniState *asp = &ahp->ah_ani[i]; - if (asp->c.channel == chan->channel) - return i; - if (asp->c.channel == 0) { - asp->c.channel = chan->channel; - asp->c.channelFlags = chan->channelFlags; - asp->c.privFlags = chan->privFlags; - asp->isSetup = AH_FALSE; - if (IS_CHAN_2GHZ(chan)) - asp->params = &ahp->ah_aniParams24; - else - asp->params = &ahp->ah_aniParams5; - return i; - } - } - /* XXX statistic */ - HALDEBUG(ah, HAL_DEBUG_ANY, - "No more channel states left. Using channel 0\n"); - return 0; /* XXX gotta return something valid */ -#undef N -} - -/* * Return the current ANI state of the channel we're on */ struct ar5212AniState * @@ -421,7 +384,7 @@ static void ar5212AniOfdmErrTrigger(struct ath_hal *ah) { struct ath_hal_5212 *ahp = AH5212(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; struct ar5212AniState *aniState; const struct ar5212AniParams *params; @@ -504,8 +467,7 @@ ar5212AniOfdmErrTrigger(struct ath_hal *ah) * weak signal detection and zero firstepLevel to * maximize CCK sensitivity */ - /* XXX can optimize */ - if (IS_CHAN_B(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { if (!aniState->ofdmWeakSigDetectOff) { HALDEBUG(ah, HAL_DEBUG_ANI, "%s: rssi %d OWSD off\n", @@ -532,7 +494,7 @@ static void ar5212AniCckErrTrigger(struct ath_hal *ah) { struct ath_hal_5212 *ahp = AH5212(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; struct ar5212AniState *aniState; const struct ar5212AniParams *params; @@ -572,7 +534,8 @@ ar5212AniCckErrTrigger(struct ath_hal *ah) * CCK sensitivity in 11b/g mode. */ /* XXX can optimize */ - if (IS_CHAN_B(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_B(chan) || + IEEE80211_IS_CHAN_G(chan)) { if (aniState->firstepLevel > 0) { HALDEBUG(ah, HAL_DEBUG_ANI, "%s: rssi %d zero ST (was %u)\n", @@ -613,31 +576,35 @@ ar5212AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState) /* * Restore/reset the ANI parameters and reset the statistics. * This routine must be called for every channel change. - * - * NOTE: This is where ah_curani is set; other ani code assumes - * it is setup to reflect the current channel. */ void -ar5212AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar5212AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, HAL_OPMODE opmode, int restore) { struct ath_hal_5212 *ahp = AH5212(ah); - struct ar5212AniState *aniState; + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); + /* XXX bounds check ic_devdata */ + struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata]; uint32_t rxfilter; - int index; - index = ar5212GetAniChannelIndex(ah, chan); - aniState = &ahp->ah_ani[index]; + if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) { + OS_MEMZERO(aniState, sizeof(*aniState)); + if (IEEE80211_IS_CHAN_2GHZ(chan)) + aniState->params = &ahp->ah_aniParams24; + else + aniState->params = &ahp->ah_aniParams5; + ichan->privFlags |= CHANNEL_ANI_INIT; + HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0); + } ahp->ah_curani = aniState; #if 0 - ath_hal_printf(ah,"%s: chan %u/0x%x restore %d setup %d opmode %u\n", - __func__, chan->channel, chan->channelFlags, restore, - aniState->isSetup, opmode); + ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n", + __func__, chan->ic_freq, chan->ic_flags, restore, opmode, + ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); #else - HALDEBUG(ah, HAL_DEBUG_ANI, - "%s: chan %u/0x%x restore %d setup %d opmode %u\n", - __func__, chan->channel, chan->channelFlags, restore, - aniState->isSetup, opmode); + HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n", + __func__, chan->ic_freq, chan->ic_flags, restore, opmode, + ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); #endif OS_MARK(ah, AH_MARK_ANI_RESET, opmode); @@ -659,7 +626,7 @@ ar5212AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, * XXX if ANI follows hardware, we don't care what mode we're * XXX in, we should keep the ani parameters */ - if (restore && aniState->isSetup) { + if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) { ar5212AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, aniState->noiseImmunityLevel); ar5212AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, @@ -677,7 +644,7 @@ ar5212AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, AH_TRUE); ar5212AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE); ar5212AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); - aniState->isSetup = AH_TRUE; + ichan->privFlags |= CHANNEL_ANI_SETUP; } ar5212AniRestart(ah, aniState); @@ -953,7 +920,7 @@ updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState) */ void ar5212AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, - HAL_CHANNEL *chan) + const struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); struct ar5212AniState *aniState = ahp->ah_curani; diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c index 5c51af8..da6a79e 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5212_attach.c,v 1.18 2008/11/19 22:10:42 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -32,7 +32,6 @@ static const struct ath_hal_private ar5212hal = {{ .ah_magic = AR5212_MAGIC, .ah_abi = HAL_ABI_VERSION, - .ah_countryCode = CTRY_DEFAULT, .ah_getRateTable = ar5212GetRateTable, .ah_detach = ar5212Detach, @@ -653,12 +652,12 @@ HAL_BOOL ar5212GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high) { - if (flags & CHANNEL_5GHZ) { + if (flags & IEEE80211_CHAN_5GHZ) { *low = 4915; *high = 6100; return AH_TRUE; } - if ((flags & CHANNEL_2GHZ) && + if ((flags & IEEE80211_CHAN_2GHZ) && (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) || ath_hal_eepromGetFlag(ah, AR_EEP_GMODE))) { *low = 2312; diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c index fa4f1ab..09af7cb 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -34,8 +34,6 @@ #define AR_NUM_GPIO 6 /* 6 GPIO pins */ #define AR_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */ -extern void ar5212SetRateDurationTable(struct ath_hal *, HAL_CHANNEL *); - void ar5212GetMacAddress(struct ath_hal *ah, uint8_t *mac) { @@ -294,12 +292,12 @@ ar5212ResetTsf(struct ath_hal *ah) void ar5212SetBasicRate(struct ath_hal *ah, HAL_RATE_SET *rs) { - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; uint32_t reg; uint8_t xset; int i; - if (chan == AH_NULL || !IS_CHAN_CCK(chan)) + if (chan == AH_NULL || !IEEE80211_IS_CHAN_CCK(chan)) return; xset = 0; for (i = 0; i < rs->rs_count; i++) { @@ -423,15 +421,15 @@ HAL_BOOL ar5212SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING setting) { struct ath_hal_5212 *ahp = AH5212(ah); - const HAL_CHANNEL_INTERNAL *ichan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; - if (!ahp->ah_phyPowerOn || ichan == AH_NULL) { + if (!ahp->ah_phyPowerOn || chan == AH_NULL) { /* PHY powered off, just stash settings */ ahp->ah_antControl = setting; ahp->ah_diversity = (setting == HAL_ANT_VARIABLE); return AH_TRUE; } - return ar5212SetAntennaSwitchInternal(ah, setting, ichan); + return ar5212SetAntennaSwitchInternal(ah, setting, chan); } HAL_BOOL @@ -453,7 +451,7 @@ ar5212SetSifsTime(struct ath_hal *ah, u_int us) } else { /* convert to system clocks */ OS_REG_WRITE(ah, AR_D_GBL_IFS_SIFS, ath_hal_mac_clks(ah, us)); - ahp->ah_sifstime = us; + ahp->ah_slottime = us; return AH_TRUE; } } @@ -592,7 +590,7 @@ ar5212SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now) return; /* Don't apply coverage class to non A channels */ - if (!IS_CHAN_A(AH_PRIVATE(ah)->ah_curchan)) + if (!IEEE80211_IS_CHAN_A(AH_PRIVATE(ah)->ah_curchan)) return; /* Get core clock rate */ @@ -601,10 +599,10 @@ ar5212SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now) /* Compute EIFS */ slot = coverageclass * 3 * clkRate; eifs = coverageclass * 6 * clkRate; - if (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) { + if (IEEE80211_IS_CHAN_HALF(AH_PRIVATE(ah)->ah_curchan)) { slot += IFS_SLOT_HALF_RATE; eifs += IFS_EIFS_HALF_RATE; - } else if (IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(AH_PRIVATE(ah)->ah_curchan)) { slot += IFS_SLOT_QUARTER_RATE; eifs += IFS_EIFS_QUARTER_RATE; } else { /* full rate */ diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c b/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c index ed40898..ca6b700 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -34,24 +34,32 @@ static HAL_BOOL ar5212SetResetReg(struct ath_hal *, uint32_t resetMask); /* NB: public for 5312 use */ -HAL_BOOL ar5212IsSpurChannel(struct ath_hal *, HAL_CHANNEL *); -HAL_BOOL ar5212ChannelChange(struct ath_hal *, HAL_CHANNEL *); -int16_t ar5212GetNf(struct ath_hal *, HAL_CHANNEL_INTERNAL *); -HAL_BOOL ar5212SetBoardValues(struct ath_hal *, HAL_CHANNEL_INTERNAL *); -void ar5212SetDeltaSlope(struct ath_hal *, HAL_CHANNEL *); +HAL_BOOL ar5212IsSpurChannel(struct ath_hal *, + const struct ieee80211_channel *); +HAL_BOOL ar5212ChannelChange(struct ath_hal *, + const struct ieee80211_channel *); +int16_t ar5212GetNf(struct ath_hal *, struct ieee80211_channel *); +HAL_BOOL ar5212SetBoardValues(struct ath_hal *, + const struct ieee80211_channel *); +void ar5212SetDeltaSlope(struct ath_hal *, + const struct ieee80211_channel *); HAL_BOOL ar5212SetTransmitPower(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain); + const struct ieee80211_channel *chan, uint16_t *rfXpdGain); static HAL_BOOL ar5212SetRateTable(struct ath_hal *, - HAL_CHANNEL *, int16_t tpcScaleReduction, int16_t powerLimit, + const struct ieee80211_channel *, int16_t tpcScaleReduction, + int16_t powerLimit, HAL_BOOL commit, int16_t *minPower, int16_t *maxPower); static void ar5212CorrectGainDelta(struct ath_hal *, int twiceOfdmCckDelta); -static void ar5212GetTargetPowers(struct ath_hal *, HAL_CHANNEL *, +static void ar5212GetTargetPowers(struct ath_hal *, + const struct ieee80211_channel *, const TRGT_POWER_INFO *pPowerInfo, uint16_t numChannels, TRGT_POWER_INFO *pNewPower); static uint16_t ar5212GetMaxEdgePower(uint16_t channel, const RD_EDGES_POWER *pRdEdgesPower); -void ar5212SetRateDurationTable(struct ath_hal *, HAL_CHANNEL *); -void ar5212SetIFSTiming(struct ath_hal *, HAL_CHANNEL *); +void ar5212SetRateDurationTable(struct ath_hal *, + const struct ieee80211_channel *); +void ar5212SetIFSTiming(struct ath_hal *, + const struct ieee80211_channel *); /* NB: public for RF backend use */ void ar5212GetLowerUpperValues(uint16_t value, @@ -97,7 +105,8 @@ write_common(struct ath_hal *ah, const HAL_INI_ARRAY *ia, */ HAL_BOOL ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status) + struct ieee80211_channel *chan, + HAL_BOOL bChannelChange, HAL_STATUS *status) { #define N(a) (sizeof (a) / sizeof (a[0])) #define FAIL(_code) do { ecode = _code; goto bad; } while (0) @@ -116,26 +125,11 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, int8_t twiceAntennaGain, twiceAntennaReduction; uint32_t ackTpcPow, ctsTpcPow, chirpTpcPow; HAL_BOOL isBmode = AH_FALSE; - HAL_BOOL ichan_isBmode = AH_FALSE; HALASSERT(ah->ah_magic == AR5212_MAGIC); ee = AH_PRIVATE(ah)->ah_eeprom; OS_MARK(ah, AH_MARK_RESET, bChannelChange); -#define IS(_c,_f) (((_c)->channelFlags & _f) || 0) - if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as 2GHz or 5GHz\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } - if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as OFDM or CCK\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } -#undef IS /* Bring out of sleep mode */ if (!ar5212SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { @@ -148,12 +142,8 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, * Map public channel to private. */ ichan = ath_hal_checkchannel(ah, chan); - if (ichan == AH_NULL) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + if (ichan == AH_NULL) FAIL(HAL_EINVAL); - } switch (opmode) { case HAL_M_STA: case HAL_M_IBSS: @@ -168,7 +158,6 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, } HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER3); - SAVE_CCK(ah, ichan, ichan_isBmode); SAVE_CCK(ah, chan, isBmode); /* Preserve certain DMA hardware registers on a channel change */ @@ -215,13 +204,13 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, */ if (bChannelChange && (AH_PRIVATE(ah)->ah_curchan != AH_NULL) && - (chan->channel != AH_PRIVATE(ah)->ah_curchan->channel) && - ((chan->channelFlags & CHANNEL_ALL) == - (AH_PRIVATE(ah)->ah_curchan->channelFlags & CHANNEL_ALL))) { + (chan->ic_freq != AH_PRIVATE(ah)->ah_curchan->ic_freq) && + ((chan->ic_flags & IEEE80211_CHAN_ALLTURBO) == + (AH_PRIVATE(ah)->ah_curchan->ic_flags & IEEE80211_CHAN_ALLTURBO))) { if (ar5212ChannelChange(ah, chan)) { /* If ChannelChange completed - skip the rest of reset */ /* XXX ani? */ - return AH_TRUE; + goto done; } } } @@ -258,31 +247,32 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, } /* Setup the indices for the next set of register array writes */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - modesIndex = 1; - freqIndex = 1; - break; - case CHANNEL_T: - modesIndex = 2; - freqIndex = 1; - break; - case CHANNEL_B: - modesIndex = 3; + if (IEEE80211_IS_CHAN_2GHZ(chan)) { freqIndex = 2; - break; - case CHANNEL_PUREG: - modesIndex = 4; - freqIndex = 2; - break; - case CHANNEL_108G: - modesIndex = 5; - freqIndex = 2; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - FAIL(HAL_EINVAL); + if (IEEE80211_IS_CHAN_108G(chan)) + modesIndex = 5; + else if (IEEE80211_IS_CHAN_G(chan)) + modesIndex = 4; + else if (IEEE80211_IS_CHAN_B(chan)) + modesIndex = 3; + else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: invalid channel %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + FAIL(HAL_EINVAL); + } + } else { + freqIndex = 1; + if (IEEE80211_IS_CHAN_TURBO(chan)) + modesIndex = 2; + else if (IEEE80211_IS_CHAN_A(chan)) + modesIndex = 1; + else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: invalid channel %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + FAIL(HAL_EINVAL); + } } OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -297,7 +287,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); - if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan)) { ar5212SetIFSTiming(ah, chan); if (IS_5413(ah)) { /* @@ -319,7 +309,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, AR_PHY_ADC_CTL_OFF_PWDADC); /* TX_PWR_ADJ */ - if (chan->channel == 2484) { + if (ichan->channel == 2484) { cckOfdmPwrDelta = SCALE_OC_DELTA( ee->ee_cckOfdmPwrDelta - ee->ee_scaledCh14FilterCckDelta); @@ -328,7 +318,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, ee->ee_cckOfdmPwrDelta); } - if (IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_G(chan)) { OS_REG_WRITE(ah, AR_PHY_TXPWRADJ, SM((ee->ee_cckOfdmPwrDelta*-1), AR_PHY_TXPWRADJ_CCK_GAIN_DELTA) | @@ -365,8 +355,8 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0e); if (IS_5413(ah) || IS_2417(ah)) { - uint32_t newReg=1; - if (IS_DISABLE_FAST_ADC_CHAN(chan->channel)) + uint32_t newReg = 1; + if (IS_DISABLE_FAST_ADC_CHAN(ichan->channel)) newReg = 0; /* As it's a clock changing register, only write when the value needs to be changed */ if (OS_REG_READ(ah, AR_PHY_FAST_ADC) != newReg) @@ -374,29 +364,29 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, } /* Setup the transmit power values. */ - if (!ar5212SetTransmitPower(ah, ichan, rfXpdGain)) { + if (!ar5212SetTransmitPower(ah, chan, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error init'ing transmit power\n", __func__); FAIL(HAL_EIO); } /* Write the analog registers */ - if (!ahp->ah_rfHal->setRfRegs(ah, ichan, modesIndex, rfXpdGain)) { + if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: ar5212SetRfRegs failed\n", __func__); FAIL(HAL_EIO); } /* Write delta slope for OFDM enabled modes (A, G, Turbo) */ - if (IS_CHAN_OFDM(chan)) { - if ((IS_5413(ah) || (AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3)) && - (!IS_CHAN_B(chan))) - ar5212SetSpurMitigation(ah, ichan); + if (IEEE80211_IS_CHAN_OFDM(chan)) { + if (IS_5413(ah) || + AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3) + ar5212SetSpurMitigation(ah, chan); ar5212SetDeltaSlope(ah, chan); } /* Setup board specific options for EEPROM version 3 */ - if (!ar5212SetBoardValues(ah, ichan)) { + if (!ar5212SetBoardValues(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error setting board options\n", __func__); FAIL(HAL_EIO); @@ -439,7 +429,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ - if (!ar5212SetChannel(ah, ichan)) + if (!ar5212SetChannel(ah, chan)) FAIL(HAL_EIO); OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -450,10 +440,9 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* Set Tx frame start to tx data start delay */ if (IS_RAD5112_ANY(ah) && - (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan) || - IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan))) { + (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan))) { txFrm2TxDStart = - (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) ? + IEEE80211_IS_CHAN_HALF(chan) ? TX_FRAME_D_START_HALF_RATE: TX_FRAME_D_START_QUARTER_RATE; OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, @@ -482,7 +471,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, * Value is in 100ns increments. */ synthDelay = OS_REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_B(chan)) { synthDelay = (4 * synthDelay) / 22; } else { synthDelay /= 10; @@ -498,9 +487,9 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, * extra BASE_ACTIVATE_DELAY usecs to ensure this condition * does not happen. */ - if (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); - } else if (IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); } else { OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); @@ -524,7 +513,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, | AR_PHY_AGC_CONTROL_CAL | AR_PHY_AGC_CONTROL_NF); - if (!IS_CHAN_B(chan) && ahp->ah_bIQCalibration != IQ_CAL_DONE) { + if (!IEEE80211_IS_CHAN_B(chan) && ahp->ah_bIQCalibration != IQ_CAL_DONE) { /* Start IQ calibration w/ 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples */ OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX, @@ -605,7 +594,7 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, SM(0, AR_NOACK_BYTE_OFFSET)); /* Get Antenna Gain reduction */ - if (IS_CHAN_5GHZ(chan)) { + if (IEEE80211_IS_CHAN_5GHZ(chan)) { ath_hal_eepromGet(ah, AR_EEP_ANTGAINMAX_5, &twiceAntennaGain); } else { ath_hal_eepromGet(ah, AR_EEP_ANTGAINMAX_2, &twiceAntennaGain); @@ -616,27 +605,27 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* TPC for self-generated frames */ ackTpcPow = MS(ahp->ah_macTPC, AR_TPC_ACK); - if ((ackTpcPow-ahp->ah_txPowerIndexOffset) > ichan->maxTxPower) - ackTpcPow = ichan->maxTxPower+ahp->ah_txPowerIndexOffset; + if ((ackTpcPow-ahp->ah_txPowerIndexOffset) > chan->ic_maxpower) + ackTpcPow = chan->ic_maxpower+ahp->ah_txPowerIndexOffset; - if (ackTpcPow > (2*ichan->maxRegTxPower - twiceAntennaReduction)) - ackTpcPow = (2*ichan->maxRegTxPower - twiceAntennaReduction) + if (ackTpcPow > (2*chan->ic_maxregpower - twiceAntennaReduction)) + ackTpcPow = (2*chan->ic_maxregpower - twiceAntennaReduction) + ahp->ah_txPowerIndexOffset; ctsTpcPow = MS(ahp->ah_macTPC, AR_TPC_CTS); - if ((ctsTpcPow-ahp->ah_txPowerIndexOffset) > ichan->maxTxPower) - ctsTpcPow = ichan->maxTxPower+ahp->ah_txPowerIndexOffset; + if ((ctsTpcPow-ahp->ah_txPowerIndexOffset) > chan->ic_maxpower) + ctsTpcPow = chan->ic_maxpower+ahp->ah_txPowerIndexOffset; - if (ctsTpcPow > (2*ichan->maxRegTxPower - twiceAntennaReduction)) - ctsTpcPow = (2*ichan->maxRegTxPower - twiceAntennaReduction) + if (ctsTpcPow > (2*chan->ic_maxregpower - twiceAntennaReduction)) + ctsTpcPow = (2*chan->ic_maxregpower - twiceAntennaReduction) + ahp->ah_txPowerIndexOffset; chirpTpcPow = MS(ahp->ah_macTPC, AR_TPC_CHIRP); - if ((chirpTpcPow-ahp->ah_txPowerIndexOffset) > ichan->maxTxPower) - chirpTpcPow = ichan->maxTxPower+ahp->ah_txPowerIndexOffset; + if ((chirpTpcPow-ahp->ah_txPowerIndexOffset) > chan->ic_maxpower) + chirpTpcPow = chan->ic_maxpower+ahp->ah_txPowerIndexOffset; - if (chirpTpcPow > (2*ichan->maxRegTxPower - twiceAntennaReduction)) - chirpTpcPow = (2*ichan->maxRegTxPower - twiceAntennaReduction) + if (chirpTpcPow > (2*chan->ic_maxregpower - twiceAntennaReduction)) + chirpTpcPow = (2*chan->ic_maxregpower - twiceAntennaReduction) + ahp->ah_txPowerIndexOffset; if (ackTpcPow > 63) @@ -667,28 +656,20 @@ ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg); AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ - - if (bChannelChange) { - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - chan->maxRegTxPower = ichan->maxRegTxPower; - chan->maxTxPower = ichan->maxTxPower; - chan->minTxPower = ichan->minTxPower; - } +#if 0 +done: +#endif + if (bChannelChange && !IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; HALDEBUG(ah, HAL_DEBUG_RESET, "%s: done\n", __func__); - RESTORE_CCK(ah, ichan, ichan_isBmode); RESTORE_CCK(ah, chan, isBmode); OS_MARK(ah, AH_MARK_RESET_DONE, 0); return AH_TRUE; bad: - if (ichan != AH_NULL) - RESTORE_CCK(ah, ichan, ichan_isBmode); RESTORE_CCK(ah, chan, isBmode); OS_MARK(ah, AH_MARK_RESET_DONE, ecode); @@ -703,7 +684,7 @@ bad: * Call the rf backend to change the channel. */ HAL_BOOL -ar5212SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5212SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); @@ -720,7 +701,7 @@ ar5212SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * time, the function returns false as a reset is necessary */ HAL_BOOL -ar5212ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212ChannelChange(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t ulCount; uint32_t data, synthDelay, qnum; @@ -754,7 +735,7 @@ ar5212ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) return AH_FALSE; /* Change the synth */ - if (!ar5212SetChannel(ah, ichan)) + if (!ar5212SetChannel(ah, chan)) return AH_FALSE; /* @@ -762,7 +743,7 @@ ar5212ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) * Read the phy active delay register. Value is in 100ns increments. */ data = OS_REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; - if (IS_CHAN_CCK(ichan)) { + if (IEEE80211_IS_CHAN_B(chan)) { synthDelay = (4 * data) / 22; } else { synthDelay = data / 10; @@ -770,17 +751,17 @@ ar5212ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); /* Setup the transmit power values. */ - if (!ar5212SetTransmitPower(ah, ichan, rfXpdGain)) { + if (!ar5212SetTransmitPower(ah, chan, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error init'ing transmit power\n", __func__); return AH_FALSE; } /* Write delta slope for OFDM enabled modes (A, G, Turbo) */ - if (IS_CHAN_OFDM(ichan)) { - if ((IS_5413(ah) || (AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3)) && - (!IS_CHAN_B(chan))) - ar5212SetSpurMitigation(ah, ichan); + if (IEEE80211_IS_CHAN_OFDM(chan)) { + if (IS_5413(ah) || + AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3) + ar5212SetSpurMitigation(ah, chan); ar5212SetDeltaSlope(ah, chan); } @@ -789,14 +770,6 @@ ar5212ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) /* Start Noise Floor Cal */ OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); - - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - chan->maxRegTxPower = ichan->maxRegTxPower; - chan->maxTxPower = ichan->maxTxPower; - chan->minTxPower = ichan->minTxPower; return AH_TRUE; } @@ -860,10 +833,10 @@ ar5212Disable(struct ath_hal *ah) * WARNING: The order of the PLL and mode registers must be correct. */ HAL_BOOL -ar5212ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan) { - OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->channel : 0); + OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0); /* * Reset the HW - PCI must be reset after the rest of the @@ -895,48 +868,47 @@ ar5212ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) if (IS_5413(ah)) { /* NB: =>'s 5424 also */ rfMode = AR_PHY_MODE_AR5112; - if (IS_CHAN_HALF_RATE(chan)) + if (IEEE80211_IS_CHAN_HALF(chan)) rfMode |= AR_PHY_MODE_HALF; - else if (IS_CHAN_QUARTER_RATE(chan)) + else if (IEEE80211_IS_CHAN_QUARTER(chan)) rfMode |= AR_PHY_MODE_QUARTER; - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_CCK(chan)) phyPLL = AR_PHY_PLL_CTL_44_5112; else phyPLL = AR_PHY_PLL_CTL_40_5413; } else if (IS_RAD5111(ah)) { rfMode = AR_PHY_MODE_AR5111; - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_CCK(chan)) phyPLL = AR_PHY_PLL_CTL_44; else phyPLL = AR_PHY_PLL_CTL_40; - if (IS_CHAN_HALF_RATE(chan)) + if (IEEE80211_IS_CHAN_HALF(chan)) phyPLL = AR_PHY_PLL_CTL_HALF; - else if (IS_CHAN_QUARTER_RATE(chan)) + else if (IEEE80211_IS_CHAN_QUARTER(chan)) phyPLL = AR_PHY_PLL_CTL_QUARTER; } else { /* 5112, 2413, 2316, 2317 */ rfMode = AR_PHY_MODE_AR5112; - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_CCK(chan)) phyPLL = AR_PHY_PLL_CTL_44_5112; else phyPLL = AR_PHY_PLL_CTL_40_5112; - if (IS_CHAN_HALF_RATE(chan)) + if (IEEE80211_IS_CHAN_HALF(chan)) phyPLL |= AR_PHY_PLL_CTL_HALF; - else if (IS_CHAN_QUARTER_RATE(chan)) + else if (IEEE80211_IS_CHAN_QUARTER(chan)) phyPLL |= AR_PHY_PLL_CTL_QUARTER; } - if (IS_CHAN_OFDM(chan) && (IS_CHAN_CCK(chan) || - IS_CHAN_G(chan))) + if (IEEE80211_IS_CHAN_G(chan)) rfMode |= AR_PHY_MODE_DYNAMIC; - else if (IS_CHAN_OFDM(chan)) + else if (IEEE80211_IS_CHAN_OFDM(chan)) rfMode |= AR_PHY_MODE_OFDM; else rfMode |= AR_PHY_MODE_CCK; - if (IS_CHAN_5GHZ(chan)) + if (IEEE80211_IS_CHAN_5GHZ(chan)) rfMode |= AR_PHY_MODE_RF5GHZ; else rfMode |= AR_PHY_MODE_RF2GHZ; - turbo = IS_CHAN_TURBO(chan) ? + turbo = IEEE80211_IS_CHAN_TURBO(chan) ? (AR_PHY_FC_TURBO_MODE | AR_PHY_FC_TURBO_SHORT) : 0; curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL); /* @@ -946,7 +918,7 @@ ar5212ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) * mode bit is set * - Turbo cannot be set at the same time as CCK or DYNAMIC */ - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { OS_REG_WRITE(ah, AR_PHY_TURBO, turbo); OS_REG_WRITE(ah, AR_PHY_MODE, rfMode); if (curPhyPLL != phyPLL) { @@ -972,8 +944,9 @@ ar5212ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) * changes. */ HAL_BOOL -ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, - HAL_BOOL longCal, HAL_BOOL *isCalDone) +ar5212PerCalibrationN(struct ath_hal *ah, + struct ieee80211_channel *chan, + u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone) { #define IQ_CAL_TRIES 10 struct ath_hal_5212 *ahp = AH5212(ah); @@ -981,19 +954,17 @@ ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, int32_t qCoff, qCoffDenom; int32_t iqCorrMeas, iCoff, iCoffDenom; uint32_t powerMeasQ, powerMeasI; - HAL_BOOL ichan_isBmode = AH_FALSE; - HAL_BOOL isBmode = AH_FALSE; + HAL_BOOL isBmode; - OS_MARK(ah, AH_MARK_PERCAL, chan->channel); + OS_MARK(ah, AH_MARK_PERCAL, chan->ic_freq); *isCalDone = AH_FALSE; ichan = ath_hal_checkchannel(ah, chan); if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); return AH_FALSE; } - SAVE_CCK(ah, ichan, ichan_isBmode); SAVE_CCK(ah, chan, isBmode); if (ahp->ah_bIQCalibration == IQ_CAL_DONE || @@ -1073,12 +1044,12 @@ ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, AR_PHY_TIMING_CTRL4_IQCORR_ENABLE); ahp->ah_bIQCalibration = IQ_CAL_DONE; - ichan->iqCalValid = AH_TRUE; + ichan->privFlags |= CHANNEL_IQVALID; ichan->iCoff = iCoff; ichan->qCoff = qCoff; } - } else if (!IS_CHAN_B(chan) && ahp->ah_bIQCalibration == IQ_CAL_DONE && - !ichan->iqCalValid) { + } else if (!IEEE80211_IS_CHAN_B(chan) && ahp->ah_bIQCalibration == IQ_CAL_DONE && + (ichan->privFlags & CHANNEL_IQVALID) == 0) { /* * Start IQ calibration if configured channel has changed. * Use a magic number of 15 based on default value. @@ -1094,20 +1065,14 @@ ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, if (longCal) { /* Check noise floor results */ - ar5212GetNf(ah, ichan); - - if ((ichan->channelFlags & CHANNEL_CW_INT) == 0) { + ar5212GetNf(ah, chan); + if (!IEEE80211_IS_CHAN_CWINT(chan)) { /* Perform cal for 5Ghz channels and any OFDM on 5112 */ - if (IS_CHAN_5GHZ(chan) || - (IS_RAD5112(ah) && IS_CHAN_OFDM(chan))) + if (IEEE80211_IS_CHAN_5GHZ(chan) || + (IS_RAD5112(ah) && IEEE80211_IS_CHAN_OFDM(chan))) ar5212RequestRfgain(ah); - } else { - /* report up and clear internal state */ - chan->channelFlags |= CHANNEL_CW_INT; - ichan->channelFlags &= ~CHANNEL_CW_INT; } } - RESTORE_CCK(ah, ichan, ichan_isBmode); RESTORE_CCK(ah, chan, isBmode); return AH_TRUE; @@ -1115,13 +1080,14 @@ ar5212PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, u_int chainMask, } HAL_BOOL -ar5212PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_BOOL *isIQdone) +ar5212PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan, + HAL_BOOL *isIQdone) { return ar5212PerCalibrationN(ah, chan, 0x1, AH_TRUE, isIQdone); } HAL_BOOL -ar5212ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan) { /* XXX */ return AH_TRUE; @@ -1181,26 +1147,28 @@ ar5212GetNoiseFloor(struct ath_hal *ah) } static HAL_BOOL -getNoiseFloorThresh(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *chan, +getNoiseFloorThresh(struct ath_hal *ah, const struct ieee80211_channel *chan, int16_t *nft) { const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; HALASSERT(ah->ah_magic == AR5212_MAGIC); - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: *nft = ee->ee_noiseFloorThresh[headerInfo11A]; break; - case CHANNEL_B: + case IEEE80211_CHAN_B: *nft = ee->ee_noiseFloorThresh[headerInfo11B]; break; - case CHANNEL_PUREG: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_PUREG: /* NB: really 108G */ *nft = ee->ee_noiseFloorThresh[headerInfo11G]; break; default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: invalid channel flags %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); return AH_FALSE; } return AH_TRUE; @@ -1260,18 +1228,19 @@ ar5212GetNfHistMid(const int16_t calData[AR512_NF_CAL_HIST_MAX]) * Read the NF and check it against the noise floor threshhold */ int16_t -ar5212GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5212GetNf(struct ath_hal *ah, struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); struct ar5212NfCalHist *h = &ahp->ah_nfCalHist; + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); int16_t nf, nfThresh; int32_t val; if (OS_REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: NF did not complete in calibration window\n", __func__); - chan->rawNoiseFloor = h->privNF; /* most recent value */ - return chan->rawNoiseFloor; + ichan->rawNoiseFloor = h->privNF; /* most recent value */ + return ichan->rawNoiseFloor; } /* @@ -1288,7 +1257,7 @@ ar5212GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * happens it indicates a problem regardless * of the band. */ - chan->channelFlags |= CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; nf = 0; } } else @@ -1342,7 +1311,7 @@ ar5212GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF); OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); - return (chan->rawNoiseFloor = nf); + return (ichan->rawNoiseFloor = nf); } /* @@ -1379,7 +1348,7 @@ ar5212SetCompRegs(struct ath_hal *ah) HAL_BOOL ar5212SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, - const HAL_CHANNEL_INTERNAL *chan) + const struct ieee80211_channel *chan) { #define ANT_SWITCH_TABLE1 AR_PHY(88) #define ANT_SWITCH_TABLE2 AR_PHY(89) @@ -1387,25 +1356,30 @@ ar5212SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint32_t antSwitchA, antSwitchB; int ix; - HAL_BOOL isBmode = AH_FALSE; - /* NB: need local copy for SAVE/RESTORE 'cuz chan is const */ - HAL_CHANNEL_INTERNAL ichan = *chan; HALASSERT(ah->ah_magic == AR5212_MAGIC); HALASSERT(ahp->ah_phyPowerOn); - SAVE_CCK(ah, &ichan, isBmode); - switch (ichan.channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: ix = 0; break; - case CHANNEL_B: ix = 1; break; - case CHANNEL_PUREG: ix = 2; break; + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: + ix = 0; + break; + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_PUREG: /* NB: 108G */ + ix = 2; + break; + case IEEE80211_CHAN_B: + if (IS_2425(ah) || IS_2417(ah)) { + /* NB: Nala/Swan: 11b is handled using 11g */ + ix = 2; + } else + ix = 1; + break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, ichan.channelFlags); - RESTORE_CCK(ah, &ichan, isBmode); + __func__, chan->ic_flags); return AH_FALSE; } - RESTORE_CCK(ah, &ichan, isBmode); antSwitchA = ee->ee_antennaControl[1][ix] | (ee->ee_antennaControl[2][ix] << 6) @@ -1460,13 +1434,14 @@ ar5212SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings, } HAL_BOOL -ar5212IsSpurChannel(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212IsSpurChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { - uint32_t clockFreq = - ((IS_5413(ah) || IS_RAD5112_ANY(ah) || IS_2417(ah)) ? 40 : 32); - return ( ((chan->channel % clockFreq) != 0) - && (((chan->channel % clockFreq) < 10) - || (((chan->channel) % clockFreq) > 22)) ); + uint16_t freq = ath_hal_gethwchannel(ah, chan); + uint32_t clockFreq = + ((IS_5413(ah) || IS_RAD5112_ANY(ah) || IS_2417(ah)) ? 40 : 32); + return ( ((freq % clockFreq) != 0) + && (((freq % clockFreq) < 10) + || (((freq) % clockFreq) > 22)) ); } /* @@ -1474,7 +1449,7 @@ ar5212IsSpurChannel(struct ath_hal *ah, HAL_CHANNEL *chan) * given the channel value. */ HAL_BOOL -ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5212SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define NO_FALSE_DETECT_BACKOFF 2 #define CB22_FALSE_DETECT_BACKOFF 6 @@ -1484,32 +1459,33 @@ ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) struct ath_hal_5212 *ahp = AH5212(ah); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; int arrayMode, falseDectectBackoff; - int is2GHz = IS_CHAN_2GHZ(chan); + int is2GHz = IEEE80211_IS_CHAN_2GHZ(chan); + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); int8_t adcDesiredSize, pgaDesiredSize; uint16_t switchSettling, txrxAtten, rxtxMargin; int iCoff, qCoff; HALASSERT(ah->ah_magic == AR5212_MAGIC); - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: + switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) { + case IEEE80211_CHAN_A: + case IEEE80211_CHAN_ST: arrayMode = headerInfo11A; if (!IS_RAD5112_ANY(ah) && !IS_2413(ah) && !IS_5413(ah)) OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_TX_CLIP, ahp->ah_gainValues.currStep->paramVal[GP_TXCLIP]); break; - case CHANNEL_B: + case IEEE80211_CHAN_B: arrayMode = headerInfo11B; break; - case CHANNEL_G: - case CHANNEL_108G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_108G: arrayMode = headerInfo11G; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -1524,7 +1500,7 @@ ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) (ee->ee_noiseFloorThresh[arrayMode] & 0x1FF) | (1 << 9)); - if (ee->ee_version >= AR_EEPROM_VER5_0 && IS_CHAN_TURBO(chan)) { + if (ee->ee_version >= AR_EEPROM_VER5_0 && IEEE80211_IS_CHAN_TURBO(chan)) { switchSettling = ee->ee_switchSettlingTurbo[is2GHz]; adcDesiredSize = ee->ee_adcDesiredSizeTurbo[is2GHz]; pgaDesiredSize = ee->ee_pgaDesiredSizeTurbo[is2GHz]; @@ -1565,18 +1541,17 @@ ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) if (ee->ee_version < AR_EEPROM_VER3_3) { /* XXX magic number */ if (AH_PRIVATE(ah)->ah_subvendorid == 0x1022 && - IS_CHAN_OFDM(chan)) + IEEE80211_IS_CHAN_OFDM(chan)) falseDectectBackoff += CB22_FALSE_DETECT_BACKOFF; } else { - if (ar5212IsSpurChannel(ah, (HAL_CHANNEL *)chan)) { + if (ar5212IsSpurChannel(ah, chan)) falseDectectBackoff += ee->ee_falseDetectBackoff[arrayMode]; - } } AR_PHY_BIS(ah, 73, 0xFFFFFF01, (falseDectectBackoff << 1) & 0xFE); - if (chan->iqCalValid) { - iCoff = chan->iCoff; - qCoff = chan->qCoff; + if (ichan->privFlags & CHANNEL_IQVALID) { + iCoff = ichan->iCoff; + qCoff = ichan->qCoff; } else { iCoff = ee->ee_iqCalI[is2GHz]; qCoff = ee->ee_iqCalQ[is2GHz]; @@ -1591,7 +1566,7 @@ ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) AR_PHY_TIMING_CTRL4_IQCORR_ENABLE); if (ee->ee_version >= AR_EEPROM_VER4_1) { - if (!IS_CHAN_108G(chan) || ee->ee_version >= AR_EEPROM_VER5_0) + if (!IEEE80211_IS_CHAN_108G(chan) || ee->ee_version >= AR_EEPROM_VER5_0) OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_RXTX_MARGIN, rxtxMargin); } @@ -1612,7 +1587,8 @@ ar5212SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) */ void -ar5212SetSpurMitigation(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) +ar5212SetSpurMitigation(struct ath_hal *ah, + const struct ieee80211_channel *chan) { uint32_t pilotMask[2] = {0, 0}, binMagMask[4] = {0, 0, 0 , 0}; uint16_t i, finalSpur, curChanAsSpur, binWidth = 0, spurDetectWidth, spurChan; @@ -1621,7 +1597,8 @@ ar5212SetSpurMitigation(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) static const uint16_t magMapFor4[4] = {1, 2, 2, 1}; static const uint16_t magMapFor3[3] = {1, 2, 1}; const uint16_t *pMagMap; - HAL_BOOL is2GHz = IS_CHAN_2GHZ(ichan); + HAL_BOOL is2GHz = IEEE80211_IS_CHAN_2GHZ(chan); + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); uint32_t val; #define CHAN_TO_SPUR(_f, _freq) ( ((_freq) - ((_f) ? 2300 : 4900)) * 10 ) @@ -1643,7 +1620,7 @@ ar5212SetSpurMitigation(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) */ finalSpur = AR_NO_SPUR; spurDetectWidth = HAL_SPUR_CHAN_WIDTH; - if (IS_CHAN_TURBO(ichan)) + if (IEEE80211_IS_CHAN_TURBO(chan)) spurDetectWidth *= 2; /* Decide if any spur affects the current channel */ @@ -1698,23 +1675,22 @@ ar5212SetSpurMitigation(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) * spurDeltaPhase is (spurOffsetIn100KHz / chipFrequencyIn100KHz) << 21 * spurFreqSd is (spurOffsetIn100KHz / sampleFrequencyIn100KHz) << 11 */ - switch (ichan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: /* Chip Frequency & sampleFrequency are 40 MHz */ - spurDeltaPhase = (spurOffset << 17) / 25; + if (IEEE80211_IS_CHAN_TURBO(chan)) { + /* Chip Frequency & sampleFrequency are 80 MHz */ + spurDeltaPhase = (spurOffset << 16) / 25; spurFreqSd = spurDeltaPhase >> 10; - binWidth = HAL_BIN_WIDTH_BASE_100HZ; - break; - case CHANNEL_G: /* Chip Frequency is 44MHz, sampleFrequency is 40 MHz */ + binWidth = HAL_BIN_WIDTH_TURBO_100HZ; + } else if (IEEE80211_IS_CHAN_G(chan)) { + /* Chip Frequency is 44MHz, sampleFrequency is 40 MHz */ spurFreqSd = (spurOffset << 8) / 55; spurDeltaPhase = (spurOffset << 17) / 25; binWidth = HAL_BIN_WIDTH_BASE_100HZ; - break; - case CHANNEL_T: /* Chip Frequency & sampleFrequency are 80 MHz */ - case CHANNEL_108G: - spurDeltaPhase = (spurOffset << 16) / 25; + } else { + HALASSERT(!IEEE80211_IS_CHAN_B(chan)); + /* Chip Frequency & sampleFrequency are 40 MHz */ + spurDeltaPhase = (spurOffset << 17) / 25; spurFreqSd = spurDeltaPhase >> 10; - binWidth = HAL_BIN_WIDTH_TURBO_100HZ; - break; + binWidth = HAL_BIN_WIDTH_BASE_100HZ; } /* Compute Pilot Mask */ @@ -1791,20 +1767,21 @@ ar5212SetSpurMitigation(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) * Required for OFDM operation. */ void -ar5212SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212SetDeltaSlope(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define COEF_SCALE_S 24 #define INIT_CLOCKMHZSCALED 0x64000000 + uint16_t freq = ath_hal_gethwchannel(ah, chan); unsigned long coef_scaled, coef_exp, coef_man, ds_coef_exp, ds_coef_man; unsigned long clockMhzScaled = INIT_CLOCKMHZSCALED; - if (IS_CHAN_TURBO(chan)) + if (IEEE80211_IS_CHAN_TURBO(chan)) clockMhzScaled *= 2; /* half and quarter rate can divide the scaled clock by 2 or 4 respectively */ /* scale for selected channel bandwidth */ - if (IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { clockMhzScaled = clockMhzScaled >> 1; - } else if (IS_CHAN_QUARTER_RATE(chan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { clockMhzScaled = clockMhzScaled >> 2; } @@ -1812,7 +1789,7 @@ ar5212SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL *chan) * ALGO -> coef = 1e8/fcarrier*fclock/40; * scaled coef to provide precision for this floating calculation */ - coef_scaled = clockMhzScaled / chan->channel; + coef_scaled = clockMhzScaled / freq; /* * ALGO -> coef_exp = 14-floor(log2(coef)); @@ -1850,15 +1827,14 @@ ar5212SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL *chan) HAL_BOOL ar5212SetTxPowerLimit(struct ath_hal *ah, uint32_t limit) { + /* XXX blech, construct local writable copy */ + struct ieee80211_channel dummy = *AH_PRIVATE(ah)->ah_curchan; uint16_t dummyXpdGains[2]; - HAL_BOOL ret, isBmode = AH_FALSE; + HAL_BOOL isBmode; - SAVE_CCK(ah, AH_PRIVATE(ah)->ah_curchan, isBmode); + SAVE_CCK(ah, &dummy, isBmode); AH_PRIVATE(ah)->ah_powerLimit = AH_MIN(limit, MAX_RATE_POWER); - ret = ar5212SetTransmitPower(ah, AH_PRIVATE(ah)->ah_curchan, - dummyXpdGains); - RESTORE_CCK(ah, AH_PRIVATE(ah)->ah_curchan, isBmode); - return ret; + return ar5212SetTransmitPower(ah, &dummy, dummyXpdGains); } /* @@ -1866,8 +1842,8 @@ ar5212SetTxPowerLimit(struct ath_hal *ah, uint32_t limit) * operating channel and mode. */ HAL_BOOL -ar5212SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, - uint16_t *rfXpdGain) +ar5212SetTransmitPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { #define POW_OFDM(_r, _s) (((0 & 1)<< ((_s)+6)) | (((_r) & 0x3f) << (_s))) #define POW_CCK(_r, _s) (((_r) & 0x3f) << (_s)) @@ -1875,6 +1851,7 @@ ar5212SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, static const uint16_t tpcScaleReductionTable[5] = { 0, 3, 6, 9, MAX_RATE_POWER }; struct ath_hal_5212 *ahp = AH5212(ah); + uint16_t freq = ath_hal_gethwchannel(ah, chan); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; int16_t minPower, maxPower, tpcInDb, powerLimit; int i; @@ -1889,7 +1866,7 @@ ar5212SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, tpcInDb = tpcScaleReductionTable[AH_PRIVATE(ah)->ah_tpScale]; else tpcInDb = 0; - if (!ar5212SetRateTable(ah, (HAL_CHANNEL *) chan, tpcInDb, powerLimit, + if (!ar5212SetRateTable(ah, chan, tpcInDb, powerLimit, AH_TRUE, &minPower, &maxPower)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unable to set rate table\n", __func__); @@ -1924,10 +1901,10 @@ ar5212SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, * Removed with revised chipset */ if (AH_PRIVATE(ah)->ah_phyRev < AR_PHY_CHIP_ID_REV_2 && - IS_CHAN_G(chan)) { + IEEE80211_IS_CHAN_G(chan)) { uint16_t cckOfdmPwrDelta; - if (chan->channel == 2484) + if (freq == 2484) cckOfdmPwrDelta = SCALE_OC_DELTA( ee->ee_cckOfdmPwrDelta - ee->ee_scaledCh14FilterCckDelta); @@ -1994,11 +1971,12 @@ ar5212SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, * operating channel and mode. */ static HAL_BOOL -ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, - int16_t tpcScaleReduction, int16_t powerLimit, HAL_BOOL commit, - int16_t *pMinPower, int16_t *pMaxPower) +ar5212SetRateTable(struct ath_hal *ah, const struct ieee80211_channel *chan, + int16_t tpcScaleReduction, int16_t powerLimit, HAL_BOOL commit, + int16_t *pMinPower, int16_t *pMaxPower) { struct ath_hal_5212 *ahp = AH5212(ah); + uint16_t freq = ath_hal_gethwchannel(ah, chan); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint16_t *rpow = ahp->ah_ratesArray; uint16_t twiceMaxEdgePower = MAX_RATE_POWER; @@ -2014,7 +1992,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, HALASSERT(ah->ah_magic == AR5212_MAGIC); - twiceMaxRDPower = chan->maxRegTxPower * 2; + twiceMaxRDPower = chan->ic_maxregpower * 2; *pMaxPower = -MAX_RATE_POWER; *pMinPower = MAX_RATE_POWER; @@ -2028,7 +2006,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, if (ee->ee_ctl[i] == cfgCtl || cfgCtl == ((ee->ee_ctl[i] & CTL_MODE_M) | SD_NO_CTL)) { rep = &ee->ee_rdEdgesPower[i * NUM_EDGES]; - twiceMinEdgePower = ar5212GetMaxEdgePower(chan->channel, rep); + twiceMinEdgePower = ar5212GetMaxEdgePower(freq, rep); if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { /* Find the minimum of all CTL edge powers that apply to this channel */ twiceMaxEdgePower = AH_MIN(twiceMaxEdgePower, twiceMinEdgePower); @@ -2039,7 +2017,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, } } - if (IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_G(chan)) { /* Check for a CCK CTL for 11G CCK powers */ cfgCtl = (cfgCtl & ~CTL_MODE_M) | CTL_11B; for (i = 0; i < ee->ee_numCtls; i++) { @@ -2050,7 +2028,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, if (ee->ee_ctl[i] == cfgCtl || cfgCtl == ((ee->ee_ctl[i] & CTL_MODE_M) | SD_NO_CTL)) { rep = &ee->ee_rdEdgesPower[i * NUM_EDGES]; - twiceMinEdgePowerCck = ar5212GetMaxEdgePower(chan->channel, rep); + twiceMinEdgePowerCck = ar5212GetMaxEdgePower(freq, rep); if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { /* Find the minimum of all CTL edge powers that apply to this channel */ twiceMaxEdgePowerCck = AH_MIN(twiceMaxEdgePowerCck, twiceMinEdgePowerCck); @@ -2066,7 +2044,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Get Antenna Gain reduction */ - if (IS_CHAN_5GHZ(chan)) { + if (IEEE80211_IS_CHAN_5GHZ(chan)) { ath_hal_eepromGet(ah, AR_EEP_ANTGAINMAX_5, &twiceAntennaGain); } else { ath_hal_eepromGet(ah, AR_EEP_ANTGAINMAX_2, &twiceAntennaGain); @@ -2074,9 +2052,9 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, twiceAntennaReduction = ath_hal_getantennareduction(ah, chan, twiceAntennaGain); - if (IS_CHAN_OFDM(chan)) { + if (IEEE80211_IS_CHAN_OFDM(chan)) { /* Get final OFDM target powers */ - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ar5212GetTargetPowers(ah, chan, ee->ee_trgtPwr_11g, ee->ee_numTargetPwr_11g, &targetPowerOfdm); } else { @@ -2095,7 +2073,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, * this unless specially configured. Then we limit * power only for non-AP operation. */ - if (IS_CHAN_TURBO(chan) + if (IEEE80211_IS_CHAN_TURBO(chan) #ifdef AH_ENABLE_AP_SUPPORT && AH_PRIVATE(ah)->ah_opmode != HAL_M_HOSTAP #endif @@ -2112,7 +2090,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, * constraint on 2.4GHz channels. */ if (ee->ee_version >= AR_EEPROM_VER4_0 && - IS_CHAN_2GHZ(chan)) + IEEE80211_IS_CHAN_2GHZ(chan)) scaledPower = AH_MIN(scaledPower, ee->ee_turbo2WMaxPower2); } @@ -2136,7 +2114,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, if (ee->ee_version >= AR_EEPROM_VER4_0) { /* Setup XR target power from EEPROM */ - rpow[15] = AH_MIN(scaledPower, IS_CHAN_2GHZ(chan) ? + rpow[15] = AH_MIN(scaledPower, IEEE80211_IS_CHAN_2GHZ(chan) ? ee->ee_xrTargetPower2 : ee->ee_xrTargetPower5); } else { /* XR uses 6mb power */ @@ -2156,11 +2134,11 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, "TPC_Reduction %d chan=%d (0x%x) maxAvailPower=%d pwr6_24=%d, maxPower=%d\n", __func__, twiceMaxRDPower, ee->ee_turbo2WMaxPower5, twiceMaxEdgePower, tpcScaleReduction * 2, - chan->channel, chan->channelFlags, + chan->ic_freq, chan->ic_flags, maxAvailPower, targetPowerOfdm.twicePwr6_24, *pMaxPower); } - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { /* Get final CCK target powers */ ar5212GetTargetPowers(ah, chan, ee->ee_trgtPwr_11b, ee->ee_numTargetPwr_11b, &targetPowerCck); @@ -2200,7 +2178,7 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, "%s: cck: MaxRD: %d MaxCTL: %d " "TPC_Reduction %d chan=%d (0x%x) maxAvailPower=%d pwr6_24=%d, maxPower=%d\n", __func__, twiceMaxRDPower, twiceMaxEdgePowerCck, - tpcScaleReduction * 2, chan->channel, chan->channelFlags, + tpcScaleReduction * 2, chan->ic_freq, chan->ic_flags, maxAvailPower, targetPowerCck.twicePwr6_24, *pMaxPower); } if (commit) { @@ -2211,32 +2189,31 @@ ar5212SetRateTable(struct ath_hal *ah, HAL_CHANNEL *chan, } HAL_BOOL -ar5212GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans) +ar5212GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); +#if 0 static const uint16_t tpcScaleReductionTable[5] = { 0, 3, 6, 9, MAX_RATE_POWER }; - int16_t minPower, maxPower, tpcInDb, powerLimit; - HAL_CHANNEL *chan; - int i; + int16_t tpcInDb, powerLimit; +#endif + int16_t minPower, maxPower; /* * Get Pier table max and min powers. */ - for (i = 0; i < nchans; i++) { - chan = &chans[i]; - if (ahp->ah_rfHal->getChannelMaxMinPower(ah, chan, &maxPower, &minPower)) { - /* NB: rf code returns 1/4 dBm units, convert */ - chan->maxTxPower = maxPower / 2; - chan->minTxPower = minPower / 2; - } else { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: no min/max power for %u/0x%x\n", - __func__, chan->channel, chan->channelFlags); - chan->maxTxPower = MAX_RATE_POWER; - chan->minTxPower = 0; - } + if (ahp->ah_rfHal->getChannelMaxMinPower(ah, chan, &maxPower, &minPower)) { + /* NB: rf code returns 1/4 dBm units, convert */ + chan->ic_maxpower = maxPower / 2; + chan->ic_minpower = minPower / 2; + } else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: no min/max power for %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + chan->ic_maxpower = MAX_RATE_POWER; + chan->ic_minpower = 0; } +#if 0 /* * Now adjust to reflect any global scale and/or CTL's. * (XXX is that correct?) @@ -2246,25 +2223,19 @@ ar5212GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans tpcInDb = tpcScaleReductionTable[AH_PRIVATE(ah)->ah_tpScale]; else tpcInDb = 0; - for (i=0; i<nchans; i++) { - chan = &chans[i]; - if (!ar5212SetRateTable(ah, (HAL_CHANNEL *) chan, tpcInDb, powerLimit, - AH_FALSE, &minPower, &maxPower)) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: unable to find max/min power\n",__func__); - return AH_FALSE; - } - if (maxPower < chan->maxTxPower) - chan->maxTxPower = maxPower; - if (minPower < chan->minTxPower) - chan->minTxPower = minPower; - } -#ifdef AH_DEBUG - for (i=0; i<nchans; i++) { - HALDEBUG(ah, HAL_DEBUG_RESET, - "Chan %d: MaxPow = %d MinPow = %d\n", - chans[i].channel,chans[i].maxTxPower, chans[i].minTxPower); + if (!ar5212SetRateTable(ah, chan, tpcInDb, powerLimit, + AH_FALSE, &minPower, &maxPower)) { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: unable to find max/min power\n",__func__); + return AH_FALSE; } + if (maxPower < chan->ic_maxpower) + chan->ic_maxpower = maxPower; + if (minPower < chan->ic_minpower) + chan->ic_minpower = minPower; + HALDEBUG(ah, HAL_DEBUG_RESET, + "Chan %d: MaxPow = %d MinPow = %d\n", + chan->ic_freq, chan->ic_maxpower, chans->ic_minpower); #endif return AH_TRUE; } @@ -2434,10 +2405,11 @@ interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, * channel, and number of channels */ static void -ar5212GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL *chan, +ar5212GetTargetPowers(struct ath_hal *ah, const struct ieee80211_channel *chan, const TRGT_POWER_INFO *powInfo, uint16_t numChannels, TRGT_POWER_INFO *pNewPower) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); /* temp array for holding target power channels */ uint16_t tempChannelList[NUM_TEST_FREQUENCIES]; uint16_t clo, chi, ixlo, ixhi; @@ -2447,7 +2419,7 @@ ar5212GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL *chan, for (i = 0; i < numChannels; i++) tempChannelList[i] = powInfo[i].testChannel; - ar5212GetLowerUpperValues(chan->channel, tempChannelList, + ar5212GetLowerUpperValues(freq, tempChannelList, numChannels, &clo, &chi); /* Get the indices for the channel */ @@ -2466,13 +2438,13 @@ ar5212GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL *chan, * Get the lower and upper channels, target powers, * and interpolate between them. */ - pNewPower->twicePwr6_24 = interpolate(chan->channel, clo, chi, + pNewPower->twicePwr6_24 = interpolate(freq, clo, chi, powInfo[ixlo].twicePwr6_24, powInfo[ixhi].twicePwr6_24); - pNewPower->twicePwr36 = interpolate(chan->channel, clo, chi, + pNewPower->twicePwr36 = interpolate(freq, clo, chi, powInfo[ixlo].twicePwr36, powInfo[ixhi].twicePwr36); - pNewPower->twicePwr48 = interpolate(chan->channel, clo, chi, + pNewPower->twicePwr48 = interpolate(freq, clo, chi, powInfo[ixlo].twicePwr48, powInfo[ixhi].twicePwr48); - pNewPower->twicePwr54 = interpolate(chan->channel, clo, chi, + pNewPower->twicePwr54 = interpolate(freq, clo, chi, powInfo[ixlo].twicePwr54, powInfo[ixhi].twicePwr54); } @@ -2576,19 +2548,20 @@ ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, uint32_t numBits, * by the turbo ratetable only */ void -ar5212SetRateDurationTable(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212SetRateDurationTable(struct ath_hal *ah, + const struct ieee80211_channel *chan) { const HAL_RATE_TABLE *rt; int i; /* NB: band doesn't matter for 1/2 and 1/4 rate */ - if (IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { rt = ar5212GetRateTable(ah, HAL_MODE_11A_HALF_RATE); - } else if (IS_CHAN_QUARTER_RATE(chan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { rt = ar5212GetRateTable(ah, HAL_MODE_11A_QUARTER_RATE); } else { rt = ar5212GetRateTable(ah, - IS_CHAN_TURBO(chan) ? HAL_MODE_TURBO : HAL_MODE_11G); + IEEE80211_IS_CHAN_TURBO(chan) ? HAL_MODE_TURBO : HAL_MODE_11G); } for (i = 0; i < rt->rateCount; ++i) @@ -2597,7 +2570,7 @@ ar5212SetRateDurationTable(struct ath_hal *ah, HAL_CHANNEL *chan) ath_hal_computetxtime(ah, rt, WLAN_CTRL_FRAME_SIZE, rt->info[i].controlRate, AH_FALSE)); - if (!IS_CHAN_TURBO(chan)) { + if (!IEEE80211_IS_CHAN_TURBO(chan)) { /* 11g Table is used to cover the CCK rates. */ rt = ar5212GetRateTable(ah, HAL_MODE_11G); for (i = 0; i < rt->rateCount; ++i) { @@ -2628,14 +2601,15 @@ ar5212SetRateDurationTable(struct ath_hal *ah, HAL_CHANNEL *chan) * + IFS params: slot, eifs, misc etc. */ void -ar5212SetIFSTiming(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5212SetIFSTiming(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t txLat, rxLat, usec, slot, refClock, eifs, init_usec; - HALASSERT(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)); + HALASSERT(IEEE80211_IS_CHAN_HALF(chan) || + IEEE80211_IS_CHAN_QUARTER(chan)); refClock = OS_REG_READ(ah, AR_USEC) & AR_USEC_USEC32; - if (IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { slot = IFS_SLOT_HALF_RATE; rxLat = RX_NON_FULL_RATE_LATENCY << AR5212_USEC_RX_LAT_S; txLat = TX_HALF_RATE_LATENCY << AR5212_USEC_TX_LAT_S; diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c b/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c index 8b4f85c..2af68b9 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5212_xmit.c,v 1.7 2008/11/10 04:08:03 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -263,7 +263,7 @@ ar5212ResetTxQueue(struct ath_hal *ah, u_int q) { struct ath_hal_5212 *ahp = AH5212(ah); HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; HAL_TX_QUEUE_INFO *qi; uint32_t cwMin, chanCwMin, value, qmisc, dmisc; @@ -286,7 +286,7 @@ ar5212ResetTxQueue(struct ath_hal *ah, u_int q) * Select cwmin according to channel type. * NB: chan can be NULL during attach */ - if (chan && IS_CHAN_B(chan)) + if (chan && IEEE80211_IS_CHAN_B(chan)) chanCwMin = INIT_CWMIN_11B; else chanCwMin = INIT_CWMIN; diff --git a/sys/dev/ath/ath_hal/ar5212/ar5413.c b/sys/dev/ath/ath_hal/ar5212/ar5413.c index ecf8538..88ecdf2 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5413.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5413.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5413.c,v 1.8 2008/11/15 22:15:46 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -75,29 +75,29 @@ ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); uint32_t channelSel = 0; uint32_t bModeSynth = 0; uint32_t aModeRefSel = 0; uint32_t reg32 = 0; - uint16_t freq; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, freq); - if (chan->channel < 4800) { + if (freq < 4800) { uint32_t txctl; - if (((chan->channel - 2192) % 5) == 0) { - channelSel = ((chan->channel - 672) * 2 - 3040)/10; + if (((freq - 2192) % 5) == 0) { + channelSel = ((freq - 672) * 2 - 3040)/10; bModeSynth = 0; - } else if (((chan->channel - 2224) % 5) == 0) { - channelSel = ((chan->channel - 704) * 2 - 3040) / 10; + } else if (((freq - 2224) % 5) == 0) { + channelSel = ((freq - 704) * 2 - 3040) / 10; bModeSynth = 1; } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -105,7 +105,7 @@ ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) channelSel = ath_hal_reverseBits(channelSel, 8); txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (chan->channel == 2484) { + if (freq == 2484) { /* Enable channel spreading for channel 14 */ OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl | AR_PHY_CCK_TX_CTRL_JAPAN); @@ -113,26 +113,26 @@ ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); } - } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { - freq = chan->channel - 2; /* Align to even 5MHz raster */ + } else if (((freq % 5) == 2) && (freq <= 5435)) { + freq = freq - 2; /* Align to even 5MHz raster */ channelSel = ath_hal_reverseBits( (uint32_t)(((freq - 4800)*10)/25 + 1), 8); aModeRefSel = ath_hal_reverseBits(0, 2); - } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { + } else if ((freq % 20) == 0 && freq >= 5120) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 20 << 2), 8); + ((freq - 4800) / 20 << 2), 8); aModeRefSel = ath_hal_reverseBits(1, 2); - } else if ((chan->channel % 10) == 0) { + } else if ((freq % 10) == 0) { channelSel = ath_hal_reverseBits( - ((chan->channel - 4800) / 10 << 1), 8); + ((freq - 4800) / 10 << 1), 8); aModeRefSel = ath_hal_reverseBits(1, 2); - } else if ((chan->channel % 5) == 0) { + } else if ((freq % 5) == 0) { channelSel = ath_hal_reverseBits( - (chan->channel - 4800) / 5, 8); + (freq - 4800) / 5, 8); aModeRefSel = ath_hal_reverseBits(1, 2); } else { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", - __func__, chan->channel); + __func__, freq); return AH_FALSE; } @@ -154,7 +154,9 @@ ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) +ar5413SetRfRegs(struct ath_hal *ah, + const struct ieee80211_channel *chan, + uint16_t modesIndex, uint16_t *rfXpdGain) { #define RF_BANK_SETUP(_priv, _ix, _col) do { \ int i; \ @@ -162,50 +164,49 @@ ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\ } while (0) struct ath_hal_5212 *ahp = AH5212(ah); + uint16_t freq = ath_hal_gethwchannel(ah, chan); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; uint16_t ob5GHz = 0, db5GHz = 0; uint16_t ob2GHz = 0, db2GHz = 0; struct ar5413State *priv = AR5413(ah); int regWrites = 0; - HALDEBUG(ah, HAL_DEBUG_RFPARAM, - "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", - __func__, chan->channel, chan->channelFlags, modesIndex); + HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", + __func__, chan->ic_freq, chan->ic_flags, modesIndex); HALASSERT(priv != AH_NULL); /* Setup rf parameters */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_T: - if (chan->channel > 4000 && chan->channel < 5260) { + switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { + case IEEE80211_CHAN_A: + if (freq > 4000 && freq < 5260) { ob5GHz = ee->ee_ob1; db5GHz = ee->ee_db1; - } else if (chan->channel >= 5260 && chan->channel < 5500) { + } else if (freq >= 5260 && freq < 5500) { ob5GHz = ee->ee_ob2; db5GHz = ee->ee_db2; - } else if (chan->channel >= 5500 && chan->channel < 5725) { + } else if (freq >= 5500 && freq < 5725) { ob5GHz = ee->ee_ob3; db5GHz = ee->ee_db3; - } else if (chan->channel >= 5725) { + } else if (freq >= 5725) { ob5GHz = ee->ee_ob4; db5GHz = ee->ee_db4; } else { /* XXX else */ } break; - case CHANNEL_B: + case IEEE80211_CHAN_B: ob2GHz = ee->ee_obFor24; db2GHz = ee->ee_dbFor24; break; - case CHANNEL_G: - case CHANNEL_108G: + case IEEE80211_CHAN_G: + case IEEE80211_CHAN_PUREG: /* NB: really 108G */ ob2GHz = ee->ee_obFor24g; db2GHz = ee->ee_dbFor24g; break; default: HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); + __func__, chan->ic_flags); return AH_FALSE; } @@ -222,7 +223,7 @@ ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIn RF_BANK_SETUP(priv, 6, modesIndex); /* Only the 5 or 2 GHz OB/DB need to be set for a mode */ - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0); ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0); @@ -537,10 +538,12 @@ ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, static HAL_BOOL ar5413SetPowerTable(struct ath_hal *ah, - int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, + int16_t *minPower, int16_t *maxPower, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { struct ath_hal_5212 *ahp = AH5212(ah); + uint16_t freq = ath_hal_gethwchannel(ah, chan); const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; uint16_t pdGainOverlap_t2; @@ -554,14 +557,14 @@ ar5413SetPowerTable(struct ath_hal *ah, #endif HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", - __func__, chan->channel,chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { - HALASSERT(IS_CHAN_5GHZ(chan)); + HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan)); pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; } @@ -569,7 +572,7 @@ ar5413SetPowerTable(struct ath_hal *ah, AR_PHY_TPCRG5_PD_GAIN_OVERLAP); numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah, - chan->channel, pRawDataset, pdGainOverlap_t2, + freq, pRawDataset, pdGainOverlap_t2, &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues); HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); @@ -676,9 +679,11 @@ ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) } static HAL_BOOL -ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, +ar5413GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow) { + uint16_t freq = chan->ic_freq; /* NB: never mapped */ const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL; @@ -687,12 +692,12 @@ ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, *maxPow = 0; - if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) + if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; - else if (IS_CHAN_B(chan)) + else if (IEEE80211_IS_CHAN_B(chan)) pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; else { - HALASSERT(IS_CHAN_5GHZ(chan)); + HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan)); pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; } @@ -705,9 +710,9 @@ ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, if (numChannels < 1) return(AH_FALSE); - if ((chan->channel < data[0].channelValue) || - (chan->channel > data[numChannels-1].channelValue)) { - if (chan->channel < data[0].channelValue) { + if ((freq < data[0].channelValue) || + (freq > data[numChannels-1].channelValue)) { + if (freq < data[0].channelValue) { *maxPow = ar5413GetMaxPower(ah, &data[0]); *minPow = ar5413GetMinPower(ah, &data[0]); return(AH_TRUE); @@ -719,19 +724,19 @@ ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, } /* Linearly interpolate the power value now */ - for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); + for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); last = i++); totalD = data[i].channelValue - data[last].channelValue; if (totalD > 0) { totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]); - *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + + *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + ar5413GetMaxPower(ah, &data[last])*totalD)/totalD); totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]); - *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + + *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar5413GetMinPower(ah, &data[last])*totalD)/totalD); return(AH_TRUE); } else { - if (chan->channel == data[i].channelValue) { + if (freq == data[i].channelValue) { *maxPow = ar5413GetMaxPower(ah, &data[i]); *minPow = ar5413GetMinPower(ah, &data[i]); return(AH_TRUE); diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312.h b/sys/dev/ath/ath_hal/ar5312/ar5312.h index 4943891..210e744 100644 --- a/sys/dev/ath/ath_hal/ar5312/ar5312.h +++ b/sys/dev/ath/ath_hal/ar5312/ar5312.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -60,8 +60,10 @@ extern void ar5312SetupClock(struct ath_hal *ah, HAL_OPMODE opmode); extern void ar5312RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode); extern void ar5312DumpState(struct ath_hal *ah); extern HAL_BOOL ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status); -extern HAL_BOOL ar5312ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan); + struct ieee80211_channel *chan, + HAL_BOOL bChannelChange, HAL_STATUS *status); +extern HAL_BOOL ar5312ChipReset(struct ath_hal *ah, + struct ieee80211_channel *chan); extern HAL_BOOL ar5312SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip); extern HAL_BOOL ar5312PhyDisable(struct ath_hal *ah); diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c b/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c index 09059c7..dda3faf 100644 --- a/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c +++ b/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -34,15 +34,21 @@ #define BASE_ACTIVATE_DELAY 100 /* 100 usec */ #define PLL_SETTLE_DELAY 300 /* 300 usec */ -extern int16_t ar5212GetNf(struct ath_hal *, HAL_CHANNEL_INTERNAL *); -extern void ar5212SetRateDurationTable(struct ath_hal *, HAL_CHANNEL *); +extern int16_t ar5212GetNf(struct ath_hal *, const struct ieee80211_channel *); +extern void ar5212SetRateDurationTable(struct ath_hal *, + const struct ieee80211_channel *); extern HAL_BOOL ar5212SetTransmitPower(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain); -extern void ar5212SetDeltaSlope(struct ath_hal *, HAL_CHANNEL *); -extern HAL_BOOL ar5212SetBoardValues(struct ath_hal *, HAL_CHANNEL_INTERNAL *); -extern void ar5212SetIFSTiming(struct ath_hal *, HAL_CHANNEL *); -extern HAL_BOOL ar5212IsSpurChannel(struct ath_hal *, HAL_CHANNEL *); -extern HAL_BOOL ar5212ChannelChange(struct ath_hal *, HAL_CHANNEL *); + const struct ieee80211_channel *chan, uint16_t *rfXpdGain); +extern void ar5212SetDeltaSlope(struct ath_hal *, + const struct ieee80211_channel *); +extern HAL_BOOL ar5212SetBoardValues(struct ath_hal *, + const struct ieee80211_channel *); +extern void ar5212SetIFSTiming(struct ath_hal *, + const struct ieee80211_channel *); +extern HAL_BOOL ar5212IsSpurChannel(struct ath_hal *, + const struct ieee80211_channel *); +extern HAL_BOOL ar5212ChannelChange(struct ath_hal *, + const struct ieee80211_channel *); static HAL_BOOL ar5312SetResetReg(struct ath_hal *, uint32_t resetMask); @@ -81,7 +87,8 @@ write_common(struct ath_hal *ah, const HAL_INI_ARRAY *ia, */ HAL_BOOL ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status) + struct ieee80211_channel *chan, + HAL_BOOL bChannelChange, HAL_STATUS *status) { #define N(a) (sizeof (a) / sizeof (a[0])) #define FAIL(_code) do { ecode = _code; goto bad; } while (0) @@ -102,20 +109,6 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, ee = AH_PRIVATE(ah)->ah_eeprom; OS_MARK(ah, AH_MARK_RESET, bChannelChange); -#define IS(_c,_f) (((_c)->channelFlags & _f) || 0) - if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as 2GHz or 5GHz\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } - if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as OFDM or CCK\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } -#undef IS /* * Map public channel to private. */ @@ -123,7 +116,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); FAIL(HAL_EINVAL); } switch (opmode) { @@ -176,10 +169,10 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, * -the modes of the previous and requested channel are the same - some ugly code for XR */ if (bChannelChange && - (AH_PRIVATE(ah)->ah_curchan != AH_NULL) && - (chan->channel != AH_PRIVATE(ah)->ah_curchan->channel) && - ((chan->channelFlags & CHANNEL_ALL) == - (AH_PRIVATE(ah)->ah_curchan->channelFlags & CHANNEL_ALL))) { + AH_PRIVATE(ah)->ah_curchan != AH_NULL && + (chan->ic_freq != AH_PRIVATE(ah)->ah_curchan->ic_freq) && + ((chan->ic_flags & IEEE80211_CHAN_ALLTURBO) == + (AH_PRIVATE(ah)->ah_curchan->ic_flags & IEEE80211_CHAN_ALLTURBO))) { if (ar5212ChannelChange(ah, chan)) /* If ChannelChange completed - skip the rest of reset */ return AH_TRUE; @@ -217,31 +210,13 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, } /* Setup the indices for the next set of register array writes */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - modesIndex = 1; - freqIndex = 1; - break; - case CHANNEL_T: - modesIndex = 2; - freqIndex = 1; - break; - case CHANNEL_B: - modesIndex = 3; - freqIndex = 2; - break; - case CHANNEL_PUREG: - modesIndex = 4; - freqIndex = 2; - break; - case CHANNEL_108G: - modesIndex = 5; + if (IEEE80211_IS_CHAN_2GHZ(chan)) { freqIndex = 2; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - FAIL(HAL_EINVAL); + modesIndex = IEEE80211_IS_CHAN_108G(chan) ? 5 : + IEEE80211_IS_CHAN_G(chan) ? 4 : 3; + } else { + freqIndex = 1; + modesIndex = IEEE80211_IS_CHAN_ST(chan) ? 2 : 1; } OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -256,9 +231,8 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); - if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan)) ar5212SetIFSTiming(ah, chan); - } /* Overwrite INI values for revised chipsets */ if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_2) { @@ -276,7 +250,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, cckOfdmPwrDelta = SCALE_OC_DELTA(ee->ee_cckOfdmPwrDelta); } - if (IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_G(chan)) { OS_REG_WRITE(ah, AR_PHY_TXPWRADJ, SM((ee->ee_cckOfdmPwrDelta*-1), AR_PHY_TXPWRADJ_CCK_GAIN_DELTA) | SM((cckOfdmPwrDelta*-1), AR_PHY_TXPWRADJ_CCK_PCDAC_INDEX)); @@ -315,18 +289,18 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, SM(0x16, AR_PHY_SIGMA_DELTA_FILT1) | SM(0, AR_PHY_SIGMA_DELTA_ADC_CLIP)); - if (IS_CHAN_2GHZ(chan)) + if (IEEE80211_IS_CHAN_2GHZ(chan)) OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F); /* CCK Short parameter adjustment in 11B mode */ - if (IS_CHAN_B(chan)) + if (IEEE80211_IS_CHAN_B(chan)) OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12); /* Set ADC/DAC select values */ OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x04); /* Increase 11A AGC Settling */ - if ((chan->channelFlags & CHANNEL_ALL) == CHANNEL_A) + if (IEEE80211_IS_CHAN_A(chan)) OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32); } else { /* Set ADC/DAC select values */ @@ -334,29 +308,29 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, } /* Setup the transmit power values. */ - if (!ar5212SetTransmitPower(ah, ichan, rfXpdGain)) { + if (!ar5212SetTransmitPower(ah, chan, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error init'ing transmit power\n", __func__); FAIL(HAL_EIO); } /* Write the analog registers */ - if (!ahp->ah_rfHal->setRfRegs(ah, ichan, modesIndex, rfXpdGain)) { + if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: ar5212SetRfRegs failed\n", __func__); FAIL(HAL_EIO); } /* Write delta slope for OFDM enabled modes (A, G, Turbo) */ - if (IS_CHAN_OFDM(chan)) { - if ((IS_5413(ah) || (AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3)) && - (!IS_CHAN_B(chan))) - ar5212SetSpurMitigation(ah, ichan); + if (IEEE80211_IS_CHAN_OFDM(chan)) { + if (IS_5413(ah) || + AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3) + ar5212SetSpurMitigation(ah, chan); ar5212SetDeltaSlope(ah, chan); } /* Setup board specific options for EEPROM version 3 */ - if (!ar5212SetBoardValues(ah, ichan)) { + if (!ar5212SetBoardValues(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error setting board options\n", __func__); FAIL(HAL_EIO); @@ -396,7 +370,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ - if (!ar5212SetChannel(ah, ichan)) + if (!ar5212SetChannel(ah, chan)) FAIL(HAL_EIO); OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -407,10 +381,9 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* Set Tx frame start to tx data start delay */ if (IS_RAD5112_ANY(ah) && - (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan) || - IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan))) { + (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan))) { txFrm2TxDStart = - (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) ? + IEEE80211_IS_CHAN_HALF(chan) ? TX_FRAME_D_START_HALF_RATE: TX_FRAME_D_START_QUARTER_RATE; OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, @@ -445,7 +418,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, * Value is in 100ns increments. */ synthDelay = OS_REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_B(chan)) { synthDelay = (4 * synthDelay) / 22; } else { synthDelay /= 10; @@ -461,9 +434,9 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, * extra BASE_ACTIVATE_DELAY usecs to ensure this condition * does not happen. */ - if (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); - } else if (IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); } else { OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); @@ -487,7 +460,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, | AR_PHY_AGC_CONTROL_CAL | AR_PHY_AGC_CONTROL_NF); - if (!IS_CHAN_B(chan) && ahp->ah_bIQCalibration != IQ_CAL_DONE) { + if (!IEEE80211_IS_CHAN_B(chan) && ahp->ah_bIQCalibration != IQ_CAL_DONE) { /* Start IQ calibration w/ 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples */ OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX, @@ -583,12 +556,8 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ - if (bChannelChange) { - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - } + if (bChannelChange && !IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; HALDEBUG(ah, HAL_DEBUG_RESET, "%s: done\n", __func__); @@ -639,10 +608,10 @@ ar5312Disable(struct ath_hal *ah) * WARNING: The order of the PLL and mode registers must be correct. */ HAL_BOOL -ar5312ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5312ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan) { - OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->channel : 0); + OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0); /* * Reset the HW @@ -683,50 +652,49 @@ ar5312ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) if (IS_RAD5112_ANY(ah)) { rfMode = AR_PHY_MODE_AR5112; if (!IS_5315(ah)) { - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { phyPLL = AR_PHY_PLL_CTL_44_5312; } else { - if (IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { phyPLL = AR_PHY_PLL_CTL_40_5312_HALF; - } else if (IS_CHAN_QUARTER_RATE(chan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { phyPLL = AR_PHY_PLL_CTL_40_5312_QUARTER; } else { phyPLL = AR_PHY_PLL_CTL_40_5312; } } } else { - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_CCK(chan)) phyPLL = AR_PHY_PLL_CTL_44_5112; else phyPLL = AR_PHY_PLL_CTL_40_5112; - if (IS_CHAN_HALF_RATE(chan)) + if (IEEE80211_IS_CHAN_HALF(chan)) phyPLL |= AR_PHY_PLL_CTL_HALF; - else if (IS_CHAN_QUARTER_RATE(chan)) + else if (IEEE80211_IS_CHAN_QUARTER(chan)) phyPLL |= AR_PHY_PLL_CTL_QUARTER; } } else { rfMode = AR_PHY_MODE_AR5111; - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) + if (IEEE80211_IS_CHAN_CCK(chan)) phyPLL = AR_PHY_PLL_CTL_44; else phyPLL = AR_PHY_PLL_CTL_40; - if (IS_CHAN_HALF_RATE(chan)) + if (IEEE80211_IS_CHAN_HALF(chan)) phyPLL = AR_PHY_PLL_CTL_HALF; - else if (IS_CHAN_QUARTER_RATE(chan)) + else if (IEEE80211_IS_CHAN_QUARTER(chan)) phyPLL = AR_PHY_PLL_CTL_QUARTER; } - if (IS_CHAN_OFDM(chan) && (IS_CHAN_CCK(chan) || - IS_CHAN_G(chan))) + if (IEEE80211_IS_CHAN_G(chan)) rfMode |= AR_PHY_MODE_DYNAMIC; - else if (IS_CHAN_OFDM(chan)) + else if (IEEE80211_IS_CHAN_OFDM(chan)) rfMode |= AR_PHY_MODE_OFDM; else rfMode |= AR_PHY_MODE_CCK; - if (IS_CHAN_5GHZ(chan)) + if (IEEE80211_IS_CHAN_5GHZ(chan)) rfMode |= AR_PHY_MODE_RF5GHZ; else rfMode |= AR_PHY_MODE_RF2GHZ; - turbo = IS_CHAN_TURBO(chan) ? + turbo = IEEE80211_IS_CHAN_TURBO(chan) ? (AR_PHY_FC_TURBO_MODE | AR_PHY_FC_TURBO_SHORT) : 0; curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL); /* @@ -736,7 +704,7 @@ ar5312ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) * mode bit is set * - Turbo cannot be set at the same time as CCK or DYNAMIC */ - if (IS_CHAN_CCK(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { OS_REG_WRITE(ah, AR_PHY_TURBO, turbo); OS_REG_WRITE(ah, AR_PHY_MODE, rfMode); if (curPhyPLL != phyPLL) { diff --git a/sys/dev/ath/ath_hal/ar5416/ar2133.c b/sys/dev/ath/ath_hal/ar5416/ar2133.c index 5d90b6e..eb175a1 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar2133.c +++ b/sys/dev/ath/ath_hal/ar5416/ar2133.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar2133.c,v 1.13 2008/11/11 00:11:30 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -46,14 +46,8 @@ struct ar2133State { #define ar5416ModifyRfBuffer ar5212ModifyRfBuffer /*XXX*/ -extern void ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, - uint32_t numBits, uint32_t firstBit, uint32_t column); -HAL_BOOL ar2133GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL - *chans, uint32_t nchans); - -static HAL_BOOL ar2133GetChannelMaxMinPower(struct ath_hal *, HAL_CHANNEL *, - int16_t *maxPow,int16_t *minPow); -int16_t ar2133GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c); +void ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, + uint32_t numBits, uint32_t firstBit, uint32_t column); static void ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, @@ -69,7 +63,7 @@ ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, * ASSUMES: Writes enabled to analog bus */ static HAL_BOOL -ar2133SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar2133SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t channelSel = 0; uint32_t bModeSynth = 0; @@ -78,9 +72,9 @@ ar2133SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) uint16_t freq; CHAN_CENTERS centers; - OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); + OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq); - ar5416GetChannelCenters(ah, chan, ¢ers); + ar5416GetChannelCenters(ah, chan, ¢ers); freq = centers.synth_center; if (freq < 4800) { @@ -169,7 +163,7 @@ ar2133GetRfBank(struct ath_hal *ah, int bank) * REQUIRES: Access to the analog rf device */ static HAL_BOOL -ar2133SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) { struct ar2133State *priv = AR2133(ah); @@ -193,7 +187,7 @@ ar2133SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex); /* Only the 5 or 2 GHz OB/DB need to be set for a mode */ - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ar5416ModifyRfBuffer(priv->Bank6Data, ath_hal_eepromGet(ah, AR_EEP_OB_2, AH_NULL), 3, 197, 0); ar5416ModifyRfBuffer(priv->Bank6Data, @@ -233,7 +227,7 @@ ar2133SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, static HAL_BOOL ar2133SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, - HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain) + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { return AH_TRUE; } @@ -267,8 +261,9 @@ ar2133GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data) #endif static HAL_BOOL -ar2133GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, int16_t *maxPow, - int16_t *minPow) +ar2133GetChannelMaxMinPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, + int16_t *maxPow, int16_t *minPow) { #if 0 struct ath_hal_5212 *ahp = AH5212(ah); @@ -390,7 +385,7 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[]) * Adjust NF based on statistical values for 5GHz frequencies. * Stubbed:Not used by Fowl */ -int16_t +static int16_t ar2133GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) { return 0; diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416.h b/sys/dev/ath/ath_hal/ar5416/ar5416.h index 34e76b9..20714e8 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416.h +++ b/sys/dev/ath/ath_hal/ar5416/ar5416.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5416.h,v 1.19 2008/11/11 21:38:13 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AR5416_H_ #define _ATH_AR5416_H_ @@ -92,7 +92,8 @@ extern void ar5416Detach(struct ath_hal *ah); extern HAL_BOOL ar5416FillCapabilityInfo(struct ath_hal *ah); #define IS_5GHZ_FAST_CLOCK_EN(_ah, _c) \ - (IS_CHAN_5GHZ(_c) && ath_hal_eepromGetFlag(ah, AR_EEP_FSTCLK_5G)) + (IEEE80211_IS_CHAN_5GHZ(_c) && \ + ath_hal_eepromGetFlag(ah, AR_EEP_FSTCLK_5G)) extern void ar5416AniAttach(struct ath_hal *, const struct ar5212AniParams *, const struct ar5212AniParams *, HAL_BOOL ena); @@ -102,8 +103,8 @@ extern HAL_BOOL ar5416AniSetParams(struct ath_hal *, const struct ar5212AniParams *, const struct ar5212AniParams *); extern void ar5416ProcessMibIntr(struct ath_hal *, const HAL_NODE_STATS *); extern void ar5416AniPoll(struct ath_hal *, const HAL_NODE_STATS *, - HAL_CHANNEL *); -extern void ar5416AniReset(struct ath_hal *, HAL_CHANNEL_INTERNAL *, + const struct ieee80211_channel *); +extern void ar5416AniReset(struct ath_hal *, const struct ieee80211_channel *, HAL_OPMODE, int); extern void ar5416SetBeaconTimers(struct ath_hal *, const HAL_BEACON_TIMERS *); @@ -160,17 +161,19 @@ extern HAL_STATUS ar5416ProcRxDesc(struct ath_hal *ah, struct ath_desc *, struct ath_rx_status *); extern HAL_BOOL ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status); + struct ieee80211_channel *chan, + HAL_BOOL bChannelChange, HAL_STATUS *status); extern HAL_BOOL ar5416PhyDisable(struct ath_hal *ah); extern HAL_RFGAIN ar5416GetRfgain(struct ath_hal *ah); extern HAL_BOOL ar5416Disable(struct ath_hal *ah); -extern HAL_BOOL ar5416ChipReset(struct ath_hal *ah, HAL_CHANNEL *); +extern HAL_BOOL ar5416ChipReset(struct ath_hal *ah, + const struct ieee80211_channel *); extern HAL_BOOL ar5416SetResetReg(struct ath_hal *, uint32_t type); extern HAL_BOOL ar5416SetTxPowerLimit(struct ath_hal *ah, uint32_t limit); extern HAL_BOOL ar5416GetChipPowerLimits(struct ath_hal *ah, - HAL_CHANNEL *chans, uint32_t nchans); + struct ieee80211_channel *chan); extern void ar5416GetChannelCenters(struct ath_hal *, - HAL_CHANNEL_INTERNAL *chan, CHAN_CENTERS *centers); + const struct ieee80211_channel *chan, CHAN_CENTERS *centers); extern HAL_BOOL ar5416StopTxDma(struct ath_hal *ah, u_int q); extern HAL_BOOL ar5416SetupTxDesc(struct ath_hal *ah, struct ath_desc *ds, diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c index 59bfb20..6134a20 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5416_ani.c,v 1.1 2008/11/11 20:46:06 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -102,43 +102,6 @@ disableAniMIBCounters(struct ath_hal *ah) OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0); } -/* - * This routine returns the index into the aniState array that - * corresponds to the channel in *chan. If no match is found and the - * array is still not fully utilized, a new entry is created for the - * channel. We assume the attach function has already initialized the - * ah_ani values and only the channel field needs to be set. - */ -static int -ar5416GetAniChannelIndex(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) -{ -#define N(a) (sizeof(a) / sizeof(a[0])) - struct ath_hal_5212 *ahp = AH5212(ah); - int i; - - for (i = 0; i < N(ahp->ah_ani); i++) { - struct ar5212AniState *asp = &ahp->ah_ani[i]; - if (asp->c.channel == chan->channel) - return i; - if (asp->c.channel == 0) { - asp->c.channel = chan->channel; - asp->c.channelFlags = chan->channelFlags; - asp->c.privFlags = chan->privFlags; - asp->isSetup = AH_FALSE; - if (IS_CHAN_2GHZ(chan)) - asp->params = &ahp->ah_aniParams24; - else - asp->params = &ahp->ah_aniParams5; - return i; - } - } - /* XXX statistic */ - HALDEBUG(ah, HAL_DEBUG_ANY, - "No more channel states left. Using channel 0\n"); - return 0; /* XXX gotta return something valid */ -#undef N -} - static void setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params) { @@ -374,7 +337,7 @@ static void ar5416AniOfdmErrTrigger(struct ath_hal *ah) { struct ath_hal_5212 *ahp = AH5212(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; struct ar5212AniState *aniState; const struct ar5212AniParams *params; @@ -441,8 +404,7 @@ ar5416AniOfdmErrTrigger(struct ath_hal *ah) * weak signal detection and zero firstepLevel to * maximize CCK sensitivity */ - /* XXX can optimize */ - if (IS_CHAN_B(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { if (!aniState->ofdmWeakSigDetectOff) ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, @@ -460,7 +422,7 @@ static void ar5416AniCckErrTrigger(struct ath_hal *ah) { struct ath_hal_5212 *ahp = AH5212(ah); - HAL_CHANNEL_INTERNAL *chan = AH_PRIVATE(ah)->ah_curchan; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; struct ar5212AniState *aniState; const struct ar5212AniParams *params; @@ -493,8 +455,7 @@ ar5416AniCckErrTrigger(struct ath_hal *ah) * Beacon rssi is low, zero firstep level to maximize * CCK sensitivity in 11b/g mode. */ - /* XXX can optimize */ - if (IS_CHAN_B(chan) || IS_CHAN_G(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { if (aniState->firstepLevel > 0) ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); @@ -536,26 +497,33 @@ ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState) * it is setup to reflect the current channel. */ void -ar5416AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, HAL_OPMODE opmode, int restore) { struct ath_hal_5212 *ahp = AH5212(ah); - struct ar5212AniState *aniState; + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); + /* XXX bounds check ic_devdata */ + struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata]; uint32_t rxfilter; - int index; - index = ar5416GetAniChannelIndex(ah, chan); - aniState = &ahp->ah_ani[index]; + if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) { + OS_MEMZERO(aniState, sizeof(*aniState)); + if (IEEE80211_IS_CHAN_2GHZ(chan)) + aniState->params = &ahp->ah_aniParams24; + else + aniState->params = &ahp->ah_aniParams5; + ichan->privFlags |= CHANNEL_ANI_INIT; + HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0); + } ahp->ah_curani = aniState; #if 0 - ath_hal_printf(ah,"%s: chan %u/0x%x restore %d setup %d opmode %u\n", - __func__, chan->channel, chan->channelFlags, restore, - aniState->isSetup, opmode); + ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n", + __func__, chan->ic_freq, chan->ic_flags, restore, opmode, + ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); #else - HALDEBUG(ah, HAL_DEBUG_ANI, - "%s: chan %u/0x%x restore %d setup %d opmode %u\n", - __func__, chan->channel, chan->channelFlags, restore, - aniState->isSetup, opmode); + HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n", + __func__, chan->ic_freq, chan->ic_flags, restore, opmode, + ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); #endif OS_MARK(ah, AH_MARK_ANI_RESET, opmode); @@ -577,7 +545,7 @@ ar5416AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, * XXX if ANI follows hardware, we don't care what mode we're * XXX in, we should keep the ani parameters */ - if (restore && aniState->isSetup) { + if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) { ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, aniState->noiseImmunityLevel); ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, @@ -595,7 +563,7 @@ ar5416AniReset(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, AH_TRUE); ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE); ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); - aniState->isSetup = AH_TRUE; + ichan->privFlags |= CHANNEL_ANI_SETUP; } ar5416AniRestart(ah, aniState); @@ -831,7 +799,7 @@ updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState) */ void ar5416AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, - HAL_CHANNEL *chan) + const struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); struct ar5212AniState *aniState = ahp->ah_curani; diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c index 49db049..cced27e 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5416_cal.c,v 1.7 2008/11/11 17:43:23 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" @@ -32,26 +32,27 @@ #define NUM_NOISEFLOOR_READINGS 6 /* 3 chains * (ctl + ext) */ static void ar5416StartNFCal(struct ath_hal *ah); -static void ar5416LoadNF(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *); -static int16_t ar5416GetNf(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +static void ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *); +static int16_t ar5416GetNf(struct ath_hal *, struct ieee80211_channel *); /* * Determine if calibration is supported by device and channel flags */ static OS_INLINE HAL_BOOL -ar5416IsCalSupp(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_CAL_TYPE calType) +ar5416IsCalSupp(struct ath_hal *ah, const struct ieee80211_channel *chan, + HAL_CAL_TYPE calType) { struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; switch (calType & cal->suppCals) { case IQ_MISMATCH_CAL: /* Run IQ Mismatch for non-CCK only */ - return !IS_CHAN_B(chan); + return !IEEE80211_IS_CHAN_B(chan); case ADC_GAIN_CAL: case ADC_DC_CAL: /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ - return !IS_CHAN_B(chan) && - !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan)); + return !IEEE80211_IS_CHAN_B(chan) && + !(IEEE80211_IS_CHAN_2GHZ(chan) && IEEE80211_IS_CHAN_HT20(chan)); } return AH_FALSE; } @@ -164,7 +165,7 @@ ar5416RunInitCals(struct ath_hal *ah, int init_cal_count) * Initialize Calibration infrastructure. */ HAL_BOOL -ar5416InitCal(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan) { struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; HAL_CHANNEL_INTERNAL *ichan; @@ -279,7 +280,7 @@ ar5416InitCal(struct ath_hal *ah, HAL_CHANNEL *chan) * Reset the calibration valid bit in channel. */ HAL_BOOL -ar5416ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan) { struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); @@ -292,7 +293,7 @@ ar5416ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); return AH_FALSE; } /* @@ -312,8 +313,8 @@ ar5416ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan) HALDEBUG(ah, HAL_DEBUG_PERCAL, "%s: Resetting Cal %d state for channel %u/0x%x\n", - __func__, currCal->calData->calType, chan->channel, - chan->channelFlags); + __func__, currCal->calData->calType, chan->ic_freq, + chan->ic_flags); /* Disable cal validity in channel */ ichan->calValid &= ~currCal->calData->calType; @@ -384,7 +385,7 @@ ar5416DoCalibration(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan, * Internal interface to schedule periodic calibration work. */ HAL_BOOL -ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, +ar5416PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int rxchainmask, HAL_BOOL longcal, HAL_BOOL *isCalDone) { struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; @@ -400,7 +401,7 @@ ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, if (ichan == AH_NULL) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + __func__, chan->ic_freq, chan->ic_flags); return AH_FALSE; } @@ -432,7 +433,7 @@ ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, * Get the value from the previous NF cal * and update the history buffer. */ - ar5416GetNf(ah, ichan); + ar5416GetNf(ah, chan); /* * Load the NF from history buffer of the current channel. @@ -443,12 +444,6 @@ ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, /* start NF calibration, without updating BB NF register*/ ar5416StartNFCal(ah); - - if ((ichan->channelFlags & CHANNEL_CW_INT) != 0) { - /* report up and clear internal state */ - chan->channelFlags |= CHANNEL_CW_INT; - ichan->channelFlags &= ~CHANNEL_CW_INT; - } } return AH_TRUE; } @@ -458,7 +453,8 @@ ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, * changes. */ HAL_BOOL -ar5416PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_BOOL *isIQdone) +ar5416PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan, + HAL_BOOL *isIQdone) { struct ath_hal_5416 *ahp = AH5416(ah); struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; @@ -478,29 +474,19 @@ ar5416PerCalibration(struct ath_hal *ah, HAL_CHANNEL *chan, HAL_BOOL *isIQdone) static HAL_BOOL ar5416GetEepromNoiseFloorThresh(struct ath_hal *ah, - const HAL_CHANNEL_INTERNAL *chan, int16_t *nft) + const struct ieee80211_channel *chan, int16_t *nft) { - switch (chan->channelFlags & CHANNEL_ALL_NOTURBO) { - case CHANNEL_A: - case CHANNEL_A_HT20: - case CHANNEL_A_HT40PLUS: - case CHANNEL_A_HT40MINUS: + if (IEEE80211_IS_CHAN_5GHZ(chan)) { ath_hal_eepromGet(ah, AR_EEP_NFTHRESH_5, nft); - break; - case CHANNEL_B: - case CHANNEL_G: - case CHANNEL_G_HT20: - case CHANNEL_G_HT40PLUS: - case CHANNEL_G_HT40MINUS: + return AH_TRUE; + } + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ath_hal_eepromGet(ah, AR_EEP_NFTHRESH_2, nft); - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - return AH_FALSE; + return AH_TRUE; } - return AH_TRUE; + HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", + __func__, chan->ic_flags); + return AH_FALSE; } static void @@ -512,7 +498,7 @@ ar5416StartNFCal(struct ath_hal *ah) } static void -ar5416LoadNF(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *chan) { static const uint32_t ar5416_cca_regs[] = { AR_PHY_CCA, @@ -624,7 +610,7 @@ ar5416UpdateNFHistBuff(struct ar5212NfCalHist *h, int16_t *nfarray) * Read the NF and check it against the noise floor threshhold */ static int16_t -ar5416GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5416GetNf(struct ath_hal *ah, struct ieee80211_channel *chan) { int16_t nf, nfThresh; @@ -635,6 +621,7 @@ ar5416GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) } else { /* Finished NF cal, check against threshold */ int16_t nfarray[NUM_NOISEFLOOR_READINGS] = { 0 }; + HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); /* TODO - enhance for multiple chains and ext ch */ ath_hal_getNoiseFloor(ah, nfarray); @@ -650,14 +637,14 @@ ar5416GetNf(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * happens it indicates a problem regardless * of the band. */ - chan->channelFlags |= CHANNEL_CW_INT; + chan->ic_state |= IEEE80211_CHANSTATE_CWINT; nf = 0; } } else { nf = 0; } ar5416UpdateNFHistBuff(AH5416(ah)->ah_cal.nfCalHist, nfarray); - chan->rawNoiseFloor = nf; + ichan->rawNoiseFloor = nf; } return nf; } diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h index 1240029..e77f300 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5416_cal.h,v 1.3 2008/11/11 17:43:23 sam Exp $ + * $FreeBSD$ */ #ifndef _ATH_AR5416_CAL_H_ #define _ATH_AR5416_CAL_H_ @@ -102,12 +102,13 @@ struct ar5416PerCal { } \ } while (0) -HAL_BOOL ar5416InitCal(struct ath_hal *ah, HAL_CHANNEL *chan); -HAL_BOOL ar5416PerCalibration(struct ath_hal *, HAL_CHANNEL *, +HAL_BOOL ar5416InitCal(struct ath_hal *, const struct ieee80211_channel *); +HAL_BOOL ar5416PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *isIQdone); -HAL_BOOL ar5416PerCalibrationN(struct ath_hal *ah, HAL_CHANNEL *chan, +HAL_BOOL ar5416PerCalibrationN(struct ath_hal *, struct ieee80211_channel *, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); -HAL_BOOL ar5416ResetCalValid(struct ath_hal *ah, HAL_CHANNEL *chan); +HAL_BOOL ar5416ResetCalValid(struct ath_hal *, + const struct ieee80211_channel *); void ar5416IQCalCollect(struct ath_hal *ah); void ar5416IQCalibration(struct ath_hal *ah, uint8_t numChains); diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c index 5296bc7..b017017 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -43,53 +43,53 @@ #define RTC_PLL_SETTLE_DELAY 1000 /* 1 ms */ static void ar5416InitDMA(struct ath_hal *ah); -static void ar5416InitBB(struct ath_hal *ah, HAL_CHANNEL *chan); +static void ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *); static void ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode); static void ar5416InitQoS(struct ath_hal *ah); static void ar5416InitUserSettings(struct ath_hal *ah); static HAL_BOOL ar5416SetTransmitPower(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain); + const struct ieee80211_channel *chan, uint16_t *rfXpdGain); #if 0 -static HAL_BOOL ar5416ChannelChange(struct ath_hal *, HAL_CHANNEL *); +static HAL_BOOL ar5416ChannelChange(struct ath_hal *, const struct ieee80211_channel *); #endif -static void ar5416SetDeltaSlope(struct ath_hal *, HAL_CHANNEL_INTERNAL *); -static void ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan); +static void ar5416SetDeltaSlope(struct ath_hal *, const struct ieee80211_channel *); +static void ar5416SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan); #ifdef AH_SUPPORT_AR9280 -static void ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan); +static void ar9280SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan); #endif static HAL_BOOL ar5416SetResetPowerOn(struct ath_hal *ah); static HAL_BOOL ar5416SetReset(struct ath_hal *ah, int type); -static void ar5416InitPLL(struct ath_hal *ah, HAL_CHANNEL *chan); -static HAL_BOOL ar5416SetBoardValues(struct ath_hal *, HAL_CHANNEL_INTERNAL *); +static void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan); +static HAL_BOOL ar5416SetBoardValues(struct ath_hal *, const struct ieee80211_channel *); static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, - HAL_CHANNEL_INTERNAL *chan, int16_t *ratesArray, + const struct ieee80211_channel *chan, int16_t *ratesArray, uint16_t cfgCtl, uint16_t AntennaReduction, uint16_t twiceMaxRegulatoryPower, uint16_t powerLimit); static HAL_BOOL ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, - HAL_CHANNEL_INTERNAL *chan, + const struct ieee80211_channel *chan, int16_t *pTxPowerIndexOffset); static uint16_t ar5416GetMaxEdgePower(uint16_t freq, CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz); static void ar5416GetTargetPowers(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, CAL_TARGET_POWER_HT *powInfo, + const struct ieee80211_channel *chan, CAL_TARGET_POWER_HT *powInfo, uint16_t numChannels, CAL_TARGET_POWER_HT *pNewPower, uint16_t numRates, HAL_BOOL isHt40Target); static void ar5416GetTargetPowersLeg(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, CAL_TARGET_POWER_LEG *powInfo, + const struct ieee80211_channel *chan, CAL_TARGET_POWER_LEG *powInfo, uint16_t numChannels, CAL_TARGET_POWER_LEG *pNewPower, uint16_t numRates, HAL_BOOL isExtTarget); static int16_t interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, int16_t targetLeft, int16_t targetRight); -static void ar5416Set11nRegs(struct ath_hal *ah, HAL_CHANNEL *chan); +static void ar5416Set11nRegs(struct ath_hal *ah, const struct ieee80211_channel *chan); static void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, CAL_DATA_PER_FREQ *pRawDataSet, + const struct ieee80211_channel *chan, CAL_DATA_PER_FREQ *pRawDataSet, uint8_t * bChans, uint16_t availPiers, uint16_t tPdGainOverlap, int16_t *pMinCalPower, uint16_t * pPdGainBoundaries, uint8_t * pPDADCValues, @@ -110,7 +110,8 @@ static HAL_BOOL ar5416FillVpdTable(uint8_t pwrMin, uint8_t pwrMax, */ HAL_BOOL ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, - HAL_CHANNEL *chan, HAL_BOOL bChannelChange, HAL_STATUS *status) + struct ieee80211_channel *chan, + HAL_BOOL bChannelChange, HAL_STATUS *status) { #define N(a) (sizeof (a) / sizeof (a[0])) #define FAIL(_code) do { ecode = _code; goto bad; } while (0) @@ -127,20 +128,6 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, uint32_t ackTpcPow, ctsTpcPow, chirpTpcPow; OS_MARK(ah, AH_MARK_RESET, bChannelChange); -#define IS(_c,_f) (((_c)->channelFlags & _f) || 0) - if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as 2GHz or 5GHz\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } - if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; not marked as OFDM or CCK\n", - __func__, chan->channel, chan->channelFlags); - FAIL(HAL_EINVAL); - } -#undef IS /* Bring out of sleep mode */ if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { @@ -153,16 +140,8 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, * Map public channel to private. */ ichan = ath_hal_checkchannel(ah, chan); - if (ichan == AH_NULL) { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: invalid channel %u/0x%x; no mapping\n", - __func__, chan->channel, chan->channelFlags); + if (ichan == AH_NULL) FAIL(HAL_EINVAL); - } else { - HALDEBUG(ah, HAL_DEBUG_RESET, - "%s: Ch=%u Max=%d Min=%d\n",__func__, - ichan->channel, ichan->maxTxPower, ichan->minTxPower); - } switch (opmode) { case HAL_M_STA: case HAL_M_IBSS: @@ -220,37 +199,21 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* Setup the indices for the next set of register array writes */ /* XXX Ignore 11n dynamic mode on the AR5416 for the moment */ - switch (chan->channelFlags & CHANNEL_ALL) { - case CHANNEL_A: - case CHANNEL_A_HT20: - modesIndex = 1; - freqIndex = 1; - break; - case CHANNEL_T: - case CHANNEL_A_HT40PLUS: - case CHANNEL_A_HT40MINUS: - modesIndex = 2; - freqIndex = 1; - break; - case CHANNEL_PUREG: - case CHANNEL_G_HT20: - case CHANNEL_B: /* treat as channel G , no B mode suport in owl */ - modesIndex = 4; - freqIndex = 2; - break; - case CHANNEL_G_HT40PLUS: - case CHANNEL_G_HT40MINUS: - modesIndex = 3; - freqIndex = 2; - break; - case CHANNEL_108G: - modesIndex = 5; - freqIndex = 2; - break; - default: - HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", - __func__, chan->channelFlags); - FAIL(HAL_EINVAL); + if (IEEE80211_IS_CHAN_2GHZ(chan)) { + freqIndex = 2; + if (IEEE80211_IS_CHAN_HT40(chan)) + modesIndex = 3; + else if (IEEE80211_IS_CHAN_108G(chan)) + modesIndex = 5; + else + modesIndex = 4; + } else { + freqIndex = 1; + if (IEEE80211_IS_CHAN_HT40(chan) || + IEEE80211_IS_CHAN_TURBO(chan)) + modesIndex = 2; + else + modesIndex = 1; } OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -264,7 +227,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO); #if 0 /* NB: only required for Sowl */ - ar5416EepromSetAddac(ah, ichan); + ar5416EepromSetAddac(ah, chan); #endif regWrites = ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_addac, 1, regWrites); @@ -285,7 +248,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, /* XXX Merlin 100us delay for shift registers */ regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_common, 1, regWrites); /* Setup 11n MAC/Phy mode registers */ - ar5416Set11nRegs(ah,chan); + ar5416Set11nRegs(ah, chan); /* XXX updated regWrites? */ ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites); #ifdef AH_SUPPORT_AR9280 @@ -332,32 +295,32 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_SELFGEN_MASK, AH5416(ah)->ah_tx_chainmask); /* Setup the transmit power values. */ - if (!ar5416SetTransmitPower(ah, ichan, rfXpdGain)) { + if (!ar5416SetTransmitPower(ah, chan, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error init'ing transmit power\n", __func__); FAIL(HAL_EIO); } /* Write the analog registers */ - if (!ahp->ah_rfHal->setRfRegs(ah, ichan, freqIndex, rfXpdGain)) { + if (!ahp->ah_rfHal->setRfRegs(ah, chan, freqIndex, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: ar5212SetRfRegs failed\n", __func__); FAIL(HAL_EIO); } /* Write delta slope for OFDM enabled modes (A, G, Turbo) */ - if (IS_CHAN_OFDM(chan)|| IS_CHAN_HT(chan)) - ar5416SetDeltaSlope(ah, ichan); + if (IEEE80211_IS_CHAN_OFDM(chan)|| IEEE80211_IS_CHAN_HT(chan)) + ar5416SetDeltaSlope(ah, chan); #ifdef AH_SUPPORT_AR9280 if (AR_SREV_MERLIN_10_OR_LATER(ah)) - ar9280SpurMitigate(ah, ichan); + ar9280SpurMitigate(ah, chan); else #endif - ar5416SpurMitigate(ah, ichan); + ar5416SpurMitigate(ah, chan); /* Setup board specific options for EEPROM version 3 */ - if (!ar5416SetBoardValues(ah, ichan)) { + if (!ar5416SetBoardValues(ah, chan)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error setting board options\n", __func__); FAIL(HAL_EIO); @@ -394,7 +357,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ - if (!ar5212SetChannel(ah, ichan)) + if (!ar5212SetChannel(ah, chan)) FAIL(HAL_EIO); OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); @@ -453,15 +416,8 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ - if (bChannelChange) { - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - chan->maxRegTxPower = ichan->maxRegTxPower; - chan->maxTxPower = ichan->maxTxPower; - chan->minTxPower = ichan->minTxPower; - } + if (bChannelChange && !IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; HALDEBUG(ah, HAL_DEBUG_RESET, "%s: done\n", __func__); @@ -485,7 +441,7 @@ bad: * time, the function returns false as a reset is necessary */ HAL_BOOL -ar5416ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416ChannelChange(struct ath_hal *ah, const structu ieee80211_channel *chan) { uint32_t ulCount; uint32_t data, synthDelay, qnum; @@ -520,11 +476,11 @@ ar5416ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) ar5416Set11nRegs(ah, chan); /* NB: setup 5416-specific regs */ /* Change the synth */ - if (!ar5212SetChannel(ah, ichan)) + if (!ar5212SetChannel(ah, chan)) return AH_FALSE; /* Setup the transmit power values. */ - if (!ar5416SetTransmitPower(ah, ichan, rfXpdGain)) { + if (!ar5416SetTransmitPower(ah, chan, rfXpdGain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error init'ing transmit power\n", __func__); return AH_FALSE; @@ -548,27 +504,20 @@ ar5416ChannelChange(struct ath_hal *ah, HAL_CHANNEL *chan) OS_REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); /* Write delta slope for OFDM enabled modes (A, G, Turbo) */ - if (IS_CHAN_OFDM(ichan)|| IS_CHAN_HT(chan)) { - if (ahp->ah_eeprom.ee_version >= AR_EEPROM_VER5_3 && - !IS_CHAN_B(chan)) - ar5212SetSpurMitigation(ah, ichan); - ar5416SetDeltaSlope(ah, ichan); + if (IEEE80211_IS_CHAN_OFDM(ichan)|| IEEE80211_IS_CHAN_HT(chan)) { + HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER5_3); + ar5212SetSpurMitigation(ah, chan); + ar5416SetDeltaSlope(ah, chan); } /* XXX spur mitigation for Melin */ - /* Copy over internal channel flags to public hal channel */ - - if (!(ichan->privFlags & CHANNEL_DFS)) - ichan->privFlags &= ~CHANNEL_INTERFERENCE; - chan->channelFlags = ichan->channelFlags; - chan->privFlags = ichan->privFlags; - chan->maxRegTxPower = ichan->maxRegTxPower; - chan->maxTxPower = ichan->maxTxPower; - chan->minTxPower = ichan->minTxPower; - AH_PRIVATE(ah)->ah_curchan->ah_channel_time=0; - AH_PRIVATE(ah)->ah_curchan->ah_tsf_last = ar5212GetTsf64(ah); - ar5212TxEnable(ah,AH_TRUE); + if (!IEEE80211_IS_CHAN_DFS(chan)) + chan->ic_state &= ~IEEE80211_CHANSTATE_CWINT; + + ichan->channel_time = 0; + ichan->tsf_last = ar5212GetTsf64(ah); + ar5212TxEnable(ah, AH_TRUE); return AH_TRUE; } #endif @@ -609,7 +558,7 @@ ar5416InitDMA(struct ath_hal *ah) } static void -ar5416InitBB(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t synthDelay; @@ -619,7 +568,7 @@ ar5416InitBB(struct ath_hal *ah, HAL_CHANNEL *chan) * Value is in 100ns increments. */ synthDelay = OS_REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; - if (IS_CHAN_CCK(chan)) { + if (IEEE80211_IS_CHAN_CCK(chan)) { synthDelay = (4 * synthDelay) / 22; } else { synthDelay /= 10; @@ -627,7 +576,7 @@ ar5416InitBB(struct ath_hal *ah, HAL_CHANNEL *chan) /* Turn on PLL on 5416 */ HALDEBUG(ah, HAL_DEBUG_RESET, "%s %s channel\n", - __func__, IS_CHAN_5GHZ(chan) ? "5GHz" : "2GHz"); + __func__, IEEE80211_IS_CHAN_5GHZ(chan) ? "5GHz" : "2GHz"); ar5416InitPLL(ah, chan); /* Activate the PHY (includes baseband activate and synthesizer on) */ @@ -639,9 +588,9 @@ ar5416InitBB(struct ath_hal *ah, HAL_CHANNEL *chan) * extra BASE_ACTIVATE_DELAY usecs to ensure this condition * does not happen. */ - if (IS_CHAN_HALF_RATE(AH_PRIVATE(ah)->ah_curchan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { OS_DELAY((synthDelay << 1) + BASE_ACTIVATE_DELAY); - } else if (IS_CHAN_QUARTER_RATE(AH_PRIVATE(ah)->ah_curchan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { OS_DELAY((synthDelay << 2) + BASE_ACTIVATE_DELAY); } else { OS_DELAY(synthDelay + BASE_ACTIVATE_DELAY); @@ -673,10 +622,9 @@ ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode) ahp->ah_maskReg |= AR_IMR_MIB; OS_REG_WRITE(ah, AR_IMR, ahp->ah_maskReg); /* Enable bus errors that are OR'd to set the HIUERR bit */ - #if 0 OS_REG_WRITE(ah, AR_IMR_S2, - OS_REG_READ(ah, AR_IMR_S2) | AR_IMR_S2_GTT | AR_IMR_S2_CST); + OS_REG_READ(ah, AR_IMR_S2) | AR_IMR_S2_GTT | AR_IMR_S2_CST); #endif } @@ -731,11 +679,11 @@ ar5416InitUserSettings(struct ath_hal *ah) * Places the hardware into reset and then pulls it out of reset */ HAL_BOOL -ar5416ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t rfMode = 0; - OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->channel : 0); + OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0); /* * Warm reset is optimistic. */ @@ -762,14 +710,14 @@ ar5416ChipReset(struct ath_hal *ah, HAL_CHANNEL *chan) */ if (chan != AH_NULL) { /* treat channel B as channel G , no B mode suport in owl */ - rfMode |= (IS_CHAN_G(chan) || IS_CHAN_B(chan)) ? + rfMode |= IEEE80211_IS_CHAN_CCK(chan) ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { /* phy mode bits for 5GHz channels require Fast Clock */ rfMode |= AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE; } else if (!AR_SREV_MERLIN_10_OR_LATER(ah)) { - rfMode |= (IS_CHAN_5GHZ(chan)) ? + rfMode |= IEEE80211_IS_CHAN_5GHZ(chan) ? AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ; } OS_REG_WRITE(ah, AR_PHY_MODE, rfMode); @@ -811,7 +759,7 @@ ar5416GetDeltaSlopeValues(struct ath_hal *ah, uint32_t coef_scaled, } void -ar5416SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5416SetDeltaSlope(struct ath_hal *ah, const struct ieee80211_channel *chan) { #define INIT_CLOCKMHZSCALED 0x64000000 uint32_t coef_scaled, ds_coef_exp, ds_coef_man; @@ -819,13 +767,13 @@ ar5416SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) CHAN_CENTERS centers; - if (IS_CHAN_TURBO(chan)) + if (IEEE80211_IS_CHAN_TURBO(chan)) clockMhzScaled *= 2; /* half and quarter rate can divide the scaled clock by 2 or 4 respectively */ /* scale for selected channel bandwidth */ - if (IS_CHAN_HALF_RATE(chan)) { + if (IEEE80211_IS_CHAN_HALF(chan)) { clockMhzScaled = clockMhzScaled >> 1; - } else if (IS_CHAN_QUARTER_RATE(chan)) { + } else if (IEEE80211_IS_CHAN_QUARTER(chan)) { clockMhzScaled = clockMhzScaled >> 2; } @@ -835,14 +783,14 @@ ar5416SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) */ ar5416GetChannelCenters(ah, chan, ¢ers); coef_scaled = clockMhzScaled / centers.synth_center; - + ar5416GetDeltaSlopeValues(ah, coef_scaled, &ds_coef_man, &ds_coef_exp); OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_MAN, ds_coef_man); OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_EXP, ds_coef_exp); - + /* * For Short GI, * scaled coeff is 9/10 that of normal coeff @@ -866,8 +814,9 @@ ar5416SetDeltaSlope(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) #define SPUR_RSSI_THRESH 40 static void -ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5416SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan) { + uint16_t freq = ath_hal_gethwchannel(ah, chan); static const int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 }; static const int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10, @@ -888,7 +837,7 @@ ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) int8_t mask_amt; int tmp_mask; int cur_bb_spur; - HAL_BOOL is2GHz = IS_CHAN_2GHZ(chan); + HAL_BOOL is2GHz = IEEE80211_IS_CHAN_2GHZ(chan); OS_MEMZERO(mask_m, sizeof(mask_m)); OS_MEMZERO(mask_p, sizeof(mask_p)); @@ -901,7 +850,7 @@ ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) cur_bb_spur = ath_hal_getSpurChan(ah, i, is2GHz); if (AR_NO_SPUR == cur_bb_spur) break; - cur_bb_spur = cur_bb_spur - (chan->channel * 10); + cur_bb_spur = cur_bb_spur - (freq * 10); if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) { bb_spur = cur_bb_spur; break; @@ -938,7 +887,7 @@ ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) * in 11A mode the denominator of spur_freq_sd should be 40 and * it should be 44 in 11G */ - denominator = IS_CHAN_2GHZ(chan) ? 440 : 400; + denominator = IEEE80211_IS_CHAN_2GHZ(chan) ? 440 : 400; spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff; new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC | @@ -1111,7 +1060,7 @@ ar5416SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) #define AR_SPUR_FEEQ_BOUND_HT20 10 static void -ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) +ar9280SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan) { static const int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 }; @@ -1136,12 +1085,12 @@ ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) int8_t mask_amt; int tmp_mask; int cur_bb_spur; - HAL_BOOL is2GHz = IS_CHAN_2GHZ(ichan); + HAL_BOOL is2GHz = IEEE80211_IS_CHAN_2GHZ(chan); OS_MEMZERO(&mask_m, sizeof(int8_t) * 123); OS_MEMZERO(&mask_p, sizeof(int8_t) * 123); - ar5416GetChannelCenters(ah, ichan, ¢ers); + ar5416GetChannelCenters(ah, chan, ¢ers); freq = centers.synth_center; /* @@ -1212,7 +1161,7 @@ ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) OS_REG_WRITE(ah, AR_PHY_SPUR_REG, newVal); /* Pick control or extn channel to cancel the spur */ - if (IS_CHAN_HT40(ichan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { if (bb_spur < 0) { spur_subchannel_sd = 1; bb_spur_off = bb_spur + 10; @@ -1229,7 +1178,7 @@ ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) * spur_delta_phase = bb_spur/40 * 2**21 for static ht20, * /80 for dyn2040. */ - if (IS_CHAN_HT40(ichan)) + if (IEEE80211_IS_CHAN_HT40(chan)) spur_delta_phase = ((bb_spur * 262144) / 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE; else spur_delta_phase = ((bb_spur * 524288) / 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE; @@ -1238,7 +1187,7 @@ ar9280SpurMitigate(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *ichan) * in 11A mode the denominator of spur_freq_sd should be 40 and * it should be 44 in 11G */ - denominator = IS_CHAN_2GHZ(ichan) ? 44 : 40; + denominator = IEEE80211_IS_CHAN_2GHZ(ichan) ? 44 : 40; spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff; newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC | @@ -1426,37 +1375,29 @@ ar5416SetTxPowerLimit(struct ath_hal *ah, uint32_t limit) } HAL_BOOL -ar5416GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans) +ar5416GetChipPowerLimits(struct ath_hal *ah, + struct ieee80211_channel *chan) { struct ath_hal_5212 *ahp = AH5212(ah); int16_t minPower, maxPower; - HAL_CHANNEL *chan; - int i; /* * Get Pier table max and min powers. */ - for (i = 0; i < nchans; i++) { - chan = &chans[i]; - if (ahp->ah_rfHal->getChannelMaxMinPower(ah, chan, &maxPower, &minPower)) { - /* NB: rf code returns 1/4 dBm units, convert */ - chan->maxTxPower = maxPower / 2; - chan->minTxPower = minPower / 2; - } else { - HALDEBUG(ah, HAL_DEBUG_ANY, - "%s: no min/max power for %u/0x%x\n", - __func__, chan->channel, chan->channelFlags); - chan->maxTxPower = AR5416_MAX_RATE_POWER; - chan->minTxPower = 0; - } - } -#ifdef AH_DEBUG - for (i=0; i<nchans; i++) { - HALDEBUG(ah, HAL_DEBUG_RESET, - "Chan %d: MaxPow = %d MinPow = %d\n", - chans[i].channel,chans[i].maxTxPower, chans[i].minTxPower); + if (ahp->ah_rfHal->getChannelMaxMinPower(ah, chan, &maxPower, &minPower)) { + /* NB: rf code returns 1/4 dBm units, convert */ + chan->ic_maxpower = maxPower / 2; + chan->ic_minpower = minPower / 2; + } else { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: no min/max power for %u/0x%x\n", + __func__, chan->ic_freq, chan->ic_flags); + chan->ic_maxpower = AR5416_MAX_RATE_POWER; + chan->ic_minpower = 0; } -#endif + HALDEBUG(ah, HAL_DEBUG_RESET, + "Chan %d: MaxPow = %d MinPow = %d\n", + chan->ic_freq, chan->ic_maxpower, chan->ic_minpower); return AH_TRUE; } @@ -1481,7 +1422,8 @@ typedef enum Ar5416_Rates { * operating channel and mode. */ static HAL_BOOL -ar5416SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain) +ar5416SetTransmitPower(struct ath_hal *ah, + const struct ieee80211_channel *chan, uint16_t *rfXpdGain) { #define POW_SM(_r, _s) (((_r) & 0x3f) << (_s)) #define N(a) (sizeof (a) / sizeof (a[0])) @@ -1505,13 +1447,13 @@ ar5416SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t /* Setup info for the actual eeprom */ ath_hal_memzero(ratesArray, sizeof(ratesArray)); - cfgCtl = ath_hal_getctl(ah, (HAL_CHANNEL *)chan); - powerLimit = chan->maxRegTxPower * 2; - twiceAntennaReduction = chan->antennaMax; + cfgCtl = ath_hal_getctl(ah, chan); + powerLimit = chan->ic_maxregpower * 2; + twiceAntennaReduction = chan->ic_maxantgain; twiceMaxRegulatoryPower = AH_MIN(MAX_RATE_POWER, AH_PRIVATE(ah)->ah_powerLimit); - pModal = &pEepData->modalHeader[IS_CHAN_2GHZ(chan)]; + pModal = &pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)]; HALDEBUG(ah, HAL_DEBUG_RESET, "%s Channel=%u CfgCtl=%u\n", - __func__,chan->channel, cfgCtl ); + __func__,chan->ic_freq, cfgCtl ); if (IS_EEP_MINOR_V2(ah)) { ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; @@ -1534,11 +1476,11 @@ ar5416SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t maxPower = AH_MAX(ratesArray[rate6mb], ratesArray[rateHt20_0]); - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { maxPower = AH_MAX(maxPower, ratesArray[rate1l]); } - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { maxPower = AH_MAX(maxPower, ratesArray[rateHt40_0]); } @@ -1574,7 +1516,7 @@ ar5416SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t | POW_SM(ratesArray[rate24mb], 0) ); - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { /* Write the CCK power per rate set */ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, POW_SM(ratesArray[rate2s], 24) @@ -1608,7 +1550,7 @@ ar5416SetTransmitPower(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t | POW_SM(ratesArray[rateHt20_4], 0) ); - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { /* Write the HT40 power per rate set */ /* Correct PAR difference between HT40 and HT20/LEGACY */ OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, @@ -1812,62 +1754,56 @@ ar5416SetReset(struct ath_hal *ah, int type) #endif static void -ar5416InitPLL(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t pll; - if (AR_SREV_MERLIN_10_OR_LATER(ah)) { + if (AR_SREV_MERLIN_20(ah) && chan != AH_NULL) { + /* + * PLL WAR for Merlin 2.0/2.1 + * When doing fast clock, set PLL to 0x142c + * Else, set PLL to 0x2850 to prevent reset-to-reset variation + */ + pll = IS_5GHZ_FAST_CLOCK_EN(ah, chan) ? 0x142c : 0x2850; + } else if (AR_SREV_MERLIN_10_OR_LATER(ah)) { pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV); - - if (chan != AH_NULL && IS_CHAN_HALF_RATE(chan)) { - pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); - } else if (chan && IS_CHAN_QUARTER_RATE(chan)) { - pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); - } - if (chan != AH_NULL && IS_CHAN_5GHZ(chan)) { - pll |= SM(0x28, AR_RTC_SOWL_PLL_DIV); - - /* - * PLL WAR for Merlin 2.0/2.1 - * When doing fast clock, set PLL to 0x142c - * Else, set PLL to 0x2850 to prevent reset-to-reset variation - */ - if (AR_SREV_MERLIN_20(ah)) { - if (IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { - pll = 0x142c; - } else { - pll = 0x2850; - } - } - } else { + if (chan != AH_NULL) { + if (IEEE80211_IS_CHAN_HALF(chan)) + pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_QUARTER(chan)) + pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_5GHZ(chan)) + pll |= SM(0x28, AR_RTC_SOWL_PLL_DIV); + else + pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV); + } else pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV); - } } else if (AR_SREV_SOWL_10_OR_LATER(ah)) { pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV); - - if (chan != AH_NULL && IS_CHAN_HALF_RATE(chan)) { - pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); - } else if (chan && IS_CHAN_QUARTER_RATE(chan)) { - pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); - } - if (chan != AH_NULL && IS_CHAN_5GHZ(chan)) { - pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV); - } else { + if (chan != AH_NULL) { + if (IEEE80211_IS_CHAN_HALF(chan)) + pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_QUARTER(chan)) + pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_5GHZ(chan)) + pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV); + else + pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); + } else pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); - } } else { pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2; - - if (chan != AH_NULL && IS_CHAN_HALF_RATE(chan)) { - pll |= SM(0x1, AR_RTC_PLL_CLKSEL); - } else if (chan != AH_NULL && IS_CHAN_QUARTER_RATE(chan)) { - pll |= SM(0x2, AR_RTC_PLL_CLKSEL); - } - if (chan != AH_NULL && IS_CHAN_5GHZ(chan)) { - pll |= SM(0xa, AR_RTC_PLL_DIV); - } else { + if (chan != AH_NULL) { + if (IEEE80211_IS_CHAN_HALF(chan)) + pll |= SM(0x1, AR_RTC_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_QUARTER(chan)) + pll |= SM(0x2, AR_RTC_PLL_CLKSEL); + else if (IEEE80211_IS_CHAN_5GHZ(chan)) + pll |= SM(0xa, AR_RTC_PLL_DIV); + else + pll |= SM(0xb, AR_RTC_PLL_DIV); + } else pll |= SM(0xb, AR_RTC_PLL_DIV); - } } OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); @@ -1885,7 +1821,7 @@ ar5416InitPLL(struct ath_hal *ah, HAL_CHANNEL *chan) * given the channel value. */ static HAL_BOOL -ar5416SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) +ar5416SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan) { const HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; const struct ar5416eeprom *eep = &ee->ee_base; @@ -1894,9 +1830,10 @@ ar5416SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) uint8_t txRxAttenLocal; /* workaround for eeprom versions <= 14.2 */ HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1); - pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); + pModal = &eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)]; - txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44; /* workaround for eeprom versions <= 14.2 */ + /* NB: workaround for eeprom versions <= 14.2 */ + txRxAttenLocal = IEEE80211_IS_CHAN_2GHZ(chan) ? 23 : 44; OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); for (i = 0; i < AR5416_MAX_CHAINS; i++) { @@ -1968,7 +1905,7 @@ ar5416SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) } if (IS_EEP_MINOR_V3(ah)) { - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { /* Overwrite switch settling with HT40 value */ OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, pModal->swSettleHt40); } @@ -2012,7 +1949,7 @@ ar5416SetBoardValues(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) */ static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, - HAL_CHANNEL_INTERNAL *chan, + const struct ieee80211_channel *chan, int16_t *ratesArray, uint16_t cfgCtl, uint16_t AntennaReduction, uint16_t twiceMaxRegulatoryPower, @@ -2050,29 +1987,30 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, /* Compute TxPower reduction due to Antenna Gain */ - twiceLargestAntenna = AH_MAX(AH_MAX(pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[0], - pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[1]), - pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[2]); + twiceLargestAntenna = AH_MAX(AH_MAX( + pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[0], + pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[1]), + pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[2]); #if 0 /* Turn it back on if we need to calculate per chain antenna gain reduction */ /* Use only if the expected gain > 6dbi */ /* Chain 0 is always used */ - twiceLargestAntenna = pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[0]; + twiceLargestAntenna = pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[0]; /* Look at antenna gains of Chains 1 and 2 if the TX mask is set */ if (ahp->ah_tx_chainmask & 0x2) twiceLargestAntenna = AH_MAX(twiceLargestAntenna, - pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[1]); + pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[1]); if (ahp->ah_tx_chainmask & 0x4) twiceLargestAntenna = AH_MAX(twiceLargestAntenna, - pEepData->modalHeader[IS_CHAN_2GHZ(chan)].antennaGainCh[2]); + pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].antennaGainCh[2]); #endif twiceLargestAntenna = (int16_t)AH_MIN((AntennaReduction) - twiceLargestAntenna, 0); /* XXX setup for 5212 use (really used?) */ ath_hal_eepromSet(ah, - IS_CHAN_2GHZ(chan) ? AR_EEP_ANTGAINMAX_2 : AR_EEP_ANTGAINMAX_5, + IEEE80211_IS_CHAN_2GHZ(chan) ? AR_EEP_ANTGAINMAX_2 : AR_EEP_ANTGAINMAX_5, twiceLargestAntenna); /* @@ -2087,10 +2025,10 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, case 1: break; case 2: - scaledPower -= pEepData->modalHeader[IS_CHAN_2GHZ(chan)].pwrDecreaseFor2Chain; + scaledPower -= pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].pwrDecreaseFor2Chain; break; case 3: - scaledPower -= pEepData->modalHeader[IS_CHAN_2GHZ(chan)].pwrDecreaseFor3Chain; + scaledPower -= pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].pwrDecreaseFor3Chain; break; default: return AH_FALSE; /* Unsupported number of chains */ @@ -2099,7 +2037,7 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, scaledPower = AH_MAX(0, scaledPower); /* Get target powers from EEPROM - our baseline for TX Power */ - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { /* Setup for CTL modes */ numCtlModes = N(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; /* CTL_11B, CTL_11G, CTL_2GHT20 */ pCtlMode = ctlModesFor11g; @@ -2111,7 +2049,7 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower2GHT20, AR5416_NUM_2G_20_TARGET_POWERS, &targetPowerHt20, 8, AH_FALSE); - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { numCtlModes = N(ctlModesFor11g); /* All 2G CTL's */ ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower2GHT40, @@ -2132,7 +2070,7 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower5GHT20, AR5416_NUM_5G_20_TARGET_POWERS, &targetPowerHt20, 8, AH_FALSE); - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { numCtlModes = N(ctlModesFor11a); /* All 5G CTL's */ ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower5GHT40, @@ -2152,9 +2090,8 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, * */ for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) { - HAL_BOOL isHt40CtlMode = (pCtlMode[ctlMode] == CTL_5GHT40) || - (pCtlMode[ctlMode] == CTL_2GHT40); + (pCtlMode[ctlMode] == CTL_2GHT40); if (isHt40CtlMode) { freq = centers.ctl_center; } else if (pCtlMode[ctlMode] & EXT_ADDITIVE) { @@ -2174,7 +2111,7 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, rep = &(pEepData->ctlData[i]); twiceMinEdgePower = ar5416GetMaxEdgePower(freq, rep->ctlEdges[owl_get_ntxchains(AH5416(ah)->ah_tx_chainmask) - 1], - IS_CHAN_2GHZ(chan)); + IEEE80211_IS_CHAN_2GHZ(chan)); if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { /* Find the minimum of all CTL edge powers that apply to this channel */ twiceMaxEdgePower = AH_MIN(twiceMaxEdgePower, twiceMinEdgePower); @@ -2235,20 +2172,20 @@ ar5416SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, ratesArray[rateHt20_0 + i] = targetPowerHt20.tPow2x[i]; } - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ratesArray[rate1l] = targetPowerCck.tPow2x[0]; ratesArray[rate2s] = ratesArray[rate2l] = targetPowerCck.tPow2x[1]; ratesArray[rate5_5s] = ratesArray[rate5_5l] = targetPowerCck.tPow2x[2]; ratesArray[rate11s] = ratesArray[rate11l] = targetPowerCck.tPow2x[3]; } - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { for (i = 0; i < N(targetPowerHt40.tPow2x); i++) { ratesArray[rateHt40_0 + i] = targetPowerHt40.tPow2x[i]; } ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0]; ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0]; ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; } } @@ -2321,7 +2258,7 @@ ar5416GetMaxEdgePower(uint16_t freq, CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2G * channel, and number of channels */ static void -ar5416GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, +ar5416GetTargetPowers(struct ath_hal *ah, const struct ieee80211_channel *chan, CAL_TARGET_POWER_HT *powInfo, uint16_t numChannels, CAL_TARGET_POWER_HT *pNewPower, uint16_t numRates, HAL_BOOL isHt40Target) @@ -2336,22 +2273,22 @@ ar5416GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, freq = isHt40Target ? centers.synth_center : centers.ctl_center; /* Copy the target powers into the temp channel list */ - if (freq <= fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) { + if (freq <= fbin2freq(powInfo[0].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) { matchIndex = 0; } else { for (i = 0; (i < numChannels) && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { - if (freq == fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) { + if (freq == fbin2freq(powInfo[i].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) { matchIndex = i; break; - } else if ((freq < fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) && - (freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan)))) + } else if ((freq < fbin2freq(powInfo[i].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) && + (freq > fbin2freq(powInfo[i - 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)))) { lowIndex = i - 1; break; } } if ((matchIndex == -1) && (lowIndex == -1)) { - HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan))); + HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))); matchIndex = i - 1; } } @@ -2364,8 +2301,8 @@ ar5416GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, * Get the lower and upper channels, target powers, * and interpolate between them. */ - clo = fbin2freq(powInfo[lowIndex].bChannel, IS_CHAN_2GHZ(chan)); - chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IS_CHAN_2GHZ(chan)); + clo = fbin2freq(powInfo[lowIndex].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)); + chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)); for (i = 0; i < numRates; i++) { pNewPower->tPow2x[i] = (uint8_t)interpolate(freq, clo, chi, @@ -2381,7 +2318,7 @@ ar5416GetTargetPowers(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, */ static void ar5416GetTargetPowersLeg(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, + const struct ieee80211_channel *chan, CAL_TARGET_POWER_LEG *powInfo, uint16_t numChannels, CAL_TARGET_POWER_LEG *pNewPower, uint16_t numRates, HAL_BOOL isExtTarget) @@ -2396,22 +2333,22 @@ ar5416GetTargetPowersLeg(struct ath_hal *ah, freq = (isExtTarget) ? centers.ext_center :centers.ctl_center; /* Copy the target powers into the temp channel list */ - if (freq <= fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) { + if (freq <= fbin2freq(powInfo[0].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) { matchIndex = 0; } else { for (i = 0; (i < numChannels) && (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { - if (freq == fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) { + if (freq == fbin2freq(powInfo[i].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) { matchIndex = i; break; - } else if ((freq < fbin2freq(powInfo[i].bChannel, IS_CHAN_2GHZ(chan))) && - (freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan)))) + } else if ((freq < fbin2freq(powInfo[i].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))) && + (freq > fbin2freq(powInfo[i - 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)))) { lowIndex = i - 1; break; } } if ((matchIndex == -1) && (lowIndex == -1)) { - HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IS_CHAN_2GHZ(chan))); + HALASSERT(freq > fbin2freq(powInfo[i - 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan))); matchIndex = i - 1; } } @@ -2424,8 +2361,8 @@ ar5416GetTargetPowersLeg(struct ath_hal *ah, * Get the lower and upper channels, target powers, * and interpolate between them. */ - clo = fbin2freq(powInfo[lowIndex].bChannel, IS_CHAN_2GHZ(chan)); - chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IS_CHAN_2GHZ(chan)); + clo = fbin2freq(powInfo[lowIndex].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)); + chi = fbin2freq(powInfo[lowIndex + 1].bChannel, IEEE80211_IS_CHAN_2GHZ(chan)); for (i = 0; i < numRates; i++) { pNewPower->tPow2x[i] = (uint8_t)interpolate(freq, clo, chi, @@ -2442,7 +2379,8 @@ ar5416GetTargetPowersLeg(struct ath_hal *ah, * linear voltage to power level table. */ static HAL_BOOL -ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, HAL_CHANNEL_INTERNAL *chan, int16_t *pTxPowerIndexOffset) +ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, + const struct ieee80211_channel *chan, int16_t *pTxPowerIndexOffset) { CAL_DATA_PER_FREQ *pRawDataset; uint8_t *pCalBChans = AH_NULL; @@ -2457,15 +2395,15 @@ ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, HAL_CH ath_hal_memzero(xpdGainValues, sizeof(xpdGainValues)); - xpdMask = pEepData->modalHeader[IS_CHAN_2GHZ(chan)].xpdGain; + xpdMask = pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].xpdGain; if (IS_EEP_MINOR_V2(ah)) { - pdGainOverlap_t2 = pEepData->modalHeader[IS_CHAN_2GHZ(chan)].pdGainOverlap; + pdGainOverlap_t2 = pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].pdGainOverlap; } else { pdGainOverlap_t2 = (uint16_t)(MS(OS_REG_READ(ah, AR_PHY_TPCRG5), AR_PHY_TPCRG5_PD_GAIN_OVERLAP)); } - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { pCalBChans = pEepData->calFreqPier2G; numPiers = AR5416_NUM_2G_CAL_PIERS; } else { @@ -2505,7 +2443,7 @@ ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, HAL_CH } if (pEepData->baseEepHeader.txMask & (1 << i)) { - if (IS_CHAN_2GHZ(chan)) { + if (IEEE80211_IS_CHAN_2GHZ(chan)) { pRawDataset = pEepData->calPierData2G[i]; } else { pRawDataset = pEepData->calPierData5G[i]; @@ -2567,7 +2505,8 @@ ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, HAL_CH */ static void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, CAL_DATA_PER_FREQ *pRawDataSet, + const struct ieee80211_channel *chan, + CAL_DATA_PER_FREQ *pRawDataSet, uint8_t * bChans, uint16_t availPiers, uint16_t tPdGainOverlap, int16_t *pMinCalPower, uint16_t * pPdGainBoundaries, uint8_t * pPDADCValues, uint16_t numXpdGains) @@ -2606,7 +2545,7 @@ ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, } /* Find pier indexes around the current channel */ - match = getLowerUpperIndex((uint8_t)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), + match = getLowerUpperIndex((uint8_t)FREQ2FBIN(centers.synth_center, IEEE80211_IS_CHAN_2GHZ(chan)), bChans, numPiers, &idxL, &idxR); if (match) { @@ -2637,7 +2576,7 @@ ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, /* Interpolate the final vpd */ for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { - vpdTableI[i][j] = (uint8_t)(interpolate((uint16_t)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), + vpdTableI[i][j] = (uint8_t)(interpolate((uint16_t)FREQ2FBIN(centers.synth_center, IEEE80211_IS_CHAN_2GHZ(chan)), bChans[idxL], bChans[idxR], vpdTableL[i][j], vpdTableR[i][j])); } } @@ -2830,12 +2769,12 @@ interpolate(uint16_t target, uint16_t srcLeft, uint16_t srcRight, } static void -ar5416Set11nRegs(struct ath_hal *ah, HAL_CHANNEL *chan) +ar5416Set11nRegs(struct ath_hal *ah, const struct ieee80211_channel *chan) { uint32_t phymode; HAL_HT_MACMODE macmode; /* MAC - 20/40 mode */ - if (!IS_CHAN_HT(chan)) + if (!IEEE80211_IS_CHAN_HT(chan)) return; /* Enable 11n HT, 20 MHz */ @@ -2843,11 +2782,11 @@ ar5416Set11nRegs(struct ath_hal *ah, HAL_CHANNEL *chan) | AR_PHY_FC_SINGLE_HT_LTF1 | AR_PHY_FC_WALSH; /* Configure baseband for dynamic 20/40 operation */ - if (IS_CHAN_HT40(chan)) { + if (IEEE80211_IS_CHAN_HT40(chan)) { phymode |= AR_PHY_FC_DYN2040_EN | AR_PHY_FC_SHORT_GI_40; /* Configure control (primary) channel at +-10MHz */ - if ((chan->channelFlags & CHANNEL_HT40PLUS)) + if (IEEE80211_IS_CHAN_HT40U(chan)) phymode |= AR_PHY_FC_DYN2040_PRI_CH; #if 0 /* Configure 20/25 spacing */ @@ -2873,23 +2812,25 @@ ar5416Set11nRegs(struct ath_hal *ah, HAL_CHANNEL *chan) void ar5416GetChannelCenters(struct ath_hal *ah, - HAL_CHANNEL_INTERNAL *chan, CHAN_CENTERS *centers) + const struct ieee80211_channel *chan, CHAN_CENTERS *centers) { - centers->ctl_center = chan->channel; - centers->synth_center = chan->channel; + uint16_t freq = ath_hal_gethwchannel(ah, chan); + + centers->ctl_center = freq; + centers->synth_center = freq; /* * In 20/40 phy mode, the center frequency is * "between" the control and extension channels. */ - if (chan->channelFlags & CHANNEL_HT40PLUS) { + if (IEEE80211_IS_CHAN_HT40U(chan)) { centers->synth_center += HT40_CHANNEL_CENTER_SHIFT; centers->ext_center = centers->synth_center + HT40_CHANNEL_CENTER_SHIFT; - } else if (chan->channelFlags & CHANNEL_HT40MINUS) { + } else if (IEEE80211_IS_CHAN_HT40D(chan)) { centers->synth_center -= HT40_CHANNEL_CENTER_SHIFT; centers->ext_center = centers->synth_center - HT40_CHANNEL_CENTER_SHIFT; } else { - centers->ext_center = chan->channel; + centers->ext_center = freq; } } diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c index a0e2f14..e82474b 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting + * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2008 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any @@ -14,7 +14,7 @@ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * - * $Id: ar5416_xmit.c,v 1.9 2008/11/27 22:30:08 sam Exp $ + * $FreeBSD$ */ #include "opt_ah.h" diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index e12cb8d..686123b 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -68,6 +68,7 @@ __FBSDID("$FreeBSD$"); #include <net/if_llc.h> #include <net80211/ieee80211_var.h> +#include <net80211/ieee80211_regdomain.h> #ifdef ATH_SUPPORT_TDMA #include <net80211/ieee80211_tdma.h> #endif @@ -116,9 +117,6 @@ CTASSERT(ATH_BCBUF <= 8); ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) -#define CTRY_XR9 5001 /* Ubiquiti XR9 */ -#define CTRY_GZ901 5002 /* ZComax GZ-901 */ - static struct ieee80211vap *ath_vap_create(struct ieee80211com *, const char name[IFNAMSIZ], int unit, int opmode, int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], @@ -661,7 +659,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc) sc->sc_hastsfadd = ath_hal_hastsfadjust(ah); if (ath_hal_hasfastframes(ah)) ic->ic_caps |= IEEE80211_C_FF; - wmodes = ath_hal_getwirelessmodes(ah, ic->ic_regdomain.country); + wmodes = ath_hal_getwirelessmodes(ah); if (wmodes & (HAL_MODE_108G|HAL_MODE_TURBO)) ic->ic_caps |= IEEE80211_C_TURBOP; #ifdef ATH_SUPPORT_TDMA @@ -1203,7 +1201,7 @@ ath_resume(struct ath_softc *sc) * Must reset the chip before we reload the * keycache as we were powered down on suspend. */ - ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_FALSE, &status); + ath_hal_reset(ah, sc->sc_opmode, sc->sc_curchan, AH_FALSE, &status); ath_reset_keycache(sc); if (sc->sc_resume_up) { if (ic->ic_opmode == IEEE80211_M_STA) { @@ -1423,56 +1421,6 @@ ath_bmiss_proc(void *arg, int pending) } /* - * Convert net80211 channel to a HAL channel with the flags - * constrained to reflect the current operating mode and - * the frequency possibly mapped for GSM channels. - */ -static void -ath_mapchan(const struct ieee80211com *ic, - HAL_CHANNEL *hc, const struct ieee80211_channel *chan) -{ -#define N(a) (sizeof(a) / sizeof(a[0])) - static const u_int modeflags[IEEE80211_MODE_MAX] = { - 0, /* IEEE80211_MODE_AUTO */ - CHANNEL_A, /* IEEE80211_MODE_11A */ - CHANNEL_B, /* IEEE80211_MODE_11B */ - CHANNEL_PUREG, /* IEEE80211_MODE_11G */ - 0, /* IEEE80211_MODE_FH */ - CHANNEL_108A, /* IEEE80211_MODE_TURBO_A */ - CHANNEL_108G, /* IEEE80211_MODE_TURBO_G */ - CHANNEL_ST, /* IEEE80211_MODE_STURBO_A */ - CHANNEL_A, /* IEEE80211_MODE_11NA */ - CHANNEL_PUREG, /* IEEE80211_MODE_11NG */ - }; - enum ieee80211_phymode mode = ieee80211_chan2mode(chan); - - KASSERT(mode < N(modeflags), ("unexpected phy mode %u", mode)); - KASSERT(modeflags[mode] != 0, ("mode %u undefined", mode)); - hc->channelFlags = modeflags[mode]; - if (IEEE80211_IS_CHAN_HALF(chan)) - hc->channelFlags |= CHANNEL_HALF; - if (IEEE80211_IS_CHAN_QUARTER(chan)) - hc->channelFlags |= CHANNEL_QUARTER; - if (IEEE80211_IS_CHAN_HT20(chan)) - hc->channelFlags |= CHANNEL_HT20; - if (IEEE80211_IS_CHAN_HT40D(chan)) - hc->channelFlags |= CHANNEL_HT40MINUS; - if (IEEE80211_IS_CHAN_HT40U(chan)) - hc->channelFlags |= CHANNEL_HT40PLUS; - - if (IEEE80211_IS_CHAN_GSM(chan)) { - if (ic->ic_regdomain.country == CTRY_XR9) - hc->channel = 1520 + chan->ic_freq; - else if (ic->ic_regdomain.country == CTRY_GZ901) - hc->channel = 1544 + chan->ic_freq; - else - hc->channel = 3344 - chan->ic_freq; - } else - hc->channel = chan->ic_freq; -#undef N -} - -/* * Handle TKIP MIC setup to deal hardware that doesn't do MIC * calcs together with WME. If necessary disable the crypto * hardware and mark the 802.11 state so keys will be setup @@ -1521,9 +1469,8 @@ ath_init(void *arg) * be followed by initialization of the appropriate bits * and then setup of the interrupt mask. */ - ath_mapchan(ic, &sc->sc_curchan, ic->ic_curchan); ath_settkipmic(sc); - if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_FALSE, &status)) { + if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) { if_printf(ifp, "unable to reset hardware; hal status %u\n", status); ATH_UNLOCK(sc); @@ -1655,18 +1602,12 @@ ath_reset(struct ifnet *ifp) struct ath_hal *ah = sc->sc_ah; HAL_STATUS status; - /* - * Convert to a HAL channel description with the flags - * constrained to reflect the current operating mode. - */ - ath_mapchan(ic, &sc->sc_curchan, ic->ic_curchan); - ath_hal_intrset(ah, 0); /* disable interrupts */ ath_draintxq(sc); /* stop xmit side */ ath_stoprecv(sc); /* stop recv side */ ath_settkipmic(sc); /* configure TKIP MIC handling */ /* NB: indicate channel change so we do a full reset */ - if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_TRUE, &status)) + if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status)) if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", __func__, status); sc->sc_diversity = ath_hal_getdiversity(ah); @@ -3874,13 +3815,11 @@ ath_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise) struct ieee80211com *ic = ni->ni_ic; struct ath_softc *sc = ic->ic_ifp->if_softc; struct ath_hal *ah = sc->sc_ah; - HAL_CHANNEL hchan; *rssi = ic->ic_node_getrssi(ni); - if (ni->ni_chan != IEEE80211_CHAN_ANYC) { - ath_mapchan(ic, &hchan, ni->ni_chan); - *noise = ath_hal_getchannoise(ah, &hchan); - } else + if (ni->ni_chan != IEEE80211_CHAN_ANYC) + *noise = ath_hal_getchannoise(ah, ni->ni_chan); + else *noise = -95; /* nominally correct */ } @@ -4070,9 +4009,11 @@ ath_rx_tap(struct ifnet *ifp, struct mbuf *m, #ifdef AH_SUPPORT_AR5416 sc->sc_rx_th.wr_chan_flags &= ~CHAN_HT; if (sc->sc_rx_th.wr_rate & IEEE80211_RATE_MCS) { /* HT rate */ + struct ieee80211com *ic = ifp->if_l2com; + if ((rs->rs_flags & HAL_RX_2040) == 0) sc->sc_rx_th.wr_chan_flags |= CHAN_HT20; - else if (sc->sc_curchan.channelFlags & CHANNEL_HT40PLUS) + else if (IEEE80211_IS_CHAN_HT40U(ic->ic_curchan)) sc->sc_rx_th.wr_chan_flags |= CHAN_HT40U; else sc->sc_rx_th.wr_chan_flags |= CHAN_HT40D; @@ -4135,7 +4076,7 @@ ath_rx_proc(void *arg, int npending) DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending); ngood = 0; - nf = ath_hal_getchannoise(ah, &sc->sc_curchan); + nf = ath_hal_getchannoise(ah, sc->sc_curchan); sc->sc_stats.ast_rx_noise = nf; tsf = ath_hal_gettsf64(ah); do { @@ -4401,7 +4342,7 @@ rx_next: } while (ath_rxbuf_init(sc, bf) == 0); /* rx signal state monitoring */ - ath_hal_rxmonitor(ah, &sc->sc_halstats, &sc->sc_curchan); + ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan); if (ngood) sc->sc_lastrx = tsf; @@ -5696,6 +5637,7 @@ ath_chan_change(struct ath_softc *sc, struct ieee80211_channel *chan) mode = ieee80211_chan2mode(chan); if (mode != sc->sc_curmode) ath_setcurmode(sc, mode); + sc->sc_curchan = chan; sc->sc_rx_th.wr_chan_flags = htole32(chan->ic_flags); sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags; @@ -5719,27 +5661,12 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) struct ifnet *ifp = sc->sc_ifp; struct ieee80211com *ic = ifp->if_l2com; struct ath_hal *ah = sc->sc_ah; - HAL_CHANNEL hchan; - - /* - * Convert to a HAL channel description with - * the flags constrained to reflect the current - * operating mode. - */ - ath_mapchan(ic, &hchan, chan); - DPRINTF(sc, ATH_DEBUG_RESET, - "%s: %u (%u MHz, hal flags 0x%x) -> %u (%u MHz, hal flags 0x%x)\n", - __func__, - ath_hal_mhz2ieee(ah, sc->sc_curchan.channel, - sc->sc_curchan.channelFlags), - sc->sc_curchan.channel, sc->sc_curchan.channelFlags, - ath_hal_mhz2ieee(ah, hchan.channel, hchan.channelFlags), - hchan.channel, hchan.channelFlags); - if (hchan.channel != sc->sc_curchan.channel || - hchan.channelFlags != sc->sc_curchan.channelFlags) { + DPRINTF(sc, ATH_DEBUG_RESET, "%s: %u (%u MHz, flags 0x%x)\n", + __func__, ieee80211_chan2ieee(ic, chan), + chan->ic_freq, chan->ic_flags); + if (chan != sc->sc_curchan) { HAL_STATUS status; - /* * To switch channels clear any pending DMA operations; * wait long enough for the RX fifo to drain, reset the @@ -5749,15 +5676,13 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) ath_hal_intrset(ah, 0); /* disable interrupts */ ath_draintxq(sc); /* clear pending tx frames */ ath_stoprecv(sc); /* turn off frame recv */ - if (!ath_hal_reset(ah, sc->sc_opmode, &hchan, AH_TRUE, &status)) { + if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) { if_printf(ifp, "%s: unable to reset " - "channel %u (%u Mhz, flags 0x%x hal flags 0x%x), " - "hal status %u\n", __func__, - ieee80211_chan2ieee(ic, chan), chan->ic_freq, - chan->ic_flags, hchan.channelFlags, status); + "channel %u (%u Mhz, flags 0x%x), hal status %u\n", + __func__, ieee80211_chan2ieee(ic, chan), + chan->ic_freq, chan->ic_flags, status); return EIO; } - sc->sc_curchan = hchan; sc->sc_diversity = ath_hal_getdiversity(ah); /* @@ -5817,12 +5742,12 @@ ath_calibrate(void *arg) * reset the data collection state so we start fresh. */ if (sc->sc_resetcal) { - (void) ath_hal_calreset(ah, &sc->sc_curchan); + (void) ath_hal_calreset(ah, sc->sc_curchan); sc->sc_lastcalreset = ticks; sc->sc_resetcal = 0; } } - if (ath_hal_calibrateN(ah, &sc->sc_curchan, longCal, &isCalDone)) { + if (ath_hal_calibrateN(ah, sc->sc_curchan, longCal, &isCalDone)) { if (longCal) { /* * Calibrate noise floor data again in case of change. @@ -5832,7 +5757,7 @@ ath_calibrate(void *arg) } else { DPRINTF(sc, ATH_DEBUG_ANY, "%s: calibration of channel %u failed\n", - __func__, sc->sc_curchan.channel); + __func__, sc->sc_curchan->ic_freq); sc->sc_stats.ast_per_calfail++; } if (!isCalDone) { @@ -6191,141 +6116,24 @@ ath_newassoc(struct ieee80211_node *ni, int isnew) } static int -getchannels(struct ath_softc *sc, int *nchans, struct ieee80211_channel chans[], - int cc, int ecm, int outdoor) -{ - struct ath_hal *ah = sc->sc_ah; - HAL_CHANNEL *halchans; - int i, nhalchans, error; - - DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: cc %u outdoor %u ecm %u\n", - __func__, cc, outdoor, ecm); - - halchans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), - M_TEMP, M_NOWAIT | M_ZERO); - if (halchans == NULL) { - device_printf(sc->sc_dev, - "%s: unable to allocate channel table\n", __func__); - return ENOMEM; - } - error = 0; - if (!ath_hal_init_channels(ah, halchans, IEEE80211_CHAN_MAX, &nhalchans, - NULL, 0, NULL, cc, HAL_MODE_ALL, outdoor, ecm)) { - u_int32_t rd; - (void) ath_hal_getregdomain(ah, &rd); - device_printf(sc->sc_dev, "ath_hal_init_channels failed, " - "rd %d cc %u outdoor %u ecm %u\n", rd, cc, outdoor, ecm); - error = EINVAL; - goto done; - } - if (nchans == NULL) /* no table requested */ - goto done; - - /* - * Convert HAL channels to ieee80211 ones. - */ - for (i = 0; i < nhalchans; i++) { - HAL_CHANNEL *c = &halchans[i]; - struct ieee80211_channel *ichan = &chans[i]; - - ichan->ic_ieee = ath_hal_mhz2ieee(ah, c->channel, - c->channelFlags); - if (bootverbose) - device_printf(sc->sc_dev, "hal channel %u/%x -> %u " - "maxpow %d minpow %d maxreg %d\n", - c->channel, c->channelFlags, ichan->ic_ieee, - c->maxTxPower, c->minTxPower, c->maxRegTxPower); - ichan->ic_freq = c->channel; - - if ((c->channelFlags & CHANNEL_PUREG) == CHANNEL_PUREG) { - /* - * Except for AR5211, HAL's PUREG means mixed - * DSSS and OFDM. - */ - ichan->ic_flags = c->channelFlags &~ CHANNEL_PUREG; - ichan->ic_flags |= IEEE80211_CHAN_G; - } else { - ichan->ic_flags = c->channelFlags; - } - - if (ath_hal_isgsmsku(ah)) { - /* - * Remap to true frequencies: Ubiquiti XR9 cards use a - * frequency mapping different from their SR9 cards. - * We define special country codes to deal with this. - */ - if (cc == CTRY_XR9) - ichan->ic_freq = ichan->ic_freq - 1520; - else if (cc == CTRY_GZ901) - ichan->ic_freq = ichan->ic_freq - 1544; - else - ichan->ic_freq = 3344 - ichan->ic_freq; - ichan->ic_flags |= IEEE80211_CHAN_GSM; - ichan->ic_ieee = ieee80211_mhz2ieee(ichan->ic_freq, - ichan->ic_flags); - } - ichan->ic_maxregpower = c->maxRegTxPower; /* dBm */ - /* XXX: old hal's don't provide maxTxPower for some parts */ - ichan->ic_maxpower = (c->maxTxPower != 0) ? - c->maxTxPower : 2*c->maxRegTxPower; /* 1/2 dBm */ - ichan->ic_minpower = c->minTxPower; /* 1/2 dBm */ - } - *nchans = nhalchans; -done: - free(halchans, M_TEMP); - return error; -} - -/* XXX hard to include ieee80211_regdomain.h right now */ -#define SKU_DEBUG 0x1ff - -static void -ath_maprd(const struct ieee80211_regdomain *rd, - u_int32_t *ath_rd, u_int32_t *ath_cc) -{ - /* map SKU's to Atheros sku's */ - switch (rd->regdomain) { - case SKU_DEBUG: - if (rd->country == 0) { - *ath_rd = 0; - *ath_cc = CTRY_DEBUG; - return; - } - break; - } - *ath_rd = rd->regdomain; - *ath_cc = rd->country; -} - -static int -ath_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, +ath_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *reg, int nchans, struct ieee80211_channel chans[]) { struct ath_softc *sc = ic->ic_ifp->if_softc; struct ath_hal *ah = sc->sc_ah; - u_int32_t ord, regdomain, cc; - int error; + HAL_STATUS status; - (void) ath_hal_getregdomain(ah, &ord); - ath_maprd(rd, ®domain, &cc); DPRINTF(sc, ATH_DEBUG_REGDOMAIN, - "%s: rd %u cc %u location %c ecm %u (mapped rd %u cc %u)\n", - __func__, rd->regdomain, rd->country, rd->location, rd->ecm, - regdomain, cc); - ath_hal_setregdomain(ah, regdomain); - - error = getchannels(sc, &nchans, chans, cc, - rd->ecm ? AH_TRUE : AH_FALSE, - rd->location != 'I' ? AH_TRUE : AH_FALSE); - if (error != 0) { - /* - * Restore previous state. - */ - ath_hal_setregdomain(ah, ord); - (void) getchannels(sc, NULL, NULL, ic->ic_regdomain.country, - ic->ic_regdomain.ecm ? AH_TRUE : AH_FALSE, - ic->ic_regdomain.location != 'I' ? AH_TRUE : AH_FALSE); - return error; + "%s: rd %u cc %u location %c%s\n", + __func__, reg->regdomain, reg->country, reg->location, + reg->ecm ? " ecm" : ""); + + status = ath_hal_set_channels(ah, chans, nchans, + reg->country, reg->regdomain); + if (status != HAL_OK) { + DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: failed, status %u\n", + __func__, status); + return EINVAL; /* XXX */ } return 0; } @@ -6336,43 +6144,14 @@ ath_getradiocaps(struct ieee80211com *ic, { struct ath_softc *sc = ic->ic_ifp->if_softc; struct ath_hal *ah = sc->sc_ah; - u_int32_t ord; - - (void) ath_hal_getregdomain(ah, &ord); - DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: use rd %u cc %d, ord %u\n", - __func__, 0, CTRY_DEBUG, ord); + DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: use rd %u cc %d\n", + __func__, SKU_DEBUG, CTRY_DEFAULT); - ath_hal_setregdomain(ah, 0); - /* XXX not quite right but close enough for now */ - getchannels(sc, nchans, chans, CTRY_DEBUG, AH_TRUE, AH_FALSE); + /* XXX check return */ + (void) ath_hal_getchannels(ah, chans, maxchans, nchans, + HAL_MODE_ALL, CTRY_DEFAULT, SKU_DEBUG, AH_TRUE); - /* NB: restore previous state */ - ath_hal_setregdomain(ah, ord); - (void) getchannels(sc, NULL, NULL, ic->ic_regdomain.country, - ic->ic_regdomain.ecm ? AH_TRUE : AH_FALSE, - ic->ic_regdomain.location != 'I' ? AH_TRUE : AH_FALSE); -} - -static void -ath_mapsku(u_int32_t ath_rd, u_int32_t ath_cc, struct ieee80211_regdomain *rd) -{ - rd->isocc[0] = ' '; /* XXX don't know */ - rd->isocc[1] = ' '; - - /* map Atheros sku's to SKU's */ - switch (ath_rd) { - case 0: - if (ath_cc == CTRY_DEBUG) { - rd->regdomain = SKU_DEBUG; - rd->country = 0; - return; - } - break; - } - /* XXX net80211 types too small */ - rd->regdomain = (uint16_t) ath_rd; - rd->country = (uint16_t) ath_cc; } static int @@ -6381,33 +6160,35 @@ ath_getchannels(struct ath_softc *sc) struct ifnet *ifp = sc->sc_ifp; struct ieee80211com *ic = ifp->if_l2com; struct ath_hal *ah = sc->sc_ah; - int error; + HAL_STATUS status; /* - * Convert HAL channels to ieee80211 ones. + * Collect channel set based on EEPROM contents. */ - error = getchannels(sc, &ic->ic_nchans, ic->ic_channels, - CTRY_DEFAULT, AH_TRUE, AH_FALSE); - (void) ath_hal_getregdomain(ah, &sc->sc_eerd); - ath_hal_getcountrycode(ah, &sc->sc_eecc); /* NB: cannot fail */ - if (error) { + status = ath_hal_init_channels(ah, ic->ic_channels, IEEE80211_CHAN_MAX, + &ic->ic_nchans, HAL_MODE_ALL, CTRY_DEFAULT, SKU_NONE, AH_TRUE); + if (status != HAL_OK) { if_printf(ifp, "%s: unable to collect channel list from hal, " - "error %d\n", __func__, error); - if (error == EINVAL) { - if_printf(ifp, "%s: regdomain likely %u country code %u\n", - __func__, sc->sc_eerd, sc->sc_eecc); - } - return error; + "status %d\n", __func__, status); + return EINVAL; } + (void) ath_hal_getregdomain(ah, &sc->sc_eerd); + ath_hal_getcountrycode(ah, &sc->sc_eecc); /* NB: cannot fail */ + /* XXX map Atheros sku's to net80211 SKU's */ + /* XXX net80211 types too small */ + ic->ic_regdomain.regdomain = (uint16_t) sc->sc_eerd; + ic->ic_regdomain.country = (uint16_t) sc->sc_eecc; + ic->ic_regdomain.isocc[0] = ' '; /* XXX don't know */ + ic->ic_regdomain.isocc[1] = ' '; + ic->ic_regdomain.ecm = 1; ic->ic_regdomain.location = 'I'; - ath_mapsku(sc->sc_eerd, sc->sc_eecc, &ic->ic_regdomain); DPRINTF(sc, ATH_DEBUG_REGDOMAIN, - "%s: eeprom rd %u cc %u (mapped rd %u cc %u) location %c ecm %u\n", + "%s: eeprom rd %u cc %u (mapped rd %u cc %u) location %c%s\n", __func__, sc->sc_eerd, sc->sc_eecc, ic->ic_regdomain.regdomain, ic->ic_regdomain.country, - ic->ic_regdomain.location, ic->ic_regdomain.ecm); + ic->ic_regdomain.location, ic->ic_regdomain.ecm ? " ecm" : ""); return 0; } @@ -7470,7 +7251,7 @@ ath_announce(struct ath_softc *sc) #define HAL_MODE_DUALBAND (HAL_MODE_11A|HAL_MODE_11B) struct ifnet *ifp = sc->sc_ifp; struct ath_hal *ah = sc->sc_ah; - u_int modes, cc; + u_int modes; if_printf(ifp, "mac %d.%d phy %d.%d", ah->ah_macVersion, ah->ah_macRev, @@ -7480,8 +7261,7 @@ ath_announce(struct ath_softc *sc) * to avoid falsely printing revs for inoperable parts. * Dual-band radio revs are returned in the 5Ghz rev number. */ - ath_hal_getcountrycode(ah, &cc); - modes = ath_hal_getwirelessmodes(ah, cc); + modes = ath_hal_getwirelessmodes(ah); if ((modes & HAL_MODE_DUALBAND) == HAL_MODE_DUALBAND) { if (ah->ah_analog5GhzRev && ah->ah_analog2GhzRev) printf(" 5ghz radio %d.%d 2ghz radio %d.%d", diff --git a/sys/dev/ath/if_athvar.h b/sys/dev/ath/if_athvar.h index 7b74c47..4b3325c 100644 --- a/sys/dev/ath/if_athvar.h +++ b/sys/dev/ath/if_athvar.h @@ -267,7 +267,7 @@ struct ath_softc { HAL_OPMODE sc_opmode; /* current operating mode */ u_int16_t sc_curtxpow; /* current tx power limit */ u_int16_t sc_curaid; /* current association id */ - HAL_CHANNEL sc_curchan; /* current h/w channel */ + struct ieee80211_channel *sc_curchan; /* current installed channel */ u_int8_t sc_curbssid[IEEE80211_ADDR_LEN]; u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ struct { |
