diff options
| -rw-r--r-- | sys/pci/if_rl.c | 6 | ||||
| -rw-r--r-- | sys/pci/if_rlreg.h | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sys/pci/if_rl.c b/sys/pci/if_rl.c index 19a6859..df86784 100644 --- a/sys/pci/if_rl.c +++ b/sys/pci/if_rl.c @@ -2673,8 +2673,10 @@ rl_init(xsc) * register write enable" mode to modify the ID registers. */ CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_WRITECFG); - CSR_WRITE_4(sc, RL_IDR0, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0])); - CSR_WRITE_4(sc, RL_IDR4, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4])); + CSR_WRITE_STREAM_4(sc, RL_IDR0, + *(u_int32_t *)(&sc->arpcom.ac_enaddr[0])); + CSR_WRITE_STREAM_4(sc, RL_IDR4, + *(u_int32_t *)(&sc->arpcom.ac_enaddr[4])); CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF); /* diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h index 0f43fe8..fcc4f4f 100644 --- a/sys/pci/if_rlreg.h +++ b/sys/pci/if_rlreg.h @@ -667,6 +667,8 @@ struct rl_softc { /* * register space access macros */ +#define CSR_WRITE_STREAM_4(sc, reg, val) \ + bus_space_write_stream_4(sc->rl_btag, sc->rl_bhandle, reg, val) #define CSR_WRITE_4(sc, reg, val) \ bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val) #define CSR_WRITE_2(sc, reg, val) \ |
