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-rw-r--r--sys/pccard/pcic_pci.c28
-rw-r--r--sys/pccard/pcic_pci.h7
-rw-r--r--sys/pci/pcic_p.c28
-rw-r--r--sys/pci/pcic_p.h7
4 files changed, 64 insertions, 6 deletions
diff --git a/sys/pccard/pcic_pci.c b/sys/pccard/pcic_pci.c
index 9d8c911..92704c7 100644
--- a/sys/pccard/pcic_pci.c
+++ b/sys/pccard/pcic_pci.c
@@ -316,9 +316,24 @@ pcic_pci_probe(device_t dev)
}
+static void
+ricoh_init(device_t dev)
+{
+ u_int16_t brgcntl;
+ /*
+ * Ricoh chips have a legacy bridge enable different than most
+ * Code cribbed from NEWBUS's bridge code since I can't find a
+ * datasheet for them that has register definitions.
+ */
+ brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2);
+ brgcntl |= CB_BCR_RL_3E0_EN;
+ brgcntl &= ~CB_BCR_RL_3E2_EN;
+ pci_write_config(dev, CLPD6832_BRIDGE_CONTROL, brgcntl, 4);
+}
+
/*
* General PCI based card dispatch routine. Right now
- * it only understands the CL-PD6832 and TI parts. It does
+ * it only understands the Ricoh, CL-PD6832 and TI parts. It does
* try to do generic things with other parts.
*/
static int
@@ -341,6 +356,14 @@ pcic_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, command, 4);
switch (device_id) {
+ case PCI_DEVICE_ID_RICOH_RL5C465:
+ case PCI_DEVICE_ID_RICOH_RL5C466:
+ case PCI_DEVICE_ID_RICOH_RL5C475:
+ case PCI_DEVICE_ID_RICOH_RL5C476:
+ case PCI_DEVICE_ID_RICOH_RL5C478:
+ ricoh_init(dev);
+ generic_cardbus_attach(dev);
+ break;
case PCI_DEVICE_ID_PCIC_TI1130:
case PCI_DEVICE_ID_PCIC_TI1131:
case PCI_DEVICE_ID_PCIC_TI1211:
@@ -360,9 +383,8 @@ pcic_pci_attach(device_t dev)
generic_cardbus_attach(dev);
break;
case PCI_DEVICE_ID_PCIC_CLPD6832:
- pd6832_legacy_init(dev);
- break;
case PCI_DEVICE_ID_PCIC_TI1031:
+ pd6832_legacy_init(dev);
break;
}
diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h
index da93b90..62e4ee1 100644
--- a/sys/pccard/pcic_pci.h
+++ b/sys/pccard/pcic_pci.h
@@ -52,6 +52,7 @@
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f1179ul
#define PCI_DEVICE_ID_RICOH_RL5C465 0x04651180ul
+#define PCI_DEVICE_ID_RICOH_RL5C466 0x04661180ul
#define PCI_DEVICE_ID_RICOH_RL5C475 0x04751180ul
#define PCI_DEVICE_ID_RICOH_RL5C476 0x04761180ul
#define PCI_DEVICE_ID_RICOH_RL5C478 0x04781180ul
@@ -119,8 +120,14 @@
/* sanpei */
/* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */
+#define CB_BCR_MASTER_ABORT 0x0020
#define CB_BCR_CB_RESET 0x0040
#define CB_BCR_INT_EXCA 0x0080
+#define CB_BCR_WRITE_POST_EN 0x0400
+ /* additional bits for Ricoh's cardbus products */
+#define CB_BCR_RL_3E0_EN 0x0800
+#define CB_BCR_RL_3E2_EN 0x1000
+
/* PCI Configuration Registers (common) */
#define CB_PCI_VENDOR_ID 0x00 /* vendor ID */
#define CB_PCI_DEVICE_ID 0x02 /* device ID */
diff --git a/sys/pci/pcic_p.c b/sys/pci/pcic_p.c
index 9d8c911..92704c7 100644
--- a/sys/pci/pcic_p.c
+++ b/sys/pci/pcic_p.c
@@ -316,9 +316,24 @@ pcic_pci_probe(device_t dev)
}
+static void
+ricoh_init(device_t dev)
+{
+ u_int16_t brgcntl;
+ /*
+ * Ricoh chips have a legacy bridge enable different than most
+ * Code cribbed from NEWBUS's bridge code since I can't find a
+ * datasheet for them that has register definitions.
+ */
+ brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2);
+ brgcntl |= CB_BCR_RL_3E0_EN;
+ brgcntl &= ~CB_BCR_RL_3E2_EN;
+ pci_write_config(dev, CLPD6832_BRIDGE_CONTROL, brgcntl, 4);
+}
+
/*
* General PCI based card dispatch routine. Right now
- * it only understands the CL-PD6832 and TI parts. It does
+ * it only understands the Ricoh, CL-PD6832 and TI parts. It does
* try to do generic things with other parts.
*/
static int
@@ -341,6 +356,14 @@ pcic_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, command, 4);
switch (device_id) {
+ case PCI_DEVICE_ID_RICOH_RL5C465:
+ case PCI_DEVICE_ID_RICOH_RL5C466:
+ case PCI_DEVICE_ID_RICOH_RL5C475:
+ case PCI_DEVICE_ID_RICOH_RL5C476:
+ case PCI_DEVICE_ID_RICOH_RL5C478:
+ ricoh_init(dev);
+ generic_cardbus_attach(dev);
+ break;
case PCI_DEVICE_ID_PCIC_TI1130:
case PCI_DEVICE_ID_PCIC_TI1131:
case PCI_DEVICE_ID_PCIC_TI1211:
@@ -360,9 +383,8 @@ pcic_pci_attach(device_t dev)
generic_cardbus_attach(dev);
break;
case PCI_DEVICE_ID_PCIC_CLPD6832:
- pd6832_legacy_init(dev);
- break;
case PCI_DEVICE_ID_PCIC_TI1031:
+ pd6832_legacy_init(dev);
break;
}
diff --git a/sys/pci/pcic_p.h b/sys/pci/pcic_p.h
index da93b90..62e4ee1 100644
--- a/sys/pci/pcic_p.h
+++ b/sys/pci/pcic_p.h
@@ -52,6 +52,7 @@
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a1179ul
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f1179ul
#define PCI_DEVICE_ID_RICOH_RL5C465 0x04651180ul
+#define PCI_DEVICE_ID_RICOH_RL5C466 0x04661180ul
#define PCI_DEVICE_ID_RICOH_RL5C475 0x04751180ul
#define PCI_DEVICE_ID_RICOH_RL5C476 0x04761180ul
#define PCI_DEVICE_ID_RICOH_RL5C478 0x04781180ul
@@ -119,8 +120,14 @@
/* sanpei */
/* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */
+#define CB_BCR_MASTER_ABORT 0x0020
#define CB_BCR_CB_RESET 0x0040
#define CB_BCR_INT_EXCA 0x0080
+#define CB_BCR_WRITE_POST_EN 0x0400
+ /* additional bits for Ricoh's cardbus products */
+#define CB_BCR_RL_3E0_EN 0x0800
+#define CB_BCR_RL_3E2_EN 0x1000
+
/* PCI Configuration Registers (common) */
#define CB_PCI_VENDOR_ID 0x00 /* vendor ID */
#define CB_PCI_DEVICE_ID 0x02 /* device ID */
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