diff options
| -rw-r--r-- | sys/alpha/isa/isa_dma.c | 2 | ||||
| -rw-r--r-- | sys/amd64/isa/isa.h | 3 | ||||
| -rw-r--r-- | sys/amd64/isa/isa_dma.c | 4 | ||||
| -rw-r--r-- | sys/dev/ic/i8237.h | 23 | ||||
| -rw-r--r-- | sys/i386/isa/isa.h | 3 | ||||
| -rw-r--r-- | sys/i386/isa/isa_dma.c | 4 | ||||
| -rw-r--r-- | sys/ia64/isa/isa_dma.c | 2 | ||||
| -rw-r--r-- | sys/isa/isa_dmareg.h | 56 | ||||
| -rw-r--r-- | sys/isa/isareg.h | 5 | ||||
| -rw-r--r-- | sys/pc98/cbus/cbus.h | 1 | ||||
| -rw-r--r-- | sys/pc98/cbus/cbus_dma.c | 11 | ||||
| -rw-r--r-- | sys/pc98/cbus/cbus_dmareg.h | 44 |
12 files changed, 107 insertions, 51 deletions
diff --git a/sys/alpha/isa/isa_dma.c b/sys/alpha/isa/isa_dma.c index 1df357a..85e088f 100644 --- a/sys/alpha/isa/isa_dma.c +++ b/sys/alpha/isa/isa_dma.c @@ -57,7 +57,7 @@ __FBSDID("$FreeBSD$"); #include <vm/pmap.h> #include <isa/isareg.h> #include <isa/isavar.h> -#include <dev/ic/i8237.h> +#include <isa/isa_dmareg.h> #include <machine/bus.h> static bus_dma_tag_t dma_tag[8]; diff --git a/sys/amd64/isa/isa.h b/sys/amd64/isa/isa.h index ad6b176..3c58e6c 100644 --- a/sys/amd64/isa/isa.h +++ b/sys/amd64/isa/isa.h @@ -49,15 +49,12 @@ #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ /* CPU Board */ -#define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ #define IO_PMP1 0x026 /* 82347 Power Management Peripheral */ #define IO_KBD 0x060 /* 8042 Keyboard */ #define IO_RTC 0x070 /* RTC */ #define IO_NMI IO_RTC /* NMI Control */ -#define IO_DMAPG 0x080 /* DMA Page Registers */ #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ -#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ /* Cards */ #define IO_VGA 0x3C0 /* E/VGA Ports */ diff --git a/sys/amd64/isa/isa_dma.c b/sys/amd64/isa/isa_dma.c index 8404df5..ffd3baa 100644 --- a/sys/amd64/isa/isa_dma.c +++ b/sys/amd64/isa/isa_dma.c @@ -57,9 +57,9 @@ __FBSDID("$FreeBSD$"); #include <vm/vm.h> #include <vm/vm_param.h> #include <vm/pmap.h> -#include <amd64/isa/isa.h> -#include <dev/ic/i8237.h> +#include <isa/isareg.h> #include <isa/isavar.h> +#include <isa/isa_dmareg.h> #define ISARAM_END 0x1000000 diff --git a/sys/dev/ic/i8237.h b/sys/dev/ic/i8237.h index bdda9fa..5d4b3f4 100644 --- a/sys/dev/ic/i8237.h +++ b/sys/dev/ic/i8237.h @@ -9,26 +9,3 @@ #define DMA37MD_AUTO 0x50 /* autoinitialise single pass mode */ #define DMA37MD_WRITE 0x04 /* read the device, write memory operation */ #define DMA37MD_READ 0x08 /* write the device, read memory operation */ - -#ifndef PC98 -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_STATUS (IO_DMA1 + 1*8) /* status register */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ -#define DMA1_RESET (IO_DMA1 + 1*13) /* reset */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_STATUS (IO_DMA2 + 2*8) /* status register */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ -#define DMA2_RESET (IO_DMA2 + 2*13) /* reset */ -#endif - diff --git a/sys/i386/isa/isa.h b/sys/i386/isa/isa.h index 3bce727..ac493b2 100644 --- a/sys/i386/isa/isa.h +++ b/sys/i386/isa/isa.h @@ -53,15 +53,12 @@ #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ /* CPU Board */ -#define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ #define IO_PMP1 0x026 /* 82347 Power Management Peripheral */ #define IO_KBD 0x060 /* 8042 Keyboard */ #define IO_RTC 0x070 /* RTC */ #define IO_NMI IO_RTC /* NMI Control */ -#define IO_DMAPG 0x080 /* DMA Page Registers */ #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ -#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ /* Cards */ #define IO_VGA 0x3C0 /* E/VGA Ports */ diff --git a/sys/i386/isa/isa_dma.c b/sys/i386/isa/isa_dma.c index 074b7c6..ccfb9c5 100644 --- a/sys/i386/isa/isa_dma.c +++ b/sys/i386/isa/isa_dma.c @@ -57,9 +57,9 @@ __FBSDID("$FreeBSD$"); #include <vm/vm.h> #include <vm/vm_param.h> #include <vm/pmap.h> -#include <i386/isa/isa.h> -#include <dev/ic/i8237.h> +#include <isa/isareg.h> #include <isa/isavar.h> +#include <isa/isa_dmareg.h> static int isa_dmarangecheck(caddr_t va, u_int length, int chan); diff --git a/sys/ia64/isa/isa_dma.c b/sys/ia64/isa/isa_dma.c index fb7b83c..0943d83 100644 --- a/sys/ia64/isa/isa_dma.c +++ b/sys/ia64/isa/isa_dma.c @@ -55,7 +55,7 @@ #include <vm/pmap.h> #include <isa/isareg.h> #include <isa/isavar.h> -#include <dev/ic/i8237.h> +#include <isa/isa_dmareg.h> #include <machine/bus.h> static bus_dma_tag_t dma_tag[8]; diff --git a/sys/isa/isa_dmareg.h b/sys/isa/isa_dmareg.h new file mode 100644 index 0000000..33c768f --- /dev/null +++ b/sys/isa/isa_dmareg.h @@ -0,0 +1,56 @@ +/*- + * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _ISA_ISA_DMAREG_H_ +#define _ISA_ISA_DMAREG_H_ + +#include <dev/ic/i8237.h> + +#define IO_DMA1 0x00 /* 8237A DMA Controller #1 */ +#define IO_DMA2 0xC0 /* 8237A DMA Controller #2 */ + +/* + * Register definitions for DMA controller 1 (channels 0..3): + */ +#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ +#define DMA1_STATUS (IO_DMA1 + 1*8) /* status register */ +#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ +#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ +#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ +#define DMA1_RESET (IO_DMA1 + 1*13) /* reset */ + +/* + * Register definitions for DMA controller 2 (channels 4..7): + */ +#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ +#define DMA2_STATUS (IO_DMA2 + 2*8) /* status register */ +#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ +#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ +#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ +#define DMA2_RESET (IO_DMA2 + 2*13) /* reset */ + +#endif /* _ISA_ISA_DMAREG_H_ */ diff --git a/sys/isa/isareg.h b/sys/isa/isareg.h index 8be7443..534d76a 100644 --- a/sys/isa/isareg.h +++ b/sys/isa/isareg.h @@ -53,15 +53,12 @@ #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ /* CPU Board */ -#define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ #define IO_PMP1 0x026 /* 82347 Power Management Peripheral */ #define IO_KBD 0x060 /* 8042 Keyboard */ #define IO_RTC 0x070 /* RTC */ #define IO_NMI IO_RTC /* NMI Control */ -#define IO_DMAPG 0x080 /* DMA Page Registers */ #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ -#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ /* Cards */ /* 0x100 - 0x16F Open */ @@ -140,8 +137,6 @@ #define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */ #define IO_CGASIZE 12 /* CGA controllers */ -#define IO_DMASIZE 16 /* 8237 DMA controllers */ -#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ #define IO_EISASIZE 256 /* EISA controllers */ #define IO_FDCSIZE 8 /* Nec765 floppy controllers */ #define IO_GAMSIZE 16 /* AT compatible game controllers */ diff --git a/sys/pc98/cbus/cbus.h b/sys/pc98/cbus/cbus.h index 8adcce8..ca18b24 100644 --- a/sys/pc98/cbus/cbus.h +++ b/sys/pc98/cbus/cbus.h @@ -53,7 +53,6 @@ /* PC98 IO address ... very dirty (^_^; */ #define IO_ICU1 0x000 /* 8259A Interrupt Controller #1 */ -#define IO_DMA 0x001 /* 8237A DMA Controller */ #define IO_ICU2 0x008 /* 8259A Interrupt Controller #2 */ #define IO_RTC 0x020 /* 4990A RTC */ #define IO_SYSPORT 0x031 /* 8255A System Port */ diff --git a/sys/pc98/cbus/cbus_dma.c b/sys/pc98/cbus/cbus_dma.c index f85e3c7..255f7e0 100644 --- a/sys/pc98/cbus/cbus_dma.c +++ b/sys/pc98/cbus/cbus_dma.c @@ -60,18 +60,9 @@ __FBSDID("$FreeBSD$"); #include <vm/vm.h> #include <vm/vm_param.h> #include <vm/pmap.h> -#include <dev/ic/i8237.h> #include <isa/isavar.h> #include <pc98/cbus/cbus.h> - -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ -#define DMA1_STATUS (IO_DMA + 0x10) /* status register */ -#define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ -#define DMA1_MODE (IO_DMA + 0x16) /* mode register */ -#define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ +#include <pc98/cbus/cbus_dmareg.h> static int isa_dmarangecheck(caddr_t va, u_int length, int chan); diff --git a/sys/pc98/cbus/cbus_dmareg.h b/sys/pc98/cbus/cbus_dmareg.h new file mode 100644 index 0000000..9401b91 --- /dev/null +++ b/sys/pc98/cbus/cbus_dmareg.h @@ -0,0 +1,44 @@ +/*- + * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _PC98_CBUS_CBUS_DMAREG_H_ +#define _PC98_CBUS_CBUS_DMAREG_H_ + +#include <dev/ic/i8237.h> + +#define IO_DMA 0x01 /* 8237A DMA Controller */ + +/* + * Register definitions for DMA controller 1 (channels 0..3): + */ +#define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ +#define DMA1_STATUS (IO_DMA + 0x10) /* status register */ +#define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ +#define DMA1_MODE (IO_DMA + 0x16) /* mode register */ +#define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ + +#endif /* _PC98_CBUS_CBUS_DMAREG_H_ */ |
