diff options
| -rw-r--r-- | sys/dev/mii/nsphy.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/sys/dev/mii/nsphy.c b/sys/dev/mii/nsphy.c index 88f0daf..eaaa6d1 100644 --- a/sys/dev/mii/nsphy.c +++ b/sys/dev/mii/nsphy.c @@ -160,21 +160,21 @@ nsphy_attach(device_t dev) if (strcmp(nic, "fxp") == 0 || strcmp(nic, "pcn") == 0) sc->mii_flags |= MIIF_NOISOLATE; - /* + /* * DP83840A used with HME chips don't advertise their media * capabilities themselves properly so force writing the ANAR * according to the BMSR in mii_phy_setmedia(). - */ + */ if (strcmp(nic, "hme") == 0) sc->mii_flags |= MIIF_FORCEANEG; #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) - /* + /* * In order for MII loopback to work Am79C971 and greater PCnet * chips additionally need to be placed into external loopback * mode which pcn(4) doesn't do so far. - */ + */ if (strcmp(nic, "pcn") != 0) #if 1 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, @@ -314,7 +314,7 @@ nsphy_status(struct mii_softc *sc) if (bmcr & BMCR_AUTOEN) { /* - * The PAR status bits are only valid of autonegotiation + * The PAR status bits are only valid if autonegotiation * has completed (or it's disabled). */ if ((bmsr & BMSR_ACOMP) == 0) { @@ -377,9 +377,11 @@ nsphy_reset(struct mii_softc *sc) PHY_WRITE(sc, MII_BMCR, reg); /* - * Give it a little time to settle in case we just got power. - * The DP83840A data sheet suggests that a soft reset should not - * happen within 500us of power being applied. Be conservative. + * It is best to allow a little time for the reset to settle + * in before we start polling the BMCR again. Notably, the + * DP83840A manuals state that there should be a 500us delay + * between asserting software reset and attempting MII serial + * operations. Be conservative. */ DELAY(1000); |
