diff options
| -rw-r--r-- | sys/alpha/isa/isa_dma.c | 31 | ||||
| -rw-r--r-- | sys/amd64/isa/isa_dma.c | 29 | ||||
| -rw-r--r-- | sys/dev/ic/i8237.h | 22 | ||||
| -rw-r--r-- | sys/i386/isa/isa_dma.c | 29 | ||||
| -rw-r--r-- | sys/ia64/isa/isa_dma.c | 31 | ||||
| -rw-r--r-- | sys/isa/isavar.h | 17 | ||||
| -rw-r--r-- | sys/sparc64/isa/isa_dma.c | 6 |
7 files changed, 89 insertions, 76 deletions
diff --git a/sys/alpha/isa/isa_dma.c b/sys/alpha/isa/isa_dma.c index 91ca8bb..1df357a 100644 --- a/sys/alpha/isa/isa_dma.c +++ b/sys/alpha/isa/isa_dma.c @@ -60,24 +60,6 @@ __FBSDID("$FreeBSD$"); #include <dev/ic/i8237.h> #include <machine/bus.h> -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ -#define DMA1_RESET (IO_DMA1 + 1*13) /* reset */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ -#define DMA2_RESET (IO_DMA2 + 2*13) /* reset */ - static bus_dma_tag_t dma_tag[8]; static bus_dmamap_t dma_map[8]; static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ @@ -487,6 +469,19 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + if (chan < 4) + return(inb(DMA1_STATUS) & (1 << chan)); + else + return(inb(DMA2_STATUS) & (1 << (chan & 3))); +} + +/* * Stop a DMA transfer currently in progress. */ int diff --git a/sys/amd64/isa/isa_dma.c b/sys/amd64/isa/isa_dma.c index 9bd5d01..8404df5 100644 --- a/sys/amd64/isa/isa_dma.c +++ b/sys/amd64/isa/isa_dma.c @@ -61,22 +61,6 @@ __FBSDID("$FreeBSD$"); #include <dev/ic/i8237.h> #include <isa/isavar.h> -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ - #define ISARAM_END 0x1000000 static int isa_dmarangecheck(caddr_t va, u_int length, int chan); @@ -489,6 +473,19 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + if (chan < 4) + return(inb(DMA1_STATUS) & (1 << chan)); + else + return(inb(DMA2_STATUS) & (1 << (chan & 3))); +} + +/* * Stop a DMA transfer currently in progress. */ int diff --git a/sys/dev/ic/i8237.h b/sys/dev/ic/i8237.h index 2bc8a08..bdda9fa 100644 --- a/sys/dev/ic/i8237.h +++ b/sys/dev/ic/i8237.h @@ -10,3 +10,25 @@ #define DMA37MD_WRITE 0x04 /* read the device, write memory operation */ #define DMA37MD_READ 0x08 /* write the device, read memory operation */ +#ifndef PC98 +/* +** Register definitions for DMA controller 1 (channels 0..3): +*/ +#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ +#define DMA1_STATUS (IO_DMA1 + 1*8) /* status register */ +#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ +#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ +#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ +#define DMA1_RESET (IO_DMA1 + 1*13) /* reset */ + +/* +** Register definitions for DMA controller 2 (channels 4..7): +*/ +#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ +#define DMA2_STATUS (IO_DMA2 + 2*8) /* status register */ +#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ +#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ +#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ +#define DMA2_RESET (IO_DMA2 + 2*13) /* reset */ +#endif + diff --git a/sys/i386/isa/isa_dma.c b/sys/i386/isa/isa_dma.c index 1739871..074b7c6 100644 --- a/sys/i386/isa/isa_dma.c +++ b/sys/i386/isa/isa_dma.c @@ -61,22 +61,6 @@ __FBSDID("$FreeBSD$"); #include <dev/ic/i8237.h> #include <isa/isavar.h> -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ - static int isa_dmarangecheck(caddr_t va, u_int length, int chan); static caddr_t dma_bouncebuf[8]; @@ -488,6 +472,19 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + if (chan < 4) + return(inb(DMA1_STATUS) & (1 << chan)); + else + return(inb(DMA2_STATUS) & (1 << (chan & 3))); +} + +/* * Stop a DMA transfer currently in progress. */ int diff --git a/sys/ia64/isa/isa_dma.c b/sys/ia64/isa/isa_dma.c index 08ead75..fb7b83c 100644 --- a/sys/ia64/isa/isa_dma.c +++ b/sys/ia64/isa/isa_dma.c @@ -58,24 +58,6 @@ #include <dev/ic/i8237.h> #include <machine/bus.h> -/* -** Register definitions for DMA controller 1 (channels 0..3): -*/ -#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ -#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ -#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ -#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ -#define DMA1_RESET (IO_DMA1 + 1*13) /* reset */ - -/* -** Register definitions for DMA controller 2 (channels 4..7): -*/ -#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ -#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ -#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ -#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ -#define DMA2_RESET (IO_DMA2 + 2*13) /* reset */ - static bus_dma_tag_t dma_tag[8]; static bus_dmamap_t dma_map[8]; static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ @@ -490,6 +472,19 @@ isa_dmastatus(int chan) } /* + * Reached terminal count yet ? + */ +int +isa_dmatc(int chan) +{ + + if (chan < 4) + return(inb(DMA1_STATUS) & (1 << chan)); + else + return(inb(DMA2_STATUS) & (1 << (chan & 3))); +} + +/* * Stop a DMA transfer currently in progress. */ int diff --git a/sys/isa/isavar.h b/sys/isa/isavar.h index 57fad23..ab87fa3 100644 --- a/sys/isa/isavar.h +++ b/sys/isa/isavar.h @@ -159,14 +159,15 @@ extern devclass_t isab_devclass; extern intrmask_t isa_irq_pending(void); extern void isa_probe_children(device_t dev); -extern void isa_dmacascade(int chan); -extern void isa_dmadone(int flags, caddr_t addr, int nbytes, int chan); -extern int isa_dma_init(int chan, u_int bouncebufsize, int flag); -extern void isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan); -extern int isa_dma_acquire(int chan); -extern void isa_dma_release(int chan); -extern int isa_dmastatus(int chan); -extern int isa_dmastop(int chan); +void isa_dmacascade(int chan); +void isa_dmadone(int flags, caddr_t addr, int nbytes, int chan); +int isa_dma_init(int chan, u_int bouncebufsize, int flag); +void isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan); +int isa_dma_acquire(int chan); +void isa_dma_release(int chan); +int isa_dmastatus(int chan); +int isa_dmastop(int chan); +int isa_dmatc(int chan); #define isa_dmainit(chan, size) do { \ if (isa_dma_init(chan, size, M_NOWAIT)) \ diff --git a/sys/sparc64/isa/isa_dma.c b/sys/sparc64/isa/isa_dma.c index 66d93fb..19c4644 100644 --- a/sys/sparc64/isa/isa_dma.c +++ b/sys/sparc64/isa/isa_dma.c @@ -84,6 +84,12 @@ isa_dmastatus(int chan) } int +isa_dmatc(int chan) +{ + return (0); +} + +int isa_dmastop(int chan) { return (0); |
