diff options
-rw-r--r-- | sys/amd64/amd64/apic_vector.S | 106 | ||||
-rw-r--r-- | sys/i386/i386/apic_vector.s | 106 | ||||
-rw-r--r-- | sys/i386/isa/apic_vector.s | 106 |
3 files changed, 252 insertions, 66 deletions
diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S index debc249..3c0bfab 100644 --- a/sys/amd64/amd64/apic_vector.S +++ b/sys/amd64/amd64/apic_vector.S @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $ + * $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $ */ @@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \ addl $4+4,%esp ; \ iret + +/* + * Handle TLB shootdowns. + */ .text SUPERALIGN_TEXT .globl _Xinvltlb _Xinvltlb: pushl %eax + +#ifdef COUNT_XINVLTLB_HITS + ss + movl _cpuid, %eax + ss + incl _xhits(,%eax,4) +#endif /* COUNT_XINVLTLB_HITS */ + movl %cr3, %eax /* invalidate the TLB */ movl %eax, %cr3 + movl $lapic_eoi, %eax ss /* stack segment, avoid %ds load */ movl $0, (%eax) /* End Of Interrupt to APIC */ + + popl %eax + iret + + +/* + * Handle "spurious INTerrupts". + * Notes: + * This is different than the "spurious INTerrupt" generated by an + * 8259 PIC for missing INTs. See the APIC documentation for details. + * This routine should NOT do an 'EOI' cycle. + */ + .text + SUPERALIGN_TEXT + .globl _Xspuriousint +_Xspuriousint: + pushl %eax + pushl %ds /* save current data segment */ + + movl $KDSEL, %eax + movl %ax, %ds /* use KERNEL data segment */ + +#if 1 + ASMPOSTCODE_HI(0xc0) +#endif +#ifdef COUNT_SPURIOUS_INTS + incl _sihits +#endif + + /* No EOI cycle used here */ + + popl %ds /* restore previous data segment */ popl %eax iret + #ifdef TEST_CPUSTOP + /* * Executed by a CPU when it receives an Xcpustop IPI from another CPU, * @@ -196,50 +243,42 @@ _Xcpustop: pushl %eax pushl %ds /* save current data segment */ -#ifdef DEBUG_CPUSTOP - movb $0x50, %al - outb %al, $POST_ADDR -#endif - movl $KDSEL, %eax movl %ax, %ds /* use KERNEL data segment */ +#if 1 +/** XXX still trying to make this !^#$#% thing work... */ + + movl _cpuid, %eax + incl _cshits(,%eax,4) +#else /** !^#$#% */ + ASMPOSTCODE_HI(0x10) + movl _cpuid, %eax /* id */ lock btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x51, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif - + ASMPOSTCODE_HI(0x20); 1: btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */ jnc 1b -#ifdef DEBUG_CPUSTOP - movb $0x52, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif + ASMPOSTCODE_HI(0x30) lock btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x53, %al - outb %al, $POST_ADDR -#endif + ASMPOSTCODE_HI(0x40) +#endif /** !^#$#% */ movl $lapic_eoi, %eax movl $0, (%eax) /* End Of Interrupt to APIC */ popl %ds /* restore previous data segment */ popl %eax - iret + #endif /* TEST_CPUSTOP */ @@ -327,6 +366,22 @@ _ivectors: iactive: .long 0 + +#ifdef COUNT_XINVLTLB_HITS + .globl _xhits +_xhits: + .long 0 + .long 0 + .long 0 + .long 0 +#endif /* COUNT_XINVLTLB_HITS */ + +#ifdef COUNT_SPURIOUS_INTS + .globl _sihits +_sihits: + .long 0 +#endif /* COUNT_SPURIOUS_INTS */ + #ifdef TEST_CPUSTOP .globl _stopped_cpus _stopped_cpus: @@ -335,6 +390,13 @@ _stopped_cpus: .globl _started_cpus _started_cpus: .long 0 + + .globl _cshits +_cshits: + .long 0 + .long 0 + .long 0 + .long 0 #endif /* TEST_CPUSTOP */ diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s index debc249..3c0bfab 100644 --- a/sys/i386/i386/apic_vector.s +++ b/sys/i386/i386/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $ + * $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $ */ @@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \ addl $4+4,%esp ; \ iret + +/* + * Handle TLB shootdowns. + */ .text SUPERALIGN_TEXT .globl _Xinvltlb _Xinvltlb: pushl %eax + +#ifdef COUNT_XINVLTLB_HITS + ss + movl _cpuid, %eax + ss + incl _xhits(,%eax,4) +#endif /* COUNT_XINVLTLB_HITS */ + movl %cr3, %eax /* invalidate the TLB */ movl %eax, %cr3 + movl $lapic_eoi, %eax ss /* stack segment, avoid %ds load */ movl $0, (%eax) /* End Of Interrupt to APIC */ + + popl %eax + iret + + +/* + * Handle "spurious INTerrupts". + * Notes: + * This is different than the "spurious INTerrupt" generated by an + * 8259 PIC for missing INTs. See the APIC documentation for details. + * This routine should NOT do an 'EOI' cycle. + */ + .text + SUPERALIGN_TEXT + .globl _Xspuriousint +_Xspuriousint: + pushl %eax + pushl %ds /* save current data segment */ + + movl $KDSEL, %eax + movl %ax, %ds /* use KERNEL data segment */ + +#if 1 + ASMPOSTCODE_HI(0xc0) +#endif +#ifdef COUNT_SPURIOUS_INTS + incl _sihits +#endif + + /* No EOI cycle used here */ + + popl %ds /* restore previous data segment */ popl %eax iret + #ifdef TEST_CPUSTOP + /* * Executed by a CPU when it receives an Xcpustop IPI from another CPU, * @@ -196,50 +243,42 @@ _Xcpustop: pushl %eax pushl %ds /* save current data segment */ -#ifdef DEBUG_CPUSTOP - movb $0x50, %al - outb %al, $POST_ADDR -#endif - movl $KDSEL, %eax movl %ax, %ds /* use KERNEL data segment */ +#if 1 +/** XXX still trying to make this !^#$#% thing work... */ + + movl _cpuid, %eax + incl _cshits(,%eax,4) +#else /** !^#$#% */ + ASMPOSTCODE_HI(0x10) + movl _cpuid, %eax /* id */ lock btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x51, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif - + ASMPOSTCODE_HI(0x20); 1: btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */ jnc 1b -#ifdef DEBUG_CPUSTOP - movb $0x52, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif + ASMPOSTCODE_HI(0x30) lock btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x53, %al - outb %al, $POST_ADDR -#endif + ASMPOSTCODE_HI(0x40) +#endif /** !^#$#% */ movl $lapic_eoi, %eax movl $0, (%eax) /* End Of Interrupt to APIC */ popl %ds /* restore previous data segment */ popl %eax - iret + #endif /* TEST_CPUSTOP */ @@ -327,6 +366,22 @@ _ivectors: iactive: .long 0 + +#ifdef COUNT_XINVLTLB_HITS + .globl _xhits +_xhits: + .long 0 + .long 0 + .long 0 + .long 0 +#endif /* COUNT_XINVLTLB_HITS */ + +#ifdef COUNT_SPURIOUS_INTS + .globl _sihits +_sihits: + .long 0 +#endif /* COUNT_SPURIOUS_INTS */ + #ifdef TEST_CPUSTOP .globl _stopped_cpus _stopped_cpus: @@ -335,6 +390,13 @@ _stopped_cpus: .globl _started_cpus _started_cpus: .long 0 + + .globl _cshits +_cshits: + .long 0 + .long 0 + .long 0 + .long 0 #endif /* TEST_CPUSTOP */ diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s index debc249..3c0bfab 100644 --- a/sys/i386/isa/apic_vector.s +++ b/sys/i386/isa/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $ + * $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $ */ @@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \ addl $4+4,%esp ; \ iret + +/* + * Handle TLB shootdowns. + */ .text SUPERALIGN_TEXT .globl _Xinvltlb _Xinvltlb: pushl %eax + +#ifdef COUNT_XINVLTLB_HITS + ss + movl _cpuid, %eax + ss + incl _xhits(,%eax,4) +#endif /* COUNT_XINVLTLB_HITS */ + movl %cr3, %eax /* invalidate the TLB */ movl %eax, %cr3 + movl $lapic_eoi, %eax ss /* stack segment, avoid %ds load */ movl $0, (%eax) /* End Of Interrupt to APIC */ + + popl %eax + iret + + +/* + * Handle "spurious INTerrupts". + * Notes: + * This is different than the "spurious INTerrupt" generated by an + * 8259 PIC for missing INTs. See the APIC documentation for details. + * This routine should NOT do an 'EOI' cycle. + */ + .text + SUPERALIGN_TEXT + .globl _Xspuriousint +_Xspuriousint: + pushl %eax + pushl %ds /* save current data segment */ + + movl $KDSEL, %eax + movl %ax, %ds /* use KERNEL data segment */ + +#if 1 + ASMPOSTCODE_HI(0xc0) +#endif +#ifdef COUNT_SPURIOUS_INTS + incl _sihits +#endif + + /* No EOI cycle used here */ + + popl %ds /* restore previous data segment */ popl %eax iret + #ifdef TEST_CPUSTOP + /* * Executed by a CPU when it receives an Xcpustop IPI from another CPU, * @@ -196,50 +243,42 @@ _Xcpustop: pushl %eax pushl %ds /* save current data segment */ -#ifdef DEBUG_CPUSTOP - movb $0x50, %al - outb %al, $POST_ADDR -#endif - movl $KDSEL, %eax movl %ax, %ds /* use KERNEL data segment */ +#if 1 +/** XXX still trying to make this !^#$#% thing work... */ + + movl _cpuid, %eax + incl _cshits(,%eax,4) +#else /** !^#$#% */ + ASMPOSTCODE_HI(0x10) + movl _cpuid, %eax /* id */ lock btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x51, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif - + ASMPOSTCODE_HI(0x20); 1: btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */ jnc 1b -#ifdef DEBUG_CPUSTOP - movb $0x52, %al - outb %al, $POST_ADDR - movl _cpuid, %eax /* RESTORE id */ -#endif + ASMPOSTCODE_HI(0x30) lock btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */ -#ifdef DEBUG_CPUSTOP - movb $0x53, %al - outb %al, $POST_ADDR -#endif + ASMPOSTCODE_HI(0x40) +#endif /** !^#$#% */ movl $lapic_eoi, %eax movl $0, (%eax) /* End Of Interrupt to APIC */ popl %ds /* restore previous data segment */ popl %eax - iret + #endif /* TEST_CPUSTOP */ @@ -327,6 +366,22 @@ _ivectors: iactive: .long 0 + +#ifdef COUNT_XINVLTLB_HITS + .globl _xhits +_xhits: + .long 0 + .long 0 + .long 0 + .long 0 +#endif /* COUNT_XINVLTLB_HITS */ + +#ifdef COUNT_SPURIOUS_INTS + .globl _sihits +_sihits: + .long 0 +#endif /* COUNT_SPURIOUS_INTS */ + #ifdef TEST_CPUSTOP .globl _stopped_cpus _stopped_cpus: @@ -335,6 +390,13 @@ _stopped_cpus: .globl _started_cpus _started_cpus: .long 0 + + .globl _cshits +_cshits: + .long 0 + .long 0 + .long 0 + .long 0 #endif /* TEST_CPUSTOP */ |