diff options
| -rw-r--r-- | sys/dev/pci/pci_pci.c | 56 | ||||
| -rw-r--r-- | sys/dev/pci/pcib_private.h | 72 |
2 files changed, 91 insertions, 37 deletions
diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index 9948ecb..f310491 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -43,39 +43,13 @@ #include <pci/pcivar.h> #include <pci/pcireg.h> +#include <pci/pcib_private.h> #include "pcib_if.h" #include "opt_pci.h" -/* - * Bridge-specific data. - */ -struct pcib_softc -{ - device_t dev; - u_int16_t command; /* command register */ - u_int8_t secbus; /* secondary bus number */ - u_int8_t subbus; /* subordinate bus number */ - pci_addr_t pmembase; /* base address of prefetchable memory */ - pci_addr_t pmemlimit; /* topmost address of prefetchable memory */ - pci_addr_t membase; /* base address of memory window */ - pci_addr_t memlimit; /* topmost address of memory window */ - u_int32_t iobase; /* base address of port window */ - u_int32_t iolimit; /* topmost address of port window */ - u_int16_t secstat; /* secondary bus status register */ - u_int16_t bridgectl; /* bridge control register */ - u_int8_t seclat; /* secondary bus latency timer */ -}; - static int pcib_probe(device_t dev); static int pcib_attach(device_t dev); -static int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result); -static int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value); -static struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid, - u_long start, u_long end, u_long count, u_int flags); -static int pcib_maxslots(device_t dev); -static u_int32_t pcib_read_config(device_t dev, int b, int s, int f, int reg, int width); -static void pcib_write_config(device_t dev, int b, int s, int f, int reg, u_int32_t val, int width); static int pcib_route_interrupt(device_t pcib, device_t dev, int pin); static device_method_t pcib_methods[] = { @@ -112,7 +86,7 @@ static driver_t pcib_driver = { sizeof(struct pcib_softc), }; -static devclass_t pcib_devclass; +devclass_t pcib_devclass; DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); @@ -130,11 +104,10 @@ pcib_probe(device_t dev) return(ENXIO); } -static int -pcib_attach(device_t dev) +void +pcib_attach_common(device_t dev) { struct pcib_softc *sc; - device_t child; u_int8_t iolow; sc = device_get_softc(dev); @@ -219,7 +192,16 @@ pcib_attach(device_t dev) * pick 255; the only tradeoff here is that configuration transactions * would be more widely routed than absolutely necessary. */ +} +static int +pcib_attach(device_t dev) +{ + struct pcib_softc *sc; + device_t child; + + pcib_attach_common(dev); + sc = device_get_softc(dev); if (sc->secbus != 0) { child = device_add_child(dev, "pci", -1); if (child != NULL) @@ -230,7 +212,7 @@ pcib_attach(device_t dev) return(0); } -static int +int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { struct pcib_softc *sc = device_get_softc(dev); @@ -243,7 +225,7 @@ pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) return(ENOENT); } -static int +int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) { struct pcib_softc *sc = device_get_softc(dev); @@ -284,7 +266,7 @@ pcib_is_isa_mem(u_long start) * We have to trap resource allocation requests and ensure that the bridge * is set up to, or capable of handling them. */ -static struct resource * +struct resource * pcib_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { @@ -393,7 +375,7 @@ pcib_alloc_resource(device_t dev, device_t child, int type, int *rid, /* * PCIB interface. */ -static int +int pcib_maxslots(device_t dev) { return(PCI_SLOTMAX); @@ -402,13 +384,13 @@ pcib_maxslots(device_t dev) /* * Since we are a child of a PCI bus, its parent must support the pcib interface. */ -static u_int32_t +u_int32_t pcib_read_config(device_t dev, int b, int s, int f, int reg, int width) { return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width)); } -static void +void pcib_write_config(device_t dev, int b, int s, int f, int reg, u_int32_t val, int width) { PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width); diff --git a/sys/dev/pci/pcib_private.h b/sys/dev/pci/pcib_private.h new file mode 100644 index 0000000..2d5c2e6 --- /dev/null +++ b/sys/dev/pci/pcib_private.h @@ -0,0 +1,72 @@ +/*- + * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier + * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> + * Copyright (c) 2000 BSDi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef __PCIB_PRIVATE_H__ +#define __PCIB_PRIVATE_H__ + +/* + * Export portions of generic PCI:PCI bridge support so that it can be + * used by subclasses. + */ + +/* + * Bridge-specific data. + */ +struct pcib_softc +{ + device_t dev; + u_int16_t command; /* command register */ + u_int8_t secbus; /* secondary bus number */ + u_int8_t subbus; /* subordinate bus number */ + pci_addr_t pmembase; /* base address of prefetchable memory */ + pci_addr_t pmemlimit; /* topmost address of prefetchable memory */ + pci_addr_t membase; /* base address of memory window */ + pci_addr_t memlimit; /* topmost address of memory window */ + u_int32_t iobase; /* base address of port window */ + u_int32_t iolimit; /* topmost address of port window */ + u_int16_t secstat; /* secondary bus status register */ + u_int16_t bridgectl; /* bridge control register */ + u_int8_t seclat; /* secondary bus latency timer */ +}; + +void pcib_attach_common(device_t dev); +int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result); +int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value); +struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid, + u_long start, u_long end, u_long count, u_int flags); +int pcib_maxslots(device_t dev); +u_int32_t pcib_read_config(device_t dev, int b, int s, int f, int reg, int width); +void pcib_write_config(device_t dev, int b, int s, int f, int reg, u_int32_t val, int width); + +extern devclass_t pcib_devclass; + +#endif |
