Add a new -e flag to pciconf(8)'s list mode to display PCI error details.

Currently this dumps the status of any error bits in the PCI status register
and PCI-express device status register.  It also lists any errors indicated
by version 1 of PCI-express Advanced Error Reporting (AER).

MFC after:	1 week

6 files changed, 254 insertions, 11 deletions

diff --git a/usr.sbin/pciconf/Makefile b/usr.sbin/pciconf/Makefile
index 9fbec00..32e9848 100644
--- a/usr.sbin/pciconf/Makefile
+++ b/usr.sbin/pciconf/Makefile
@@ -2,7 +2,7 @@
 # $FreeBSD$
 
 PROG=	pciconf
-SRCS=	pciconf.c cap.c
+SRCS=	pciconf.c cap.c err.c
 MAN=	pciconf.8
 
 CFLAGS+= -I${.CURDIR}/../../sys
diff --git a/usr.sbin/pciconf/cap.c b/usr.sbin/pciconf/cap.c
index 605add8..4eed9ca 100644
--- a/usr.sbin/pciconf/cap.c
+++ b/usr.sbin/pciconf/cap.c
@@ -630,3 +630,59 @@ list_ecaps(int fd, struct pci_conf *p)
 		ecap = read_config(fd, &p->pc_sel, ptr, 4);
 	}
 }
+
+/* Find offset of a specific capability.  Returns 0 on failure. */
+uint8_t
+pci_find_cap(int fd, struct pci_conf *p, uint8_t id)
+{
+	uint16_t sta;
+	uint8_t ptr, cap;
+
+	/* Are capabilities present for this device? */
+	sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2);
+	if (!(sta & PCIM_STATUS_CAPPRESENT))
+		return (0);
+
+	switch (p->pc_hdr & PCIM_HDRTYPE) {
+	case PCIM_HDRTYPE_NORMAL:
+	case PCIM_HDRTYPE_BRIDGE:
+		ptr = PCIR_CAP_PTR;
+		break;
+	case PCIM_HDRTYPE_CARDBUS:
+		ptr = PCIR_CAP_PTR_2;
+		break;
+	default:
+		return (0);
+	}
+
+	ptr = read_config(fd, &p->pc_sel, ptr, 1);
+	while (ptr != 0 && ptr != 0xff) {
+		cap = read_config(fd, &p->pc_sel, ptr + PCICAP_ID, 1);
+		if (cap == id)
+			return (ptr);
+		ptr = read_config(fd, &p->pc_sel, ptr + PCICAP_NEXTPTR, 1);
+	}
+	return (0);
+}
+
+/* Find offset of a specific extended capability.  Returns 0 on failure. */
+uint16_t
+pcie_find_cap(int fd, struct pci_conf *p, uint16_t id)
+{
+	uint32_t ecap;
+	uint16_t ptr;
+
+	ptr = PCIR_EXTCAP;
+	ecap = read_config(fd, &p->pc_sel, ptr, 4);
+	if (ecap == 0xffffffff || ecap == 0)
+		return (0);
+	for (;;) {
+		if (PCI_EXTCAP_ID(ecap) == id)
+			return (ptr);
+		ptr = PCI_EXTCAP_NEXTPTR(ecap);
+		if (ptr == 0)
+			break;
+		ecap = read_config(fd, &p->pc_sel, ptr, 4);
+	}
+	return (0);
+}
diff --git a/usr.sbin/pciconf/err.c b/usr.sbin/pciconf/err.c
new file mode 100644
index 0000000..62445b1
--- /dev/null
+++ b/usr.sbin/pciconf/err.c
@@ -0,0 +1,167 @@
+/*-
+ * Copyright (c) 2012 Advanced Computing Technologies LLC
+ * Written by: John H. Baldwin <jhb@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+    "$FreeBSD$";
+#endif /* not lint */
+
+#include <sys/param.h>
+#include <sys/pciio.h>
+
+#include <err.h>
+#include <stdio.h>
+
+#include <dev/pci/pcireg.h>
+
+#include "pciconf.h"
+
+struct bit_table {
+	uint32_t mask;
+	const char *desc;
+};
+
+/* Error indicators in the PCI status register (PCIR_STATUS). */
+static struct bit_table pci_status[] = {
+	{ PCIM_STATUS_MDPERR, "Master Data Parity Error" },
+	{ PCIM_STATUS_STABORT, "Sent Target-Abort" },
+	{ PCIM_STATUS_RTABORT, "Received Target-Abort" },
+	{ PCIM_STATUS_RMABORT, "Received Master-Abort" },
+	{ PCIM_STATUS_SERR, "Signalled System Error" },
+	{ PCIM_STATUS_PERR, "Detected Parity Error" },
+	{ 0, NULL },
+};
+
+/* Valid error indicator bits in PCIR_STATUS. */
+#define	PCI_ERRORS	(PCIM_STATUS_MDPERR | PCIM_STATUS_STABORT |	\
+			 PCIM_STATUS_RTABORT | PCIM_STATUS_RMABORT |	\
+			 PCIM_STATUS_SERR | PCIM_STATUS_PERR)
+
+/* Error indicators in the PCI-Express device status register. */
+static struct bit_table pcie_device_status[] = {
+	{ PCIM_EXP_STA_CORRECTABLE_ERROR, "Correctable Error Detected" },
+	{ PCIM_EXP_STA_NON_FATAL_ERROR, "Non-Fatal Error Detected" },	
+	{ PCIM_EXP_STA_FATAL_ERROR, "Fatal Error Detected" },	
+	{ PCIM_EXP_STA_UNSUPPORTED_REQ, "Unsupported Request Detected" },	
+	{ 0, NULL },
+};
+
+/* Valid error indicator bits in the PCI-Express device status register. */
+#define	PCIE_ERRORS	(PCIM_EXP_STA_CORRECTABLE_ERROR |		\
+			 PCIM_EXP_STA_NON_FATAL_ERROR |			\
+			 PCIM_EXP_STA_FATAL_ERROR |			\
+			 PCIM_EXP_STA_UNSUPPORTED_REQ)
+
+/* AER Uncorrected errors. */
+static struct bit_table aer_uc[] = {
+	{ PCIM_AER_UC_TRAINING_ERROR, "Link Training Error" },
+	{ PCIM_AER_UC_DL_PROTOCOL_ERROR, "Data Link Protocol Error" },
+	{ PCIM_AER_UC_SURPRISE_LINK_DOWN, "Surprise Link Down Error" },
+	{ PCIM_AER_UC_POISONED_TLP, "Poisoned TLP" },
+	{ PCIM_AER_UC_FC_PROTOCOL_ERROR, "Flow Control Protocol Error" },
+	{ PCIM_AER_UC_COMPLETION_TIMEOUT, "Completion Timeout" },
+	{ PCIM_AER_UC_COMPLETER_ABORT, "Completer Abort" },
+	{ PCIM_AER_UC_UNEXPECTED_COMPLETION, "Unexpected Completion" },
+	{ PCIM_AER_UC_RECEIVER_OVERFLOW, "Receiver Overflow Error" },
+	{ PCIM_AER_UC_MALFORMED_TLP, "Malformed TLP" },
+	{ PCIM_AER_UC_ECRC_ERROR, "ECRC Error" },
+	{ PCIM_AER_UC_UNSUPPORTED_REQUEST, "Unsupported Request" },
+	{ PCIM_AER_UC_ACS_VIOLATION, "ACS Violation" },
+	{ 0, NULL },
+};
+
+/* AER Corrected errors. */
+static struct bit_table aer_cor[] = {
+	{ PCIM_AER_COR_RECEIVER_ERROR, "Receiver Error" },
+	{ PCIM_AER_COR_BAD_TLP, "Bad TLP" },
+	{ PCIM_AER_COR_BAD_DLLP, "Bad DLLP" },
+	{ PCIM_AER_COR_REPLAY_ROLLOVER, "REPLAY_NUM Rollover" },
+	{ PCIM_AER_COR_REPLAY_TIMEOUT, "Replay Timer Timeout" },
+	{ PCIM_AER_COR_ADVISORY_NF_ERROR, "Advisory Non-Fatal Error" },
+	{ 0, NULL },
+};
+
+static void
+print_bits(const char *header, struct bit_table *table, uint32_t mask)
+{
+	int first;
+
+	first = 1;
+	for (; table->desc != NULL; table++)
+		if (mask & table->mask) {
+			if (first) {
+				printf("%14s = ", header);
+				first = 0;
+			} else
+				printf("                 ");
+			printf("%s\n", table->desc);
+			mask &= ~table->mask;
+		}
+	if (mask != 0) {
+		if (first)
+			printf("%14s = ", header);
+		else
+			printf("                 ");
+		printf("Unknown: 0x%08x\n", mask);
+	}
+}
+
+void
+list_errors(int fd, struct pci_conf *p)
+{
+	uint32_t mask, severity;
+	uint16_t sta, aer;
+	uint8_t pcie;
+
+	/* First check for standard PCI errors. */
+	sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2);
+	print_bits("PCI errors", pci_status, sta & PCI_ERRORS);
+
+	/* See if this is a PCI-express device. */
+	pcie = pci_find_cap(fd, p, PCIY_EXPRESS);
+	if (pcie == 0)
+		return;
+
+	/* Check for PCI-e errors. */
+	sta = read_config(fd, &p->pc_sel, pcie + PCIR_EXPRESS_DEVICE_STA, 2);
+	print_bits("PCI-e errors", pcie_device_status, sta & PCIE_ERRORS);
+
+	/* See if this device supports AER. */
+	aer = pcie_find_cap(fd, p, PCIZ_AER);
+	if (aer == 0)
+		return;
+
+	/* Check for uncorrected errors. */
+	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_STATUS, 4);
+        severity = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_SEVERITY, 4);
+	print_bits("Fatal", aer_uc, mask & severity);
+	print_bits("Non-fatal", aer_uc, mask & ~severity);
+
+	/* Check for corrected errors. */
+	mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_COR_STATUS, 4);
+	print_bits("Corrected", aer_cor, mask);
+}
diff --git a/usr.sbin/pciconf/pciconf.8 b/usr.sbin/pciconf/pciconf.8
index 6b77291..b416abc 100644
--- a/usr.sbin/pciconf/pciconf.8
+++ b/usr.sbin/pciconf/pciconf.8
@@ -25,7 +25,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd November 7, 2007
+.Dd June 1, 2012
 .Dt PCICONF 8
 .Os
 .Sh NAME
@@ -33,7 +33,7 @@
 .Nd diagnostic utility for the PCI bus
 .Sh SYNOPSIS
 .Nm
-.Fl l Op Fl bcv
+.Fl l Op Fl bcev
 .Nm
 .Fl a Ar selector
 .Nm
@@ -167,6 +167,15 @@ capability in config space in hexadecimal.
 The format of the text after the equals sign is capability-specific.
 .Pp
 If the
+.Fl e
+option is supplied,
+.Nm
+will list any errors reported for this device in standard PCI error registers.
+Errors are checked for in the PCI status register,
+the PCI-express device status register,
+and the Advanced Error Reporting status registers.
+.Pp
+If the
 .Fl v
 option is supplied,
 .Nm
diff --git a/usr.sbin/pciconf/pciconf.c b/usr.sbin/pciconf/pciconf.c
index 919cc85..76e478b 100644
--- a/usr.sbin/pciconf/pciconf.c
+++ b/usr.sbin/pciconf/pciconf.c
@@ -68,7 +68,7 @@ struct pci_vendor_info
 TAILQ_HEAD(,pci_vendor_info)	pci_vendors;
 
 static void list_bars(int fd, struct pci_conf *p);
-static void list_devs(int verbose, int bars, int caps);
+static void list_devs(int verbose, int bars, int caps, int errors);
 static void list_verbose(struct pci_conf *p);
 static const char *guess_class(struct pci_conf *p);
 static const char *guess_subclass(struct pci_conf *p);
@@ -83,7 +83,7 @@ static void
 usage(void)
 {
 	fprintf(stderr, "%s\n%s\n%s\n%s\n",
-		"usage: pciconf -l [-bcv]",
+		"usage: pciconf -l [-bcev]",
 		"       pciconf -a selector",
 		"       pciconf -r [-b | -h] selector addr[:addr2]",
 		"       pciconf -w [-b | -h] selector addr value");
@@ -94,12 +94,14 @@ int
 main(int argc, char **argv)
 {
 	int c;
-	int listmode, readmode, writemode, attachedmode, bars, caps, verbose;
+	int listmode, readmode, writemode, attachedmode;
+	int bars, caps, errors, verbose;
 	int byte, isshort;
 
-	listmode = readmode = writemode = attachedmode = bars = caps = verbose = byte = isshort = 0;
+	listmode = readmode = writemode = attachedmode = 0;
+	bars = caps = errors = verbose = byte = isshort = 0;
 
-	while ((c = getopt(argc, argv, "abchlrwv")) != -1) {
+	while ((c = getopt(argc, argv, "abcehlrwv")) != -1) {
 		switch(c) {
 		case 'a':
 			attachedmode = 1;
@@ -114,6 +116,10 @@ main(int argc, char **argv)
 			caps = 1;
 			break;
 
+		case 'e':
+			errors = 1;
+			break;
+
 		case 'h':
 			isshort = 1;
 			break;
@@ -146,7 +152,7 @@ main(int argc, char **argv)
 		usage();
 
 	if (listmode) {
-		list_devs(verbose, bars, caps);
+		list_devs(verbose, bars, caps, errors);
 	} else if (attachedmode) {
 		chkattached(argv[optind]);
 	} else if (readmode) {
@@ -163,7 +169,7 @@ main(int argc, char **argv)
 }
 
 static void
-list_devs(int verbose, int bars, int caps)
+list_devs(int verbose, int bars, int caps, int errors)
 {
 	int fd;
 	struct pci_conf_io pc;
@@ -173,7 +179,7 @@ list_devs(int verbose, int bars, int caps)
 	if (verbose)
 		load_vendors();
 
-	fd = open(_PATH_DEVPCI, caps ? O_RDWR : O_RDONLY, 0);
+	fd = open(_PATH_DEVPCI, (caps || errors) ? O_RDWR : O_RDONLY, 0);
 	if (fd < 0)
 		err(1, "%s", _PATH_DEVPCI);
 
@@ -223,6 +229,8 @@ list_devs(int verbose, int bars, int caps)
 				list_bars(fd, p);
 			if (caps)
 				list_caps(fd, p);
+			if (errors)
+				list_errors(fd, p);
 		}
 	} while (pc.status == PCI_GETCONF_MORE_DEVS);
 
diff --git a/usr.sbin/pciconf/pciconf.h b/usr.sbin/pciconf/pciconf.h
index 2e87c63..042c4a1 100644
--- a/usr.sbin/pciconf/pciconf.h
+++ b/usr.sbin/pciconf/pciconf.h
@@ -34,6 +34,9 @@
 #define	__PCICONF_H__
 
 void	list_caps(int fd, struct pci_conf *p);
+void	list_errors(int fd, struct pci_conf *p);
+uint8_t	pci_find_cap(int fd, struct pci_conf *p, uint8_t id);
+uint16_t pcie_find_cap(int fd, struct pci_conf *p, uint16_t id);
 uint32_t read_config(int fd, struct pcisel *sel, long reg, int width);
 
 #endif