summaryrefslogtreecommitdiffstats
path: root/usr.sbin/cpucontrol
diff options
context:
space:
mode:
authorbrueffer <brueffer@FreeBSD.org>2008-12-30 20:16:33 +0000
committerbrueffer <brueffer@FreeBSD.org>2008-12-30 20:16:33 +0000
commit48216e44a59708906b99eb94e0e7e2f0b9478ff2 (patch)
tree4dab76fbaa3418a636d9222a866c35fbf2532592 /usr.sbin/cpucontrol
parent114967dedd97fa67f9ead468328d574f3fbc6cb3 (diff)
downloadFreeBSD-src-48216e44a59708906b99eb94e0e7e2f0b9478ff2.zip
FreeBSD-src-48216e44a59708906b99eb94e0e7e2f0b9478ff2.tar.gz
Mdoc and wording improvements.
Diffstat (limited to 'usr.sbin/cpucontrol')
-rw-r--r--usr.sbin/cpucontrol/cpucontrol.822
1 files changed, 13 insertions, 9 deletions
diff --git a/usr.sbin/cpucontrol/cpucontrol.8 b/usr.sbin/cpucontrol/cpucontrol.8
index cc753e0..a0bbdb3 100644
--- a/usr.sbin/cpucontrol/cpucontrol.8
+++ b/usr.sbin/cpucontrol/cpucontrol.8
@@ -55,21 +55,26 @@ device.
.Sh DESCRIPTION
The
.Nm
-utility can be used to read and write an arbitrary machine-specific
-CPU registers via
+utility can be used to read and write arbitrary machine-specific
+CPU registers via the
.Xr cpuctl 4
-controlled special device and apply the CPU firmware updates.
+special device.
+It can also be used to apply CPU firmware updates.
.Pp
The following options are available:
.Bl -tag -width indent
.It Fl d Ar datadir
-Where to look for microcode images. The option can be specified multiple times.
+Where to look for microcode images.
+The option can be specified multiple times.
.It Fl m Ar msr Ns Op = Ns Ar value
-Read/write the specified MSR. Both the MSR and the value should be given as a hex number.
+Read/write the specified MSR.
+Both the MSR and the value should be given as a hex number.
.It Fl i Ar level
-Retrieve CPUID info. Level should be given as a hex number.
+Retrieve CPUID info.
+Level should be given as a hex number.
.It Fl u
-Apply CPU firmware updates. The
+Apply CPU firmware updates.
+The
.Nm
utility will walk through the configured data directories
and will apply all firmware patches available for this CPU.
@@ -93,14 +98,13 @@ To set the CPU 0 TSC MSR register value to 0x1 issue
.Pp
.Dq Li "cpucontrol -m 0x10=0x1 /dev/cpuctl0"
.Pp
-.Pp
The command
.Pp
.Dq Li "cpucontrol -i 0x1 /dev/cpuctl1"
.Pp
will retrieve the CPUID level 0x1 from CPU 1.
.Pp
-To perform firmware updated on CPU 0 from images located at
+To perform firmware updates on CPU 0 from images located at
.Pa /usr/local/share/cpuctl/
use the following command:
.Pp
OpenPOWER on IntegriCloud