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author | jhb <jhb@FreeBSD.org> | 2008-08-22 02:14:23 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2008-08-22 02:14:23 +0000 |
commit | 2a48176eba96caaa3a31b0d353942f75bb2fbd49 (patch) | |
tree | 9c22e90efaf7573077c0a35e96706beaaa9411fa /usr.bin/cpio/test/test_gcpio_compat.c | |
parent | 6ab64e14fc373a159372cb6b7df2bf63d117b6f2 (diff) | |
download | FreeBSD-src-2a48176eba96caaa3a31b0d353942f75bb2fbd49.zip FreeBSD-src-2a48176eba96caaa3a31b0d353942f75bb2fbd49.tar.gz |
Extend the support for PCI-e memory mapped configuration space access:
- Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the
rest of the kernel. It now also accepts parameters via function
arguments rather than global variables.
- Add a notion of minimum and maximum bus numbers and reject requests for
an out of range bus.
- Add more range checks on slot/func/reg/bytes parameters to the cfg reg
read/write routines. Don't panic on any invalid parameters, just fail
the request (writes do nothing, reads return -1). This matches the
behavior of the other cfg mechanisms.
- Port the memory mapped configuration space access to amd64. On amd64
we simply use the direct map (via pmap_mapdev()) for the memory mapped
window.
- During acpi_attach() just after loading the ACPI tables, check for a
MCFG table. If it exists, call pciereg_cfgopen() on each subtable
(memory mapped window). For now we only support windows for domain 0
that start with bus 0. This removes the need for more chipset-specific
quirks in the MD code.
- Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets
since these machines should all have MCFG tables via ACPI.
- Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen()
earlier.
MFC after: 2 weeks
Diffstat (limited to 'usr.bin/cpio/test/test_gcpio_compat.c')
0 files changed, 0 insertions, 0 deletions