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authorjkim <jkim@FreeBSD.org>2011-06-22 16:40:45 +0000
committerjkim <jkim@FreeBSD.org>2011-06-22 16:40:45 +0000
commit6da60ac39ebac7fcdb953979962ecb5f7658196a (patch)
tree6b94ee5ab496f2fdf62f7cc9586df69cb8a162a4 /tools
parenta0627f2e3f8b11a06d848f46dcd73032ded3bf5f (diff)
downloadFreeBSD-src-6da60ac39ebac7fcdb953979962ecb5f7658196a.zip
FreeBSD-src-6da60ac39ebac7fcdb953979962ecb5f7658196a.tar.gz
Set negative quality to TSC timecounter when C3 state is enabled for Intel
processors unless the invariant TSC bit of CPUID is set. Intel processors may stop incrementing TSC when DPSLP# pin is asserted, according to Intel processor manuals, i. e., TSC timecounter is useless if the processor can enter deep sleep state (C3/C4). This problem was accidentally uncovered by r222869, which increased timecounter quality of P-state invariant TSC, e.g., for Core2 Duo T5870 (Family 6, Model f) and Atom N270 (Family 6, Model 1c). Reported by: Fabian Keil (freebsd-listen at fabiankeil dot de) Ian FREISLICH (ianf at clue dot co dot za) Tested by: Fabian Keil (freebsd-listen at fabiankeil dot de) - Core2 Duo T5870 (C3 state available/enabled) jkim - Xeon X5150 (C3 state unavailable)
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