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| author | rdivacky <rdivacky@FreeBSD.org> | 2010-01-01 10:31:22 +0000 |
|---|---|---|
| committer | rdivacky <rdivacky@FreeBSD.org> | 2010-01-01 10:31:22 +0000 |
| commit | a16c51cee9225a354c999dd1076d5dba2aa79807 (patch) | |
| tree | dba00119388b84f9f44e6ec5e9129f807fd79ca3 /test | |
| parent | 40a6fcdb85efd93fe0e36c9552cfb0b18b5eacd6 (diff) | |
| download | FreeBSD-src-a16c51cee9225a354c999dd1076d5dba2aa79807.zip FreeBSD-src-a16c51cee9225a354c999dd1076d5dba2aa79807.tar.gz | |
Update LLVM to 92395.
Diffstat (limited to 'test')
71 files changed, 1833 insertions, 520 deletions
diff --git a/test/Assembler/metadata.ll b/test/Assembler/metadata.ll new file mode 100644 index 0000000..a52de87 --- /dev/null +++ b/test/Assembler/metadata.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {ret void, !bar !1, !foo !0} +define void @test() { + add i32 2, 1, !bar !0 + add i32 1, 2, !foo !1 + + call void @llvm.dbg.func.start(metadata !"foo") + + extractvalue {{i32, i32}, i32} undef, 0, 1, !foo !0 + + ret void, !foo !0, !bar !1 +} + +!0 = metadata !{i32 662302, i32 26, metadata !1, null} +!1 = metadata !{i32 4, metadata !"foo"} + +declare void @llvm.dbg.func.start(metadata) nounwind readnone + + +!foo = !{ !0 } +!bar = !{ !1 } + +; !foo = !{ !0, !"foo" }
\ No newline at end of file diff --git a/test/CodeGen/ARM/fpowi.ll b/test/CodeGen/ARM/fpowi.ll index 174106b..7f9d62a 100644 --- a/test/CodeGen/ARM/fpowi.ll +++ b/test/CodeGen/ARM/fpowi.ll @@ -7,9 +7,8 @@ target triple = "arm-linux-gnueabi" define double @_ZSt3powdi(double %__x, i32 %__i) { entry: - %tmp3 = call double @llvm.powi.f64( double 0.000000e+00, i32 0 ) ; <double> [#uses=1] - store double %tmp3, double* null, align 8 - unreachable + %tmp3 = call double @llvm.powi.f64( double %__x, i32 %__i ) + ret double %tmp3 } declare double @llvm.powi.f64(double, i32) diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll index 5ebf2fb..f062772 100644 --- a/test/CodeGen/ARM/inlineasm3.ll +++ b/test/CodeGen/ARM/inlineasm3.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; Radar 7449043 %struct.int32x4_t = type { <4 x i32> } define arm_apcscc void @t() nounwind { @@ -11,3 +12,14 @@ entry: call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind ret void } + +; Radar 7457110 +%struct.int32x2_t = type { <4 x i32> } + +define arm_apcscc void @t2() nounwind { +entry: +; CHECK: vmov d30, d0 +; CHECK: vmov.32 r0, d30[0] + %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind + ret void +} diff --git a/test/CodeGen/CellSPU/and_ops.ll b/test/CodeGen/CellSPU/and_ops.ll index 716de2e..139e97b 100644 --- a/test/CodeGen/CellSPU/and_ops.ll +++ b/test/CodeGen/CellSPU/and_ops.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep and %t1.s | count 230 +; RUN: grep and %t1.s | count 234 ; RUN: grep andc %t1.s | count 85 -; RUN: grep andi %t1.s | count 39 -; RUN: grep andhi %t1.s | count 28 -; RUN: grep andbi %t1.s | count 2 +; RUN: grep andi %t1.s | count 37 +; RUN: grep andhi %t1.s | count 30 +; RUN: grep andbi %t1.s | count 4 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" diff --git a/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll b/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll new file mode 100644 index 0000000..b92477b --- /dev/null +++ b/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s +; PR5703 +target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8" +target triple = "msp430-unknown-linux-gnu" + +define msp430_intrcc void @foo() nounwind { +entry: + %fa = call i16* @llvm.frameaddress(i32 0) + store i16 0, i16* %fa + ret void +} + +declare i16* @llvm.frameaddress(i32) diff --git a/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll b/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll new file mode 100644 index 0000000..a9df1a3 --- /dev/null +++ b/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s +; PR 5570 +; ModuleID = 'test.c' +target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16" +target triple = "msp430-unknown-unknown" + +@buf = common global [10 x i8] zeroinitializer, align 1 ; <[10 x i8]*> [#uses=2] + +define i16 @main() noreturn nounwind { +entry: + %0 = tail call i8* asm "", "=r,0"(i8* getelementptr inbounds ([10 x i8]* @buf, i16 0, i16 0)) nounwind ; <i8*> [#uses=1] + %sub.ptr = getelementptr inbounds i8* %0, i16 1 ; <i8*> [#uses=1] + %sub.ptr.lhs.cast = ptrtoint i8* %sub.ptr to i16 ; <i16> [#uses=1] + %sub.ptr.sub = sub i16 %sub.ptr.lhs.cast, ptrtoint ([10 x i8]* @buf to i16) ; <i16> [#uses=1] + %cmp = icmp eq i16 %sub.ptr.sub, 1 ; <i1> [#uses=1] + br i1 %cmp, label %bar.exit, label %if.then.i + +if.then.i: ; preds = %entry + tail call void @abort() nounwind + br label %bar.exit + +bar.exit: ; preds = %entry, %if.then.i + tail call void @exit(i16 0) nounwind + unreachable +} + +declare void @exit(i16) noreturn + +declare void @abort() diff --git a/test/CodeGen/PIC16/C16-11.ll b/test/CodeGen/PIC16/C16-11.ll new file mode 100644 index 0000000..e70092b --- /dev/null +++ b/test/CodeGen/PIC16/C16-11.ll @@ -0,0 +1,37 @@ +;RUN: llc < %s -march=pic16 + +@c612.auto.a.b = internal global i1 false ; <i1*> [#uses=2] +@c612.auto.A.b = internal global i1 false ; <i1*> [#uses=2] + +define void @c612() nounwind { +entry: + %tmp3.b = load i1* @c612.auto.a.b ; <i1> [#uses=1] + %tmp3 = zext i1 %tmp3.b to i16 ; <i16> [#uses=1] + %tmp4.b = load i1* @c612.auto.A.b ; <i1> [#uses=1] + %tmp4 = select i1 %tmp4.b, i16 2, i16 0 ; <i16> [#uses=1] + %cmp5 = icmp ne i16 %tmp3, %tmp4 ; <i1> [#uses=1] + %conv7 = zext i1 %cmp5 to i8 ; <i8> [#uses=1] + tail call void @expectWrap(i8 %conv7, i8 2) + ret void +} + +define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind { +entry: + %tobool = icmp eq i8 %boolresult, 0 ; <i1> [#uses=1] + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void @exit(i16 1) + unreachable + +if.end: ; preds = %entry + ret void +} + +define i16 @main() nounwind { +entry: + tail call void @c612() + ret i16 0 +} + +declare void @exit(i16) noreturn nounwind diff --git a/test/CodeGen/PIC16/C16-15.ll b/test/CodeGen/PIC16/C16-15.ll new file mode 100644 index 0000000..2e1dc0c --- /dev/null +++ b/test/CodeGen/PIC16/C16-15.ll @@ -0,0 +1,44 @@ +; RUN: llc < %s -march=pic16 | grep "extern @.lib.unordered.f32" | count 3 + +@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=2] +@aa = common global i16 0, align 1 ; <i16*> [#uses=0] +@c6214.auto.d = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] +@c6214.auto.l = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] + +define float @dvalue(float %f) nounwind { +entry: + ret float %f +} + +define void @_assert(i16 %line, i16 %result) nounwind { +entry: + %add = add i16 %line, %result ; <i16> [#uses=1] + %conv = trunc i16 %add to i8 ; <i8> [#uses=1] + %tmp2 = load i8** @pc ; <i8*> [#uses=1] + store i8 %conv, i8* %tmp2 + ret void +} + +define i16 @main() nounwind { +entry: + %retval = alloca i16, align 1 ; <i16*> [#uses=2] + store i16 0, i16* %retval + call void @c6214() + %0 = load i16* %retval ; <i16> [#uses=1] + ret i16 %0 +} + +define internal void @c6214() nounwind { +entry: + %call = call float @dvalue(float 0x3FF3C0CA40000000) ; <float> [#uses=3] + store float %call, float* @c6214.auto.d + store float %call, float* @c6214.auto.l + %cmp = fcmp ord float %call, 0.000000e+00 ; <i1> [#uses=1] + %conv = zext i1 %cmp to i16 ; <i16> [#uses=1] + call void @_assert(i16 10, i16 %conv) + %tmp3 = load i8** @pc ; <i8*> [#uses=2] + %tmp4 = load i8* %tmp3 ; <i8> [#uses=1] + %sub = add i8 %tmp4, -10 ; <i8> [#uses=1] + store i8 %sub, i8* %tmp3 + ret void +} diff --git a/test/CodeGen/PIC16/C16-49.ll b/test/CodeGen/PIC16/C16-49.ll new file mode 100644 index 0000000..e59800b --- /dev/null +++ b/test/CodeGen/PIC16/C16-49.ll @@ -0,0 +1,15 @@ +;RUN: llvm-as < %s | llc -march=pic16 + +@aa = global i16 55, align 1 ; <i16*> [#uses=1] +@bb = global i16 44, align 1 ; <i16*> [#uses=1] +@PORTD = external global i8 ; <i8*> [#uses=1] + +define void @foo() nounwind { +entry: + %tmp = volatile load i16* @aa ; <i16> [#uses=1] + %tmp1 = volatile load i16* @bb ; <i16> [#uses=1] + %sub = sub i16 %tmp, %tmp1 ; <i16> [#uses=1] + %conv = trunc i16 %sub to i8 ; <i8> [#uses=1] + store i8 %conv, i8* @PORTD + ret void +} diff --git a/test/CodeGen/PIC16/check_inc_files.ll b/test/CodeGen/PIC16/check_inc_files.ll new file mode 100644 index 0000000..436d416 --- /dev/null +++ b/test/CodeGen/PIC16/check_inc_files.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s + +;CHECK: #include p16f1xxx.inc +;CHECK: #include stdmacros.inc + +define void @foo() nounwind { +entry: + ret void +} diff --git a/test/CodeGen/PIC16/result_direction.ll b/test/CodeGen/PIC16/result_direction.ll new file mode 100644 index 0000000..8549e21 --- /dev/null +++ b/test/CodeGen/PIC16/result_direction.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s + +@a = common global i16 0, align 1 ; <i16*> [#uses=2] + +define void @foo() nounwind { +entry: + %tmp = load i16* @a ; <i16> [#uses=1] + %add = add nsw i16 %tmp, 1 ; <i16> [#uses=1] + store i16 %add, i16* @a +;CHECK: movlw 1 +;CHECK: addwf @a + 0, F + ret void +} diff --git a/test/CodeGen/PIC16/test_indf_name.ll b/test/CodeGen/PIC16/test_indf_name.ll new file mode 100644 index 0000000..d52fc11 --- /dev/null +++ b/test/CodeGen/PIC16/test_indf_name.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s + +@pi = common global i16* null, align 1 ; <i16**> [#uses=1] + +define void @foo() nounwind { +entry: + %tmp = load i16** @pi ; <i16*> [#uses=1] + store i16 1, i16* %tmp +; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}] +; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}] + ret void +} diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll index f2fdedf..c4ed166 100644 --- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll +++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s | grep {subfc r3,r5,r4} ; RUN: llc < %s | grep {subfze r4,r2} -; RUN: llc < %s -regalloc=local | grep {subfc r5,r2,r4} -; RUN: llc < %s -regalloc=local | grep {subfze r2,r3} +; RUN: llc < %s -regalloc=local | grep {subfc r5,r4,r3} +; RUN: llc < %s -regalloc=local | grep {subfze r2,r2} ; The first argument of subfc must not be the same as any other register. ; PR1357 diff --git a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll new file mode 100644 index 0000000..3401915 --- /dev/null +++ b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll @@ -0,0 +1,66 @@ +; RUN: llc -O3 -pre-regalloc-taildup < %s | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +; This test should not produce any spills, even when tail duplication creates lots of phi nodes. +; CHECK-NOT: push +; CHECK-NOT: pop +; CHECK: bx lr + +@codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5] +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define arm_apcscc i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize { +entry: + %0 = load i8* %opcodes, align 1 ; <i8> [#uses=1] + %1 = zext i8 %0 to i32 ; <i32> [#uses=1] + %2 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1] + br label %bb + +bb: ; preds = %bb.backedge, %entry + %indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2] + %gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1] + %result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6] + %opcodes_addr.0 = getelementptr i8* %opcodes, i32 %indvar ; <i8*> [#uses=4] + %gotovar.22.0 = load i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1] + indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD] + +RETURN: ; preds = %bb + ret i32 %result.0 + +INCREMENT: ; preds = %bb + %3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1] + %4 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %5 = zext i8 %4 to i32 ; <i32> [#uses=1] + %6 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1] + br label %bb.backedge + +bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT + %gotovar.22.0.in.be = phi i8** [ %20, %SWAPWORD ], [ %14, %DOUBLE ], [ %10, %DECREMENT ], [ %6, %INCREMENT ] ; <i8**> [#uses=1] + %result.0.be = phi i32 [ %17, %SWAPWORD ], [ %11, %DOUBLE ], [ %7, %DECREMENT ], [ %3, %INCREMENT ] ; <i32> [#uses=1] + %phitmp = add i32 %indvar, 1 ; <i32> [#uses=1] + br label %bb + +DECREMENT: ; preds = %bb + %7 = add i32 %result.0, -1 ; <i32> [#uses=1] + %8 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %9 = zext i8 %8 to i32 ; <i32> [#uses=1] + %10 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1] + br label %bb.backedge + +DOUBLE: ; preds = %bb + %11 = shl i32 %result.0, 1 ; <i32> [#uses=1] + %12 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %13 = zext i8 %12 to i32 ; <i32> [#uses=1] + %14 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1] + br label %bb.backedge + +SWAPWORD: ; preds = %bb + %15 = shl i32 %result.0, 16 ; <i32> [#uses=1] + %16 = ashr i32 %result.0, 16 ; <i32> [#uses=1] + %17 = or i32 %15, %16 ; <i32> [#uses=1] + %18 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %19 = zext i8 %18 to i32 ; <i32> [#uses=1] + %20 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1] + br label %bb.backedge +} diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll index da44cde..fe0e506 100644 --- a/test/CodeGen/Thumb2/large-stack.ll +++ b/test/CodeGen/Thumb2/large-stack.ll @@ -1,24 +1,35 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN +; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX define void @test1() { -; CHECK: test1: -; CHECK: sub sp, #256 +; DARWIN: test1: +; DARWIN: sub sp, #256 +; LINUX: test1: +; LINUX: sub sp, #256 %tmp = alloca [ 64 x i32 ] , align 4 ret void } define void @test2() { -; CHECK: test2: -; CHECK: sub.w sp, sp, #4160 -; CHECK: sub sp, #8 +; DARWIN: test2: +; DARWIN: sub.w sp, sp, #4160 +; DARWIN: sub sp, #8 +; LINUX: test2: +; LINUX: sub.w sp, sp, #4160 +; LINUX: sub sp, #8 %tmp = alloca [ 4168 x i8 ] , align 4 ret void } define i32 @test3() { -; CHECK: test3: -; CHECK: sub.w sp, sp, #805306368 -; CHECK: sub sp, #20 +; DARWIN: test3: +; DARWIN: push {r4, r7, lr} +; DARWIN: sub.w sp, sp, #805306368 +; DARWIN: sub sp, #20 +; LINUX: test3: +; LINUX: stmfd sp!, {r4, r7, r11, lr} +; LINUX: sub.w sp, sp, #805306368 +; LINUX: sub sp, #16 %retval = alloca i32, align 4 %tmp = alloca i32, align 4 %a = alloca [805306369 x i8], align 16 diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll index 4a56ee4..4d69715 100644 --- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll +++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll @@ -1,47 +1,30 @@ -; RUN: llc < %s | grep powixf2 -; RUN: llc < %s | grep fsqrt -; ModuleID = 'yyy.c' +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" -define x86_fp80 @foo(x86_fp80 %x) { +define x86_fp80 @foo(x86_fp80 %x) nounwind{ entry: - %x_addr = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %retval = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %tmp = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - store x86_fp80 %x, x86_fp80* %x_addr - %tmp1 = load x86_fp80* %x_addr, align 16 ; <x86_fp80> [#uses=1] - %tmp2 = call x86_fp80 @llvm.sqrt.f80( x86_fp80 %tmp1 ) ; <x86_fp80> [#uses=1] - store x86_fp80 %tmp2, x86_fp80* %tmp, align 16 - %tmp3 = load x86_fp80* %tmp, align 16 ; <x86_fp80> [#uses=1] - store x86_fp80 %tmp3, x86_fp80* %retval, align 16 - br label %return - -return: ; preds = %entry - %retval4 = load x86_fp80* %retval ; <x86_fp80> [#uses=1] - ret x86_fp80 %retval4 + %tmp2 = call x86_fp80 @llvm.sqrt.f80( x86_fp80 %x ) + ret x86_fp80 %tmp2 + +; CHECK: foo: +; CHECK: fldt 4(%esp) +; CHECK-NEXT: fsqrt +; CHECK-NEXT: ret } declare x86_fp80 @llvm.sqrt.f80(x86_fp80) -define x86_fp80 @bar(x86_fp80 %x) { +define x86_fp80 @bar(x86_fp80 %x) nounwind { entry: - %x_addr = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %retval = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %tmp = alloca x86_fp80 ; <x86_fp80*> [#uses=2] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - store x86_fp80 %x, x86_fp80* %x_addr - %tmp1 = load x86_fp80* %x_addr, align 16 ; <x86_fp80> [#uses=1] - %tmp2 = call x86_fp80 @llvm.powi.f80( x86_fp80 %tmp1, i32 3 ) ; <x86_fp80> [#uses=1] - store x86_fp80 %tmp2, x86_fp80* %tmp, align 16 - %tmp3 = load x86_fp80* %tmp, align 16 ; <x86_fp80> [#uses=1] - store x86_fp80 %tmp3, x86_fp80* %retval, align 16 - br label %return - -return: ; preds = %entry - %retval4 = load x86_fp80* %retval ; <x86_fp80> [#uses=1] - ret x86_fp80 %retval4 + %tmp2 = call x86_fp80 @llvm.powi.f80( x86_fp80 %x, i32 3 ) + ret x86_fp80 %tmp2 +; CHECK: bar: +; CHECK: fldt 4(%esp) +; CHECK-NEXT: fld %st(0) +; CHECK-NEXT: fmul %st(1) +; CHECK-NEXT: fmulp %st(1) +; CHECK-NEXT: ret } declare x86_fp80 @llvm.powi.f80(x86_fp80, i32) diff --git a/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll index d84b63a..628b899 100644 --- a/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll +++ b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll @@ -5,7 +5,7 @@ define void @bar(i32 %b, i32 %a) nounwind optsize ssp { entry: ; CHECK: leal 15(%rsi), %edi ; CHECK-NOT: movl -; CHECK: call _foo +; CHECK: callq _foo %0 = add i32 %a, 15 ; <i32> [#uses=1] %1 = zext i32 %0 to i64 ; <i64> [#uses=1] tail call void @foo(i64 %1) nounwind diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll index 6d7b2d4..9208738 100644 --- a/test/CodeGen/X86/abi-isel.ll +++ b/test/CodeGen/X86/abi-isel.ll @@ -8356,22 +8356,22 @@ entry: define void @lcallee() nounwind { entry: - tail call void @x() nounwind - tail call void @x() nounwind - tail call void @x() nounwind - tail call void @x() nounwind - tail call void @x() nounwind - tail call void @x() nounwind - tail call void @x() nounwind + call void @x() nounwind + call void @x() nounwind + call void @x() nounwind + call void @x() nounwind + call void @x() nounwind + call void @x() nounwind + call void @x() nounwind ret void ; LINUX-64-STATIC: lcallee: -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x -; LINUX-64-STATIC: call x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x +; LINUX-64-STATIC: callq x ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcallee: @@ -8400,13 +8400,13 @@ entry: ; LINUX-64-PIC: lcallee: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT -; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT +; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -8448,37 +8448,37 @@ entry: ; DARWIN-64-STATIC: _lcallee: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x -; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x +; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcallee: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x -; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x +; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcallee: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x -; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x +; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -8487,22 +8487,22 @@ declare void @x() define internal void @dcallee() nounwind { entry: - tail call void @y() nounwind - tail call void @y() nounwind - tail call void @y() nounwind - tail call void @y() nounwind - tail call void @y() nounwind - tail call void @y() nounwind - tail call void @y() nounwind + call void @y() nounwind + call void @y() nounwind + call void @y() nounwind + call void @y() nounwind + call void @y() nounwind + call void @y() nounwind + call void @y() nounwind ret void ; LINUX-64-STATIC: dcallee: -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y -; LINUX-64-STATIC: call y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y +; LINUX-64-STATIC: callq y ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcallee: @@ -8531,13 +8531,13 @@ entry: ; LINUX-64-PIC: dcallee: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT -; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT +; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -8579,37 +8579,37 @@ entry: ; DARWIN-64-STATIC: _dcallee: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y -; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y +; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcallee: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y -; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y +; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcallee: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y -; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y +; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -8761,12 +8761,12 @@ entry: define void @caller() nounwind { entry: - tail call void @callee() nounwind - tail call void @callee() nounwind + call void @callee() nounwind + call void @callee() nounwind ret void ; LINUX-64-STATIC: caller: -; LINUX-64-STATIC: call callee -; LINUX-64-STATIC: call callee +; LINUX-64-STATIC: callq callee +; LINUX-64-STATIC: callq callee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: caller: @@ -8785,8 +8785,8 @@ entry: ; LINUX-64-PIC: caller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call callee@PLT -; LINUX-64-PIC-NEXT: call callee@PLT +; LINUX-64-PIC-NEXT: callq callee@PLT +; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -8813,34 +8813,34 @@ entry: ; DARWIN-64-STATIC: _caller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _callee -; DARWIN-64-STATIC-NEXT: call _callee +; DARWIN-64-STATIC-NEXT: callq _callee +; DARWIN-64-STATIC-NEXT: callq _callee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _caller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _callee -; DARWIN-64-DYNAMIC-NEXT: call _callee +; DARWIN-64-DYNAMIC-NEXT: callq _callee +; DARWIN-64-DYNAMIC-NEXT: callq _callee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _caller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _callee -; DARWIN-64-PIC-NEXT: call _callee +; DARWIN-64-PIC-NEXT: callq _callee +; DARWIN-64-PIC-NEXT: callq _callee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } define void @dcaller() nounwind { entry: - tail call void @dcallee() nounwind - tail call void @dcallee() nounwind + call void @dcallee() nounwind + call void @dcallee() nounwind ret void ; LINUX-64-STATIC: dcaller: -; LINUX-64-STATIC: call dcallee -; LINUX-64-STATIC: call dcallee +; LINUX-64-STATIC: callq dcallee +; LINUX-64-STATIC: callq dcallee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcaller: @@ -8859,8 +8859,8 @@ entry: ; LINUX-64-PIC: dcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call dcallee -; LINUX-64-PIC-NEXT: call dcallee +; LINUX-64-PIC-NEXT: callq dcallee +; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -8887,34 +8887,34 @@ entry: ; DARWIN-64-STATIC: _dcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _dcallee -; DARWIN-64-STATIC-NEXT: call _dcallee +; DARWIN-64-STATIC-NEXT: callq _dcallee +; DARWIN-64-STATIC-NEXT: callq _dcallee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _dcallee -; DARWIN-64-DYNAMIC-NEXT: call _dcallee +; DARWIN-64-DYNAMIC-NEXT: callq _dcallee +; DARWIN-64-DYNAMIC-NEXT: callq _dcallee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _dcallee -; DARWIN-64-PIC-NEXT: call _dcallee +; DARWIN-64-PIC-NEXT: callq _dcallee +; DARWIN-64-PIC-NEXT: callq _dcallee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } define void @lcaller() nounwind { entry: - tail call void @lcallee() nounwind - tail call void @lcallee() nounwind + call void @lcallee() nounwind + call void @lcallee() nounwind ret void ; LINUX-64-STATIC: lcaller: -; LINUX-64-STATIC: call lcallee -; LINUX-64-STATIC: call lcallee +; LINUX-64-STATIC: callq lcallee +; LINUX-64-STATIC: callq lcallee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcaller: @@ -8933,8 +8933,8 @@ entry: ; LINUX-64-PIC: lcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call lcallee@PLT -; LINUX-64-PIC-NEXT: call lcallee@PLT +; LINUX-64-PIC-NEXT: callq lcallee@PLT +; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -8961,32 +8961,32 @@ entry: ; DARWIN-64-STATIC: _lcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _lcallee -; DARWIN-64-STATIC-NEXT: call _lcallee +; DARWIN-64-STATIC-NEXT: callq _lcallee +; DARWIN-64-STATIC-NEXT: callq _lcallee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _lcallee -; DARWIN-64-DYNAMIC-NEXT: call _lcallee +; DARWIN-64-DYNAMIC-NEXT: callq _lcallee +; DARWIN-64-DYNAMIC-NEXT: callq _lcallee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _lcallee -; DARWIN-64-PIC-NEXT: call _lcallee +; DARWIN-64-PIC-NEXT: callq _lcallee +; DARWIN-64-PIC-NEXT: callq _lcallee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } define void @tailcaller() nounwind { entry: - tail call void @callee() nounwind + call void @callee() nounwind ret void ; LINUX-64-STATIC: tailcaller: -; LINUX-64-STATIC: call callee +; LINUX-64-STATIC: callq callee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: tailcaller: @@ -9003,7 +9003,7 @@ entry: ; LINUX-64-PIC: tailcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call callee@PLT +; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9027,29 +9027,29 @@ entry: ; DARWIN-64-STATIC: _tailcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _callee +; DARWIN-64-STATIC-NEXT: callq _callee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _tailcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _callee +; DARWIN-64-DYNAMIC-NEXT: callq _callee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _tailcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _callee +; DARWIN-64-PIC-NEXT: callq _callee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } define void @dtailcaller() nounwind { entry: - tail call void @dcallee() nounwind + call void @dcallee() nounwind ret void ; LINUX-64-STATIC: dtailcaller: -; LINUX-64-STATIC: call dcallee +; LINUX-64-STATIC: callq dcallee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dtailcaller: @@ -9066,7 +9066,7 @@ entry: ; LINUX-64-PIC: dtailcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call dcallee +; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9090,29 +9090,29 @@ entry: ; DARWIN-64-STATIC: _dtailcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _dcallee +; DARWIN-64-STATIC-NEXT: callq _dcallee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dtailcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _dcallee +; DARWIN-64-DYNAMIC-NEXT: callq _dcallee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dtailcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _dcallee +; DARWIN-64-PIC-NEXT: callq _dcallee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } define void @ltailcaller() nounwind { entry: - tail call void @lcallee() nounwind + call void @lcallee() nounwind ret void ; LINUX-64-STATIC: ltailcaller: -; LINUX-64-STATIC: call lcallee +; LINUX-64-STATIC: callq lcallee ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ltailcaller: @@ -9129,7 +9129,7 @@ entry: ; LINUX-64-PIC: ltailcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call lcallee@PLT +; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9153,19 +9153,19 @@ entry: ; DARWIN-64-STATIC: _ltailcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call _lcallee +; DARWIN-64-STATIC-NEXT: callq _lcallee ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ltailcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call _lcallee +; DARWIN-64-DYNAMIC-NEXT: callq _lcallee ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ltailcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call _lcallee +; DARWIN-64-PIC-NEXT: callq _lcallee ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -9173,13 +9173,13 @@ entry: define void @icaller() nounwind { entry: %0 = load void ()** @ifunc, align 8 - tail call void %0() nounwind + call void %0() nounwind %1 = load void ()** @ifunc, align 8 - tail call void %1() nounwind + call void %1() nounwind ret void ; LINUX-64-STATIC: icaller: -; LINUX-64-STATIC: call *ifunc -; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: callq *ifunc +; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: icaller: @@ -9199,8 +9199,8 @@ entry: ; LINUX-64-PIC: icaller: ; LINUX-64-PIC: pushq %rbx ; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx -; LINUX-64-PIC-NEXT: call *(%rbx) -; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) ; LINUX-64-PIC-NEXT: popq %rbx ; LINUX-64-PIC-NEXT: ret @@ -9237,24 +9237,24 @@ entry: ; DARWIN-64-STATIC: _icaller: ; DARWIN-64-STATIC: pushq %rbx ; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-STATIC-NEXT: call *(%rbx) -; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: callq *(%rbx) +; DARWIN-64-STATIC-NEXT: callq *(%rbx) ; DARWIN-64-STATIC-NEXT: popq %rbx ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _icaller: ; DARWIN-64-DYNAMIC: pushq %rbx ; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) -; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx) ; DARWIN-64-DYNAMIC-NEXT: popq %rbx ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _icaller: ; DARWIN-64-PIC: pushq %rbx ; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-PIC-NEXT: call *(%rbx) -; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: callq *(%rbx) +; DARWIN-64-PIC-NEXT: callq *(%rbx) ; DARWIN-64-PIC-NEXT: popq %rbx ; DARWIN-64-PIC-NEXT: ret } @@ -9262,13 +9262,13 @@ entry: define void @dicaller() nounwind { entry: %0 = load void ()** @difunc, align 8 - tail call void %0() nounwind + call void %0() nounwind %1 = load void ()** @difunc, align 8 - tail call void %1() nounwind + call void %1() nounwind ret void ; LINUX-64-STATIC: dicaller: -; LINUX-64-STATIC: call *difunc -; LINUX-64-STATIC: call *difunc +; LINUX-64-STATIC: callq *difunc +; LINUX-64-STATIC: callq *difunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dicaller: @@ -9288,8 +9288,8 @@ entry: ; LINUX-64-PIC: dicaller: ; LINUX-64-PIC: pushq %rbx ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rbx -; LINUX-64-PIC-NEXT: call *(%rbx) -; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) ; LINUX-64-PIC-NEXT: popq %rbx ; LINUX-64-PIC-NEXT: ret @@ -9321,22 +9321,22 @@ entry: ; DARWIN-64-STATIC: _dicaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) -; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dicaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dicaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call *_difunc(%rip) -; DARWIN-64-PIC-NEXT: call *_difunc(%rip) +; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) +; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -9344,13 +9344,13 @@ entry: define void @licaller() nounwind { entry: %0 = load void ()** @lifunc, align 8 - tail call void %0() nounwind + call void %0() nounwind %1 = load void ()** @lifunc, align 8 - tail call void %1() nounwind + call void %1() nounwind ret void ; LINUX-64-STATIC: licaller: -; LINUX-64-STATIC: call *lifunc -; LINUX-64-STATIC: call *lifunc +; LINUX-64-STATIC: callq *lifunc +; LINUX-64-STATIC: callq *lifunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: licaller: @@ -9369,8 +9369,8 @@ entry: ; LINUX-64-PIC: licaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call *lifunc(%rip) -; LINUX-64-PIC-NEXT: call *lifunc(%rip) +; LINUX-64-PIC-NEXT: callq *lifunc(%rip) +; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9402,22 +9402,22 @@ entry: ; DARWIN-64-STATIC: _licaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) -; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _licaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _licaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) -; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -9425,13 +9425,13 @@ entry: define void @itailcaller() nounwind { entry: %0 = load void ()** @ifunc, align 8 - tail call void %0() nounwind + call void %0() nounwind %1 = load void ()** @ifunc, align 8 - tail call void %1() nounwind + call void %1() nounwind ret void ; LINUX-64-STATIC: itailcaller: -; LINUX-64-STATIC: call *ifunc -; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: callq *ifunc +; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: itailcaller: @@ -9451,8 +9451,8 @@ entry: ; LINUX-64-PIC: itailcaller: ; LINUX-64-PIC: pushq %rbx ; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx -; LINUX-64-PIC-NEXT: call *(%rbx) -; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) +; LINUX-64-PIC-NEXT: callq *(%rbx) ; LINUX-64-PIC-NEXT: popq %rbx ; LINUX-64-PIC-NEXT: ret @@ -9489,24 +9489,24 @@ entry: ; DARWIN-64-STATIC: _itailcaller: ; DARWIN-64-STATIC: pushq %rbx ; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-STATIC-NEXT: call *(%rbx) -; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: callq *(%rbx) +; DARWIN-64-STATIC-NEXT: callq *(%rbx) ; DARWIN-64-STATIC-NEXT: popq %rbx ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _itailcaller: ; DARWIN-64-DYNAMIC: pushq %rbx ; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) -; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx) ; DARWIN-64-DYNAMIC-NEXT: popq %rbx ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _itailcaller: ; DARWIN-64-PIC: pushq %rbx ; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx -; DARWIN-64-PIC-NEXT: call *(%rbx) -; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: callq *(%rbx) +; DARWIN-64-PIC-NEXT: callq *(%rbx) ; DARWIN-64-PIC-NEXT: popq %rbx ; DARWIN-64-PIC-NEXT: ret } @@ -9514,10 +9514,10 @@ entry: define void @ditailcaller() nounwind { entry: %0 = load void ()** @difunc, align 8 - tail call void %0() nounwind + call void %0() nounwind ret void ; LINUX-64-STATIC: ditailcaller: -; LINUX-64-STATIC: call *difunc +; LINUX-64-STATIC: callq *difunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ditailcaller: @@ -9535,7 +9535,7 @@ entry: ; LINUX-64-PIC: ditailcaller: ; LINUX-64-PIC: subq $8, %rsp ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rax -; LINUX-64-PIC-NEXT: call *(%rax) +; LINUX-64-PIC-NEXT: callq *(%rax) ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9562,18 +9562,18 @@ entry: ; DARWIN-64-STATIC: _ditailcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ditailcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ditailcaller: -; DARWIN-64-PIC: call *_difunc(%rip) +; DARWIN-64-PIC: callq *_difunc(%rip) ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } @@ -9581,10 +9581,10 @@ entry: define void @litailcaller() nounwind { entry: %0 = load void ()** @lifunc, align 8 - tail call void %0() nounwind + call void %0() nounwind ret void ; LINUX-64-STATIC: litailcaller: -; LINUX-64-STATIC: call *lifunc +; LINUX-64-STATIC: callq *lifunc ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: litailcaller: @@ -9601,7 +9601,7 @@ entry: ; LINUX-64-PIC: litailcaller: ; LINUX-64-PIC: subq $8, %rsp -; LINUX-64-PIC-NEXT: call *lifunc(%rip) +; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: addq $8, %rsp ; LINUX-64-PIC-NEXT: ret @@ -9628,19 +9628,19 @@ entry: ; DARWIN-64-STATIC: _litailcaller: ; DARWIN-64-STATIC: subq $8, %rsp -; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-STATIC-NEXT: addq $8, %rsp ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _litailcaller: ; DARWIN-64-DYNAMIC: subq $8, %rsp -; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _litailcaller: ; DARWIN-64-PIC: subq $8, %rsp -; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-PIC-NEXT: addq $8, %rsp ; DARWIN-64-PIC-NEXT: ret } diff --git a/test/CodeGen/X86/brcond-srl.ll b/test/CodeGen/X86/brcond-srl.ll new file mode 100644 index 0000000..12674e9 --- /dev/null +++ b/test/CodeGen/X86/brcond-srl.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; rdar://7475489 + +define i32 @t(i32 %a, i32 %b) nounwind ssp { +entry: +; CHECK: t: +; CHECK: xorb +; CHECK-NOT: andb +; CHECK-NOT: shrb +; CHECK: testb $64 + %0 = and i32 %a, 16384 + %1 = icmp ne i32 %0, 0 + %2 = and i32 %b, 16384 + %3 = icmp ne i32 %2, 0 + %4 = xor i1 %1, %3 + br i1 %4, label %bb1, label %bb + +bb: ; preds = %entry + %5 = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=1] + ret i32 %5 + +bb1: ; preds = %entry + %6 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=1] + ret i32 %6 +} + +declare i32 @foo(...) + +declare i32 @bar(...) diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll new file mode 100644 index 0000000..acc0647 --- /dev/null +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | FileCheck %s + +define double @t1(float* nocapture %x) nounwind readonly ssp { +entry: +; CHECK: t1: +; CHECK: movss (%rdi), %xmm0 +; CHECK; cvtss2sd %xmm0, %xmm0 + + %0 = load float* %x, align 4 + %1 = fpext float %0 to double + ret double %1 +} + +define float @t2(double* nocapture %x) nounwind readonly ssp optsize { +entry: +; CHECK: t2: +; CHECK; cvtsd2ss (%rdi), %xmm0 + %0 = load double* %x, align 8 + %1 = fptrunc double %0 to float + ret float %1 +} diff --git a/test/CodeGen/X86/bss_pagealigned.ll b/test/CodeGen/X86/bss_pagealigned.ll index 4a1049b..27c5361 100644 --- a/test/CodeGen/X86/bss_pagealigned.ll +++ b/test/CodeGen/X86/bss_pagealigned.ll @@ -10,7 +10,7 @@ define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind { ; CHECK: movq $bm_pte, %rdi ; CHECK-NEXT: xorl %esi, %esi ; CHECK-NEXT: movl $4096, %edx -; CHECK-NEXT: call memset +; CHECK-NEXT: callq memset ret void } @bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096 diff --git a/test/CodeGen/X86/cmov.ll b/test/CodeGen/X86/cmov.ll index f3c9a7a..39d9d1e 100644 --- a/test/CodeGen/X86/cmov.ll +++ b/test/CodeGen/X86/cmov.ll @@ -6,7 +6,7 @@ entry: ; CHECK: test1: ; CHECK: btl ; CHECK-NEXT: movl $12, %eax -; CHECK-NEXT: cmovae (%rcx), %eax +; CHECK-NEXT: cmovael (%rcx), %eax ; CHECK-NEXT: ret %0 = lshr i32 %x, %n ; <i32> [#uses=1] @@ -21,7 +21,7 @@ entry: ; CHECK: test2: ; CHECK: btl ; CHECK-NEXT: movl $12, %eax -; CHECK-NEXT: cmovb (%rcx), %eax +; CHECK-NEXT: cmovbl (%rcx), %eax ; CHECK-NEXT: ret %0 = lshr i32 %x, %n ; <i32> [#uses=1] @@ -41,7 +41,7 @@ declare void @bar(i64) nounwind define void @test3(i64 %a, i64 %b, i1 %p) nounwind { ; CHECK: test3: -; CHECK: cmovne %edi, %esi +; CHECK: cmovnel %edi, %esi ; CHECK-NEXT: movl %esi, %edi %c = trunc i64 %a to i32 diff --git a/test/CodeGen/X86/live-out-reg-info.ll b/test/CodeGen/X86/live-out-reg-info.ll index 7132777..8cd9774 100644 --- a/test/CodeGen/X86/live-out-reg-info.ll +++ b/test/CodeGen/X86/live-out-reg-info.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep {testb \[$\]1,} +; RUN: llc < %s -march=x86-64 | grep testb ; Make sure dagcombine doesn't eliminate the comparison due ; to an off-by-one bug with ComputeMaskedBits information. diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index ec5236b..a125e54 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -10,9 +10,9 @@ ; CHECK: jmp .LBB1_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_2: -; CHECK-NEXT: call loop_latch +; CHECK-NEXT: callq loop_latch ; CHECK-NEXT: .LBB1_1: -; CHECK-NEXT: call loop_header +; CHECK-NEXT: callq loop_header define void @simple() nounwind { entry: @@ -40,9 +40,9 @@ done: ; CHECK: jmp .LBB2_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB2_4: -; CHECK-NEXT: call bar99 +; CHECK-NEXT: callq bar99 ; CHECK-NEXT: .LBB2_1: -; CHECK-NEXT: call body +; CHECK-NEXT: callq body define void @slightly_more_involved() nounwind { entry: @@ -75,18 +75,18 @@ exit: ; CHECK: jmp .LBB3_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_4: -; CHECK-NEXT: call bar99 -; CHECK-NEXT: call get +; CHECK-NEXT: callq bar99 +; CHECK-NEXT: callq get ; CHECK-NEXT: cmpl $2999, %eax ; CHECK-NEXT: jg .LBB3_6 -; CHECK-NEXT: call block_a_true_func +; CHECK-NEXT: callq block_a_true_func ; CHECK-NEXT: jmp .LBB3_7 ; CHECK-NEXT: .LBB3_6: -; CHECK-NEXT: call block_a_false_func +; CHECK-NEXT: callq block_a_false_func ; CHECK-NEXT: .LBB3_7: -; CHECK-NEXT: call block_a_merge_func +; CHECK-NEXT: callq block_a_merge_func ; CHECK-NEXT: .LBB3_1: -; CHECK-NEXT: call body +; CHECK-NEXT: callq body define void @yet_more_involved() nounwind { entry: @@ -134,18 +134,18 @@ exit: ; CHECK: jmp .LBB4_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB4_7: -; CHECK-NEXT: call bar100 +; CHECK-NEXT: callq bar100 ; CHECK-NEXT: jmp .LBB4_1 ; CHECK-NEXT: .LBB4_8: -; CHECK-NEXT: call bar101 +; CHECK-NEXT: callq bar101 ; CHECK-NEXT: jmp .LBB4_1 ; CHECK-NEXT: .LBB4_9: -; CHECK-NEXT: call bar102 +; CHECK-NEXT: callq bar102 ; CHECK-NEXT: jmp .LBB4_1 ; CHECK-NEXT: .LBB4_5: -; CHECK-NEXT: call loop_latch +; CHECK-NEXT: callq loop_latch ; CHECK-NEXT: .LBB4_1: -; CHECK-NEXT: call loop_header +; CHECK-NEXT: callq loop_header define void @cfg_islands() nounwind { entry: diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll new file mode 100644 index 0000000..b90d2e2 --- /dev/null +++ b/test/CodeGen/X86/memcmp.ll @@ -0,0 +1,110 @@ +; RUN: llc %s -o - -march=x86-64 | FileCheck %s + +; This tests codegen time inlining/optimization of memcmp +; rdar://6480398 + +@.str = private constant [23 x i8] c"fooooooooooooooooooooo\00", align 1 ; <[23 x i8]*> [#uses=1] + +declare i32 @memcmp(...) + +define void @memcmp2(i8* %X, i8* %Y, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 2) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp2: +; CHECK: movw (%rsi), %ax +; CHECK: cmpw %ax, (%rdi) +} + +define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 1), i32 2) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp2a: +; CHECK: cmpw $28527, (%rdi) +} + + +define void @memcmp4(i8* %X, i8* %Y, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 4) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp4: +; CHECK: movl (%rsi), %eax +; CHECK: cmpl %eax, (%rdi) +} + +define void @memcmp4a(i8* %X, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 1), i32 4) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp4a: +; CHECK: cmpl $1869573999, (%rdi) +} + +define void @memcmp8(i8* %X, i8* %Y, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 8) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp8: +; CHECK: movq (%rsi), %rax +; CHECK: cmpq %rax, (%rdi) +} + +define void @memcmp8a(i8* %X, i32* nocapture %P) nounwind { +entry: + %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 0), i32 8) nounwind ; <i32> [#uses=1] + %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] + br i1 %1, label %return, label %bb + +bb: ; preds = %entry + store i32 4, i32* %P, align 4 + ret void + +return: ; preds = %entry + ret void +; CHECK: memcmp8a: +; CHECK: movabsq $8029759185026510694, %rax +; CHECK: cmpq %rax, (%rdi) +} + diff --git a/test/CodeGen/X86/object-size.ll b/test/CodeGen/X86/object-size.ll index 3f90245..eed3cfc 100644 --- a/test/CodeGen/X86/object-size.ll +++ b/test/CodeGen/X86/object-size.ll @@ -10,7 +10,7 @@ target triple = "x86_64-apple-darwin10.0" define void @bar() nounwind ssp { entry: %tmp = load i8** @p ; <i8*> [#uses=1] - %0 = call i64 @llvm.objectsize.i64(i8* %tmp, i32 0) ; <i64> [#uses=1] + %0 = call i64 @llvm.objectsize.i64(i8* %tmp, i1 0) ; <i64> [#uses=1] %cmp = icmp ne i64 %0, -1 ; <i1> [#uses=1] ; X64: movq $-1, %rax ; X64: cmpq $-1, %rax @@ -19,7 +19,7 @@ entry: cond.true: ; preds = %entry %tmp1 = load i8** @p ; <i8*> [#uses=1] %tmp2 = load i8** @p ; <i8*> [#uses=1] - %1 = call i64 @llvm.objectsize.i64(i8* %tmp2, i32 1) ; <i64> [#uses=1] + %1 = call i64 @llvm.objectsize.i64(i8* %tmp2, i1 1) ; <i64> [#uses=1] %call = call i8* @__strcpy_chk(i8* %tmp1, i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0), i64 %1) ssp ; <i8*> [#uses=1] br label %cond.end @@ -33,7 +33,7 @@ cond.end: ; preds = %cond.false, %cond.t ret void } -declare i64 @llvm.objectsize.i64(i8*, i32) nounwind readonly +declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readonly declare i8* @__strcpy_chk(i8*, i8*, i64) ssp @@ -47,7 +47,7 @@ entry: %tmp = load i8** %__dest.addr ; <i8*> [#uses=1] %tmp1 = load i8** %__src.addr ; <i8*> [#uses=1] %tmp2 = load i8** %__dest.addr ; <i8*> [#uses=1] - %0 = call i64 @llvm.objectsize.i64(i8* %tmp2, i32 1) ; <i64> [#uses=1] + %0 = call i64 @llvm.objectsize.i64(i8* %tmp2, i1 1) ; <i64> [#uses=1] %call = call i8* @__strcpy_chk(i8* %tmp, i8* %tmp1, i64 %0) ssp ; <i8*> [#uses=1] store i8* %call, i8** %retval %1 = load i8** %retval ; <i8*> [#uses=1] diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll index 5aaf81b..a34a978 100644 --- a/test/CodeGen/X86/peep-test-3.ll +++ b/test/CodeGen/X86/peep-test-3.ll @@ -65,7 +65,7 @@ return: ; preds = %entry ret void } -; Just like @and, but without the trunc+store. This should use a testl +; Just like @and, but without the trunc+store. This should use a testb ; instead of an andl. ; CHECK: test: define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { diff --git a/test/CodeGen/X86/phys-reg-local-regalloc.ll b/test/CodeGen/X86/phys-reg-local-regalloc.ll new file mode 100644 index 0000000..e5e2d4b --- /dev/null +++ b/test/CodeGen/X86/phys-reg-local-regalloc.ll @@ -0,0 +1,49 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s + +@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] + +define i32 @main() nounwind { +entry: +; CHECK: movl 24(%esp), %eax +; CHECK-NOT: movl +; CHECK: movl %eax, 36(%esp) +; CHECK-NOT: movl +; CHECK: movl 28(%esp), %ebx +; CHECK-NOT: movl +; CHECK: movl %ebx, 40(%esp) +; CHECK-NOT: movl +; CHECK: addl %ebx, %eax + %retval = alloca i32 ; <i32*> [#uses=2] + %"%ebx" = alloca i32 ; <i32*> [#uses=1] + %"%eax" = alloca i32 ; <i32*> [#uses=2] + %result = alloca i32 ; <i32*> [#uses=2] + %y = alloca i32 ; <i32*> [#uses=2] + %x = alloca i32 ; <i32*> [#uses=2] + %0 = alloca i32 ; <i32*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i32 1, i32* %x, align 4 + store i32 2, i32* %y, align 4 + call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind + %asmtmp = call i32 asm sideeffect alignstack "movl $1, $0", "=={eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %x) nounwind ; <i32> [#uses=1] + store i32 %asmtmp, i32* %"%eax" + %asmtmp1 = call i32 asm sideeffect alignstack "movl $1, $0", "=={ebx},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %y) nounwind ; <i32> [#uses=1] + store i32 %asmtmp1, i32* %"%ebx" + %1 = call i32 asm "", "={bx}"() nounwind ; <i32> [#uses=1] + %2 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1] + %asmtmp2 = call i32 asm sideeffect alignstack "addl $1, $0", "=={eax},{ebx},{eax},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %1, i32 %2) nounwind ; <i32> [#uses=1] + store i32 %asmtmp2, i32* %"%eax" + %3 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1] + call void asm sideeffect alignstack "movl $0, $1", "{eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %3, i32* %result) nounwind + %4 = load i32* %result, align 4 ; <i32> [#uses=1] + %5 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0] + store i32 0, i32* %0, align 4 + %6 = load i32* %0, align 4 ; <i32> [#uses=1] + store i32 %6, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval3 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval3 +} + +declare i32 @printf(i8*, ...) nounwind diff --git a/test/CodeGen/X86/powi.ll b/test/CodeGen/X86/powi.ll new file mode 100644 index 0000000..c3d6831 --- /dev/null +++ b/test/CodeGen/X86/powi.ll @@ -0,0 +1,11 @@ +; RUN: llc %s -march=x86 -mcpu=yonah -o - | grep mulsd | count 6 +; Ideally this would compile to 5 multiplies. + +define double @_Z3f10d(double %a) nounwind readonly ssp noredzone { +entry: + %0 = tail call double @llvm.powi.f64(double %a, i32 15) nounwind ; <double> [#uses=1] + ret double %0 +} + +declare double @llvm.powi.f64(double, i32) nounwind readonly + diff --git a/test/CodeGen/X86/select-aggregate.ll b/test/CodeGen/X86/select-aggregate.ll index 822e594..44cafe2 100644 --- a/test/CodeGen/X86/select-aggregate.ll +++ b/test/CodeGen/X86/select-aggregate.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86-64 | FileCheck %s ; PR5757 -; CHECK: cmovne %rdi, %rsi +; CHECK: cmovneq %rdi, %rsi ; CHECK: movl (%rsi), %eax %0 = type { i64, i32 } diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll index 42ce4c1..c37e15d 100644 --- a/test/CodeGen/X86/setcc.ll +++ b/test/CodeGen/X86/setcc.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -; XFAIL: * ; rdar://7329206 ; Use sbb x, x to materialize carry bit in a GPR. The value is either diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index c70c9fa..8c3cae9 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -274,7 +274,7 @@ declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind ; one ret instruction. ; CHECK: foo: -; CHECK: call func +; CHECK: callq func ; CHECK-NEXT: .LBB5_2: ; CHECK-NEXT: addq $8, %rsp ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/tailcall1.ll b/test/CodeGen/X86/tailcall1.ll index 4923df2..42f8cdd 100644 --- a/test/CodeGen/X86/tailcall1.ll +++ b/test/CodeGen/X86/tailcall1.ll @@ -1,12 +1,10 @@ -; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL | count 4 -define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { -entry: - ret i32 %a3 -} +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL | count 5 + +declare fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) -define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { +define fastcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind { entry: - %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1] + %tmp11 = tail call fastcc i32 @tailcallee(i32 %in1, i32 %in2, i32 %in1, i32 %in2) ret i32 %tmp11 } @@ -30,3 +28,10 @@ define fastcc i32 @ret_undef() nounwind { %p = tail call fastcc i32 @i32_callee() ret i32 undef } + +declare fastcc void @does_not_return() + +define fastcc i32 @noret() nounwind { + tail call fastcc void @does_not_return() + unreachable +} diff --git a/test/CodeGen/X86/widen_load-1.ll b/test/CodeGen/X86/widen_load-1.ll index 2d34b31..8a970bf 100644 --- a/test/CodeGen/X86/widen_load-1.ll +++ b/test/CodeGen/X86/widen_load-1.ll @@ -5,7 +5,7 @@ ; CHECK: movq compl+128(%rip), %xmm0 ; CHECK: movaps %xmm0, (%rsp) -; CHECK: call killcommon +; CHECK: callq killcommon @compl = linkonce global [20 x i64] zeroinitializer, align 64 ; <[20 x i64]*> [#uses=1] diff --git a/test/CodeGen/X86/x86-64-pic-1.ll b/test/CodeGen/X86/x86-64-pic-1.ll index b21918e..46f6d33 100644 --- a/test/CodeGen/X86/x86-64-pic-1.ll +++ b/test/CodeGen/X86/x86-64-pic-1.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep {call f@PLT} %t1 +; RUN: grep {callq f@PLT} %t1 define void @g() { entry: diff --git a/test/CodeGen/X86/x86-64-pic-10.ll b/test/CodeGen/X86/x86-64-pic-10.ll index 7baa7e5..b6f82e2 100644 --- a/test/CodeGen/X86/x86-64-pic-10.ll +++ b/test/CodeGen/X86/x86-64-pic-10.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep {call g@PLT} %t1 +; RUN: grep {callq g@PLT} %t1 @g = alias weak i32 ()* @f diff --git a/test/CodeGen/X86/x86-64-pic-11.ll b/test/CodeGen/X86/x86-64-pic-11.ll index ef81685..4db331c 100644 --- a/test/CodeGen/X86/x86-64-pic-11.ll +++ b/test/CodeGen/X86/x86-64-pic-11.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep {call __fixunsxfti@PLT} %t1 +; RUN: grep {callq __fixunsxfti@PLT} %t1 define i128 @f(x86_fp80 %a) nounwind { entry: diff --git a/test/CodeGen/X86/x86-64-pic-2.ll b/test/CodeGen/X86/x86-64-pic-2.ll index a52c564..1ce2de7 100644 --- a/test/CodeGen/X86/x86-64-pic-2.ll +++ b/test/CodeGen/X86/x86-64-pic-2.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep {call f} %t1 -; RUN: not grep {call f@PLT} %t1 +; RUN: grep {callq f} %t1 +; RUN: not grep {callq f@PLT} %t1 define void @g() { entry: diff --git a/test/CodeGen/X86/x86-64-pic-3.ll b/test/CodeGen/X86/x86-64-pic-3.ll index 246c00f..aa3c888 100644 --- a/test/CodeGen/X86/x86-64-pic-3.ll +++ b/test/CodeGen/X86/x86-64-pic-3.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep {call f} %t1 -; RUN: not grep {call f@PLT} %t1 +; RUN: grep {callq f} %t1 +; RUN: not grep {callq f@PLT} %t1 define void @g() { entry: diff --git a/test/DebugInfo/2009-12-01-CurrentFn.ll b/test/DebugInfo/2009-12-01-CurrentFn.ll index d33a8f4..6fc538e 100644 --- a/test/DebugInfo/2009-12-01-CurrentFn.ll +++ b/test/DebugInfo/2009-12-01-CurrentFn.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s | grep "func_end1:" | count 1 - +; XFAIL: powerpc-apple-darwin declare void @foo() define void @bar(i32 %i) nounwind ssp { diff --git a/test/FrontendC++/2009-12-23-MissingSext.cpp b/test/FrontendC++/2009-12-23-MissingSext.cpp new file mode 100644 index 0000000..ee97881 --- /dev/null +++ b/test/FrontendC++/2009-12-23-MissingSext.cpp @@ -0,0 +1,16 @@ +// RUN: %llvmgxx %s -S -o - | FileCheck %s +// The store of p.y into the temporary was not +// getting extended to 32 bits, so uninitialized +// bits of the temporary were used. 7366161. +struct foo { + char x:8; + signed int y:24; +}; +int bar(struct foo p, int x) { +// CHECK: bar +// CHECK: sext +// CHECK: sext + x = (p.y > x ? x : p.y); + return x; +// CHECK: return +} diff --git a/test/FrontendC++/m64-ptr.cpp b/test/FrontendC++/m64-ptr.cpp index 7685cfe..f91e2f4 100644 --- a/test/FrontendC++/m64-ptr.cpp +++ b/test/FrontendC++/m64-ptr.cpp @@ -1,4 +1,5 @@ // RUN: %llvmgxx %s -S -o - | FileCheck %s +// XFAIL: powerpc-apple-darwin // Make sure pointers are passed as pointers, not converted to int. // The first load should be of type i8** in either 32 or 64 bit mode. diff --git a/test/LLVMC/OptionPreprocessor.td b/test/LLVMC/OptionPreprocessor.td index 5661db8..8d748ee 100644 --- a/test/LLVMC/OptionPreprocessor.td +++ b/test/LLVMC/OptionPreprocessor.td @@ -1,4 +1,4 @@ -// Test for the OptionPreprocessor and any*. +// Test for the OptionPreprocessor and related functionality. // RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t // RUN: FileCheck -input-file %t %s // RUN: %compile_cxx -fexceptions -x c++ %t @@ -11,20 +11,40 @@ def OptList : OptionList<[ (switch_option "baz", (help "dummy")), (parameter_option "foo_p", (help "dummy")), (parameter_option "bar_p", (help "dummy")), -(parameter_option "baz_p", (help "dummy")) +(parameter_option "baz_p", (help "dummy")), +(parameter_list_option "foo_l", (help "dummy")) ]>; def Preprocess : OptionPreprocessor< (case // CHECK: W1 + // CHECK: foo = false; + // CHECK: foo_p = ""; + // CHECK: foo_l.clear(); (and (switch_on "foo"), (any_switch_on ["bar", "baz"])), - (warning "W1"), + [(warning "W1"), (unset_option "foo"), + (unset_option "foo_p"), (unset_option "foo_l")], // CHECK: W2 + // CHECK: foo = true; + // CHECK: bar = true; + // CHECK: baz = false; + // CHECK: foo_p = "asdf"; + // CHECK: foo_l.clear(); + // CHECK: foo_l.push_back("qwert"); + // CHECK: foo_l.push_back("yuiop"); + // CHECK: foo_l.push_back("asdf"); (and (switch_on ["foo", "bar"]), (any_empty ["foo_p", "bar_p"])), - (warning "W2"), + [(warning "W2"), (set_option "foo"), + (set_option "bar", true), + (set_option "baz", false), + (set_option "foo_p", "asdf"), + (set_option "foo_l", ["qwert", "yuiop", "asdf"])], // CHECK: W3 + // CHECK: foo = true; + // CHECK: bar = true; + // CHECK: baz = true; (and (empty ["foo_p", "bar_p"]), (any_not_empty ["baz_p"])), - (warning "W3")) + [(warning "W3"), (set_option ["foo", "bar", "baz"])]) >; // Shut up warnings... @@ -38,7 +58,8 @@ def dummy : Tool< (switch_on "baz"), (error), (not_empty "foo_p"), (error), (not_empty "bar_p"), (error), - (not_empty "baz_p"), (error))) + (not_empty "baz_p"), (error), + (not_empty "foo_l"), (error))) ]>; def Graph : CompilationGraph<[Edge<"root", "dummy">]>; diff --git a/test/MC/Disassembler/dg.exp b/test/MC/Disassembler/dg.exp new file mode 100644 index 0000000..68d5f1d --- /dev/null +++ b/test/MC/Disassembler/dg.exp @@ -0,0 +1,4 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] + diff --git a/test/MC/Disassembler/simple-tests.txt b/test/MC/Disassembler/simple-tests.txt new file mode 100644 index 0000000..1e3249f --- /dev/null +++ b/test/MC/Disassembler/simple-tests.txt @@ -0,0 +1,15 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s + +# CHECK: int $33 +0xCD 0x21 + +# CHECK: int $33 +0xCD 0x21 + + +# CHECK: addb %al, (%rax) +0 0 + +# CHECK: callq -1234 +0xe8 0x2e 0xfb 0xff 0xff + diff --git a/test/TableGen/subst2.td b/test/TableGen/subst2.td new file mode 100644 index 0000000..3366c9d --- /dev/null +++ b/test/TableGen/subst2.td @@ -0,0 +1,15 @@ +// RUN: tblgen %s | FileCheck %s +// CHECK: No subst +// CHECK: No foo +// CHECK: RECURSE foo + +class Recurse<string t> { + string Text = t; +} + +class Text<string text> : + Recurse<!subst("RECURSE", "RECURSE", !subst("NORECURSE", "foo", text))>; + +def Ok1 : Text<"No subst">; +def Ok2 : Text<"No NORECURSE">; +def Trouble : Text<"RECURSE NORECURSE">; diff --git a/test/Transforms/GVN/rle-phi-translate.ll b/test/Transforms/GVN/rle-phi-translate.ll index 912f580..6731f43 100644 --- a/test/Transforms/GVN/rle-phi-translate.ll +++ b/test/Transforms/GVN/rle-phi-translate.ll @@ -38,77 +38,109 @@ bb2: ; preds = %bb1, %bb define i8 @test2(i1 %cond, i32* %b, i32* %c) nounwind { ; CHECK: @test2 entry: - br i1 %cond, label %bb, label %bb1 + br i1 %cond, label %bb, label %bb1 bb: %b1 = bitcast i32* %b to i8* store i8 4, i8* %b1 - br label %bb2 + br label %bb2 bb1: %c1 = bitcast i32* %c to i8* store i8 92, i8* %c1 - br label %bb2 + br label %bb2 bb2: - %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] + %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] %d1 = bitcast i32* %d to i8* - %dv = load i8* %d1 + %dv = load i8* %d1 ; CHECK: %dv = phi i8 [ 92, %bb1 ], [ 4, %bb ] ; CHECK-NOT: load ; CHECK: ret i8 %dv - ret i8 %dv + ret i8 %dv } define i32 @test3(i1 %cond, i32* %b, i32* %c) nounwind { ; CHECK: @test3 entry: - br i1 %cond, label %bb, label %bb1 + br i1 %cond, label %bb, label %bb1 bb: %b1 = getelementptr i32* %b, i32 17 store i32 4, i32* %b1 - br label %bb2 + br label %bb2 bb1: %c1 = getelementptr i32* %c, i32 7 store i32 82, i32* %c1 - br label %bb2 + br label %bb2 bb2: - %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] - %i = phi i32 [ 7, %bb1 ], [ 17, %bb ] + %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] + %i = phi i32 [ 7, %bb1 ], [ 17, %bb ] %d1 = getelementptr i32* %d, i32 %i - %dv = load i32* %d1 + %dv = load i32* %d1 ; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ] ; CHECK-NOT: load ; CHECK: ret i32 %dv - ret i32 %dv + ret i32 %dv } ; PR5313 define i32 @test4(i1 %cond, i32* %b, i32* %c) nounwind { ; CHECK: @test4 entry: - br i1 %cond, label %bb, label %bb1 + br i1 %cond, label %bb, label %bb1 bb: store i32 4, i32* %b - br label %bb2 + br label %bb2 bb1: %c1 = getelementptr i32* %c, i32 7 store i32 82, i32* %c1 - br label %bb2 + br label %bb2 bb2: - %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] - %i = phi i32 [ 7, %bb1 ], [ 0, %bb ] + %d = phi i32* [ %c, %bb1 ], [ %b, %bb ] + %i = phi i32 [ 7, %bb1 ], [ 0, %bb ] %d1 = getelementptr i32* %d, i32 %i - %dv = load i32* %d1 + %dv = load i32* %d1 ; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ] ; CHECK-NOT: load ; CHECK: ret i32 %dv - ret i32 %dv + ret i32 %dv } + + +; void test5(int N, double* G) { +; for (long j = 1; j < 1000; j++) +; G[j] = G[j] + G[j-1]; +; } +; +; Should compile into one load in the loop. +define void @test5(i32 %N, double* nocapture %G) nounwind ssp { +; CHECK: @test5 +bb.nph: + br label %for.body + +for.body: + %indvar = phi i64 [ 0, %bb.nph ], [ %tmp, %for.body ] + %arrayidx6 = getelementptr double* %G, i64 %indvar + %tmp = add i64 %indvar, 1 + %arrayidx = getelementptr double* %G, i64 %tmp + %tmp3 = load double* %arrayidx + %tmp7 = load double* %arrayidx6 + %add = fadd double %tmp3, %tmp7 + store double %add, double* %arrayidx + %exitcond = icmp eq i64 %tmp, 999 + br i1 %exitcond, label %for.end, label %for.body +; CHECK: for.body: +; CHECK: phi double +; CHECK: load double +; CHECK-NOT: load double +; CHECK: br i1 +for.end: + ret void +} diff --git a/test/Transforms/GlobalOpt/heap-sra-3.ll b/test/Transforms/GlobalOpt/heap-sra-3.ll index cbbcdfc..e7a877c 100644 --- a/test/Transforms/GlobalOpt/heap-sra-3.ll +++ b/test/Transforms/GlobalOpt/heap-sra-3.ll @@ -8,7 +8,7 @@ target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:1 define void @bar(i64 %Size) nounwind noinline { entry: - %mallocsize = mul i64 8, %Size, ; <i64> [#uses=1] + %mallocsize = mul i64 8, %Size ; <i64> [#uses=1] ; CHECK: mul i64 %Size, 4 %malloccall = tail call i8* @malloc(i64 %mallocsize) ; <i8*> [#uses=1] %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1] diff --git a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll index 187e2f5..6672b6c 100644 --- a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll +++ b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll @@ -33,6 +33,14 @@ define i1 @lt_signed_to_large_negative(i8 %SB) { ; CHECK: ret i1 false } +define i1 @lt_signed_to_small_unsigned(i8 %SB) { + %Y = sext i8 %SB to i32 + %C = icmp ult i32 %Y, 17 + ret i1 %C +; CHECK: %C = icmp ult i8 %SB, 17 +; CHECK: ret i1 %C +} + define i1 @lt_signed_to_small_signed(i8 %SB) { %Y = sext i8 %SB to i32 ; <i32> [#uses=1] %C = icmp slt i32 %Y, 17 ; <i1> [#uses=1] @@ -77,6 +85,14 @@ define i1 @lt_unsigned_to_small_unsigned(i8 %SB) { ; CHECK: ret i1 %C } +define i1 @lt_unsigned_to_small_signed(i8 %SB) { + %Y = zext i8 %SB to i32 + %C = icmp slt i32 %Y, 17 + ret i1 %C +; CHECK: %C = icmp ult i8 %SB, 17 +; CHECK: ret i1 %C +} + define i1 @lt_unsigned_to_small_negative(i8 %SB) { %Y = zext i8 %SB to i32 ; <i32> [#uses=1] %C = icmp slt i32 %Y, -17 ; <i1> [#uses=1] @@ -106,6 +122,14 @@ define i1 @gt_signed_to_large_negative(i8 %SB) { ; CHECK: ret i1 true } +define i1 @gt_signed_to_small_unsigned(i8 %SB) { + %Y = sext i8 %SB to i32 + %C = icmp ugt i32 %Y, 17 + ret i1 %C +; CHECK: %C = icmp ugt i8 %SB, 17 +; CHECK: ret i1 %C +} + define i1 @gt_signed_to_small_signed(i8 %SB) { %Y = sext i8 %SB to i32 ; <i32> [#uses=1] %C = icmp sgt i32 %Y, 17 ; <i1> [#uses=1] @@ -151,6 +175,14 @@ define i1 @gt_unsigned_to_small_unsigned(i8 %SB) { ; CHECK: ret i1 %C } +define i1 @gt_unsigned_to_small_signed(i8 %SB) { + %Y = zext i8 %SB to i32 + %C = icmp sgt i32 %Y, 17 + ret i1 %C +; CHECK: %C = icmp ugt i8 %SB, 17 +; CHECK: ret i1 %C +} + define i1 @gt_unsigned_to_small_negative(i8 %SB) { %Y = zext i8 %SB to i32 ; <i32> [#uses=1] %C = icmp sgt i32 %Y, -17 ; <i1> [#uses=1] diff --git a/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst.ll b/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst.ll deleted file mode 100644 index 4d1a9ef..0000000 --- a/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst.ll +++ /dev/null @@ -1,12 +0,0 @@ -; This test case is reduced from llvmAsmParser.cpp -; The optimizer should not remove the cast here. -; RUN: opt < %s -instcombine -S | \ -; RUN: grep sext.*i32 - - -define i1 @test(i16 %X) { - %A = sext i16 %X to i32 ; <i32> [#uses=1] - %B = icmp ugt i32 %A, 1330 ; <i1> [#uses=1] - ret i1 %B -} - diff --git a/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll b/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll new file mode 100644 index 0000000..fb7497b --- /dev/null +++ b/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll @@ -0,0 +1,16 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +@.str254 = internal constant [2 x i8] c".\00" +@.str557 = internal constant [3 x i8] c"::\00" + +define i8* @demangle_qualified(i32 %isfuncname) nounwind { +entry: + %tobool272 = icmp ne i32 %isfuncname, 0 + %cond276 = select i1 %tobool272, i8* getelementptr inbounds ([2 x i8]* @.str254, i32 0, i32 0), i8* getelementptr inbounds ([3 x i8]* @.str557, i32 0, i32 0) ; <i8*> [#uses=4] + %cmp.i504 = icmp eq i8* %cond276, null + %rval = getelementptr i8* %cond276, i1 %cmp.i504 + ret i8* %rval +} + +; CHECK: %cond276 = select i1 +; CHECK: ret i8* %cond276 diff --git a/test/Transforms/InstCombine/cast_ptr.ll b/test/Transforms/InstCombine/cast_ptr.ll index 6544e7d..6a00e83 100644 --- a/test/Transforms/InstCombine/cast_ptr.ll +++ b/test/Transforms/InstCombine/cast_ptr.ll @@ -27,3 +27,12 @@ define i1 @test2(i8* %a, i8* %b) { ret i1 %r } +; These casts should also be folded away. +; CHECK: @test3 +; CHECK: icmp eq i8* %a, @global +@global = global i8 0 +define i1 @test3(i8* %a) { + %tmpa = ptrtoint i8* %a to i32 + %r = icmp eq i32 %tmpa, ptrtoint (i8* @global to i32) + ret i1 %r +} diff --git a/test/Transforms/InstCombine/constant-fold-compare.ll b/test/Transforms/InstCombine/constant-fold-compare.ll new file mode 100644 index 0000000..6e41e2f --- /dev/null +++ b/test/Transforms/InstCombine/constant-fold-compare.ll @@ -0,0 +1,8 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" + +define i32 @a() nounwind readnone { +entry: + ret i32 zext (i1 icmp eq (i32 0, i32 ptrtoint (i32 ()* @a to i32)) to i32) +} +; CHECK: ret i32 0 diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index 82ac575..732a882 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -instcombine -S -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128:n8:16:32" target triple = "i386-apple-darwin10.0" define i32 @test0(i8 %tmp2) ssp { @@ -148,3 +148,59 @@ entry: store i32* getelementptr (i32* bitcast (i32 (i32, i8**)* @test6 to i32*), i32 -2048), i32** @test6g, align 4 unreachable } + + +; PR5827 + +%class.RuleBasedBreakIterator = type { i64 ()* } +%class.UStack = type { i8** } + +define i32 @_ZN22RuleBasedBreakIterator15checkDictionaryEi(%class.RuleBasedBreakIterator* %this, i32 %x) align 2 { +entry: + %breaks = alloca %class.UStack, align 4 ; <%class.UStack*> [#uses=3] + call void @_ZN6UStackC1Ei(%class.UStack* %breaks, i32 0) + %tobool = icmp ne i32 %x, 0 ; <i1> [#uses=1] + br i1 %tobool, label %cond.end, label %cond.false + +terminate.handler: ; preds = %ehcleanup + %exc = call i8* @llvm.eh.exception() ; <i8*> [#uses=1] + %0 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0] + call void @_ZSt9terminatev() noreturn nounwind + unreachable + +ehcleanup: ; preds = %cond.false + %exc1 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2] + %1 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc1, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0] + invoke void @_ZN6UStackD1Ev(%class.UStack* %breaks) + to label %cont unwind label %terminate.handler + +cont: ; preds = %ehcleanup + call void @_Unwind_Resume_or_Rethrow(i8* %exc1) + unreachable + +cond.false: ; preds = %entry + %tmp4 = getelementptr inbounds %class.RuleBasedBreakIterator* %this, i32 0, i32 0 ; <i64 ()**> [#uses=1] + %tmp5 = load i64 ()** %tmp4 ; <i64 ()*> [#uses=1] + %call = invoke i64 %tmp5() + to label %cond.end unwind label %ehcleanup ; <i64> [#uses=1] + +cond.end: ; preds = %cond.false, %entry + %cond = phi i64 [ 0, %entry ], [ %call, %cond.false ] ; <i64> [#uses=1] + %conv = trunc i64 %cond to i32 ; <i32> [#uses=1] + call void @_ZN6UStackD1Ev(%class.UStack* %breaks) + ret i32 %conv +} + +declare void @_ZN6UStackC1Ei(%class.UStack*, i32) + +declare void @_ZN6UStackD1Ev(%class.UStack*) + +declare i32 @__gxx_personality_v0(...) + +declare i8* @llvm.eh.exception() nounwind readonly + +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind + +declare void @_ZSt9terminatev() + +declare void @_Unwind_Resume_or_Rethrow(i8*) diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 64e88c9..79fa220 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -1,10 +1,13 @@ -; RUN: opt < %s -instcombine -S | not grep icmp +; RUN: opt < %s -instcombine -S | FileCheck %s define i32 @test1(i32 %X) { entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] ret i32 %1 +; CHECK: @test1 +; CHECK: lshr i32 %X, 31 +; CHECK-NEXT: ret i32 } define i32 @test2(i32 %X) { @@ -12,6 +15,10 @@ entry: icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] ret i32 %1 +; CHECK: @test2 +; CHECK: lshr i32 %X, 31 +; CHECK-NEXT: xor i32 +; CHECK-NEXT: ret i32 } define i32 @test3(i32 %X) { @@ -19,6 +26,9 @@ entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] sext i1 %0 to i32 ; <i32>:1 [#uses=1] ret i32 %1 +; CHECK: @test3 +; CHECK: ashr i32 %X, 31 +; CHECK-NEXT: ret i32 } define i32 @test4(i32 %X) { @@ -26,6 +36,10 @@ entry: icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1] sext i1 %0 to i32 ; <i32>:1 [#uses=1] ret i32 %1 +; CHECK: @test4 +; CHECK: ashr i32 %X, 31 +; CHECK-NEXT: xor i32 +; CHECK-NEXT: ret i32 } ; PR4837 @@ -33,6 +47,8 @@ define <2 x i1> @test5(<2 x i64> %x) { entry: %V = icmp eq <2 x i64> %x, undef ret <2 x i1> %V +; CHECK: @test5 +; CHECK: ret <2 x i1> undef } define i32 @test6(i32 %a, i32 %b) { @@ -41,4 +57,58 @@ define i32 @test6(i32 %a, i32 %b) { %e = sub i32 0, %d %f = and i32 %e, %b ret i32 %f +; CHECK: @test6 +; CHECK-NEXT: ashr i32 %a, 31 +; CHECK-NEXT: %f = and i32 %e, %b +; CHECK-NEXT: ret i32 %f } + + +define i1 @test7(i32 %x) { +entry: + %a = add i32 %x, -1 + %b = icmp ult i32 %a, %x + ret i1 %b +; CHECK: @test7 +; CHECK: %b = icmp ne i32 %x, 0 +; CHECK: ret i1 %b +} + +define i1 @test8(i32 %x){ +entry: + %a = add i32 %x, -1 + %b = icmp eq i32 %a, %x + ret i1 %b +; CHECK: @test8 +; CHECK: ret i1 false +} + +define i1 @test9(i32 %x) { +entry: + %a = add i32 %x, -2 + %b = icmp ugt i32 %x, %a + ret i1 %b +; CHECK: @test9 +; CHECK: icmp ugt i32 %x, 1 +; CHECK: ret i1 %b +} + +define i1 @test10(i32 %x){ +entry: + %a = add i32 %x, -1 + %b = icmp slt i32 %a, %x + ret i1 %b + +; CHECK: @test10 +; CHECK: %b = icmp ne i32 %x, -2147483648 +; CHECK: ret i1 %b +} + +define i1 @test11(i32 %x) { + %a = add nsw i32 %x, 8 + %b = icmp slt i32 %x, %a + ret i1 %b +; CHECK: @test11 +; CHECK: ret i1 true +} + diff --git a/test/Transforms/InstCombine/intrinsics.ll b/test/Transforms/InstCombine/intrinsics.ll index fda4386..135e777 100644 --- a/test/Transforms/InstCombine/intrinsics.ll +++ b/test/Transforms/InstCombine/intrinsics.ll @@ -4,6 +4,7 @@ declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8) declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8) +declare double @llvm.powi.f64(double, i32) nounwind readonly define i8 @test1(i8 %A, i8 %B) { %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B) @@ -77,3 +78,24 @@ define i8 @test6(i8 %A, i1* %overflowPtr) { ; CHECK-NEXT: store i1 false, i1* %overflowPtr ; CHECK-NEXT: ret i8 %A } + + +define void @powi(double %V, double *%P) { +entry: + %A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind + volatile store double %A, double* %P + + %B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind + volatile store double %B, double* %P + + %C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind + volatile store double %C, double* %P + ret void +; CHECK: @powi +; CHECK: %A = fdiv double 1.0{{.*}}, %V +; CHECK: volatile store double %A, +; CHECK: volatile store double 1.0 +; CHECK: volatile store double %V +} + + diff --git a/test/Transforms/InstCombine/memcpy.ll b/test/Transforms/InstCombine/memcpy.ll new file mode 100644 index 0000000..2e7b2c0 --- /dev/null +++ b/test/Transforms/InstCombine/memcpy.ll @@ -0,0 +1,10 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +define void @test4(i8* %a) { + tail call void @llvm.memcpy.i32( i8* %a, i8* %a, i32 100, i32 1 ) + ret void +} +; CHECK: define void @test4 +; CHECK-NEXT: ret void diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index b04382e..06d5338 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -1,205 +1,309 @@ ; This test makes sure that these instructions are properly eliminated. ; PR1822 -; RUN: opt < %s -instcombine -S | not grep select +; RUN: opt < %s -instcombine -S | FileCheck %s define i32 @test1(i32 %A, i32 %B) { - %C = select i1 false, i32 %A, i32 %B ; <i32> [#uses=1] + %C = select i1 false, i32 %A, i32 %B ret i32 %C +; CHECK: @test1 +; CHECK: ret i32 %B } define i32 @test2(i32 %A, i32 %B) { - %C = select i1 true, i32 %A, i32 %B ; <i32> [#uses=1] + %C = select i1 true, i32 %A, i32 %B ret i32 %C +; CHECK: @test2 +; CHECK: ret i32 %A } define i32 @test3(i1 %C, i32 %I) { ; V = I - %V = select i1 %C, i32 %I, i32 %I ; <i32> [#uses=1] + %V = select i1 %C, i32 %I, i32 %I ret i32 %V +; CHECK: @test3 +; CHECK: ret i32 %I } define i1 @test4(i1 %C) { ; V = C - %V = select i1 %C, i1 true, i1 false ; <i1> [#uses=1] + %V = select i1 %C, i1 true, i1 false ret i1 %V +; CHECK: @test4 +; CHECK: ret i1 %C } define i1 @test5(i1 %C) { ; V = !C - %V = select i1 %C, i1 false, i1 true ; <i1> [#uses=1] + %V = select i1 %C, i1 false, i1 true ret i1 %V +; CHECK: @test5 +; CHECK: xor i1 %C, true +; CHECK: ret i1 } define i32 @test6(i1 %C) { ; V = cast C to int - %V = select i1 %C, i32 1, i32 0 ; <i32> [#uses=1] + %V = select i1 %C, i32 1, i32 0 ret i32 %V +; CHECK: @test6 +; CHECK: %V = zext i1 %C to i32 +; CHECK: ret i32 %V } define i1 @test7(i1 %C, i1 %X) { ; R = or C, X - %R = select i1 %C, i1 true, i1 %X ; <i1> [#uses=1] + %R = select i1 %C, i1 true, i1 %X ret i1 %R +; CHECK: @test7 +; CHECK: %R = or i1 %C, %X +; CHECK: ret i1 %R } define i1 @test8(i1 %C, i1 %X) { ; R = and C, X - %R = select i1 %C, i1 %X, i1 false ; <i1> [#uses=1] + %R = select i1 %C, i1 %X, i1 false ret i1 %R +; CHECK: @test8 +; CHECK: %R = and i1 %C, %X +; CHECK: ret i1 %R } define i1 @test9(i1 %C, i1 %X) { ; R = and !C, X - %R = select i1 %C, i1 false, i1 %X ; <i1> [#uses=1] + %R = select i1 %C, i1 false, i1 %X ret i1 %R +; CHECK: @test9 +; CHECK: xor i1 %C, true +; CHECK: %R = and i1 +; CHECK: ret i1 %R } define i1 @test10(i1 %C, i1 %X) { ; R = or !C, X - %R = select i1 %C, i1 %X, i1 true ; <i1> [#uses=1] + %R = select i1 %C, i1 %X, i1 true ret i1 %R +; CHECK: @test10 +; CHECK: xor i1 %C, true +; CHECK: %R = or i1 +; CHECK: ret i1 %R } define i32 @test11(i32 %a) { - %C = icmp eq i32 %a, 0 ; <i1> [#uses=1] - %R = select i1 %C, i32 0, i32 1 ; <i32> [#uses=1] + %C = icmp eq i32 %a, 0 + %R = select i1 %C, i32 0, i32 1 ret i32 %R +; CHECK: @test11 +; CHECK: icmp ne i32 %a, 0 +; CHECK: %R = zext i1 +; CHECK: ret i32 %R } define i32 @test12(i1 %cond, i32 %a) { - %b = or i32 %a, 1 ; <i32> [#uses=1] - %c = select i1 %cond, i32 %b, i32 %a ; <i32> [#uses=1] + %b = or i32 %a, 1 + %c = select i1 %cond, i32 %b, i32 %a ret i32 %c +; CHECK: @test12 +; CHECK: %b = zext i1 %cond to i32 +; CHECK: %c = or i32 %b, %a +; CHECK: ret i32 %c } define i32 @test12a(i1 %cond, i32 %a) { - %b = ashr i32 %a, 1 ; <i32> [#uses=1] - %c = select i1 %cond, i32 %b, i32 %a ; <i32> [#uses=1] + %b = ashr i32 %a, 1 + %c = select i1 %cond, i32 %b, i32 %a ret i32 %c +; CHECK: @test12a +; CHECK: %b = zext i1 %cond to i32 +; CHECK: %c = ashr i32 %a, %b +; CHECK: ret i32 %c } define i32 @test12b(i1 %cond, i32 %a) { - %b = ashr i32 %a, 1 ; <i32> [#uses=1] - %c = select i1 %cond, i32 %a, i32 %b ; <i32> [#uses=1] + %b = ashr i32 %a, 1 + %c = select i1 %cond, i32 %a, i32 %b ret i32 %c +; CHECK: @test12b +; CHECK: zext i1 %cond to i32 +; CHECK: %b = xor i32 +; CHECK: %c = ashr i32 %a, %b +; CHECK: ret i32 %c } define i32 @test13(i32 %a, i32 %b) { - %C = icmp eq i32 %a, %b ; <i1> [#uses=1] - %V = select i1 %C, i32 %a, i32 %b ; <i32> [#uses=1] + %C = icmp eq i32 %a, %b + %V = select i1 %C, i32 %a, i32 %b ret i32 %V +; CHECK: @test13 +; CHECK: ret i32 %b } define i32 @test13a(i32 %a, i32 %b) { - %C = icmp ne i32 %a, %b ; <i1> [#uses=1] - %V = select i1 %C, i32 %a, i32 %b ; <i32> [#uses=1] + %C = icmp ne i32 %a, %b + %V = select i1 %C, i32 %a, i32 %b ret i32 %V +; CHECK: @test13a +; CHECK: ret i32 %a } define i32 @test13b(i32 %a, i32 %b) { - %C = icmp eq i32 %a, %b ; <i1> [#uses=1] - %V = select i1 %C, i32 %b, i32 %a ; <i32> [#uses=1] + %C = icmp eq i32 %a, %b + %V = select i1 %C, i32 %b, i32 %a ret i32 %V +; CHECK: @test13b +; CHECK: ret i32 %a } define i1 @test14a(i1 %C, i32 %X) { - %V = select i1 %C, i32 %X, i32 0 ; <i32> [#uses=1] + %V = select i1 %C, i32 %X, i32 0 ; (X < 1) | !C - %R = icmp slt i32 %V, 1 ; <i1> [#uses=1] + %R = icmp slt i32 %V, 1 ret i1 %R +; CHECK: @test14a +; CHECK: icmp slt i32 %X, 1 +; CHECK: xor i1 %C, true +; CHECK: or i1 +; CHECK: ret i1 %R } define i1 @test14b(i1 %C, i32 %X) { - %V = select i1 %C, i32 0, i32 %X ; <i32> [#uses=1] + %V = select i1 %C, i32 0, i32 %X ; (X < 1) | C - %R = icmp slt i32 %V, 1 ; <i1> [#uses=1] + %R = icmp slt i32 %V, 1 ret i1 %R +; CHECK: @test14b +; CHECK: icmp slt i32 %X, 1 +; CHECK: or i1 +; CHECK: ret i1 %R } ;; Code sequence for (X & 16) ? 16 : 0 define i32 @test15a(i32 %X) { - %t1 = and i32 %X, 16 ; <i32> [#uses=1] - %t2 = icmp eq i32 %t1, 0 ; <i1> [#uses=1] - %t3 = select i1 %t2, i32 0, i32 16 ; <i32> [#uses=1] + %t1 = and i32 %X, 16 + %t2 = icmp eq i32 %t1, 0 + %t3 = select i1 %t2, i32 0, i32 16 ret i32 %t3 +; CHECK: @test15a +; CHECK: %t1 = and i32 %X, 16 +; CHECK: ret i32 %t1 } ;; Code sequence for (X & 32) ? 0 : 24 define i32 @test15b(i32 %X) { - %t1 = and i32 %X, 32 ; <i32> [#uses=1] - %t2 = icmp eq i32 %t1, 0 ; <i1> [#uses=1] - %t3 = select i1 %t2, i32 32, i32 0 ; <i32> [#uses=1] + %t1 = and i32 %X, 32 + %t2 = icmp eq i32 %t1, 0 + %t3 = select i1 %t2, i32 32, i32 0 ret i32 %t3 +; CHECK: @test15b +; CHECK: %t1 = and i32 %X, 32 +; CHECK: xor i32 %t1, 32 +; CHECK: ret i32 } ;; Alternate code sequence for (X & 16) ? 16 : 0 define i32 @test15c(i32 %X) { - %t1 = and i32 %X, 16 ; <i32> [#uses=1] - %t2 = icmp eq i32 %t1, 16 ; <i1> [#uses=1] - %t3 = select i1 %t2, i32 16, i32 0 ; <i32> [#uses=1] + %t1 = and i32 %X, 16 + %t2 = icmp eq i32 %t1, 16 + %t3 = select i1 %t2, i32 16, i32 0 ret i32 %t3 +; CHECK: @test15c +; CHECK: %t1 = and i32 %X, 16 +; CHECK: ret i32 %t1 } ;; Alternate code sequence for (X & 16) ? 16 : 0 define i32 @test15d(i32 %X) { - %t1 = and i32 %X, 16 ; <i32> [#uses=1] - %t2 = icmp ne i32 %t1, 0 ; <i1> [#uses=1] - %t3 = select i1 %t2, i32 16, i32 0 ; <i32> [#uses=1] + %t1 = and i32 %X, 16 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 16, i32 0 ret i32 %t3 +; CHECK: @test15d +; CHECK: %t1 = and i32 %X, 16 +; CHECK: ret i32 %t1 } define i32 @test16(i1 %C, i32* %P) { - %P2 = select i1 %C, i32* %P, i32* null ; <i32*> [#uses=1] - %V = load i32* %P2 ; <i32> [#uses=1] + %P2 = select i1 %C, i32* %P, i32* null + %V = load i32* %P2 ret i32 %V +; CHECK: @test16 +; CHECK-NEXT: %V = load i32* %P +; CHECK: ret i32 %V } define i1 @test17(i32* %X, i1 %C) { - %R = select i1 %C, i32* %X, i32* null ; <i32*> [#uses=1] - %RV = icmp eq i32* %R, null ; <i1> [#uses=1] + %R = select i1 %C, i32* %X, i32* null + %RV = icmp eq i32* %R, null ret i1 %RV +; CHECK: @test17 +; CHECK: icmp eq i32* %X, null +; CHECK: xor i1 %C, true +; CHECK: %RV = or i1 +; CHECK: ret i1 %RV } define i32 @test18(i32 %X, i32 %Y, i1 %C) { - %R = select i1 %C, i32 %X, i32 0 ; <i32> [#uses=1] - %V = sdiv i32 %Y, %R ; <i32> [#uses=1] + %R = select i1 %C, i32 %X, i32 0 + %V = sdiv i32 %Y, %R ret i32 %V +; CHECK: @test18 +; CHECK: %V = sdiv i32 %Y, %X +; CHECK: ret i32 %V } define i32 @test19(i32 %x) { - %tmp = icmp ugt i32 %x, 2147483647 ; <i1> [#uses=1] - %retval = select i1 %tmp, i32 -1, i32 0 ; <i32> [#uses=1] + %tmp = icmp ugt i32 %x, 2147483647 + %retval = select i1 %tmp, i32 -1, i32 0 ret i32 %retval +; CHECK: @test19 +; CHECK-NEXT: ashr i32 %x, 31 +; CHECK-NEXT: ret i32 } define i32 @test20(i32 %x) { - %tmp = icmp slt i32 %x, 0 ; <i1> [#uses=1] - %retval = select i1 %tmp, i32 -1, i32 0 ; <i32> [#uses=1] + %tmp = icmp slt i32 %x, 0 + %retval = select i1 %tmp, i32 -1, i32 0 ret i32 %retval +; CHECK: @test20 +; CHECK-NEXT: ashr i32 %x, 31 +; CHECK-NEXT: ret i32 } define i64 @test21(i32 %x) { - %tmp = icmp slt i32 %x, 0 ; <i1> [#uses=1] - %retval = select i1 %tmp, i64 -1, i64 0 ; <i64> [#uses=1] + %tmp = icmp slt i32 %x, 0 + %retval = select i1 %tmp, i64 -1, i64 0 ret i64 %retval +; CHECK: @test21 +; CHECK-NEXT: ashr i32 %x, 31 +; CHECK-NEXT: sext i32 +; CHECK-NEXT: ret i64 } define i16 @test22(i32 %x) { - %tmp = icmp slt i32 %x, 0 ; <i1> [#uses=1] - %retval = select i1 %tmp, i16 -1, i16 0 ; <i16> [#uses=1] + %tmp = icmp slt i32 %x, 0 + %retval = select i1 %tmp, i16 -1, i16 0 ret i16 %retval +; CHECK: @test22 +; CHECK-NEXT: ashr i32 %x, 31 +; CHECK-NEXT: trunc i32 +; CHECK-NEXT: ret i16 } define i1 @test23(i1 %a, i1 %b) { - %c = select i1 %a, i1 %b, i1 %a ; <i1> [#uses=1] + %c = select i1 %a, i1 %b, i1 %a ret i1 %c +; CHECK: @test23 +; CHECK-NEXT: %c = and i1 %a, %b +; CHECK-NEXT: ret i1 %c } define i1 @test24(i1 %a, i1 %b) { - %c = select i1 %a, i1 %a, i1 %b ; <i1> [#uses=1] + %c = select i1 %a, i1 %a, i1 %b ret i1 %c +; CHECK: @test24 +; CHECK-NEXT: %c = or i1 %a, %b +; CHECK-NEXT: ret i1 %c } define i32 @test25(i1 %c) { @@ -211,6 +315,9 @@ ret: %a = phi i1 [true, %jump], [false, %entry] %b = select i1 %a, i32 10, i32 20 ret i32 %b +; CHECK: @test25 +; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ] +; CHECK-NEXT: ret i32 %a } define i32 @test26(i1 %cond) { @@ -223,6 +330,9 @@ ret: %a = phi i1 [true, %jump], [%c, %entry] %b = select i1 %a, i32 10, i32 20 ret i32 %b +; CHECK: @test26 +; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ] +; CHECK-NEXT: ret i32 %a } define i32 @test27(i1 %c, i32 %A, i32 %B) { @@ -234,6 +344,9 @@ ret: %a = phi i1 [true, %jump], [false, %entry] %b = select i1 %a, i32 %A, i32 %B ret i32 %b +; CHECK: @test27 +; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] +; CHECK-NEXT: ret i32 %a } define i32 @test28(i1 %cond, i32 %A, i32 %B) { @@ -246,6 +359,9 @@ ret: %a = phi i1 [true, %jump], [false, %entry] %b = select i1 %a, i32 %A, i32 %c ret i32 %b +; CHECK: @test28 +; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] +; CHECK-NEXT: ret i32 %a } define i32 @test29(i1 %cond, i32 %A, i32 %B) { @@ -261,5 +377,64 @@ ret: next: %b = select i1 %a, i32 %A, i32 %c ret i32 %b +; CHECK: @test29 +; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] +; CHECK: ret i32 %a } + +; SMAX(SMAX(x, y), x) -> SMAX(x, y) +define i32 @test30(i32 %x, i32 %y) { + %cmp = icmp sgt i32 %x, %y + %cond = select i1 %cmp, i32 %x, i32 %y + + %cmp5 = icmp sgt i32 %cond, %x + %retval = select i1 %cmp5, i32 %cond, i32 %x + ret i32 %retval +; CHECK: @test30 +; CHECK: ret i32 %cond +} + +; UMAX(UMAX(x, y), x) -> UMAX(x, y) +define i32 @test31(i32 %x, i32 %y) { + %cmp = icmp ugt i32 %x, %y + %cond = select i1 %cmp, i32 %x, i32 %y + %cmp5 = icmp ugt i32 %cond, %x + %retval = select i1 %cmp5, i32 %cond, i32 %x + ret i32 %retval +; CHECK: @test31 +; CHECK: ret i32 %cond +} + +; SMIN(SMIN(x, y), x) -> SMIN(x, y) +define i32 @test32(i32 %x, i32 %y) { + %cmp = icmp sgt i32 %x, %y + %cond = select i1 %cmp, i32 %y, i32 %x + %cmp5 = icmp sgt i32 %cond, %x + %retval = select i1 %cmp5, i32 %x, i32 %cond + ret i32 %retval +; CHECK: @test32 +; CHECK: ret i32 %cond +} + +; MAX(MIN(x, y), x) -> x +define i32 @test33(i32 %x, i32 %y) { + %cmp = icmp sgt i32 %x, %y + %cond = select i1 %cmp, i32 %y, i32 %x + %cmp5 = icmp sgt i32 %cond, %x + %retval = select i1 %cmp5, i32 %cond, i32 %x + ret i32 %retval +; CHECK: @test33 +; CHECK: ret i32 %x +} + +; MIN(MAX(x, y), x) -> x +define i32 @test34(i32 %x, i32 %y) { + %cmp = icmp sgt i32 %x, %y + %cond = select i1 %cmp, i32 %x, i32 %y + %cmp5 = icmp sgt i32 %cond, %x + %retval = select i1 %cmp5, i32 %x, i32 %cond + ret i32 %retval +; CHECK: @test34 +; CHECK: ret i32 %x +} diff --git a/test/Transforms/LoopRotate/phi-duplicate.ll b/test/Transforms/LoopRotate/phi-duplicate.ll new file mode 100644 index 0000000..cac00f8 --- /dev/null +++ b/test/Transforms/LoopRotate/phi-duplicate.ll @@ -0,0 +1,35 @@ +; RUN: opt -S %s -loop-rotate | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0" + +; PR5837 +define void @test(i32 %N, double* %G) nounwind ssp { +entry: + br label %for.cond + +for.cond: ; preds = %for.body, %entry + %j.0 = phi i64 [ 1, %entry ], [ %inc, %for.body ] ; <i64> [#uses=5] + %cmp = icmp slt i64 %j.0, 1000 ; <i1> [#uses=1] + br i1 %cmp, label %for.body, label %for.end + +for.body: ; preds = %for.cond + %arrayidx = getelementptr inbounds double* %G, i64 %j.0 ; <double*> [#uses=1] + %tmp3 = load double* %arrayidx ; <double> [#uses=1] + %sub = sub i64 %j.0, 1 ; <i64> [#uses=1] + %arrayidx6 = getelementptr inbounds double* %G, i64 %sub ; <double*> [#uses=1] + %tmp7 = load double* %arrayidx6 ; <double> [#uses=1] + %add = fadd double %tmp3, %tmp7 ; <double> [#uses=1] + %arrayidx10 = getelementptr inbounds double* %G, i64 %j.0 ; <double*> [#uses=1] + store double %add, double* %arrayidx10 + %inc = add nsw i64 %j.0, 1 ; <i64> [#uses=1] + br label %for.cond + +for.end: ; preds = %for.cond + ret void +} +; Should only end up with one phi. +; CHECK: for.body: +; CHECK-NEXT: %j.02 = phi i64 +; CHECK-NOT phi +; CHECK: ret void + diff --git a/test/Transforms/Reassociate/basictest.ll b/test/Transforms/Reassociate/basictest.ll index eca2d63..e77d83d 100644 --- a/test/Transforms/Reassociate/basictest.ll +++ b/test/Transforms/Reassociate/basictest.ll @@ -1,10 +1,206 @@ ; With reassociation, constant folding can eliminate the 12 and -12 constants. ; -; RUN: opt < %s -reassociate -constprop -instcombine -die -S | not grep add +; RUN: opt < %s -reassociate -gvn -instcombine -S | FileCheck %s -define i32 @test(i32 %arg) { - %tmp1 = sub i32 -12, %arg ; <i32> [#uses=1] - %tmp2 = add i32 %tmp1, 12 ; <i32> [#uses=1] +define i32 @test1(i32 %arg) { + %tmp1 = sub i32 -12, %arg + %tmp2 = add i32 %tmp1, 12 ret i32 %tmp2 +; CHECK: @test1 +; CHECK-NEXT: sub i32 0, %arg +; CHECK-NEXT: ret i32 } +define i32 @test2(i32 %reg109, i32 %reg1111) { + %reg115 = add i32 %reg109, -30 ; <i32> [#uses=1] + %reg116 = add i32 %reg115, %reg1111 ; <i32> [#uses=1] + %reg117 = add i32 %reg116, 30 ; <i32> [#uses=1] + ret i32 %reg117 +; CHECK: @test2 +; CHECK-NEXT: add i32 %reg1111, %reg109 +; CHECK-NEXT: ret i32 +} + +@e = external global i32 ; <i32*> [#uses=3] +@a = external global i32 ; <i32*> [#uses=3] +@b = external global i32 ; <i32*> [#uses=3] +@c = external global i32 ; <i32*> [#uses=3] +@f = external global i32 ; <i32*> [#uses=3] + +define void @test3() { + %A = load i32* @a ; <i32> [#uses=2] + %B = load i32* @b ; <i32> [#uses=2] + %C = load i32* @c ; <i32> [#uses=2] + %t1 = add i32 %A, %B ; <i32> [#uses=1] + %t2 = add i32 %t1, %C ; <i32> [#uses=1] + %t3 = add i32 %C, %A ; <i32> [#uses=1] + %t4 = add i32 %t3, %B ; <i32> [#uses=1] + ; e = (a+b)+c; + store i32 %t2, i32* @e + ; f = (a+c)+b + store i32 %t4, i32* @f + ret void +; CHECK: @test3 +; CHECK: add i32 +; CHECK: add i32 +; CHECK-NOT: add i32 +; CHECK: ret void +} + +define void @test4() { + %A = load i32* @a ; <i32> [#uses=2] + %B = load i32* @b ; <i32> [#uses=2] + %C = load i32* @c ; <i32> [#uses=2] + %t1 = add i32 %A, %B ; <i32> [#uses=1] + %t2 = add i32 %t1, %C ; <i32> [#uses=1] + %t3 = add i32 %C, %A ; <i32> [#uses=1] + %t4 = add i32 %t3, %B ; <i32> [#uses=1] + ; e = c+(a+b) + store i32 %t2, i32* @e + ; f = (c+a)+b + store i32 %t4, i32* @f + ret void +; CHECK: @test4 +; CHECK: add i32 +; CHECK: add i32 +; CHECK-NOT: add i32 +; CHECK: ret void +} + +define void @test5() { + %A = load i32* @a ; <i32> [#uses=2] + %B = load i32* @b ; <i32> [#uses=2] + %C = load i32* @c ; <i32> [#uses=2] + %t1 = add i32 %B, %A ; <i32> [#uses=1] + %t2 = add i32 %t1, %C ; <i32> [#uses=1] + %t3 = add i32 %C, %A ; <i32> [#uses=1] + %t4 = add i32 %t3, %B ; <i32> [#uses=1] + ; e = c+(b+a) + store i32 %t2, i32* @e + ; f = (c+a)+b + store i32 %t4, i32* @f + ret void +; CHECK: @test5 +; CHECK: add i32 +; CHECK: add i32 +; CHECK-NOT: add i32 +; CHECK: ret void +} + +define i32 @test6() { + %tmp.0 = load i32* @a + %tmp.1 = load i32* @b + ; (a+b) + %tmp.2 = add i32 %tmp.0, %tmp.1 + %tmp.4 = load i32* @c + ; (a+b)+c + %tmp.5 = add i32 %tmp.2, %tmp.4 + ; (a+c) + %tmp.8 = add i32 %tmp.0, %tmp.4 + ; (a+c)+b + %tmp.11 = add i32 %tmp.8, %tmp.1 + ; X ^ X = 0 + %RV = xor i32 %tmp.5, %tmp.11 + ret i32 %RV +; CHECK: @test6 +; CHECK: ret i32 0 +} + +; This should be one add and two multiplies. +define i32 @test7(i32 %A, i32 %B, i32 %C) { + ; A*A*B + A*C*A + %aa = mul i32 %A, %A + %aab = mul i32 %aa, %B + %ac = mul i32 %A, %C + %aac = mul i32 %ac, %A + %r = add i32 %aab, %aac + ret i32 %r +; CHECK: @test7 +; CHECK-NEXT: add i32 %C, %B +; CHECK-NEXT: mul i32 +; CHECK-NEXT: mul i32 +; CHECK-NEXT: ret i32 +} + + +define i32 @test8(i32 %X, i32 %Y, i32 %Z) { + %A = sub i32 0, %X + %B = mul i32 %A, %Y + ; (-X)*Y + Z -> Z-X*Y + %C = add i32 %B, %Z + ret i32 %C +; CHECK: @test8 +; CHECK-NEXT: %A = mul i32 %Y, %X +; CHECK-NEXT: %C = sub i32 %Z, %A +; CHECK-NEXT: ret i32 %C +} + + +; PR5458 +define i32 @test9(i32 %X) { + %Y = mul i32 %X, 47 + %Z = add i32 %Y, %Y + ret i32 %Z +; CHECK: @test9 +; CHECK-NEXT: mul i32 %X, 94 +; CHECK-NEXT: ret i32 +} + +define i32 @test10(i32 %X) { + %Y = add i32 %X ,%X + %Z = add i32 %Y, %X + ret i32 %Z +; CHECK: @test10 +; CHECK-NEXT: mul i32 %X, 3 +; CHECK-NEXT: ret i32 +} + +define i32 @test11(i32 %W) { + %X = mul i32 %W, 127 + %Y = add i32 %X ,%X + %Z = add i32 %Y, %X + ret i32 %Z +; CHECK: @test11 +; CHECK-NEXT: mul i32 %W, 381 +; CHECK-NEXT: ret i32 +} + +define i32 @test12(i32 %X) { + %A = sub i32 1, %X + %B = sub i32 2, %X + %C = sub i32 3, %X + + %Y = add i32 %A ,%B + %Z = add i32 %Y, %C + ret i32 %Z +; CHECK: @test12 +; CHECK-NEXT: mul i32 %X, -3 +; CHECK-NEXT: add i32{{.*}}, 6 +; CHECK-NEXT: ret i32 +} + +define i32 @test13(i32 %X1, i32 %X2, i32 %X3) { + %A = sub i32 0, %X1 + %B = mul i32 %A, %X2 ; -X1*X2 + %C = mul i32 %X1, %X3 ; X1*X3 + %D = add i32 %B, %C ; -X1*X2 + X1*X3 -> X1*(X3-X2) + ret i32 %D +; CHECK: @test13 +; CHECK-NEXT: sub i32 %X3, %X2 +; CHECK-NEXT: mul i32 {{.*}}, %X1 +; CHECK-NEXT: ret i32 +} + +; PR5359 +define i32 @test14(i32 %X1, i32 %X2) { + %B = mul i32 %X1, 47 ; X1*47 + %C = mul i32 %X2, -47 ; X2*-47 + %D = add i32 %B, %C ; X1*47 + X2*-47 -> 47*(X1-X2) + ret i32 %D +; CHECK: @test14 +; CHECK-NEXT: sub i32 %X1, %X2 +; CHECK-NEXT: mul i32 {{.*}}, 47 +; CHECK-NEXT: ret i32 +} + + diff --git a/test/Transforms/Reassociate/basictest2.ll b/test/Transforms/Reassociate/basictest2.ll deleted file mode 100644 index ba1ff9e..0000000 --- a/test/Transforms/Reassociate/basictest2.ll +++ /dev/null @@ -1,11 +0,0 @@ -; With reassociation, constant folding can eliminate the +/- 30 constants. -; -; RUN: opt < %s -reassociate -constprop -instcombine -die -S | not grep 30 - -define i32 @test(i32 %reg109, i32 %reg1111) { - %reg115 = add i32 %reg109, -30 ; <i32> [#uses=1] - %reg116 = add i32 %reg115, %reg1111 ; <i32> [#uses=1] - %reg117 = add i32 %reg116, 30 ; <i32> [#uses=1] - ret i32 %reg117 -} - diff --git a/test/Transforms/Reassociate/basictest3.ll b/test/Transforms/Reassociate/basictest3.ll deleted file mode 100644 index 92285fb..0000000 --- a/test/Transforms/Reassociate/basictest3.ll +++ /dev/null @@ -1,54 +0,0 @@ -; RUN: opt < %s -reassociate -gvn -S | grep add | count 6 -; Each of these functions should turn into two adds each. - -@e = external global i32 ; <i32*> [#uses=3] -@a = external global i32 ; <i32*> [#uses=3] -@b = external global i32 ; <i32*> [#uses=3] -@c = external global i32 ; <i32*> [#uses=3] -@f = external global i32 ; <i32*> [#uses=3] - -define void @test1() { - %A = load i32* @a ; <i32> [#uses=2] - %B = load i32* @b ; <i32> [#uses=2] - %C = load i32* @c ; <i32> [#uses=2] - %t1 = add i32 %A, %B ; <i32> [#uses=1] - %t2 = add i32 %t1, %C ; <i32> [#uses=1] - %t3 = add i32 %C, %A ; <i32> [#uses=1] - %t4 = add i32 %t3, %B ; <i32> [#uses=1] - ; e = (a+b)+c; - store i32 %t2, i32* @e - ; f = (a+c)+b - store i32 %t4, i32* @f - ret void -} - -define void @test2() { - %A = load i32* @a ; <i32> [#uses=2] - %B = load i32* @b ; <i32> [#uses=2] - %C = load i32* @c ; <i32> [#uses=2] - %t1 = add i32 %A, %B ; <i32> [#uses=1] - %t2 = add i32 %t1, %C ; <i32> [#uses=1] - %t3 = add i32 %C, %A ; <i32> [#uses=1] - %t4 = add i32 %t3, %B ; <i32> [#uses=1] - ; e = c+(a+b) - store i32 %t2, i32* @e - ; f = (c+a)+b - store i32 %t4, i32* @f - ret void -} - -define void @test3() { - %A = load i32* @a ; <i32> [#uses=2] - %B = load i32* @b ; <i32> [#uses=2] - %C = load i32* @c ; <i32> [#uses=2] - %t1 = add i32 %B, %A ; <i32> [#uses=1] - %t2 = add i32 %t1, %C ; <i32> [#uses=1] - %t3 = add i32 %C, %A ; <i32> [#uses=1] - %t4 = add i32 %t3, %B ; <i32> [#uses=1] - ; e = c+(b+a) - store i32 %t2, i32* @e - ; f = (c+a)+b - store i32 %t4, i32* @f - ret void -} - diff --git a/test/Transforms/Reassociate/basictest4.ll b/test/Transforms/Reassociate/basictest4.ll deleted file mode 100644 index 88dbdf7..0000000 --- a/test/Transforms/Reassociate/basictest4.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: opt < %s -reassociate -gvn -instcombine -S | not grep add - -@a = weak global i32 0 ; <i32*> [#uses=1] -@b = weak global i32 0 ; <i32*> [#uses=1] -@c = weak global i32 0 ; <i32*> [#uses=1] -@d = weak global i32 0 ; <i32*> [#uses=0] - -define i32 @foo() { - %tmp.0 = load i32* @a ; <i32> [#uses=2] - %tmp.1 = load i32* @b ; <i32> [#uses=2] - ; (a+b) - %tmp.2 = add i32 %tmp.0, %tmp.1 ; <i32> [#uses=1] - %tmp.4 = load i32* @c ; <i32> [#uses=2] - ; (a+b)+c - %tmp.5 = add i32 %tmp.2, %tmp.4 ; <i32> [#uses=1] - ; (a+c) - %tmp.8 = add i32 %tmp.0, %tmp.4 ; <i32> [#uses=1] - ; (a+c)+b - %tmp.11 = add i32 %tmp.8, %tmp.1 ; <i32> [#uses=1] - ; X ^ X = 0 - %RV = xor i32 %tmp.5, %tmp.11 ; <i32> [#uses=1] - ret i32 %RV -} diff --git a/test/Transforms/Reassociate/mul-factor3.ll b/test/Transforms/Reassociate/mul-factor3.ll deleted file mode 100644 index 4d05176..0000000 --- a/test/Transforms/Reassociate/mul-factor3.ll +++ /dev/null @@ -1,15 +0,0 @@ -; This should be one add and two multiplies. - -; RUN: opt < %s -reassociate -instcombine -S > %t -; RUN: grep mul %t | count 2 -; RUN: grep add %t | count 1 - -define i32 @test(i32 %A, i32 %B, i32 %C) { - %aa = mul i32 %A, %A ; <i32> [#uses=1] - %aab = mul i32 %aa, %B ; <i32> [#uses=1] - %ac = mul i32 %A, %C ; <i32> [#uses=1] - %aac = mul i32 %ac, %A ; <i32> [#uses=1] - %r = add i32 %aab, %aac ; <i32> [#uses=1] - ret i32 %r -} - diff --git a/test/Transforms/Reassociate/mul-neg-add.ll b/test/Transforms/Reassociate/mul-neg-add.ll deleted file mode 100644 index dd6ddd9..0000000 --- a/test/Transforms/Reassociate/mul-neg-add.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -reassociate -instcombine -S |\ -; RUN: not grep {sub i32 0} - -define i32 @test(i32 %X, i32 %Y, i32 %Z) { - %A = sub i32 0, %X ; <i32> [#uses=1] - %B = mul i32 %A, %Y ; <i32> [#uses=1] - ; (-X)*Y + Z -> Z-X*Y - %C = add i32 %B, %Z ; <i32> [#uses=1] - ret i32 %C -} diff --git a/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll b/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll new file mode 100644 index 0000000..71f66d6 --- /dev/null +++ b/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll @@ -0,0 +1,89 @@ +; RUN: opt < %s -scalarrepl -S | FileCheck %s +; Radar 7441282 + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> } +%struct.int16x8_t = type { <8 x i16> } +%struct.int16x8x2_t = type { [2 x %struct.int16x8_t] } +%union..0anon = type { %struct.int16x8x2_t } + +define arm_apcscc void @test(<8 x i16> %tmp.0, %struct.int16x8x2_t* %dst) nounwind { +; CHECK: @test +; CHECK-NOT: alloca +; CHECK: "alloca point" +entry: + %tmp_addr = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=3] + %dst_addr = alloca %struct.int16x8x2_t* ; <%struct.int16x8x2_t**> [#uses=2] + %__rv = alloca %union..0anon ; <%union..0anon*> [#uses=2] + %__bx = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=2] + %__ax = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=2] + %tmp2 = alloca %struct.int16x8x2_t ; <%struct.int16x8x2_t*> [#uses=2] + %0 = alloca %struct.int16x8x2_t ; <%struct.int16x8x2_t*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %1 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + store <8 x i16> %tmp.0, <8 x i16>* %1 + store %struct.int16x8x2_t* %dst, %struct.int16x8x2_t** %dst_addr + %2 = getelementptr inbounds %struct.int16x8_t* %__ax, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %3 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %4 = load <8 x i16>* %3, align 16 ; <<8 x i16>> [#uses=1] + store <8 x i16> %4, <8 x i16>* %2, align 16 + %5 = getelementptr inbounds %struct.int16x8_t* %__bx, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %6 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %7 = load <8 x i16>* %6, align 16 ; <<8 x i16>> [#uses=1] + store <8 x i16> %7, <8 x i16>* %5, align 16 + %8 = getelementptr inbounds %struct.int16x8_t* %__ax, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %9 = load <8 x i16>* %8, align 16 ; <<8 x i16>> [#uses=2] + %10 = getelementptr inbounds %struct.int16x8_t* %__bx, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + %11 = load <8 x i16>* %10, align 16 ; <<8 x i16>> [#uses=2] + %12 = getelementptr inbounds %union..0anon* %__rv, i32 0, i32 0 ; <%struct.int16x8x2_t*> [#uses=1] + %13 = bitcast %struct.int16x8x2_t* %12 to %struct.__neon_int16x8x2_t* ; <%struct.__neon_int16x8x2_t*> [#uses=2] + %14 = shufflevector <8 x i16> %9, <8 x i16> %11, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> ; <<8 x i16>> [#uses=1] + %15 = getelementptr inbounds %struct.__neon_int16x8x2_t* %13, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] + store <8 x i16> %14, <8 x i16>* %15 + %16 = shufflevector <8 x i16> %9, <8 x i16> %11, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> ; <<8 x i16>> [#uses=1] + %17 = getelementptr inbounds %struct.__neon_int16x8x2_t* %13, i32 0, i32 1 ; <<8 x i16>*> [#uses=1] + store <8 x i16> %16, <8 x i16>* %17 + %18 = getelementptr inbounds %union..0anon* %__rv, i32 0, i32 0 ; <%struct.int16x8x2_t*> [#uses=1] + %19 = bitcast %struct.int16x8x2_t* %0 to i8* ; <i8*> [#uses=1] + %20 = bitcast %struct.int16x8x2_t* %18 to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32(i8* %19, i8* %20, i32 32, i32 16) + %tmp21 = bitcast %struct.int16x8x2_t* %tmp2 to i8* ; <i8*> [#uses=1] + %21 = bitcast %struct.int16x8x2_t* %0 to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32(i8* %tmp21, i8* %21, i32 32, i32 16) + %22 = load %struct.int16x8x2_t** %dst_addr, align 4 ; <%struct.int16x8x2_t*> [#uses=1] + %23 = bitcast %struct.int16x8x2_t* %22 to i8* ; <i8*> [#uses=1] + %tmp22 = bitcast %struct.int16x8x2_t* %tmp2 to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32(i8* %23, i8* %tmp22, i32 32, i32 16) + br label %return + +; CHECK: store <8 x i16> +; CHECK: store <8 x i16> + +return: ; preds = %entry + ret void +} + +; Radar 7466574 +%struct._NSRange = type { i64 } + +define arm_apcscc void @test_memcpy_self() nounwind { +; CHECK: @test_memcpy_self +; CHECK-NOT: alloca +; CHECK: br i1 +entry: + %range = alloca %struct._NSRange ; <%struct._NSRange*> [#uses=2] + br i1 undef, label %cond.true, label %cond.false + +cond.true: ; preds = %entry + %tmp3 = bitcast %struct._NSRange* %range to i8* ; <i8*> [#uses=1] + %tmp4 = bitcast %struct._NSRange* %range to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32(i8* %tmp3, i8* %tmp4, i32 8, i32 8) + ret void + +cond.false: ; preds = %entry + ret void +} + +declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind diff --git a/test/Transforms/ScalarRepl/nonzero-first-index.ll b/test/Transforms/ScalarRepl/nonzero-first-index.ll new file mode 100644 index 0000000..60f414b --- /dev/null +++ b/test/Transforms/ScalarRepl/nonzero-first-index.ll @@ -0,0 +1,53 @@ +; RUN: opt < %s -scalarrepl -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +%nested = type { i32, [4 x i32] } + +; Check that a GEP with a non-zero first index does not prevent SROA as long +; as the resulting offset corresponds to an element in the alloca. +define i32 @test1() { +; CHECK: @test1 +; CHECK-NOT: = i160 +; CHECK: ret i32 undef + %A = alloca %nested + %B = getelementptr %nested* %A, i32 0, i32 1, i32 0 + %C = getelementptr i32* %B, i32 2 + %D = load i32* %C + ret i32 %D +} + +; But, if the offset is out of range, then it should not be transformed. +define i32 @test2() { +; CHECK: @test2 +; CHECK: i160 + %A = alloca %nested + %B = getelementptr %nested* %A, i32 0, i32 1, i32 0 + %C = getelementptr i32* %B, i32 4 + %D = load i32* %C + ret i32 %D +} + +; Try it with a bitcast and single GEP.... +define i32 @test3() { +; CHECK: @test3 +; CHECK-NOT: = i160 +; CHECK: ret i32 undef + %A = alloca %nested + %B = bitcast %nested* %A to i32* + %C = getelementptr i32* %B, i32 2 + %D = load i32* %C + ret i32 %D +} + +; ...and again make sure that out-of-range accesses are not transformed. +define i32 @test4() { +; CHECK: @test4 +; CHECK: i160 + %A = alloca %nested + %B = bitcast %nested* %A to i32* + %C = getelementptr i32* %B, i32 -1 + %D = load i32* %C + ret i32 %D +} diff --git a/test/Transforms/SimplifyCFG/basictest.ll b/test/Transforms/SimplifyCFG/basictest.ll index a829e03..83a9fa7 100644 --- a/test/Transforms/SimplifyCFG/basictest.ll +++ b/test/Transforms/SimplifyCFG/basictest.ll @@ -1,30 +1,59 @@ -; Test CFG simplify removal of branch instructions... +; Test CFG simplify removal of branch instructions. ; -; RUN: opt < %s -simplifycfg -S | not grep br +; RUN: opt < %s -simplifycfg -S | FileCheck %s define void @test1() { br label %BB1 BB1: ; preds = %0 ret void +; CHECK: @test1 +; CHECK-NEXT: ret void } define void @test2() { ret void BB1: ; No predecessors! ret void +; CHECK: @test2 +; CHECK-NEXT: ret void +; CHECK-NEXT: } } define void @test3(i1 %T) { br i1 %T, label %BB1, label %BB1 BB1: ; preds = %0, %0 ret void +; CHECK: @test3 +; CHECK-NEXT: ret void } define void @test4() { -entry: - br label %return + br label %return return: - ret void + ret void +; CHECK: @test4 +; CHECK-NEXT: ret void } @test4g = global i8* blockaddress(@test4, %return) + + +; PR5795 +define void @test5(i32 %A) { + switch i32 %A, label %return [ + i32 2, label %bb + i32 10, label %bb1 + ] + +bb: ; preds = %entry + ret void + +bb1: ; preds = %entry + ret void + +return: ; preds = %entry + ret void +; CHECK: @test5 +; CHECK-NEXT: bb: +; CHECK-NEXT: ret void +} diff --git a/test/Transforms/SimplifyCFG/duplicate-phis.ll b/test/Transforms/SimplifyCFG/duplicate-phis.ll index a1e5113..5129f9fb 100644 --- a/test/Transforms/SimplifyCFG/duplicate-phis.ll +++ b/test/Transforms/SimplifyCFG/duplicate-phis.ll @@ -6,7 +6,7 @@ define i32 @foo(i1 %t) { entry: call void @bar() - br i1 %t, label %true, label %false, + br i1 %t, label %true, label %false true: call void @bar() br label %false diff --git a/test/Transforms/SimplifyLibCalls/StrStr.ll b/test/Transforms/SimplifyLibCalls/StrStr.ll new file mode 100644 index 0000000..2cac2d4 --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/StrStr.ll @@ -0,0 +1,48 @@ +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s +; PR5783 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-darwin9.0" + +@.str = private constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@.str1 = private constant [2 x i8] c"a\00" ; <[2 x i8]*> [#uses=1] +@.str2 = private constant [6 x i8] c"abcde\00" ; <[6 x i8]*> [#uses=1] +@.str3 = private constant [4 x i8] c"bcd\00" ; <[4 x i8]*> [#uses=1] + +define i8* @test1(i8* %P) nounwind readonly { +entry: + %call = tail call i8* @strstr(i8* %P, i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0)) nounwind ; <i8*> [#uses=1] + ret i8* %call +; strstr(P, "") -> P +; CHECK: @test1 +; CHECK: ret i8* %P +} + +declare i8* @strstr(i8*, i8* nocapture) nounwind readonly + +define i8* @test2(i8* %P) nounwind readonly { +entry: + %call = tail call i8* @strstr(i8* %P, i8* getelementptr inbounds ([2 x i8]* @.str1, i32 0, i32 0)) nounwind ; <i8*> [#uses=1] + ret i8* %call +; strstr(P, "a") -> strchr(P, 'a') +; CHECK: @test2 +; CHECK: @strchr(i8* %P, i32 97) +} + +define i8* @test3(i8* nocapture %P) nounwind readonly { +entry: + %call = tail call i8* @strstr(i8* getelementptr inbounds ([6 x i8]* @.str2, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8]* @.str3, i32 0, i32 0)) nounwind ; <i8*> [#uses=1] + ret i8* %call +; strstr("abcde", "bcd") -> "abcde"+1 +; CHECK: @test3 +; CHECK: getelementptr inbounds ([6 x i8]* @.str2, i32 0, i64 1) +} + +define i8* @test4(i8* %P) nounwind readonly { +entry: + %call = tail call i8* @strstr(i8* %P, i8* %P) nounwind ; <i8*> [#uses=1] + ret i8* %call +; strstr(P, P) -> P +; CHECK: @test4 +; CHECK: ret i8* %P +} diff --git a/test/Transforms/SimplifyLibCalls/memcmp.ll b/test/Transforms/SimplifyLibCalls/memcmp.ll index ed7bcac..640d232 100644 --- a/test/Transforms/SimplifyLibCalls/memcmp.ll +++ b/test/Transforms/SimplifyLibCalls/memcmp.ll @@ -14,9 +14,6 @@ define void @test(i8* %P, i8* %Q, i32 %N, i32* %IP, i1* %BP) { volatile store i32 %B, i32* %IP %C = call i32 @memcmp( i8* %P, i8* %Q, i32 1 ) ; <i32> [#uses=1] volatile store i32 %C, i32* %IP - %D = call i32 @memcmp( i8* %P, i8* %Q, i32 2 ) ; <i32> [#uses=1] - %E = icmp eq i32 %D, 0 ; <i1> [#uses=1] - volatile store i1 %E, i1* %BP %F = call i32 @memcmp(i8* getelementptr ([4 x i8]* @hel, i32 0, i32 0), i8* getelementptr ([8 x i8]* @hello_u, i32 0, i32 0), i32 3) |
