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| author | rdivacky <rdivacky@FreeBSD.org> | 2009-11-04 14:58:56 +0000 |
|---|---|---|
| committer | rdivacky <rdivacky@FreeBSD.org> | 2009-11-04 14:58:56 +0000 |
| commit | 7ff99155c39edd73ebf1c6adfa023b1048fee9a4 (patch) | |
| tree | b4dc751bcee540346911aa4115729eff2f991657 /test | |
| parent | d1f06de484602e72707476a6152974847bac1570 (diff) | |
| download | FreeBSD-src-7ff99155c39edd73ebf1c6adfa023b1048fee9a4.zip FreeBSD-src-7ff99155c39edd73ebf1c6adfa023b1048fee9a4.tar.gz | |
Update LLVM to r86025.
Diffstat (limited to 'test')
168 files changed, 2513 insertions, 344 deletions
diff --git a/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll index 5d08312..49327ac 100644 --- a/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll +++ b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -aa-eval -disable-output |& grep {2 no alias respon} ; TEST that A[1][0] may alias A[0][i]. +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define void @test(i32 %N) { entry: diff --git a/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll index 5ea26e7..6475471 100644 --- a/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll +++ b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll @@ -1,4 +1,5 @@ ; RUN: opt -gvn -instcombine -S < %s | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) diff --git a/test/Analysis/BasicAA/featuretest.ll b/test/Analysis/BasicAA/featuretest.ll index 737ee45..50dc886 100644 --- a/test/Analysis/BasicAA/featuretest.ll +++ b/test/Analysis/BasicAA/featuretest.ll @@ -2,6 +2,7 @@ ; determine, as noted in the comments. ; RUN: opt < %s -basicaa -gvn -instcombine -dce -S | not grep REMOVE +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @Global = external global { i32 } diff --git a/test/Analysis/BasicAA/global-size.ll b/test/Analysis/BasicAA/global-size.ll index 0a643d4..b9cbbcc 100644 --- a/test/Analysis/BasicAA/global-size.ll +++ b/test/Analysis/BasicAA/global-size.ll @@ -2,6 +2,7 @@ ; the global. ; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep load +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @B = global i16 8 ; <i16*> [#uses=2] diff --git a/test/Analysis/BasicAA/modref.ll b/test/Analysis/BasicAA/modref.ll index 69b60d7..02db861 100644 --- a/test/Analysis/BasicAA/modref.ll +++ b/test/Analysis/BasicAA/modref.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -basicaa -gvn -dse -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" declare void @llvm.memset.i32(i8*, i8, i32, i32) declare void @llvm.memset.i8(i8*, i8, i8, i32) @@ -88,4 +89,4 @@ define void @test3a(i8* %P, i8 %X) { call void @llvm.lifetime.end(i64 10, i8* %P) ret void ; CHECK: ret void -}
\ No newline at end of file +} diff --git a/test/Analysis/BasicAA/phi-and-select.ll b/test/Analysis/BasicAA/phi-and-select.ll new file mode 100644 index 0000000..c69e824 --- /dev/null +++ b/test/Analysis/BasicAA/phi-and-select.ll @@ -0,0 +1,73 @@ +; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \ +; RUN: |& grep {NoAlias: double\\* \[%\]a, double\\* \[%\]b\$} | count 4 + +; BasicAA should detect NoAliases in PHIs and Selects. + +; Two PHIs in the same block. +define void @foo(i1 %m, double* noalias %x, double* noalias %y) { +entry: + br i1 %m, label %true, label %false + +true: + br label %exit + +false: + br label %exit + +exit: + %a = phi double* [ %x, %true ], [ %y, %false ] + %b = phi double* [ %x, %false ], [ %y, %true ] + volatile store double 0.0, double* %a + volatile store double 1.0, double* %b + ret void +} + +; Two selects with the same condition. +define void @bar(i1 %m, double* noalias %x, double* noalias %y) { +entry: + %a = select i1 %m, double* %x, double* %y + %b = select i1 %m, double* %y, double* %x + volatile store double 0.000000e+00, double* %a + volatile store double 1.000000e+00, double* %b + ret void +} + +; Two PHIs with disjoint sets of inputs. +define void @qux(i1 %m, double* noalias %x, double* noalias %y, + i1 %n, double* noalias %v, double* noalias %w) { +entry: + br i1 %m, label %true, label %false + +true: + br label %exit + +false: + br label %exit + +exit: + %a = phi double* [ %x, %true ], [ %y, %false ] + br i1 %n, label %ntrue, label %nfalse + +ntrue: + br label %nexit + +nfalse: + br label %nexit + +nexit: + %b = phi double* [ %v, %ntrue ], [ %w, %nfalse ] + volatile store double 0.0, double* %a + volatile store double 1.0, double* %b + ret void +} + +; Two selects with disjoint sets of arms. +define void @fin(i1 %m, double* noalias %x, double* noalias %y, + i1 %n, double* noalias %v, double* noalias %w) { +entry: + %a = select i1 %m, double* %x, double* %y + %b = select i1 %n, double* %v, double* %w + volatile store double 0.000000e+00, double* %a + volatile store double 1.000000e+00, double* %b + ret void +} diff --git a/test/Analysis/BasicAA/store-promote.ll b/test/Analysis/BasicAA/store-promote.ll index d8e7c75..33d0f3a 100644 --- a/test/Analysis/BasicAA/store-promote.ll +++ b/test/Analysis/BasicAA/store-promote.ll @@ -3,6 +3,7 @@ ; two pointers, then the load should be hoisted, and the store sunk. ; RUN: opt < %s -basicaa -licm -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @A = global i32 7 ; <i32*> [#uses=3] @B = global i32 8 ; <i32*> [#uses=2] diff --git a/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll b/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll index 617c23f..9355aee 100644 --- a/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll +++ b/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll @@ -2,7 +2,7 @@ ; not a child of the loopentry.6 loop. ; ; RUN: opt < %s -analyze -loops | \ -; RUN: grep {^ Loop at depth 4 containing: %loopentry.7<header><latch><exit>} +; RUN: grep {^ Loop at depth 4 containing: %loopentry.7<header><latch><exiting>} define void @getAndMoveToFrontDecode() { br label %endif.2 diff --git a/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll b/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll index 2b3c982..27fe714 100644 --- a/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll +++ b/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -scalar-evolution -disable-output | grep -e {--> %b} +; RUN: opt < %s -analyze -scalar-evolution -disable-output | FileCheck %s ; PR1810 define void @fun() { @@ -16,3 +16,6 @@ body: exit: ret void } + +; CHECK: --> %b + diff --git a/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll b/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll index 97d0640..37b5b94 100644 --- a/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll +++ b/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll @@ -1,6 +1,5 @@ ; RUN: opt < %s -analyze -scalar-evolution -disable-output \ -; RUN: -scalar-evolution-max-iterations=0 | \ -; RUN: grep -F "backedge-taken count is (-1 + (-1 * %j))" +; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s ; PR2607 define i32 @_Z1aj(i32 %j) nounwind { @@ -25,3 +24,5 @@ return: ; preds = %return.loopexit, %entry ret i32 %i.0.lcssa } +; CHECK: backedge-taken count is (-1 + (-1 * %j)) + diff --git a/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll b/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll index 7f4de91..d54b3b4 100644 --- a/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll +++ b/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll @@ -1,6 +1,5 @@ ; RUN: opt < %s -analyze -scalar-evolution -disable-output \ -; RUN: -scalar-evolution-max-iterations=0 | \ -; RUN: grep -F "backedge-taken count is (-2147483632 + ((-1 + (-1 * %x)) smax (-1 + (-1 * %y))))" +; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s ; PR2607 define i32 @b(i32 %x, i32 %y) nounwind { @@ -22,3 +21,6 @@ afterfor: ; preds = %forinc, %entry %j.0.lcssa = phi i32 [ -2147483632, %entry ], [ %dec, %forinc ] ret i32 %j.0.lcssa } + +; CHECK: backedge-taken count is (-2147483632 + ((-1 + (-1 * %x)) smax (-1 + (-1 * %y)))) + diff --git a/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll b/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll index fa09895..06200ae 100644 --- a/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll +++ b/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -analyze -scalar-evolution -disable-output \ -; RUN: -scalar-evolution-max-iterations=0 | grep -F "Exits: 20028" +; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s ; PR2621 define i32 @a() nounwind { @@ -23,3 +23,5 @@ bb2: ret i32 %4 } +; CHECK: Exits: 20028 + diff --git a/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll b/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll index 5a28117..f3c703a 100644 --- a/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll +++ b/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -analyze -scalar-evolution -disable-output \ -; RUN: -scalar-evolution-max-iterations=0 | grep -F "Exits: -19168" +; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s ; PR2621 define i32 @a() nounwind { @@ -54,3 +54,5 @@ bb2: ; preds = %bb1 ret i32 %19 } +; CHECK: Exits: -19168 + diff --git a/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll b/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll index 6ed26148..e81530e 100644 --- a/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll +++ b/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -analyze -scalar-evolution -disable-output | grep {count is 2} ; PR3171 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" %struct.Foo = type { i32 } %struct.NonPod = type { [2 x %struct.Foo] } diff --git a/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll b/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll new file mode 100644 index 0000000..465368b --- /dev/null +++ b/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll @@ -0,0 +1,63 @@ +; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 -enable-unsafe-fp-math < %s +; PR5367 + +define arm_aapcs_vfpcc void @_Z27Benchmark_SceDualQuaternionPvm(i8* nocapture %pBuffer, i32 %numItems) nounwind { +entry: + br i1 undef, label %return, label %bb + +bb: ; preds = %bb, %entry + %0 = load float* undef, align 4 ; <float> [#uses=1] + %1 = load float* null, align 4 ; <float> [#uses=1] + %2 = insertelement <4 x float> undef, float undef, i32 1 ; <<4 x float>> [#uses=1] + %3 = insertelement <4 x float> %2, float %1, i32 2 ; <<4 x float>> [#uses=2] + %4 = insertelement <4 x float> undef, float %0, i32 2 ; <<4 x float>> [#uses=1] + %5 = insertelement <4 x float> %4, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=4] + %6 = fsub <4 x float> zeroinitializer, %3 ; <<4 x float>> [#uses=1] + %7 = shufflevector <4 x float> %6, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=2] + %8 = shufflevector <4 x float> %5, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1] + %9 = shufflevector <2 x float> %8, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=2] + %10 = fmul <4 x float> %7, %9 ; <<4 x float>> [#uses=1] + %11 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %12 = shufflevector <4 x float> %5, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=2] + %13 = shufflevector <2 x float> %12, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %14 = fmul <4 x float> %11, %13 ; <<4 x float>> [#uses=1] + %15 = fadd <4 x float> %10, %14 ; <<4 x float>> [#uses=1] + %16 = shufflevector <2 x float> %12, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1] + %17 = fadd <4 x float> %15, zeroinitializer ; <<4 x float>> [#uses=1] + %18 = shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef> ; <<4 x float>> [#uses=1] + %19 = fmul <4 x float> %7, %16 ; <<4 x float>> [#uses=1] + %20 = fadd <4 x float> %19, zeroinitializer ; <<4 x float>> [#uses=1] + %21 = shufflevector <4 x float> %3, <4 x float> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 undef> ; <<4 x float>> [#uses=1] + %22 = shufflevector <4 x float> %21, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %23 = fmul <4 x float> %22, %9 ; <<4 x float>> [#uses=1] + %24 = fadd <4 x float> %20, %23 ; <<4 x float>> [#uses=1] + %25 = shufflevector <4 x float> %18, <4 x float> %24, <4 x i32> <i32 0, i32 1, i32 6, i32 undef> ; <<4 x float>> [#uses=1] + %26 = shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 7> ; <<4 x float>> [#uses=1] + %27 = fmul <4 x float> %26, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1] + %28 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %5 ; <<4 x float>> [#uses=1] + %29 = tail call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1] + %30 = fmul <4 x float> zeroinitializer, %29 ; <<4 x float>> [#uses=1] + %31 = fmul <4 x float> %30, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> ; <<4 x float>> [#uses=1] + %32 = shufflevector <4 x float> %27, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %33 = shufflevector <4 x float> %28, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1] + %34 = shufflevector <2 x float> %33, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1] + %35 = fmul <4 x float> %32, %34 ; <<4 x float>> [#uses=1] + %36 = fadd <4 x float> %35, zeroinitializer ; <<4 x float>> [#uses=1] + %37 = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> ; <<4 x float>> [#uses=1] + %38 = shufflevector <4 x float> %37, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %39 = fmul <4 x float> zeroinitializer, %38 ; <<4 x float>> [#uses=1] + %40 = fadd <4 x float> %36, %39 ; <<4 x float>> [#uses=1] + %41 = fadd <4 x float> %40, zeroinitializer ; <<4 x float>> [#uses=1] + %42 = shufflevector <4 x float> undef, <4 x float> %41, <4 x i32> <i32 0, i32 1, i32 6, i32 3> ; <<4 x float>> [#uses=1] + %43 = fmul <4 x float> %42, %31 ; <<4 x float>> [#uses=1] + store float undef, float* undef, align 4 + store float 0.000000e+00, float* null, align 4 + %44 = extractelement <4 x float> %43, i32 1 ; <float> [#uses=1] + store float %44, float* undef, align 4 + br i1 undef, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} + +declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone diff --git a/test/CodeGen/ARM/2009-10-27-double-align.ll b/test/CodeGen/ARM/2009-10-27-double-align.ll new file mode 100644 index 0000000..a4e7685 --- /dev/null +++ b/test/CodeGen/ARM/2009-10-27-double-align.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s + +@.str = private constant [1 x i8] zeroinitializer, align 1 + +define arm_aapcscc void @g() { +entry: +;CHECK: [sp, #+8] +;CHECK: [sp, #+12] +;CHECK: [sp] + tail call arm_aapcscc void (i8*, ...)* @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00) + ret void +} + +declare arm_aapcscc void @f(i8*, ...) diff --git a/test/CodeGen/ARM/2009-10-30.ll b/test/CodeGen/ARM/2009-10-30.ll new file mode 100644 index 0000000..8256386 --- /dev/null +++ b/test/CodeGen/ARM/2009-10-30.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s +; This test checks that the address of the varg arguments is correctly +; computed when there are 5 or more regular arguments. + +define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) { +entry: +;CHECK: sub sp, sp, #4 +;CHECK: add r0, sp, #8 +;CHECK: str r0, [sp], #+4 +;CHECK: bx lr + %ap = alloca i8*, align 4 + %ap1 = bitcast i8** %ap to i8* + call void @llvm.va_start(i8* %ap1) + ret void +} + +declare void @llvm.va_start(i8*) nounwind diff --git a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll new file mode 100644 index 0000000..c260b97 --- /dev/null +++ b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll @@ -0,0 +1,37 @@ +; RUN: llc -mcpu=cortex-a8 < %s | grep vmov | count 1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "armv7-eabi" + +%foo = type { <4 x float> } + +define arm_aapcs_vfpcc void @bar(%foo* noalias sret %agg.result, <4 x float> %quat.0) nounwind { +entry: + %quat_addr = alloca %foo, align 16 ; <%foo*> [#uses=2] + %0 = getelementptr inbounds %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1] + store <4 x float> %quat.0, <4 x float>* %0 + %1 = call arm_aapcs_vfpcc <4 x float> @quux(%foo* %quat_addr) nounwind ; <<4 x float>> [#uses=3] + %2 = fmul <4 x float> %1, %1 ; <<4 x float>> [#uses=2] + %3 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1] + %4 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1] + %5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2] + %6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2] + %7 = shufflevector <2 x float> %6, <2 x float> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=2] + %8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3] + %9 = fmul <4 x float> %8, %8 ; <<4 x float>> [#uses=1] + %10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1] + %11 = fmul <4 x float> %10, %8 ; <<4 x float>> [#uses=1] + %12 = fmul <4 x float> %11, %1 ; <<4 x float>> [#uses=1] + %13 = call arm_aapcs_vfpcc %foo* @baz(%foo* %agg.result, <4 x float> %12) nounwind ; <%foo*> [#uses=0] + ret void +} + +declare arm_aapcs_vfpcc %foo* @baz(%foo*, <4 x float>) nounwind + +declare arm_aapcs_vfpcc <4 x float> @quux(%foo* nocapture) nounwind readonly + +declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone + +declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone + +declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone diff --git a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll new file mode 100644 index 0000000..f2288c3 --- /dev/null +++ b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll @@ -0,0 +1,20 @@ +; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.32 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "armv7-eabi" + +define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind { +entry: + br i1 undef, label %return, label %bb + +bb: ; preds = %bb, %entry + %0 = load float* undef, align 4 ; <float> [#uses=1] + %1 = insertelement <4 x float> undef, float %0, i32 2 ; <<4 x float>> [#uses=1] + %2 = insertelement <4 x float> %1, float undef, i32 3 ; <<4 x float>> [#uses=1] + %3 = fmul <4 x float> undef, %2 ; <<4 x float>> [#uses=1] + %4 = extractelement <4 x float> %3, i32 1 ; <float> [#uses=1] + store float %4, float* undef, align 4 + br i1 undef, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} diff --git a/test/CodeGen/ARM/alloca.ll b/test/CodeGen/ARM/alloca.ll index 15cf677..82a8c98 100644 --- a/test/CodeGen/ARM/alloca.ll +++ b/test/CodeGen/ARM/alloca.ll @@ -1,13 +1,12 @@ -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \ -; RUN: grep {mov r11, sp} -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \ -; RUN: grep {mov sp, r11} +; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s define void @f(i32 %a) { entry: +; CHECK: mov r11, sp %tmp = alloca i8, i32 %a ; <i8*> [#uses=1] call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 ) ret void +; CHECK: mov sp, r11 } declare void @g(i8*, i32, i32, i32, i32) diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll index ad5b2d6..cc71839 100644 --- a/test/CodeGen/ARM/arguments.ll +++ b/test/CodeGen/ARM/arguments.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -mtriple=arm-linux-gnueabi | \ -; RUN: grep {mov r0, r2} | count 1 -; RUN: llc < %s -mtriple=arm-apple-darwin | \ -; RUN: grep {mov r0, r1} | count 1 +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN define i32 @f(i32 %a, i64 %b) { +; ELF: mov r0, r2 +; DARWIN: mov r0, r1 %tmp = call i32 @g(i64 %b) ret i32 %tmp } diff --git a/test/CodeGen/ARM/arguments_f64_backfill.ll b/test/CodeGen/ARM/arguments_f64_backfill.ll index 690f488..d8019a0 100644 --- a/test/CodeGen/ARM/arguments_f64_backfill.ll +++ b/test/CodeGen/ARM/arguments_f64_backfill.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | grep {fcpys s0, s1} +; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | FileCheck %s define float @f(float %z, double %a, float %b) { +; CHECK: fcpys s0, s1 %tmp = call float @g(float %b) ret float %tmp } diff --git a/test/CodeGen/ARM/arm-negative-stride.ll b/test/CodeGen/ARM/arm-negative-stride.ll index c4b4ec6..72ec8ef 100644 --- a/test/CodeGen/ARM/arm-negative-stride.ll +++ b/test/CodeGen/ARM/arm-negative-stride.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\} +; RUN: llc < %s -march=arm | FileCheck %s define void @test(i32* %P, i32 %A, i32 %i) nounwind { entry: +; CHECK: str r1, [{{r.*}}, -{{r.*}}, lsl #2] icmp eq i32 %i, 0 ; <i1>:0 [#uses=1] br i1 %0, label %return, label %bb diff --git a/test/CodeGen/ARM/bfc.ll b/test/CodeGen/ARM/bfc.ll index 53392de..c4a44b4 100644 --- a/test/CodeGen/ARM/bfc.ll +++ b/test/CodeGen/ARM/bfc.ll @@ -1,19 +1,25 @@ -; RUN: llc < %s -march=arm -mattr=+v6t2 | grep "bfc " | count 3 +; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s ; 4278190095 = 0xff00000f define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: bfc %tmp = and i32 %a, 4278190095 ret i32 %tmp } ; 4286578688 = 0xff800000 define i32 @f2(i32 %a) { +; CHECK: f2: +; CHECK: bfc %tmp = and i32 %a, 4286578688 ret i32 %tmp } ; 4095 = 0x00000fff define i32 @f3(i32 %a) { +; CHECK: f3: +; CHECK: bfc %tmp = and i32 %a, 4095 ret i32 %tmp } diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll index 52246c3..3dd66ae 100644 --- a/test/CodeGen/ARM/call.ll +++ b/test/CodeGen/ARM/call.ll @@ -1,13 +1,16 @@ -; RUN: llc < %s -march=arm | grep {mov lr, pc} -; RUN: llc < %s -march=arm -mattr=+v5t | grep blx +; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4 +; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\ -; RUN: -relocation-model=pic | grep {PLT} +; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF @t = weak global i32 ()* null ; <i32 ()**> [#uses=1] declare void @g(i32, i32, i32, i32) define void @f() { +; CHECKV4: mov lr, pc +; CHECKV5: blx +; CHECKELF: PLT call void @g( i32 1, i32 2, i32 3, i32 4 ) ret void } diff --git a/test/CodeGen/ARM/carry.ll b/test/CodeGen/ARM/carry.ll index 294de5f..a6a7ed6 100644 --- a/test/CodeGen/ARM/carry.ll +++ b/test/CodeGen/ARM/carry.ll @@ -1,14 +1,19 @@ -; RUN: llc < %s -march=arm | grep "subs r" | count 2 -; RUN: llc < %s -march=arm | grep "adc r" -; RUN: llc < %s -march=arm | grep "sbc r" | count 2 +; RUN: llc < %s -march=arm | FileCheck %s define i64 @f1(i64 %a, i64 %b) { +; CHECK: f1: +; CHECK: subs r +; CHECK: sbc r entry: %tmp = sub i64 %a, %b ret i64 %tmp } define i64 @f2(i64 %a, i64 %b) { +; CHECK: f2: +; CHECK: adc r +; CHECK: subs r +; CHECK: sbc r entry: %tmp1 = shl i64 %a, 1 %tmp2 = sub i64 %tmp1, %b diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll index e2d8ddc..ce91936 100644 --- a/test/CodeGen/ARM/constants.ll +++ b/test/CodeGen/ARM/constants.ll @@ -1,39 +1,44 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep {mov r0, #0} | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep {mov r0, #255$} | count 1 -; RUN: llc < %s -march=arm -asm-verbose | \ -; RUN: grep {mov r0.*256} | count 1 -; RUN: llc < %s -march=arm -asm-verbose | grep {orr.*256} | count 1 -; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*-1073741761} | count 1 -; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*1008} | count 1 -; RUN: llc < %s -march=arm | grep {cmp r0, #1, 16} | count 1 +; RUN: llc < %s -march=arm | FileCheck %s define i32 @f1() { +; CHECK: f1 +; CHECK: mov r0, #0 ret i32 0 } define i32 @f2() { +; CHECK: f2 +; CHECK: mov r0, #255 ret i32 255 } define i32 @f3() { +; CHECK: f3 +; CHECK: mov r0{{.*}}256 ret i32 256 } define i32 @f4() { +; CHECK: f4 +; CHECK: orr{{.*}}256 ret i32 257 } define i32 @f5() { +; CHECK: f5 +; CHECK: mov r0, {{.*}}-1073741761 ret i32 -1073741761 } define i32 @f6() { +; CHECK: f6 +; CHECK: mov r0, {{.*}}1008 ret i32 1008 } define void @f7(i32 %a) { +; CHECK: f7 +; CHECK: cmp r0, #1, 16 %b = icmp ugt i32 %a, 65536 ; <i1> [#uses=1] br i1 %b, label %r, label %r diff --git a/test/CodeGen/ARM/fmacs.ll b/test/CodeGen/ARM/fmacs.ll index 1a1cd07..5c31ea6 100644 --- a/test/CodeGen/ARM/fmacs.ll +++ b/test/CodeGen/ARM/fmacs.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %acc, float %a, float %b) { diff --git a/test/CodeGen/ARM/fnmacs.ll b/test/CodeGen/ARM/fnmacs.ll index e57bbbb..8fc13e7 100644 --- a/test/CodeGen/ARM/fnmacs.ll +++ b/test/CodeGen/ARM/fnmacs.ll @@ -1,11 +1,18 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NEONFP define float @test(float %acc, float %a, float %b) { entry: +; VFP2: fnmacs +; NEON: fnmacs + +; NEONFP-NOT: vmls +; NEONFP-NOT: fcpys +; NEONFP: vmul.f32 +; NEONFP: vsub.f32 +; NEONFP: fmrs + %0 = fmul float %a, %b %1 = fsub float %acc, %0 ret float %1 diff --git a/test/CodeGen/ARM/fpconsts.ll b/test/CodeGen/ARM/fpconsts.ll new file mode 100644 index 0000000..4de18bc --- /dev/null +++ b/test/CodeGen/ARM/fpconsts.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -march=arm -mattr=+vfp3 | FileCheck %s + +define arm_apcscc float @t1(float %x) nounwind readnone optsize { +entry: +; CHECK: t1: +; CHECK: fconsts s1, #16 + %0 = fadd float %x, 4.000000e+00 + ret float %0 +} + +define arm_apcscc double @t2(double %x) nounwind readnone optsize { +entry: +; CHECK: t2: +; CHECK: fconstd d1, #8 + %0 = fadd double %x, 3.000000e+00 + ret double %0 +} + +define arm_apcscc double @t3(double %x) nounwind readnone optsize { +entry: +; CHECK: t3: +; CHECK: fconstd d1, #170 + %0 = fmul double %x, -1.300000e+01 + ret double %0 +} + +define arm_apcscc float @t4(float %x) nounwind readnone optsize { +entry: +; CHECK: t4: +; CHECK: fconsts s1, #184 + %0 = fmul float %x, -2.400000e+01 + ret float %0 +} diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll index fa897bf..0822fbf 100644 --- a/test/CodeGen/ARM/fpmem.ll +++ b/test/CodeGen/ARM/fpmem.ll @@ -1,21 +1,22 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep {mov r0, #0} | count 1 -; RUN: llc < %s -march=arm -mattr=+vfp2 | \ -; RUN: grep {flds.*\\\[} | count 1 -; RUN: llc < %s -march=arm -mattr=+vfp2 | \ -; RUN: grep {fsts.*\\\[} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s define float @f1(float %a) { +; CHECK: f1: +; CHECK: mov r0, #0 ret float 0.000000e+00 } define float @f2(float* %v, float %u) { +; CHECK: f2: +; CHECK: flds{{.*}}[ %tmp = load float* %v ; <float> [#uses=1] %tmp1 = fadd float %tmp, %u ; <float> [#uses=1] ret float %tmp1 } define void @f3(float %a, float %b, float* %v) { +; CHECK: f3: +; CHECK: fsts{{.*}}[ %tmp = fadd float %a, %b ; <float> [#uses=1] store float %tmp, float* %v ret void diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll index 5116ac8..245ed51 100644 --- a/test/CodeGen/ARM/ispositive.ll +++ b/test/CodeGen/ARM/ispositive.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -march=arm | grep {mov r0, r0, lsr #31} +; RUN: llc < %s -march=arm | FileCheck %s define i32 @test1(i32 %X) { +; CHECK: mov r0, r0, lsr #31 entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll index 774b3c0..1a016a0 100644 --- a/test/CodeGen/ARM/ldm.ll +++ b/test/CodeGen/ARM/ldm.ll @@ -1,13 +1,10 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep ldmia | count 2 -; RUN: llc < %s -march=arm | \ -; RUN: grep ldmib | count 1 -; RUN: llc < %s -mtriple=arm-apple-darwin | \ -; RUN: grep {ldmfd sp\!} | count 3 +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] define i32 @t1() { +; CHECK: t1: +; CHECK: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1] @@ -15,6 +12,8 @@ define i32 @t1() { } define i32 @t2() { +; CHECK: t2: +; CHECK: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1] @@ -23,6 +22,9 @@ define i32 @t2() { } define i32 @t3() { +; CHECK: t3: +; CHECK: ldmib +; CHECK: ldmfd sp! %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll index 954fb5b..011e61c 100644 --- a/test/CodeGen/ARM/ldr.ll +++ b/test/CodeGen/ARM/ldr.ll @@ -1,16 +1,16 @@ -; RUN: llc < %s -march=arm | grep {ldr r0} | count 7 -; RUN: llc < %s -march=arm | grep mov | grep 1 -; RUN: llc < %s -march=arm | not grep mvn -; RUN: llc < %s -march=arm | grep ldr | grep lsl -; RUN: llc < %s -march=arm | grep ldr | grep lsr +; RUN: llc < %s -march=arm | FileCheck %s define i32 @f1(i32* %v) { +; CHECK: f1: +; CHECK: ldr r0 entry: %tmp = load i32* %v ret i32 %tmp } define i32 @f2(i32* %v) { +; CHECK: f2: +; CHECK: ldr r0 entry: %tmp2 = getelementptr i32* %v, i32 1023 %tmp = load i32* %tmp2 @@ -18,6 +18,9 @@ entry: } define i32 @f3(i32* %v) { +; CHECK: f3: +; CHECK: mov +; CHECK: ldr r0 entry: %tmp2 = getelementptr i32* %v, i32 1024 %tmp = load i32* %tmp2 @@ -25,6 +28,9 @@ entry: } define i32 @f4(i32 %base) { +; CHECK: f4: +; CHECK-NOT: mvn +; CHECK: ldr r0 entry: %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i32* @@ -33,6 +39,8 @@ entry: } define i32 @f5(i32 %base, i32 %offset) { +; CHECK: f5: +; CHECK: ldr r0 entry: %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i32* @@ -41,6 +49,8 @@ entry: } define i32 @f6(i32 %base, i32 %offset) { +; CHECK: f6: +; CHECK: ldr r0{{.*}}lsl{{.*}} entry: %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -50,6 +60,8 @@ entry: } define i32 @f7(i32 %base, i32 %offset) { +; CHECK: f7: +; CHECK: ldr r0{{.*}}lsr{{.*}} entry: %tmp1 = lshr i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll index 2fcaac0..16ef7cc 100644 --- a/test/CodeGen/ARM/long.ll +++ b/test/CodeGen/ARM/long.ll @@ -1,47 +1,50 @@ -; RUN: llc < %s -march=arm -asm-verbose | \ -; RUN: grep -- {-2147483648} | count 3 -; RUN: llc < %s -march=arm | grep mvn | count 3 -; RUN: llc < %s -march=arm | grep adds | count 1 -; RUN: llc < %s -march=arm | grep adc | count 1 -; RUN: llc < %s -march=arm | grep {subs } | count 1 -; RUN: llc < %s -march=arm | grep sbc | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep smull | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep umull | count 1 +; RUN: llc < %s -march=arm | FileCheck %s define i64 @f1() { +; CHECK: f1: entry: ret i64 0 } define i64 @f2() { +; CHECK: f2: entry: ret i64 1 } define i64 @f3() { +; CHECK: f3: +; CHECK: mvn{{.*}}-2147483648 entry: ret i64 2147483647 } define i64 @f4() { +; CHECK: f4: +; CHECK: -2147483648 entry: ret i64 2147483648 } define i64 @f5() { +; CHECK: f5: +; CHECK: mvn +; CHECK: mvn{{.*}}-2147483648 entry: ret i64 9223372036854775807 } define i64 @f6(i64 %x, i64 %y) { +; CHECK: f6: +; CHECK: adds +; CHECK: adc entry: %tmp1 = add i64 %y, 1 ; <i64> [#uses=1] ret i64 %tmp1 } define void @f7() { +; CHECK: f7: entry: %tmp = call i64 @f8( ) ; <i64> [#uses=0] ret void @@ -50,12 +53,17 @@ entry: declare i64 @f8() define i64 @f9(i64 %a, i64 %b) { +; CHECK: f9: +; CHECK: subs r +; CHECK: sbc entry: %tmp = sub i64 %a, %b ; <i64> [#uses=1] ret i64 %tmp } define i64 @f(i32 %a, i32 %b) { +; CHECK: f: +; CHECK: smull entry: %tmp = sext i32 %a to i64 ; <i64> [#uses=1] %tmp1 = sext i32 %b to i64 ; <i64> [#uses=1] @@ -64,6 +72,8 @@ entry: } define i64 @g(i32 %a, i32 %b) { +; CHECK: g: +; CHECK: umull entry: %tmp = zext i32 %a to i64 ; <i64> [#uses=1] %tmp1 = zext i32 %b to i64 ; <i64> [#uses=1] @@ -72,9 +82,9 @@ entry: } define i64 @f10() { +; CHECK: f10: entry: %a = alloca i64, align 8 ; <i64*> [#uses=1] %retval = load i64* %a ; <i64> [#uses=1] ret i64 %retval } - diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 057b5f0..688b7bc 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=arm > %t -; RUN: grep rrx %t | count 1 -; RUN: grep __ashldi3 %t -; RUN: grep __ashrdi3 %t -; RUN: grep __lshrdi3 %t +; RUN: llc < %s -march=arm | FileCheck %s define i64 @f0(i64 %A, i64 %B) { +; CHECK: f0 +; CHECK: movs r3, r3, lsr #1 +; CHECK-NEXT: mov r2, r2, rrx +; CHECK-NEXT: subs r0, r0, r2 +; CHECK-NEXT: sbc r1, r1, r3 %tmp = bitcast i64 %A to i64 %tmp2 = lshr i64 %B, 1 %tmp3 = sub i64 %tmp, %tmp2 @@ -12,18 +13,34 @@ define i64 @f0(i64 %A, i64 %B) { } define i32 @f1(i64 %x, i64 %y) { +; CHECK: f1 +; CHECK: mov r0, r0, lsl r2 %a = shl i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b } define i32 @f2(i64 %x, i64 %y) { +; CHECK: f2 +; CHECK: mov r0, r0, lsr r2 +; CHECK-NEXT: rsb r3, r2, #32 +; CHECK-NEXT: sub r2, r2, #32 +; CHECK-NEXT: cmp r2, #0 +; CHECK-NEXT: orr r0, r0, r1, lsl r3 +; CHECK-NEXT: movge r0, r1, asr r2 %a = ashr i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b } define i32 @f3(i64 %x, i64 %y) { +; CHECK: f3 +; CHECK: mov r0, r0, lsr r2 +; CHECK-NEXT: rsb r3, r2, #32 +; CHECK-NEXT: sub r2, r2, #32 +; CHECK-NEXT: cmp r2, #0 +; CHECK-NEXT: orr r0, r0, r1, lsl r3 +; CHECK-NEXT: movge r0, r1, lsr r2 %a = lshr i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b diff --git a/test/CodeGen/ARM/remat.ll b/test/CodeGen/ARM/remat.ll index ba9699e..50da997 100644 --- a/test/CodeGen/ARM/remat.ll +++ b/test/CodeGen/ARM/remat.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=arm-apple-darwin -; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 4 +; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 5 %struct.CONTENTBOX = type { i32, i32, i32, i32, i32 } %struct.LOCBOX = type { i32, i32, i32, i32 } diff --git a/test/CodeGen/ARM/str_post.ll b/test/CodeGen/ARM/str_post.ll index 801b9ce..97916f1 100644 --- a/test/CodeGen/ARM/str_post.ll +++ b/test/CodeGen/ARM/str_post.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep {strh .*\\\[.*\], #-4} | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep {str .*\\\[.*\],} | count 1 +; RUN: llc < %s -march=arm | FileCheck %s define i16 @test1(i32* %X, i16* %A) { +; CHECK: test1: +; CHECK: strh {{.*}}[{{.*}}], #-4 %Y = load i32* %X ; <i32> [#uses=1] %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1] store i16 %tmp1, i16* %A @@ -13,6 +12,8 @@ define i16 @test1(i32* %X, i16* %A) { } define i32 @test2(i32* %X, i32* %A) { +; CHECK: test2: +; CHECK: str {{.*}}[{{.*}}], %Y = load i32* %X ; <i32> [#uses=1] store i32 %Y, i32* %A %tmp1 = ptrtoint i32* %A to i32 ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/tls2.ll b/test/CodeGen/ARM/tls2.ll index 32847208..d932f90 100644 --- a/test/CodeGen/ARM/tls2.ll +++ b/test/CodeGen/ARM/tls2.ll @@ -1,19 +1,27 @@ -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \ -; RUN: grep {i(gottpoff)} -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \ -; RUN: grep {ldr r., \[pc, r.\]} ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \ -; RUN: -relocation-model=pic | grep {__tls_get_addr} +; RUN: | FileCheck %s -check-prefix=CHECK-NONPIC +; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \ +; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC @i = external thread_local global i32 ; <i32*> [#uses=2] define i32 @f() { +; CHECK-NONPIC: f: +; CHECK-NONPIC: ldr {{r.}}, [pc, +{{r.}}] +; CHECK-NONPIC: i(gottpoff) +; CHECK-PIC: f: +; CHECK-PIC: __tls_get_addr entry: %tmp1 = load i32* @i ; <i32> [#uses=1] ret i32 %tmp1 } define i32* @g() { +; CHECK-NONPIC: g: +; CHECK-NONPIC: ldr {{r.}}, [pc, +{{r.}}] +; CHECK-NONPIC: i(gottpoff) +; CHECK-PIC: g: +; CHECK-PIC: __tls_get_addr entry: ret i32* @i } diff --git a/test/CodeGen/CPP/llvm2cpp.ll b/test/CodeGen/CPP/llvm2cpp.ll index 447f332..d0ba0cf 100644 --- a/test/CodeGen/CPP/llvm2cpp.ll +++ b/test/CodeGen/CPP/llvm2cpp.ll @@ -273,7 +273,7 @@ define i32 @foozball(i32) { @A = global i32* @B ; <i32**> [#uses=0] @B = global i32 7 ; <i32*> [#uses=1] -define void @X() { +define void @test12312() { ret void } ; ModuleID = 'global_section.ll' diff --git a/test/CodeGen/Generic/intrinsics.ll b/test/CodeGen/Generic/intrinsics.ll index 9a42c3e..29bc499 100644 --- a/test/CodeGen/Generic/intrinsics.ll +++ b/test/CodeGen/Generic/intrinsics.ll @@ -14,9 +14,9 @@ define double @test_sqrt(float %F) { ; SIN -declare float @sinf(float) +declare float @sinf(float) readonly -declare double @sin(double) +declare double @sin(double) readonly define double @test_sin(float %F) { %G = call float @sinf( float %F ) ; <float> [#uses=1] @@ -27,9 +27,9 @@ define double @test_sin(float %F) { ; COS -declare float @cosf(float) +declare float @cosf(float) readonly -declare double @cos(double) +declare double @cos(double) readonly define double @test_cos(float %F) { %G = call float @cosf( float %F ) ; <float> [#uses=1] diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll index 3cbb212..7647474 100644 --- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll +++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp -; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp | grep fcpys | count 1 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp | not grep fcpys ; rdar://7117307 %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List } diff --git a/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll new file mode 100644 index 0000000..216f3e3 --- /dev/null +++ b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 + +define arm_apcscc void @get_initial_mb16x16_cost() nounwind { +entry: + br i1 undef, label %bb4, label %bb1 + +bb1: ; preds = %entry + br label %bb7 + +bb4: ; preds = %entry + br i1 undef, label %bb7.thread, label %bb5 + +bb5: ; preds = %bb4 + br label %bb7 + +bb7.thread: ; preds = %bb4 + br label %bb8 + +bb7: ; preds = %bb5, %bb1 + br i1 undef, label %bb8, label %bb10 + +bb8: ; preds = %bb7, %bb7.thread + %0 = phi double [ 5.120000e+02, %bb7.thread ], [ undef, %bb7 ] ; <double> [#uses=1] + %1 = fdiv double %0, undef ; <double> [#uses=0] + unreachable + +bb10: ; preds = %bb7 + ret void +} diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll new file mode 100644 index 0000000..572f1e8 --- /dev/null +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 + +%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } +%struct.__sFILEX = type opaque +%struct.__sbuf = type { i8*, i32 } + +declare arm_apcscc i32 @fgetc(%struct.FILE* nocapture) nounwind + +define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind { +entry: + br i1 undef, label %bb, label %bb1 + +bb: ; preds = %entry + unreachable + +bb1: ; preds = %entry + br i1 undef, label %bb.i1, label %bb1.i2 + +bb.i1: ; preds = %bb1 + unreachable + +bb1.i2: ; preds = %bb1 + %0 = call arm_apcscc i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0] + br i1 undef, label %bb2.i3, label %bb3.i4 + +bb2.i3: ; preds = %bb1.i2 + br i1 undef, label %bb4.i, label %bb3.i4 + +bb3.i4: ; preds = %bb2.i3, %bb1.i2 + unreachable + +bb4.i: ; preds = %bb2.i3 + br i1 undef, label %bb5.i, label %get_image.exit + +bb5.i: ; preds = %bb4.i + unreachable + +get_image.exit: ; preds = %bb4.i + br i1 undef, label %bb28, label %bb27 + +bb27: ; preds = %get_image.exit + br label %bb.i + +bb.i: ; preds = %bb.i, %bb27 + %1 = fptrunc double undef to float ; <float> [#uses=1] + %2 = fptoui float %1 to i8 ; <i8> [#uses=1] + store i8 %2, i8* undef, align 1 + br label %bb.i + +bb28: ; preds = %get_image.exit + unreachable +} diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll new file mode 100644 index 0000000..4320328 --- /dev/null +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll @@ -0,0 +1,67 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep fcpys | count 4 + +define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind { +entry: + br label %bb5 + +bb5: ; preds = %bb5, %entry + br i1 undef, label %bb5, label %bb.nph + +bb.nph: ; preds = %bb5 + br label %bb7 + +bb7: ; preds = %bb9, %bb.nph + %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3] + %tmp79 = add i32 undef, undef ; <i32> [#uses=1] + %tmp53 = sub i32 undef, undef ; <i32> [#uses=1] + %0 = fadd float 0.000000e+00, 1.000000e+00 ; <float> [#uses=2] + %1 = fmul float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2] + br label %bb8 + +bb8: ; preds = %bb8, %bb7 + %tmp54 = add i32 0, %tmp53 ; <i32> [#uses=0] + %fi.1 = getelementptr float* %fz, i32 undef ; <float*> [#uses=2] + %tmp80 = add i32 0, %tmp79 ; <i32> [#uses=1] + %scevgep81 = getelementptr float* %fz, i32 %tmp80 ; <float*> [#uses=1] + %2 = load float* undef, align 4 ; <float> [#uses=1] + %3 = fmul float %2, %1 ; <float> [#uses=1] + %4 = load float* null, align 4 ; <float> [#uses=2] + %5 = fmul float %4, %0 ; <float> [#uses=1] + %6 = fsub float %3, %5 ; <float> [#uses=1] + %7 = fmul float %4, %1 ; <float> [#uses=1] + %8 = fadd float undef, %7 ; <float> [#uses=2] + %9 = load float* %fi.1, align 4 ; <float> [#uses=2] + %10 = fsub float %9, %8 ; <float> [#uses=1] + %11 = fadd float %9, %8 ; <float> [#uses=1] + %12 = fsub float 0.000000e+00, %6 ; <float> [#uses=1] + %13 = fsub float 0.000000e+00, undef ; <float> [#uses=2] + %14 = fmul float undef, %0 ; <float> [#uses=1] + %15 = fadd float %14, undef ; <float> [#uses=2] + %16 = load float* %scevgep81, align 4 ; <float> [#uses=2] + %17 = fsub float %16, %15 ; <float> [#uses=1] + %18 = fadd float %16, %15 ; <float> [#uses=2] + %19 = load float* undef, align 4 ; <float> [#uses=2] + %20 = fsub float %19, %13 ; <float> [#uses=2] + %21 = fadd float %19, %13 ; <float> [#uses=1] + %22 = fmul float %s1.02, %18 ; <float> [#uses=1] + %23 = fmul float 0.000000e+00, %20 ; <float> [#uses=1] + %24 = fsub float %22, %23 ; <float> [#uses=1] + %25 = fmul float 0.000000e+00, %18 ; <float> [#uses=1] + %26 = fmul float %s1.02, %20 ; <float> [#uses=1] + %27 = fadd float %25, %26 ; <float> [#uses=1] + %28 = fadd float %11, %27 ; <float> [#uses=1] + store float %28, float* %fi.1, align 4 + %29 = fadd float %12, %24 ; <float> [#uses=1] + store float %29, float* null, align 4 + %30 = fmul float 0.000000e+00, %21 ; <float> [#uses=1] + %31 = fmul float %s1.02, %17 ; <float> [#uses=1] + %32 = fsub float %30, %31 ; <float> [#uses=1] + %33 = fsub float %10, %32 ; <float> [#uses=1] + store float %33, float* undef, align 4 + %34 = icmp slt i32 undef, undef ; <i1> [#uses=1] + br i1 %34, label %bb8, label %bb9 + +bb9: ; preds = %bb8 + %35 = fadd float 0.000000e+00, undef ; <float> [#uses=1] + br label %bb7 +} diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll new file mode 100644 index 0000000..4c8ffe8 --- /dev/null +++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll @@ -0,0 +1,75 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s +; rdar://7352504 +; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]". + +%0 = type { i16, i8, i8 } +%1 = type { [2 x i32], [2 x i32] } +%2 = type { %union.rec* } +%struct.FILE_POS = type { i8, i8, i16, i32 } +%struct.GAP = type { i8, i8, i16 } +%struct.LIST = type { %union.rec*, %union.rec* } +%struct.STYLE = type { %union.anon, %union.anon, i16, i16, i32 } +%struct.head_type = type { [2 x %struct.LIST], %union.FIRST_UNION, %union.SECOND_UNION, %union.THIRD_UNION, %union.FOURTH_UNION, %union.rec*, %2, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, i32 } +%union.FIRST_UNION = type { %struct.FILE_POS } +%union.FOURTH_UNION = type { %struct.STYLE } +%union.SECOND_UNION = type { %0 } +%union.THIRD_UNION = type { %1 } +%union.anon = type { %struct.GAP } +%union.rec = type { %struct.head_type } + +@zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2] +@zz_res = external global %union.rec* ; <%union.rec**> [#uses=1] + +define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind { +entry: +; CHECK: ldr.w r9, [r7, #+32] +; CHECK-NEXT : str.w r9, [sp, #+28] + %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] + %ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] + br i1 false, label %bb, label %bb20 + +bb: ; preds = %entry + unreachable + +bb20: ; preds = %entry + switch i32 undef, label %bb1287 [ + i32 11, label %bb119 + i32 12, label %bb119 + i32 21, label %bb420 + i32 23, label %bb420 + i32 45, label %bb438 + i32 46, label %bb438 + i32 55, label %bb533 + i32 56, label %bb569 + i32 64, label %bb745 + i32 78, label %bb1098 + ] + +bb119: ; preds = %bb20, %bb20 + unreachable + +bb420: ; preds = %bb20, %bb20 + store %union.rec* null, %union.rec** @zz_hold, align 4 + store %union.rec* null, %union.rec** @zz_res, align 4 + store %union.rec* %x, %union.rec** @zz_hold, align 4 + %0 = call arm_apcscc %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0] + unreachable + +bb438: ; preds = %bb20, %bb20 + unreachable + +bb533: ; preds = %bb20 + ret %union.rec* %x + +bb569: ; preds = %bb20 + unreachable + +bb745: ; preds = %bb20 + unreachable + +bb1098: ; preds = %bb20 + unreachable + +bb1287: ; preds = %bb20 + unreachable +} diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll new file mode 100644 index 0000000..64309c4 --- /dev/null +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s +; rdar://7353541 + +; The generated code is no where near ideal. It's not recognizing the two +; constantpool entries being loaded can be merged into one. + +@GV = external global i32 ; <i32*> [#uses=2] + +define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind { +entry: +; CHECK: t: +; CHECK: cbz + %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] + br i1 %0, label %return, label %bb.nph + +bb.nph: ; preds = %entry +; CHECK: BB#1 +; CHECK: ldr{{.*}} r{{[0-9]+}}, LCPI1_0 +; CHECK: ldr{{.*}} r{{[0-9]+}}, LCPI1_1 + %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %bb, %bb.nph + %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1] + %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2] + %scevgep = getelementptr i32* %vals, i32 %i.03 ; <i32*> [#uses=1] + %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1] + %3 = add nsw i32 %1, %2 ; <i32> [#uses=2] + store i32 %3, i32* @GV, align 4 + %4 = add i32 %i.03, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1] + br i1 %exitcond, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll index e1f9cdb..aae9f5c 100644 --- a/test/CodeGen/Thumb2/thumb2-bcc.ll +++ b/test/CodeGen/Thumb2/thumb2-bcc.ll @@ -2,8 +2,8 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | not grep it define i32 @t1(i32 %a, i32 %b, i32 %c) { -; CHECK: t1 -; CHECK: beq +; CHECK: t1: +; CHECK: cbz %tmp2 = icmp eq i32 %a, 0 br i1 %tmp2, label %cond_false, label %cond_true diff --git a/test/CodeGen/Thumb2/thumb2-bfc.ll b/test/CodeGen/Thumb2/thumb2-bfc.ll index d33cf7e..b486045 100644 --- a/test/CodeGen/Thumb2/thumb2-bfc.ll +++ b/test/CodeGen/Thumb2/thumb2-bfc.ll @@ -1,25 +1,32 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep "bfc " | count 3 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; 4278190095 = 0xff00000f define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: bfc r %tmp = and i32 %a, 4278190095 ret i32 %tmp } ; 4286578688 = 0xff800000 define i32 @f2(i32 %a) { +; CHECK: f2: +; CHECK: bfc r %tmp = and i32 %a, 4286578688 ret i32 %tmp } ; 4095 = 0x00000fff define i32 @f3(i32 %a) { +; CHECK: f3: +; CHECK: bfc r %tmp = and i32 %a, 4095 ret i32 %tmp } ; 2147483646 = 0x7ffffffe not implementable w/ BFC define i32 @f4(i32 %a) { +; CHECK: f4: %tmp = and i32 %a, 2147483646 ret i32 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index b46cb5f..1298384 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s define void @f1(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f1: -; CHECK bne LBB +; CHECK: bne LBB %tmp = icmp eq i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return @@ -18,7 +18,7 @@ return: ; preds = %entry define void @f2(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f2: -; CHECK bge LBB +; CHECK: bge LBB %tmp = icmp slt i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return @@ -33,7 +33,7 @@ return: ; preds = %entry define void @f3(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f3: -; CHECK bhs LBB +; CHECK: bhs LBB %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return @@ -48,7 +48,7 @@ return: ; preds = %entry define void @f4(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f4: -; CHECK blo LBB +; CHECK: blo LBB %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %return, label %cond_true diff --git a/test/CodeGen/Thumb2/thumb2-cbnz.ll b/test/CodeGen/Thumb2/thumb2-cbnz.ll new file mode 100644 index 0000000..64587c1 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-cbnz.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; rdar://7354379 + +declare arm_apcscc double @floor(double) nounwind readnone + +define void @t(i1 %a, double %b) { +entry: + br i1 %a, label %bb3, label %bb1 + +bb1: ; preds = %entry + unreachable + +bb3: ; preds = %entry + br i1 %a, label %bb7, label %bb5 + +bb5: ; preds = %bb3 + unreachable + +bb7: ; preds = %bb3 + br i1 %a, label %bb11, label %bb9 + +bb9: ; preds = %bb7 +; CHECK: @ BB#2: +; CHECK-NEXT: cbnz + %0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; <double> [#uses=0] + br label %bb11 + +bb11: ; preds = %bb9, %bb7 + %1 = getelementptr i32* undef, i32 0 + store i32 0, i32* %1 + ret void +} diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll index 0bed058..74728bf 100644 --- a/test/CodeGen/Thumb2/thumb2-clz.ll +++ b/test/CodeGen/Thumb2/thumb2-clz.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | grep "clz " | count 1 +; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: clz r %tmp = tail call i32 @llvm.ctlz.i32(i32 %a) ret i32 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-cmn2.ll b/test/CodeGen/Thumb2/thumb2-cmn2.ll index c1fcac0..c0e19f6 100644 --- a/test/CodeGen/Thumb2/thumb2-cmn2.ll +++ b/test/CodeGen/Thumb2/thumb2-cmn2.ll @@ -1,25 +1,33 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep "cmn\\.w " | grep {#187\\|#11141290\\|#-872363008\\|#1114112} | count 4 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; -0x000000bb = 4294967109 define i1 @f1(i32 %a) { +; CHECK: f1: +; CHECK: cmn.w {{r.*}}, #187 %tmp = icmp ne i32 %a, 4294967109 ret i1 %tmp } ; -0x00aa00aa = 4283826006 define i1 @f2(i32 %a) { +; CHECK: f2: +; CHECK: cmn.w {{r.*}}, #11141290 %tmp = icmp eq i32 %a, 4283826006 ret i1 %tmp } ; -0xcc00cc00 = 872363008 define i1 @f3(i32 %a) { +; CHECK: f3: +; CHECK: cmn.w {{r.*}}, #-872363008 %tmp = icmp ne i32 %a, 872363008 ret i1 %tmp } ; -0x00110000 = 4293853184 define i1 @f4(i32 %a) { +; CHECK: f4: +; CHECK: cmn.w {{r.*}}, #1114112 %tmp = icmp eq i32 %a, 4293853184 ret i1 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-eor2.ll b/test/CodeGen/Thumb2/thumb2-eor2.ll index 185634c..6b2e9dc 100644 --- a/test/CodeGen/Thumb2/thumb2-eor2.ll +++ b/test/CodeGen/Thumb2/thumb2-eor2.ll @@ -1,31 +1,41 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep "eor " | grep {#187\\|#11141290\\|#-872363008\\|#1114112\\|#-572662307} | count 5 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; 0x000000bb = 187 define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: eor {{.*}}#187 %tmp = xor i32 %a, 187 ret i32 %tmp } ; 0x00aa00aa = 11141290 define i32 @f2(i32 %a) { +; CHECK: f2: +; CHECK: eor {{.*}}#11141290 %tmp = xor i32 %a, 11141290 ret i32 %tmp } ; 0xcc00cc00 = 3422604288 define i32 @f3(i32 %a) { +; CHECK: f3: +; CHECK: eor {{.*}}#-872363008 %tmp = xor i32 %a, 3422604288 ret i32 %tmp } ; 0xdddddddd = 3722304989 define i32 @f4(i32 %a) { +; CHECK: f4: +; CHECK: eor {{.*}}#-572662307 %tmp = xor i32 %a, 3722304989 ret i32 %tmp } ; 0x00110000 = 1114112 define i32 @f5(i32 %a) { +; CHECK: f5: +; CHECK: eor {{.*}}#1114112 %tmp = xor i32 %a, 1114112 ret i32 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-mov.ll b/test/CodeGen/Thumb2/thumb2-mov.ll index 8606e32..1dc3614 100644 --- a/test/CodeGen/Thumb2/thumb2-mov.ll +++ b/test/CodeGen/Thumb2/thumb2-mov.ll @@ -5,38 +5,40 @@ ; var 2.1 - 0x00ab00ab define i32 @t2_const_var2_1_ok_1(i32 %lhs) { ;CHECK: t2_const_var2_1_ok_1: -;CHECK: #11206827 +;CHECK: add.w r0, r0, #11206827 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab ret i32 %ret } define i32 @t2_const_var2_1_ok_2(i32 %lhs) { ;CHECK: t2_const_var2_1_ok_2: -;CHECK: #11206656 -;CHECK: #187 +;CHECK: add.w r0, r0, #11206656 +;CHECK: adds r0, #187 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb ret i32 %ret } define i32 @t2_const_var2_1_ok_3(i32 %lhs) { ;CHECK: t2_const_var2_1_ok_3: -;CHECK: #11206827 -;CHECK: #16777216 +;CHECK: add.w r0, r0, #11206827 +;CHECK: add.w r0, r0, #16777216 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab ret i32 %ret } define i32 @t2_const_var2_1_ok_4(i32 %lhs) { ;CHECK: t2_const_var2_1_ok_4: -;CHECK: #16777472 -;CHECK: #11206827 +;CHECK: add.w r0, r0, #16777472 +;CHECK: add.w r0, r0, #11206827 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab ret i32 %ret } define i32 @t2_const_var2_1_fail_1(i32 %lhs) { ;CHECK: t2_const_var2_1_fail_1: -;CHECK: movt +;CHECK: movw r1, #43777 +;CHECK: movt r1, #427 +;CHECK: add r0, r1 %ret = add i32 %lhs, 28027649 ; 0x01abab01 ret i32 %ret } @@ -44,37 +46,40 @@ define i32 @t2_const_var2_1_fail_1(i32 %lhs) { ; var 2.2 - 0xab00ab00 define i32 @t2_const_var2_2_ok_1(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_1: -;CHECK: #-1426019584 +;CHECK: add.w r0, r0, #-1426019584 %ret = add i32 %lhs, 2868947712 ; 0xab00ab00 ret i32 %ret } define i32 @t2_const_var2_2_ok_2(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_2: -;CHECK: #-1426063360 -;CHECK: #47616 +;CHECK: add.w r0, r0, #-1426063360 +;CHECK: add.w r0, r0, #47616 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 ret i32 %ret } define i32 @t2_const_var2_2_ok_3(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_3: -;CHECK: #-1426019584 +;CHECK: add.w r0, r0, #-1426019584 +;CHECK: adds r0, #16 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 ret i32 %ret } define i32 @t2_const_var2_2_ok_4(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_4: -;CHECK: #-1426019584 -;CHECK: #1048592 +;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #1048592 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 ret i32 %ret } define i32 @t2_const_var2_2_fail_1(i32 %lhs) { ;CHECK: t2_const_var2_2_fail_1: -;CHECK: movt +;CHECK: movw r1, #43792 +;CHECK: movt r1, #4267 +;CHECK: add r0, r1 %ret = add i32 %lhs, 279685904 ; 0x10abab10 ret i32 %ret } @@ -82,35 +87,43 @@ define i32 @t2_const_var2_2_fail_1(i32 %lhs) { ; var 2.3 - 0xabababab define i32 @t2_const_var2_3_ok_1(i32 %lhs) { ;CHECK: t2_const_var2_3_ok_1: -;CHECK: #-1414812757 +;CHECK: add.w r0, r0, #-1414812757 %ret = add i32 %lhs, 2880154539 ; 0xabababab ret i32 %ret } define i32 @t2_const_var2_3_fail_1(i32 %lhs) { ;CHECK: t2_const_var2_3_fail_1: -;CHECK: movt +;CHECK: movw r1, #43962 +;CHECK: movt r1, #43947 +;CHECK: add r0, r1 %ret = add i32 %lhs, 2880154554 ; 0xabababba ret i32 %ret } define i32 @t2_const_var2_3_fail_2(i32 %lhs) { ;CHECK: t2_const_var2_3_fail_2: -;CHECK: movt +;CHECK: movw r1, #47787 +;CHECK: movt r1, #43947 +;CHECK: add r0, r1 %ret = add i32 %lhs, 2880158379 ; 0xababbaab ret i32 %ret } define i32 @t2_const_var2_3_fail_3(i32 %lhs) { ;CHECK: t2_const_var2_3_fail_3: -;CHECK: movt +;CHECK: movw r1, #43947 +;CHECK: movt r1, #43962 +;CHECK: add r0, r1 %ret = add i32 %lhs, 2881137579 ; 0xabbaabab ret i32 %ret } define i32 @t2_const_var2_3_fail_4(i32 %lhs) { ;CHECK: t2_const_var2_3_fail_4: -;CHECK: movt +;CHECK: movw r1, #43947 +;CHECK: movt r1, #47787 +;CHECK: add r0, r1 %ret = add i32 %lhs, 3131812779 ; 0xbaababab ret i32 %ret } @@ -118,36 +131,136 @@ define i32 @t2_const_var2_3_fail_4(i32 %lhs) { ; var 3 - 0x0F000000 define i32 @t2_const_var3_1_ok_1(i32 %lhs) { ;CHECK: t2_const_var3_1_ok_1: -;CHECK: #251658240 +;CHECK: add.w r0, r0, #251658240 %ret = add i32 %lhs, 251658240 ; 0x0F000000 ret i32 %ret } define i32 @t2_const_var3_2_ok_1(i32 %lhs) { ;CHECK: t2_const_var3_2_ok_1: -;CHECK: #3948544 +;CHECK: add.w r0, r0, #3948544 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000 ret i32 %ret } define i32 @t2_const_var3_2_ok_2(i32 %lhs) { ;CHECK: t2_const_var3_2_ok_2: -;CHECK: #2097152 -;CHECK: #1843200 +;CHECK: add.w r0, r0, #2097152 +;CHECK: add.w r0, r0, #1843200 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000 ret i32 %ret } define i32 @t2_const_var3_3_ok_1(i32 %lhs) { ;CHECK: t2_const_var3_3_ok_1: -;CHECK: #258 +;CHECK: add.w r0, r0, #258 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010 ret i32 %ret } define i32 @t2_const_var3_4_ok_1(i32 %lhs) { ;CHECK: t2_const_var3_4_ok_1: -;CHECK: #-268435456 +;CHECK: add.w r0, r0, #-268435456 %ret = add i32 %lhs, 4026531840 ; 0xF0000000 ret i32 %ret } + +define i32 @t2MOVTi16_ok_1(i32 %a) { +; CHECK: t2MOVTi16_ok_1: +; CHECK: movt r0, #1234 + %1 = and i32 %a, 65535 + %2 = shl i32 1234, 16 + %3 = or i32 %1, %2 + + ret i32 %3 +} + +define i32 @t2MOVTi16_test_1(i32 %a) { +; CHECK: t2MOVTi16_test_1: +; CHECK: movt r0, #1234 + %1 = shl i32 255, 8 + %2 = shl i32 1234, 8 + %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 + %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4 + %5 = and i32 %a, %3 + %6 = or i32 %4, %5 + + ret i32 %6 +} + +define i32 @t2MOVTi16_test_2(i32 %a) { +; CHECK: t2MOVTi16_test_2: +; CHECK: movt r0, #1234 + %1 = shl i32 255, 8 + %2 = shl i32 1234, 8 + %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 + %4 = shl i32 %2, 6 + %5 = and i32 %a, %3 + %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6 + %7 = or i32 %5, %6 + + ret i32 %7 +} + +define i32 @t2MOVTi16_test_3(i32 %a) { +; CHECK: t2MOVTi16_test_3: +; CHECK: movt r0, #1234 + %1 = shl i32 255, 8 + %2 = shl i32 1234, 8 + %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 + %4 = shl i32 %2, 6 + %5 = and i32 %a, %3 + %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6 + %7 = lshr i32 %6, 6 + %8 = shl i32 %7, 6 + %9 = or i32 %5, %8 + + ret i32 %8 +} + +; 171 = 0x000000ab +define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: movs r0, #171 + %tmp = add i32 0, 171 + ret i32 %tmp +} + +; 1179666 = 0x00120012 +define i32 @f2(i32 %a) { +; CHECK: f2: +; CHECK: mov.w r0, #1179666 + %tmp = add i32 0, 1179666 + ret i32 %tmp +} + +; 872428544 = 0x34003400 +define i32 @f3(i32 %a) { +; CHECK: f3: +; CHECK: mov.w r0, #872428544 + %tmp = add i32 0, 872428544 + ret i32 %tmp +} + +; 1448498774 = 0x56565656 +define i32 @f4(i32 %a) { +; CHECK: f4: +; CHECK: mov.w r0, #1448498774 + %tmp = add i32 0, 1448498774 + ret i32 %tmp +} + +; 66846720 = 0x03fc0000 +define i32 @f5(i32 %a) { +; CHECK: f5: +; CHECK: mov.w r0, #66846720 + %tmp = add i32 0, 66846720 + ret i32 %tmp +} + +define i32 @f6(i32 %a) { +;CHECK: f6 +;CHECK: movw r0, #65535 + %tmp = add i32 0, 65535 + ret i32 %tmp +} diff --git a/test/CodeGen/Thumb2/thumb2-str_post.ll b/test/CodeGen/Thumb2/thumb2-str_post.ll index bee5810..bbfb447 100644 --- a/test/CodeGen/Thumb2/thumb2-str_post.ll +++ b/test/CodeGen/Thumb2/thumb2-str_post.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | \ -; RUN: grep {strh .*\\\[.*\], #-4} | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | \ -; RUN: grep {str .*\\\[.*\],} | count 1 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i16 @test1(i32* %X, i16* %A) { +; CHECK: test1: +; CHECK: strh {{.*}}[{{.*}}], #-4 %Y = load i32* %X ; <i32> [#uses=1] %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1] store i16 %tmp1, i16* %A @@ -13,6 +12,8 @@ define i16 @test1(i32* %X, i16* %A) { } define i32 @test2(i32* %X, i32* %A) { +; CHECK: test2: +; CHECK: str {{.*}}[{{.*}}], %Y = load i32* %X ; <i32> [#uses=1] store i32 %Y, i32* %A %tmp1 = ptrtoint i32* %A to i32 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll index 0626d28..721d4c9 100644 --- a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll +++ b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll @@ -1,6 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \ -; RUN: grep {1 .*folded into instructions} -; Increment in loop bb.128.i adjusted to 2, to prevent loop reversal from +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from ; kicking in. declare fastcc void @rdft(i32, i32, double*, i32*, double*) @@ -34,6 +33,9 @@ cond_next36.i: ; preds = %cond_next.i br label %bb.i28.i bb.i28.i: ; preds = %bb.i28.i, %cond_next36.i +; CHECK: %bb.i28.i +; CHECK: addl $2 +; CHECK: addl $2 %j.0.reg2mem.0.i16.i = phi i32 [ 0, %cond_next36.i ], [ %indvar.next39.i, %bb.i28.i ] ; <i32> [#uses=2] %din_addr.1.reg2mem.0.i17.i = phi double [ 0.000000e+00, %cond_next36.i ], [ %tmp16.i25.i, %bb.i28.i ] ; <double> [#uses=1] %tmp1.i18.i = fptosi double %din_addr.1.reg2mem.0.i17.i to i32 ; <i32> [#uses=2] diff --git a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll index 9b52c5c..7463a0e 100644 --- a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -3,7 +3,7 @@ @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] -define void @minmax(float* %result) nounwind { +define void @minmax(float* %result) nounwind optsize { entry: %tmp2 = load float* %result, align 4 ; <float> [#uses=6] %tmp4 = getelementptr float* %result, i32 2 ; <float*> [#uses=5] diff --git a/test/CodeGen/X86/2008-05-12-tailmerge-5.ll b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll index 1f95a24..4852e89 100644 --- a/test/CodeGen/X86/2008-05-12-tailmerge-5.ll +++ b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll @@ -6,7 +6,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin8" %struct.BoundaryAlignment = type { [3 x i8], i8, i16, i16, i8, [2 x i8] } -define void @passing2(i64 %str.0, i64 %str.1, i16 signext %s, i32 %j, i8 signext %c, i16 signext %t, i16 signext %u, i8 signext %d) nounwind { +define void @passing2(i64 %str.0, i64 %str.1, i16 signext %s, i32 %j, i8 signext %c, i16 signext %t, i16 signext %u, i8 signext %d) nounwind optsize { entry: %str_addr = alloca %struct.BoundaryAlignment ; <%struct.BoundaryAlignment*> [#uses=7] %s_addr = alloca i16 ; <i16*> [#uses=1] diff --git a/test/CodeGen/X86/2009-10-25-RewriterBug.ll b/test/CodeGen/X86/2009-10-25-RewriterBug.ll new file mode 100644 index 0000000..5b4e818 --- /dev/null +++ b/test/CodeGen/X86/2009-10-25-RewriterBug.ll @@ -0,0 +1,171 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim + +%struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* } +%struct.FrameStore = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture* } +%struct.StorablePicture = type { i32, i32, i32, i32, i32, [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16**, i16***, i8*, i16**, i8***, i64***, i64***, i16****, i8**, i8**, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, %struct.DecRefPicMarking_t*, i32 } + +define fastcc void @insert_picture_in_dpb(%struct.FrameStore* nocapture %fs, %struct.StorablePicture* %p) nounwind ssp { +entry: + %0 = getelementptr inbounds %struct.FrameStore* %fs, i64 0, i32 12 ; <%struct.StorablePicture**> [#uses=1] + %1 = icmp eq i32 undef, 0 ; <i1> [#uses=1] + br i1 %1, label %bb.i, label %bb36.i + +bb.i: ; preds = %entry + br i1 undef, label %bb3.i, label %bb14.preheader.i + +bb3.i: ; preds = %bb.i + unreachable + +bb14.preheader.i: ; preds = %bb.i + br i1 undef, label %bb9.i, label %bb20.preheader.i + +bb9.i: ; preds = %bb9.i, %bb14.preheader.i + br i1 undef, label %bb9.i, label %bb20.preheader.i + +bb20.preheader.i: ; preds = %bb9.i, %bb14.preheader.i + br i1 undef, label %bb18.i, label %bb29.preheader.i + +bb18.i: ; preds = %bb20.preheader.i + unreachable + +bb29.preheader.i: ; preds = %bb20.preheader.i + br i1 undef, label %bb24.i, label %bb30.i + +bb24.i: ; preds = %bb29.preheader.i + unreachable + +bb30.i: ; preds = %bb29.preheader.i + store i32 undef, i32* undef, align 8 + br label %bb67.preheader.i + +bb36.i: ; preds = %entry + br label %bb67.preheader.i + +bb67.preheader.i: ; preds = %bb36.i, %bb30.i + %2 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2] + %3 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2] + %4 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2] + %5 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %6 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %7 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %8 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %9 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %10 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %11 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + %12 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1] + br i1 undef, label %bb38.i, label %bb68.i + +bb38.i: ; preds = %bb66.i, %bb67.preheader.i + %13 = phi %struct.StorablePicture* [ %37, %bb66.i ], [ %2, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %14 = phi %struct.StorablePicture* [ %38, %bb66.i ], [ %3, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %15 = phi %struct.StorablePicture* [ %39, %bb66.i ], [ %4, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %16 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %5, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %17 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %6, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %18 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %7, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %19 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %8, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %20 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %9, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %21 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %10, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %22 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %11, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %23 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %12, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1] + %indvar248.i = phi i64 [ %indvar.next249.i, %bb66.i ], [ 0, %bb67.preheader.i ] ; <i64> [#uses=3] + %storemerge52.i = trunc i64 %indvar248.i to i32 ; <i32> [#uses=1] + %24 = getelementptr inbounds %struct.StorablePicture* %23, i64 0, i32 19 ; <i32*> [#uses=0] + br i1 undef, label %bb.nph51.i, label %bb66.i + +bb.nph51.i: ; preds = %bb38.i + %25 = sdiv i32 %storemerge52.i, 8 ; <i32> [#uses=0] + br label %bb39.i + +bb39.i: ; preds = %bb64.i, %bb.nph51.i + %26 = phi %struct.StorablePicture* [ %17, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=1] + %27 = phi %struct.StorablePicture* [ %18, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0] + %28 = phi %struct.StorablePicture* [ %19, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0] + %29 = phi %struct.StorablePicture* [ %20, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0] + %30 = phi %struct.StorablePicture* [ %21, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0] + %31 = phi %struct.StorablePicture* [ %22, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0] + br i1 undef, label %bb57.i, label %bb40.i + +bb40.i: ; preds = %bb39.i + br i1 undef, label %bb57.i, label %bb41.i + +bb41.i: ; preds = %bb40.i + %storemerge10.i = select i1 undef, i32 2, i32 4 ; <i32> [#uses=1] + %32 = zext i32 %storemerge10.i to i64 ; <i64> [#uses=1] + br i1 undef, label %bb45.i, label %bb47.i + +bb45.i: ; preds = %bb41.i + %33 = getelementptr inbounds %struct.StorablePicture* %26, i64 0, i32 5, i64 undef, i64 %32, i64 undef ; <i64*> [#uses=1] + %34 = load i64* %33, align 8 ; <i64> [#uses=1] + br label %bb47.i + +bb47.i: ; preds = %bb45.i, %bb41.i + %storemerge11.i = phi i64 [ %34, %bb45.i ], [ 0, %bb41.i ] ; <i64> [#uses=0] + %scevgep246.i = getelementptr i64* undef, i64 undef ; <i64*> [#uses=0] + br label %bb64.i + +bb57.i: ; preds = %bb40.i, %bb39.i + br i1 undef, label %bb58.i, label %bb60.i + +bb58.i: ; preds = %bb57.i + br label %bb60.i + +bb60.i: ; preds = %bb58.i, %bb57.i + %35 = load i64*** undef, align 8 ; <i64**> [#uses=1] + %scevgep256.i = getelementptr i64** %35, i64 %indvar248.i ; <i64**> [#uses=1] + %36 = load i64** %scevgep256.i, align 8 ; <i64*> [#uses=1] + %scevgep243.i = getelementptr i64* %36, i64 undef ; <i64*> [#uses=1] + store i64 -1, i64* %scevgep243.i, align 8 + br label %bb64.i + +bb64.i: ; preds = %bb60.i, %bb47.i + br i1 undef, label %bb39.i, label %bb66.i + +bb66.i: ; preds = %bb64.i, %bb38.i + %37 = phi %struct.StorablePicture* [ %13, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2] + %38 = phi %struct.StorablePicture* [ %14, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2] + %39 = phi %struct.StorablePicture* [ %15, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2] + %40 = phi %struct.StorablePicture* [ %16, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=8] + %indvar.next249.i = add i64 %indvar248.i, 1 ; <i64> [#uses=1] + br i1 undef, label %bb38.i, label %bb68.i + +bb68.i: ; preds = %bb66.i, %bb67.preheader.i + %41 = phi %struct.StorablePicture* [ %2, %bb67.preheader.i ], [ %37, %bb66.i ] ; <%struct.StorablePicture*> [#uses=0] + %42 = phi %struct.StorablePicture* [ %3, %bb67.preheader.i ], [ %38, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1] + %43 = phi %struct.StorablePicture* [ %4, %bb67.preheader.i ], [ %39, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1] + br i1 undef, label %bb.nph48.i, label %bb108.i + +bb.nph48.i: ; preds = %bb68.i + br label %bb80.i + +bb80.i: ; preds = %bb104.i, %bb.nph48.i + %44 = phi %struct.StorablePicture* [ %42, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1] + %45 = phi %struct.StorablePicture* [ %43, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1] + br i1 undef, label %bb.nph39.i, label %bb104.i + +bb.nph39.i: ; preds = %bb80.i + br label %bb81.i + +bb81.i: ; preds = %bb102.i, %bb.nph39.i + %46 = phi %struct.StorablePicture* [ %44, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0] + %47 = phi %struct.StorablePicture* [ %45, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0] + br i1 undef, label %bb83.i, label %bb82.i + +bb82.i: ; preds = %bb81.i + br i1 undef, label %bb83.i, label %bb101.i + +bb83.i: ; preds = %bb82.i, %bb81.i + br label %bb102.i + +bb101.i: ; preds = %bb82.i + br label %bb102.i + +bb102.i: ; preds = %bb101.i, %bb83.i + %48 = load %struct.StorablePicture** %0, align 8 ; <%struct.StorablePicture*> [#uses=2] + br i1 undef, label %bb81.i, label %bb104.i + +bb104.i: ; preds = %bb102.i, %bb80.i + br label %bb80.i + +bb108.i: ; preds = %bb68.i + unreachable +} diff --git a/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll new file mode 100644 index 0000000..d84b63a --- /dev/null +++ b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s +; rdar://7362871 + +define void @bar(i32 %b, i32 %a) nounwind optsize ssp { +entry: +; CHECK: leal 15(%rsi), %edi +; CHECK-NOT: movl +; CHECK: call _foo + %0 = add i32 %a, 15 ; <i32> [#uses=1] + %1 = zext i32 %0 to i64 ; <i64> [#uses=1] + tail call void @foo(i64 %1) nounwind + ret void +} + +declare void @foo(i64) diff --git a/test/CodeGen/X86/break-anti-dependencies.ll b/test/CodeGen/X86/break-anti-dependencies.ll index 6b245c1..972b3cd 100644 --- a/test/CodeGen/X86/break-anti-dependencies.ll +++ b/test/CodeGen/X86/break-anti-dependencies.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=false > %t +; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=none > %t ; RUN: grep {%xmm0} %t | count 14 ; RUN: not grep {%xmm1} %t -; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies > %t +; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=critical > %t ; RUN: grep {%xmm0} %t | count 7 ; RUN: grep {%xmm1} %t | count 7 diff --git a/test/CodeGen/X86/constant-pool-sharing.ll b/test/CodeGen/X86/constant-pool-sharing.ll new file mode 100644 index 0000000..c3e97ad --- /dev/null +++ b/test/CodeGen/X86/constant-pool-sharing.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; llc should share constant pool entries between this integer vector +; and this floating-point vector since they have the same encoding. + +; CHECK: LCPI1_0(%rip), %xmm0 +; CHECK: movaps %xmm0, (%rdi) +; CHECK: movaps %xmm0, (%rsi) + +define void @foo(<4 x i32>* %p, <4 x float>* %q, i1 %t) nounwind { +entry: + br label %loop +loop: + store <4 x i32><i32 1073741824, i32 1073741824, i32 1073741824, i32 1073741824>, <4 x i32>* %p + store <4 x float><float 2.0, float 2.0, float 2.0, float 2.0>, <4 x float>* %q + br i1 %t, label %loop, label %ret +ret: + ret void +} diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll index 2b4b832..337f1b2 100644 --- a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll +++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll @@ -2,7 +2,7 @@ ; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5 ; RUN: grep {leal 1(\%rsi),} %t -define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind { +define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind optsize { entry: %0 = add i32 %i2, 1 ; <i32> [#uses=1] %1 = sext i32 %0 to i64 ; <i64> [#uses=1] diff --git a/test/CodeGen/X86/large-gep-scale.ll b/test/CodeGen/X86/large-gep-scale.ll new file mode 100644 index 0000000..143294e --- /dev/null +++ b/test/CodeGen/X86/large-gep-scale.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; PR5281 + +; After scaling, this type doesn't fit in memory. Codegen should generate +; correct addressing still. + +; CHECK: shll $2, %edx + +define fastcc i32* @_ada_smkr([2147483647 x i32]* %u, i32 %t) nounwind { + %x = getelementptr [2147483647 x i32]* %u, i32 %t, i32 0 + ret i32* %x +} diff --git a/test/CodeGen/X86/negative-stride-fptosi-user.ll b/test/CodeGen/X86/negative-stride-fptosi-user.ll new file mode 100644 index 0000000..332e0b9 --- /dev/null +++ b/test/CodeGen/X86/negative-stride-fptosi-user.ll @@ -0,0 +1,25 @@ +; RUN: llc < %s -march=x86-64 | grep cvtsi2sd + +; LSR previously eliminated the sitofp by introducing an induction +; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically +; possible to eliminate the sitofp using a proper -1.0 step though; this +; test should be changed if that is done. + +define void @foo(i32 %N) nounwind { +entry: + %0 = icmp slt i32 %N, 0 ; <i1> [#uses=1] + br i1 %0, label %bb, label %return + +bb: ; preds = %bb, %entry + %i.03 = phi i32 [ 0, %entry ], [ %2, %bb ] ; <i32> [#uses=2] + %1 = sitofp i32 %i.03 to double ; <double> [#uses=1] + tail call void @bar(double %1) nounwind + %2 = add nsw i32 %i.03, -1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %2, %N ; <i1> [#uses=1] + br i1 %exitcond, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} + +declare void @bar(double) diff --git a/test/CodeGen/X86/palignr-2.ll b/test/CodeGen/X86/palignr-2.ll new file mode 100644 index 0000000..2936641 --- /dev/null +++ b/test/CodeGen/X86/palignr-2.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -march=x86 -mattr=+ssse3 | FileCheck %s +; rdar://7341330 + +@a = global [4 x i32] [i32 4, i32 5, i32 6, i32 7], align 16 ; <[4 x i32]*> [#uses=1] +@c = common global [4 x i32] zeroinitializer, align 16 ; <[4 x i32]*> [#uses=1] +@b = global [4 x i32] [i32 0, i32 1, i32 2, i32 3], align 16 ; <[4 x i32]*> [#uses=1] + +define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp { +entry: +; CHECK: t1: +; palignr $3, %xmm1, %xmm0 + %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i32 24) nounwind readnone + store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 + ret void +} + +declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i32) nounwind readnone + +define void @t2() nounwind ssp { +entry: +; CHECK: t2: +; palignr $4, _b, %xmm0 + %0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] + %1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i32 32) nounwind readnone + store <2 x i64> %2, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 + ret void +} diff --git a/test/CodeGen/X86/pic-load-remat.ll b/test/CodeGen/X86/pic-load-remat.ll index 7729752..d930f76 100644 --- a/test/CodeGen/X86/pic-load-remat.ll +++ b/test/CodeGen/X86/pic-load-remat.ll @@ -1,4 +1,10 @@ ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb +; XFAIL: * + +; This is XFAIL'd because MachineLICM is now hoisting all of the loads, and the pic +; base appears killed in the entry block when remat is making its decisions. Remat's +; simple heuristic decides against rematting because it doesn't want to extend the +; live-range of the pic base; this isn't necessarily optimal. define void @f() nounwind { entry: diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 4042a09..f8d542e 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s +; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally @@ -41,3 +41,108 @@ bb: return: ret void } + +; Sink instructions with dead EFLAGS defs. + +; CHECK: zzz: +; CHECK: je +; CHECK-NEXT: orb + +define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone { +entry: + %tmp = zext i8 %a to i32 ; <i32> [#uses=1] + %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1] + %tmp3 = or i8 %b, -128 ; <i8> [#uses=1] + %tmp4 = and i8 %b, 127 ; <i8> [#uses=1] + %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1] + ret i8 %b_addr.0 +} + +; Codegen should hoist and CSE these constants. + +; CHECK: vv: +; CHECK: LCPI4_0(%rip), %xmm0 +; CHECK: LCPI4_1(%rip), %xmm1 +; CHECK: LCPI4_2(%rip), %xmm2 +; CHECK: align +; CHECK-NOT: LCPI +; CHECK: ret + +@_minusZero.6007 = internal constant <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00> ; <<4 x float>*> [#uses=0] +@twoTo23.6008 = internal constant <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06> ; <<4 x float>*> [#uses=0] + +define void @vv(float* %y, float* %x, i32* %n) nounwind ssp { +entry: + br label %bb60 + +bb: ; preds = %bb60 + %0 = bitcast float* %x_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1] + %1 = load <4 x float>* %0, align 16 ; <<4 x float>> [#uses=4] + %tmp20 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp22 = and <4 x i32> %tmp20, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> ; <<4 x i32>> [#uses=1] + %tmp23 = bitcast <4 x i32> %tmp22 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp25 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp27 = and <4 x i32> %tmp25, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> ; <<4 x i32>> [#uses=2] + %tmp30 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %tmp23, <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06>, i8 5) ; <<4 x float>> [#uses=1] + %tmp34 = bitcast <4 x float> %tmp30 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp36 = xor <4 x i32> %tmp34, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1] + %tmp37 = and <4 x i32> %tmp36, <i32 1258291200, i32 1258291200, i32 1258291200, i32 1258291200> ; <<4 x i32>> [#uses=1] + %tmp42 = or <4 x i32> %tmp37, %tmp27 ; <<4 x i32>> [#uses=1] + %tmp43 = bitcast <4 x i32> %tmp42 to <4 x float> ; <<4 x float>> [#uses=2] + %tmp45 = fadd <4 x float> %1, %tmp43 ; <<4 x float>> [#uses=1] + %tmp47 = fsub <4 x float> %tmp45, %tmp43 ; <<4 x float>> [#uses=2] + %tmp49 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %1, <4 x float> %tmp47, i8 1) ; <<4 x float>> [#uses=1] + %2 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1] + %3 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %2) nounwind readnone ; <<4 x float>> [#uses=1] + %tmp53 = fadd <4 x float> %tmp47, %3 ; <<4 x float>> [#uses=1] + %tmp55 = bitcast <4 x float> %tmp53 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp57 = or <4 x i32> %tmp55, %tmp27 ; <<4 x i32>> [#uses=1] + %tmp58 = bitcast <4 x i32> %tmp57 to <4 x float> ; <<4 x float>> [#uses=1] + %4 = bitcast float* %y_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1] + store <4 x float> %tmp58, <4 x float>* %4, align 16 + %5 = getelementptr float* %x_addr.0, i64 4 ; <float*> [#uses=1] + %6 = getelementptr float* %y_addr.0, i64 4 ; <float*> [#uses=1] + %7 = add i32 %i.0, 4 ; <i32> [#uses=1] + br label %bb60 + +bb60: ; preds = %bb, %entry + %i.0 = phi i32 [ 0, %entry ], [ %7, %bb ] ; <i32> [#uses=2] + %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; <float*> [#uses=2] + %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; <float*> [#uses=2] + %8 = load i32* %n, align 4 ; <i32> [#uses=1] + %9 = icmp sgt i32 %8, %i.0 ; <i1> [#uses=1] + br i1 %9, label %bb, label %return + +return: ; preds = %bb60 + ret void +} + +declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone + +declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone + +; CodeGen should use the correct register class when extracting +; a load from a zero-extending load for hoisting. + +; CHECK: default_get_pch_validity: +; CHECK: movl cl_options_count(%rip), %ecx + +@cl_options_count = external constant i32 ; <i32*> [#uses=2] + +define void @default_get_pch_validity() nounwind { +entry: + %tmp4 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1] + %tmp5 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1] + br i1 %tmp5, label %bb6, label %bb2 + +bb2: ; preds = %bb2, %entry + %i.019 = phi i64 [ 0, %entry ], [ %tmp25, %bb2 ] ; <i64> [#uses=1] + %tmp25 = add i64 %i.019, 1 ; <i64> [#uses=2] + %tmp11 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1] + %tmp12 = zext i32 %tmp11 to i64 ; <i64> [#uses=1] + %tmp13 = icmp ugt i64 %tmp12, %tmp25 ; <i1> [#uses=1] + br i1 %tmp13, label %bb2, label %bb6 + +bb6: ; preds = %bb2, %entry + ret void +} diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll index bf43deb..daf222e 100644 --- a/test/CodeGen/X86/vec_ins_extract.ll +++ b/test/CodeGen/X86/vec_ins_extract.ll @@ -3,6 +3,7 @@ ; This checks that various insert/extract idiom work without going to the ; stack. +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" define void @test(<4 x float>* %F, float %f) { entry: diff --git a/test/CodeGen/X86/x86-64-jumps.ll b/test/CodeGen/X86/x86-64-jumps.ll new file mode 100644 index 0000000..5ed6a23 --- /dev/null +++ b/test/CodeGen/X86/x86-64-jumps.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" + +define i8 @test1() nounwind ssp { +entry: + %0 = select i1 undef, i8* blockaddress(@test1, %bb), i8* blockaddress(@test1, %bb6) ; <i8*> [#uses=1] + indirectbr i8* %0, [label %bb, label %bb6] + +bb: ; preds = %entry + ret i8 1 + +bb6: ; preds = %entry + ret i8 2 +} + diff --git a/test/CodeGen/X86/x86-64-pic-10.ll b/test/CodeGen/X86/x86-64-pic-10.ll index 0f65e57..7baa7e5 100644 --- a/test/CodeGen/X86/x86-64-pic-10.ll +++ b/test/CodeGen/X86/x86-64-pic-10.ll @@ -3,7 +3,7 @@ @g = alias weak i32 ()* @f -define void @g() { +define void @h() { entry: %tmp31 = call i32 @g() ret void diff --git a/test/DebugInfo/2009-11-03-InsertExtractValue.ll b/test/DebugInfo/2009-11-03-InsertExtractValue.ll new file mode 100644 index 0000000..d9a67d6 --- /dev/null +++ b/test/DebugInfo/2009-11-03-InsertExtractValue.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +!0 = metadata !{i32 42} + +define <{i32, i32}> @f1() { +; CHECK: !dbg !0 + %r = insertvalue <{ i32, i32 }> zeroinitializer, i32 4, 1, !dbg !0 +; CHECK: !dbg !0 + %e = extractvalue <{ i32, i32 }> %r, 0, !dbg !0 + ret <{ i32, i32 }> %r +} diff --git a/test/Feature/terminators.ll b/test/Feature/terminators.ll new file mode 100644 index 0000000..1bca2a8 --- /dev/null +++ b/test/Feature/terminators.ll @@ -0,0 +1,43 @@ +; RUN: llvm-as < %s | llvm-dis > %t1.ll +; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll +; RUN: diff %t1.ll %t2.ll + + %int = type i32 + +define i32 @squared(i32 %i0) { + switch i32 %i0, label %Default [ + i32 1, label %Case1 + i32 2, label %Case2 + i32 4, label %Case4 + ] + +Default: ; preds = %0 + ret i32 -1 + +Case1: ; preds = %0 + ret i32 1 + +Case2: ; preds = %0 + ret i32 4 + +Case4: ; preds = %0 + ret i32 16 +} + + +@Addr = global i8* blockaddress(@indbrtest, %BB1) +@Addr3 = global i8* blockaddress(@squared, %Case1) + + +define i32 @indbrtest(i8* %P, i32* %Q) { + indirectbr i8* %P, [label %BB1, label %BB2, label %BB3] +BB1: + indirectbr i32* %Q, [] +BB2: + %R = bitcast i8* blockaddress(@indbrtest, %BB3) to i8* + indirectbr i8* %R, [label %BB1, label %BB2, label %BB3] +BB3: + ret i32 2 +} + + diff --git a/test/FrontendC++/2009-10-27-crash.cpp b/test/FrontendC++/2009-10-27-crash.cpp new file mode 100644 index 0000000..5641aa4 --- /dev/null +++ b/test/FrontendC++/2009-10-27-crash.cpp @@ -0,0 +1,43 @@ +// RUN: %llvmgxx -emit-llvm -S %s +// Radar 7328944 + +typedef struct +{ + unsigned short a : 1; + unsigned short b : 2; + unsigned short c : 1; + unsigned short d : 1; + unsigned short e : 1; + unsigned short f : 1; + unsigned short g : 2; + unsigned short : 7; + union + { + struct + { + unsigned char h : 1; + unsigned char i : 1; + unsigned char j : 1; + unsigned char : 5; + }; + struct + { + unsigned char k : 3; + unsigned char : 5; + }; + }; + unsigned char : 8; +} tt; + +typedef struct +{ + unsigned char s; + tt t; + unsigned int u; +} ttt; + +ttt X = { + 4, + { 0 }, + 55, +}; diff --git a/test/FrontendC++/integration-O2.cpp b/test/FrontendC++/integration-O2.cpp new file mode 100644 index 0000000..bb65ac2 --- /dev/null +++ b/test/FrontendC++/integration-O2.cpp @@ -0,0 +1,19 @@ +// RUN: %llvmgxx %s -O2 -S -o - | FileCheck %s + +// This test verifies that we get expected codegen out of the -O2 optimization +// level from the full optimizer. + + + +// Verify that ipsccp is running and can eliminate globals. +static int test1g = 42; +void test1f1() { + if (test1g == 0) test1g = 0; +} +int test1f2() { + return test1g; +} + +// CHECK: @_Z7test1f2v() +// CHECK: entry: +// CHECK-NEXT: ret i32 42 diff --git a/test/LLVMC/OptionPreprocessor.td b/test/LLVMC/OptionPreprocessor.td new file mode 100644 index 0000000..5b9f435 --- /dev/null +++ b/test/LLVMC/OptionPreprocessor.td @@ -0,0 +1,42 @@ +// Test for the OptionPreprocessor and any*. +// RUN: ignore tblgen -I %p/../../include --gen-llvmc %s -o %t +// RUN: grep W1 %t +// RUN: grep W2 %t +// RUN: grep W3 %t + +include "llvm/CompilerDriver/Common.td" + +def OptList : OptionList<[ +(switch_option "foo", (help "dummy")), +(switch_option "bar", (help "dummy")), +(switch_option "baz", (help "dummy")), +(parameter_option "foo_p", (help "dummy")), +(parameter_option "bar_p", (help "dummy")), +(parameter_option "baz_p", (help "dummy")) +]>; + +def Preprocess : OptionPreprocessor< +(case (and (switch_on "foo"), (any_switch_on ["bar", "baz"])), + (warning "W1"), + (and (switch_on ["foo", "bar"]), (any_empty ["foo_p", "bar_p"])), + (warning "W2"), + (and (empty ["foo_p", "bar_p"]), (any_not_empty ["baz_p"])), + (warning "W3")) +>; + +// Shut up warnings... +def dummy : Tool< +[(in_language "dummy"), + (out_language "dummy"), + (output_suffix "d"), + (cmd_line "dummy $INFILE -o $OUTFILE"), + (actions (case (switch_on "foo"), (error), + (switch_on "bar"), (error), + (switch_on "baz"), (error), + (not_empty "foo_p"), (error), + (not_empty "bar_p"), (error), + (not_empty "baz_p"), (error))) +]>; + +def Graph : CompilationGraph<[Edge<"root", "dummy">]>; + diff --git a/test/Makefile b/test/Makefile index 4955c2e..ede1b44 100644 --- a/test/Makefile +++ b/test/Makefile @@ -78,9 +78,13 @@ endif # Both AuroraUX & Solaris do not have the -m flag for ulimit ifeq ($(HOST_OS),SunOS) ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -v 512000 ; -else +else # !SunOS +ifeq ($(HOST_OS),AuroraUX) +ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -v 512000 ; +else # !AuroraUX ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -m 512000 ; ulimit -v 512000 ; -endif +endif # AuroraUX +endif # SunOS ifneq ($(RUNTEST),) check-local:: site.exp diff --git a/test/Other/2003-02-19-LoopInfoNestingBug.ll b/test/Other/2003-02-19-LoopInfoNestingBug.ll index 267b0e8..13f8351 100644 --- a/test/Other/2003-02-19-LoopInfoNestingBug.ll +++ b/test/Other/2003-02-19-LoopInfoNestingBug.ll @@ -3,7 +3,7 @@ ; and instead nests it just inside loop "Top" ; ; RUN: opt < %s -analyze -loops | \ -; RUN: grep { Loop at depth 3 containing: %Inner<header><latch><exit>} +; RUN: grep { Loop at depth 3 containing: %Inner<header><latch><exiting>} ; define void @test() { br label %Top diff --git a/test/Scripts/macho-dump b/test/Scripts/macho-dump index 12ec26d..5b9943a 100755 --- a/test/Scripts/macho-dump +++ b/test/Scripts/macho-dump @@ -104,6 +104,9 @@ def dumpLoadCommand(f, i, opts): dumpSymtabCommand(f, opts) elif cmd == 11: dumpDysymtabCommand(f, opts) + elif cmd == 27: + import uuid + print " ('uuid', %s)" % uuid.UUID(bytes=f.read(16)) else: print >>sys.stderr,"%s: warning: unknown load command: %r" % (sys.argv[0], cmd) f.read(cmdSize - 8) diff --git a/test/Transforms/ArgumentPromotion/aggregate-promote.ll b/test/Transforms/ArgumentPromotion/aggregate-promote.ll index 6a60e61..12de511 100644 --- a/test/Transforms/ArgumentPromotion/aggregate-promote.ll +++ b/test/Transforms/ArgumentPromotion/aggregate-promote.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -instcombine -S | not grep load +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" %QuadTy = type { i32, i32, i32, i32 } @G = constant %QuadTy { diff --git a/test/Transforms/ArgumentPromotion/basictest.ll b/test/Transforms/ArgumentPromotion/basictest.ll index 87f6371..ac9d7bf 100644 --- a/test/Transforms/ArgumentPromotion/basictest.ll +++ b/test/Transforms/ArgumentPromotion/basictest.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -mem2reg -S | not grep alloca +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define internal i32 @test(i32* %X, i32* %Y) { %A = load i32* %X ; <i32> [#uses=1] %B = load i32* %Y ; <i32> [#uses=1] diff --git a/test/Transforms/ArgumentPromotion/byval.ll b/test/Transforms/ArgumentPromotion/byval.ll index 052528a..44b26fc 100644 --- a/test/Transforms/ArgumentPromotion/byval.ll +++ b/test/Transforms/ArgumentPromotion/byval.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -scalarrepl -S | not grep load +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Argpromote + scalarrepl should change this to passing the two integers by value. %struct.ss = type { i32, i64 } diff --git a/test/Transforms/ArgumentPromotion/chained.ll b/test/Transforms/ArgumentPromotion/chained.ll index 5ccb752..c9a4538 100644 --- a/test/Transforms/ArgumentPromotion/chained.ll +++ b/test/Transforms/ArgumentPromotion/chained.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -instcombine -S | not grep load +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @G1 = constant i32 0 ; <i32*> [#uses=1] @G2 = constant i32* @G1 ; <i32**> [#uses=1] diff --git a/test/Transforms/ArgumentPromotion/control-flow2.ll b/test/Transforms/ArgumentPromotion/control-flow2.ll index 79b44d4..9a8afc3 100644 --- a/test/Transforms/ArgumentPromotion/control-flow2.ll +++ b/test/Transforms/ArgumentPromotion/control-flow2.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -argpromotion -S | \ ; RUN: grep {load i32\\* %A} +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define internal i32 @callee(i1 %C, i32* %P) { br i1 %C, label %T, label %F diff --git a/test/Transforms/ConstProp/float-to-ptr-cast.ll b/test/Transforms/ConstProp/float-to-ptr-cast.ll index d8eb3e8..937f606 100644 --- a/test/Transforms/ConstProp/float-to-ptr-cast.ll +++ b/test/Transforms/ConstProp/float-to-ptr-cast.ll @@ -1,12 +1,15 @@ -; RUN: opt < %s -constprop -S | \ -; RUN: grep -F {ret i32* null} | count 2 +; RUN: opt < %s -constprop -S | FileCheck %s define i32* @test1() { %X = inttoptr i64 0 to i32* ; <i32*> [#uses=1] ret i32* %X } +; CHECK: ret i32* null + define i32* @test2() { ret i32* null } +; CHECK: ret i32* null + diff --git a/test/Transforms/ConstProp/loads.ll b/test/Transforms/ConstProp/loads.ll index f3e7f6a..edd26b8 100644 --- a/test/Transforms/ConstProp/loads.ll +++ b/test/Transforms/ConstProp/loads.ll @@ -2,88 +2,102 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -@test1 = constant {{i32,i8},i32} {{i32,i8} { i32 -559038737, i8 186 }, i32 -889275714 } -@test2 = constant double 1.0 -@test3 = constant {i64, i64} { i64 123, i64 112312312 } +@g1 = constant {{i32,i8},i32} {{i32,i8} { i32 -559038737, i8 186 }, i32 -889275714 } +@g2 = constant double 1.0 +@g3 = constant {i64, i64} { i64 123, i64 112312312 } ; Simple load define i32 @test1() { - %r = load i32* getelementptr ({{i32,i8},i32}* @test1, i32 0, i32 0, i32 0) + %r = load i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) ret i32 %r -; @test1 +; CHECK: @test1 ; CHECK: ret i32 -559038737 } ; PR3152 ; Load of first 16 bits of 32-bit value. define i16 @test2() { - %r = load i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @test1, i32 0, i32 0, i32 0) to i16*) + %r = load i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*) ret i16 %r -; @test2 +; CHECK: @test2 ; CHECK: ret i16 -16657 } ; Load of second 16 bits of 32-bit value. define i16 @test3() { - %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @test1, i32 0, i32 0, i32 0) to i16*), i32 1) + %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*), i32 1) ret i16 %r -; @test3 +; CHECK: @test3 ; CHECK: ret i16 -8531 } ; Load of 8 bit field + tail padding. define i16 @test4() { - %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @test1, i32 0, i32 0, i32 0) to i16*), i32 2) + %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*), i32 2) ret i16 %r -; @test4 +; CHECK: @test4 ; CHECK: ret i16 186 } ; Load of double bits. define i64 @test6() { - %r = load i64* bitcast(double* @test2 to i64*) + %r = load i64* bitcast(double* @g2 to i64*) ret i64 %r -; @test6 +; CHECK: @test6 ; CHECK: ret i64 4607182418800017408 } ; Load of double bits. define i16 @test7() { - %r = load i16* bitcast(double* @test2 to i16*) + %r = load i16* bitcast(double* @g2 to i16*) ret i16 %r -; @test7 +; CHECK: @test7 ; CHECK: ret i16 0 } ; Double load. define double @test8() { - %r = load double* bitcast({{i32,i8},i32}* @test1 to double*) + %r = load double* bitcast({{i32,i8},i32}* @g1 to double*) ret double %r -; @test8 -; CHECK: ret double 0xDEADBEBA +; CHECK: @test8 +; CHECK: ret double 0xBADEADBEEF } ; i128 load. define i128 @test9() { - %r = load i128* bitcast({i64, i64}* @test3 to i128*) + %r = load i128* bitcast({i64, i64}* @g3 to i128*) ret i128 %r -; @test9 -; CHECK: ret i128 112312312 +; CHECK: @test9 +; CHECK: ret i128 2071796475790618158476296315 } ; vector load. define <2 x i64> @test10() { - %r = load <2 x i64>* bitcast({i64, i64}* @test3 to <2 x i64>*) + %r = load <2 x i64>* bitcast({i64, i64}* @g3 to <2 x i64>*) ret <2 x i64> %r -; @test10 -; CHECK: ret <2 x i64> <i64 112312312, i64 0> +; CHECK: @test10 +; CHECK: ret <2 x i64> <i64 123, i64 112312312> } + +; PR5287 +@g4 = internal constant { i8, i8 } { i8 -95, i8 8 } + +define i16 @test11() nounwind { +entry: + %a = load i16* bitcast ({ i8, i8 }* @g4 to i16*) + ret i16 %a + +; CHECK: @test11 +; CHECK: ret i16 2209 +} + + diff --git a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll index 4a5d6e2..9fcbf07 100644 --- a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll +++ b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -dse -S | not grep tmp5 ; PR2599 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define void @foo({ i32, i32 }* %x) nounwind { entry: diff --git a/test/Transforms/DeadStoreElimination/PartialStore.ll b/test/Transforms/DeadStoreElimination/PartialStore.ll index 0881cb9..ab1edf5 100644 --- a/test/Transforms/DeadStoreElimination/PartialStore.ll +++ b/test/Transforms/DeadStoreElimination/PartialStore.ll @@ -2,6 +2,7 @@ ; RUN: not grep {store i8} ; Ensure that the dead store is deleted in this case. It is wholely ; overwritten by the second store. +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define i32 @test() { %V = alloca i32 ; <i32*> [#uses=3] %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1] diff --git a/test/Transforms/DeadStoreElimination/context-sensitive.ll b/test/Transforms/DeadStoreElimination/context-sensitive.ll index 0da416c..7954310 100644 --- a/test/Transforms/DeadStoreElimination/context-sensitive.ll +++ b/test/Transforms/DeadStoreElimination/context-sensitive.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -dse -S | not grep DEAD +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" declare void @ext() diff --git a/test/Transforms/DeadStoreElimination/lifetime-simple.ll b/test/Transforms/DeadStoreElimination/lifetime-simple.ll new file mode 100644 index 0000000..430e700 --- /dev/null +++ b/test/Transforms/DeadStoreElimination/lifetime-simple.ll @@ -0,0 +1,18 @@ +; RUN: opt < %s -dse -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + +define i8 @test2(i8* %P) nounwind { +; CHECK: @test2 +; CHECK-NOT: store i8 1 +; CHECK: ret i8 0 +entry: + call void @llvm.lifetime.start(i64 32, i8* %P) + call void @llvm.lifetime.end(i64 32, i8* %P) + store i8 1, i8* %P + ret i8 0 +} + +declare {}* @llvm.lifetime.start(i64 %S, i8* nocapture %P) readonly +declare void @llvm.lifetime.end(i64 %S, i8* nocapture %P)
\ No newline at end of file diff --git a/test/Transforms/DeadStoreElimination/simple.ll b/test/Transforms/DeadStoreElimination/simple.ll index e89d3ab..d859640 100644 --- a/test/Transforms/DeadStoreElimination/simple.ll +++ b/test/Transforms/DeadStoreElimination/simple.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -dse -S | not grep DEAD +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define void @test(i32* %Q, i32* %P) { %DEAD = load i32* %Q ; <i32> [#uses=1] diff --git a/test/Transforms/GVN/invariant-simple.ll b/test/Transforms/GVN/invariant-simple.ll new file mode 100644 index 0000000..6de75f1 --- /dev/null +++ b/test/Transforms/GVN/invariant-simple.ll @@ -0,0 +1,36 @@ +; RUN: opt < %s -gvn -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + +define i8 @test(i8* %P) nounwind { +; CHECK: @test +; CHECK-NOT: load +; CHECK: ret i8 +entry: + store i8 1, i8* %P + %0 = call {}* @llvm.invariant.start(i64 32, i8* %P) + %1 = tail call i32 @foo(i8* %P) + call void @llvm.invariant.end({}* %0, i64 32, i8* %P) + %2 = load i8* %P + ret i8 %2 +} + +define i8 @test2(i8* %P) nounwind { +; CHECK: @test2 +; CHECK: store i8 1 +; CHECK: store i8 2 +; CHECK: ret i8 0 +entry: + store i8 1, i8* %P + %0 = call {}* @llvm.invariant.start(i64 32, i8* %P) + %1 = tail call i32 @bar(i8* %P) + call void @llvm.invariant.end({}* %0, i64 32, i8* %P) + store i8 2, i8* %P + ret i8 0 +} + +declare i32 @foo(i8*) nounwind +declare i32 @bar(i8*) nounwind readonly +declare {}* @llvm.invariant.start(i64 %S, i8* nocapture %P) readonly +declare void @llvm.invariant.end({}* %S, i64 %SS, i8* nocapture %P)
\ No newline at end of file diff --git a/test/Transforms/GVN/lifetime-simple.ll b/test/Transforms/GVN/lifetime-simple.ll new file mode 100644 index 0000000..00a0c29 --- /dev/null +++ b/test/Transforms/GVN/lifetime-simple.ll @@ -0,0 +1,20 @@ +; RUN: opt < %s -gvn -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + +define i8 @test(i8* %P) nounwind { +; CHECK: @test +; CHECK-NOT: load +; CHECK: ret i8 undef +entry: + call void @llvm.lifetime.start(i64 32, i8* %P) + %0 = load i8* %P + store i8 1, i8* %P + call void @llvm.lifetime.end(i64 32, i8* %P) + %1 = load i8* %P + ret i8 %1 +} + +declare {}* @llvm.lifetime.start(i64 %S, i8* nocapture %P) readonly +declare void @llvm.lifetime.end(i64 %S, i8* nocapture %P)
\ No newline at end of file diff --git a/test/Transforms/GlobalOpt/globalsra-partial.ll b/test/Transforms/GlobalOpt/globalsra-partial.ll index 9a068e9..06485b5 100644 --- a/test/Transforms/GlobalOpt/globalsra-partial.ll +++ b/test/Transforms/GlobalOpt/globalsra-partial.ll @@ -1,6 +1,7 @@ ; In this case, the global can only be broken up by one level. ; RUN: opt < %s -globalopt -S | not grep 12345 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @G = internal global { i32, [4 x float] } zeroinitializer ; <{ i32, [4 x float] }*> [#uses=3] diff --git a/test/Transforms/GlobalOpt/globalsra.ll b/test/Transforms/GlobalOpt/globalsra.ll index 276ca64..6d8f220 100644 --- a/test/Transforms/GlobalOpt/globalsra.ll +++ b/test/Transforms/GlobalOpt/globalsra.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -globalopt -S | not grep global +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @G = internal global { i32, float, { double } } { i32 1, diff --git a/test/Transforms/GlobalOpt/heap-sra-3.ll b/test/Transforms/GlobalOpt/heap-sra-3.ll new file mode 100644 index 0000000..1496485 --- /dev/null +++ b/test/Transforms/GlobalOpt/heap-sra-3.ll @@ -0,0 +1,41 @@ +; RUN: opt < %s -globalopt -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin10" + + %struct.foo = type { i32, i32 } +@X = internal global %struct.foo* null +; CHECK: @X.f0 +; CHECK: @X.f1 + +define void @bar(i32 %Size) nounwind noinline { +entry: + %mallocsize = mul i32 ptrtoint (%struct.foo* getelementptr (%struct.foo* null, i32 1) to i32), %Size, ; <i32> [#uses=1] +; CHECK: mul i32 %Size + %malloccall = tail call i8* @malloc(i32 %mallocsize) ; <i8*> [#uses=1] + %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1] + store %struct.foo* %.sub, %struct.foo** @X, align 4 + ret void +} + +declare noalias i8* @malloc(i32) + +define i32 @baz() nounwind readonly noinline { +bb1.thread: + %0 = load %struct.foo** @X, align 4 + br label %bb1 + +bb1: ; preds = %bb1, %bb1.thread + %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] + %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ] + %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0 + %2 = load i32* %1, align 4 + %3 = add i32 %2, %sum.0.reg2mem.0 + %indvar.next = add i32 %i.0.reg2mem.0, 1 + %exitcond = icmp eq i32 %indvar.next, 1200 + br i1 %exitcond, label %bb2, label %bb1 + +bb2: ; preds = %bb1 + ret i32 %3 +} + diff --git a/test/Transforms/GlobalOpt/heap-sra-4.ll b/test/Transforms/GlobalOpt/heap-sra-4.ll new file mode 100644 index 0000000..ae97ef1 --- /dev/null +++ b/test/Transforms/GlobalOpt/heap-sra-4.ll @@ -0,0 +1,41 @@ +; RUN: opt < %s -globalopt -S | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + + %struct.foo = type { i32, i32 } +@X = internal global %struct.foo* null +; CHECK: @X.f0 +; CHECK: @X.f1 + +define void @bar(i32 %Size) nounwind noinline { +entry: + %mallocsize = shl i32 ptrtoint (%struct.foo* getelementptr (%struct.foo* null, i32 1) to i32), 9, ; <i32> [#uses=1] + %malloccall = tail call i8* @malloc(i32 %mallocsize) ; <i8*> [#uses=1] +; CHECK: @malloc(i32 mul (i32 512 + %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1] + store %struct.foo* %.sub, %struct.foo** @X, align 4 + ret void +} + +declare noalias i8* @malloc(i32) + +define i32 @baz() nounwind readonly noinline { +bb1.thread: + %0 = load %struct.foo** @X, align 4 + br label %bb1 + +bb1: ; preds = %bb1, %bb1.thread + %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] + %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ] + %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0 + %2 = load i32* %1, align 4 + %3 = add i32 %2, %sum.0.reg2mem.0 + %indvar.next = add i32 %i.0.reg2mem.0, 1 + %exitcond = icmp eq i32 %indvar.next, 1200 + br i1 %exitcond, label %bb2, label %bb1 + +bb2: ; preds = %bb1 + ret i32 %3 +} + diff --git a/test/Transforms/GlobalOpt/malloc-promote-1.ll b/test/Transforms/GlobalOpt/malloc-promote-1.ll index 5d4696f..fd510e3 100644 --- a/test/Transforms/GlobalOpt/malloc-promote-1.ll +++ b/test/Transforms/GlobalOpt/malloc-promote-1.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -globalopt -S | not grep global +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @G = internal global i32* null ; <i32**> [#uses=3] diff --git a/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll b/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll index 86e90c7..3a5c0b6 100644 --- a/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll +++ b/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll @@ -2,6 +2,7 @@ ; RUN: not grep inttoptr %t ; RUN: not grep ptrtoint %t ; RUN: grep scevgep %t +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Indvars shouldn't need inttoptr/ptrtoint to expand an address here. diff --git a/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll b/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll index d249432..e17368b 100644 --- a/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll +++ b/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -indvars -S \ ; RUN: | grep {\[%\]p.2.ip.1 = getelementptr \\\[3 x \\\[3 x double\\\]\\\]\\* \[%\]p, i64 2, i64 \[%\]tmp, i64 1} +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Indvars shouldn't expand this to ; %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 0, i64 %tmp, i64 19 diff --git a/test/Transforms/Inline/basictest.ll b/test/Transforms/Inline/basictest.ll index 71e00cb..6531b9e 100644 --- a/test/Transforms/Inline/basictest.ll +++ b/test/Transforms/Inline/basictest.ll @@ -1,12 +1,47 @@ -; RUN: opt < %s -inline -disable-output -print-function 2> /dev/null +; RUN: opt < %s -inline -scalarrepl -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -define i32 @func(i32 %i) { +define i32 @test1f(i32 %i) { ret i32 %i } -define i32 @main(i32 %argc) { - %X = call i32 @func( i32 7 ) ; <i32> [#uses=1] - %Y = add i32 %X, %argc ; <i32> [#uses=1] +define i32 @test1(i32 %W) { + %X = call i32 @test1f(i32 7) + %Y = add i32 %X, %W ret i32 %Y +; CHECK: @test1( +; CHECK-NEXT: %Y = add i32 7, %W +; CHECK-NEXT: ret i32 %Y } + + +; rdar://7339069 + +%T = type { i32, i32 } + +; CHECK-NOT: @test2f +define internal %T* @test2f(i1 %cond, %T* %P) { + br i1 %cond, label %T, label %F + +T: + %A = getelementptr %T* %P, i32 0, i32 0 + store i32 42, i32* %A + ret %T* %P + +F: + ret %T* %P +} + +define i32 @test2(i1 %cond) { + %A = alloca %T + + %B = call %T* @test2f(i1 %cond, %T* %A) + %C = getelementptr %T* %B, i32 0, i32 0 + %D = load i32* %C + ret i32 %D + +; CHECK: @test2( +; CHECK-NOT: = alloca +; CHECK: ret i32 42 +} diff --git a/test/Transforms/Inline/callgraph-update.ll b/test/Transforms/Inline/callgraph-update.ll index 528e9af..ff0120b 100644 --- a/test/Transforms/Inline/callgraph-update.ll +++ b/test/Transforms/Inline/callgraph-update.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -inline -loop-rotate | llvm-dis +; RUN: opt < %s -inline -loop-rotate -verify-dom-info -verify-loop-info -disable-output ; PR3601 declare void @solve() diff --git a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll index 4d3d48e..fdb8fd9 100644 --- a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll +++ b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" declare void @free(i8*) diff --git a/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll b/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll index 3862de4..710aff2 100644 --- a/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll +++ b/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -instcombine -S | not grep call ; RUN: opt < %s -std-compile-opts -S | not grep xyz +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @.str = internal constant [4 x i8] c"xyz\00" ; <[4 x i8]*> [#uses=1] diff --git a/test/Transforms/InstCombine/add-shrink.ll b/test/Transforms/InstCombine/add-shrink.ll index 52b8e32..cc57478 100644 --- a/test/Transforms/InstCombine/add-shrink.ll +++ b/test/Transforms/InstCombine/add-shrink.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | grep {add i32} +; RUN: opt < %s -instcombine -S | grep {add nsw i32} ; RUN: opt < %s -instcombine -S | grep sext | count 1 ; Should only have one sext and the add should be i32 instead of i64. diff --git a/test/Transforms/InstCombine/add-sitofp.ll b/test/Transforms/InstCombine/add-sitofp.ll index 24319df..98a8cb4 100644 --- a/test/Transforms/InstCombine/add-sitofp.ll +++ b/test/Transforms/InstCombine/add-sitofp.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | grep {add i32} +; RUN: opt < %s -instcombine -S | grep {add nsw i32} define double @x(i32 %a, i32 %b) nounwind { %m = lshr i32 %a, 24 diff --git a/test/Transforms/InstCombine/align-2d-gep.ll b/test/Transforms/InstCombine/align-2d-gep.ll index 80aacbc..eeca5c0 100644 --- a/test/Transforms/InstCombine/align-2d-gep.ll +++ b/test/Transforms/InstCombine/align-2d-gep.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | grep {align 16} | count 1 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; A multi-dimensional array in a nested loop doing vector stores that ; aren't yet aligned. Instcombine can understand the addressing in the diff --git a/test/Transforms/InstCombine/align-addr.ll b/test/Transforms/InstCombine/align-addr.ll index 4253937..d8ad5a9 100644 --- a/test/Transforms/InstCombine/align-addr.ll +++ b/test/Transforms/InstCombine/align-addr.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | grep {align 16} | count 1 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Instcombine should be able to prove vector alignment in the ; presence of a few mild address computation tricks. diff --git a/test/Transforms/InstCombine/align-inc.ll b/test/Transforms/InstCombine/align-inc.ll index 0260ca2..71512b3 100644 --- a/test/Transforms/InstCombine/align-inc.ll +++ b/test/Transforms/InstCombine/align-inc.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -instcombine -S | grep {GLOBAL.*align 16} ; RUN: opt < %s -instcombine -S | grep {tmp = load} +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @GLOBAL = internal global [4 x i32] zeroinitializer diff --git a/test/Transforms/InstCombine/alloca.ll b/test/Transforms/InstCombine/alloca.ll index 13d664d..b9add4d 100644 --- a/test/Transforms/InstCombine/alloca.ll +++ b/test/Transforms/InstCombine/alloca.ll @@ -1,4 +1,5 @@ ; Zero byte allocas should be deleted. +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; RUN: opt < %s -instcombine -S | \ ; RUN: not grep alloca diff --git a/test/Transforms/InstCombine/call.ll b/test/Transforms/InstCombine/call.ll index 1e37eec..05c063d 100644 --- a/test/Transforms/InstCombine/call.ll +++ b/test/Transforms/InstCombine/call.ll @@ -1,6 +1,7 @@ ; Ignore stderr, we expect warnings there ; RUN: opt < %s -instcombine 2> /dev/null -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Simple case, argument translatable without changing the value declare void @test1a(i8*) diff --git a/test/Transforms/InstCombine/cast-load-gep.ll b/test/Transforms/InstCombine/cast-load-gep.ll index 57f021c..271c737 100644 --- a/test/Transforms/InstCombine/cast-load-gep.ll +++ b/test/Transforms/InstCombine/cast-load-gep.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -instcombine -globaldce -S | \ ; RUN: not grep Array +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Pulling the cast out of the load allows us to eliminate the load, and then ; the whole array. diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll index c5266f3..79f86e9 100644 --- a/test/Transforms/InstCombine/cast.ll +++ b/test/Transforms/InstCombine/cast.ll @@ -1,5 +1,6 @@ ; Tests to make sure elimination of casts is working correctly ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @inbuf = external global [32832 x i8] ; <[32832 x i8]*> [#uses=1] diff --git a/test/Transforms/InstCombine/cast2.ll b/test/Transforms/InstCombine/cast2.ll index 0ae869f..2941ee0 100644 --- a/test/Transforms/InstCombine/cast2.ll +++ b/test/Transforms/InstCombine/cast2.ll @@ -1,5 +1,6 @@ ; Tests to make sure elimination of casts is working correctly ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define i16 @test1(i16 %a) { %tmp = zext i16 %a to i32 ; <i32> [#uses=2] diff --git a/test/Transforms/InstCombine/constant-fold-gep.ll b/test/Transforms/InstCombine/constant-fold-gep.ll index 5a7aef3..4be1a9c 100644 --- a/test/Transforms/InstCombine/constant-fold-gep.ll +++ b/test/Transforms/InstCombine/constant-fold-gep.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; Constant folding should fix notionally out-of-bounds indices ; and add inbounds keywords. diff --git a/test/Transforms/InstCombine/fold-bin-operand.ll b/test/Transforms/InstCombine/fold-bin-operand.ll index b837985..d0d072a 100644 --- a/test/Transforms/InstCombine/fold-bin-operand.ll +++ b/test/Transforms/InstCombine/fold-bin-operand.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | not grep icmp +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define i1 @f(i1 %x) { %b = and i1 %x, icmp eq (i8* inttoptr (i32 1 to i8*), i8* inttoptr (i32 2 to i8*)) diff --git a/test/Transforms/InstCombine/fp-ret-bitcast.ll b/test/Transforms/InstCombine/fp-ret-bitcast.ll index 169340a..35ece42 100644 --- a/test/Transforms/InstCombine/fp-ret-bitcast.ll +++ b/test/Transforms/InstCombine/fp-ret-bitcast.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -instcombine -S | \ ; RUN: grep {call float bitcast} | count 1 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" %struct.NSObject = type { %struct.objc_class* } %struct.NSArray = type { %struct.NSObject } %struct.objc_class = type opaque diff --git a/test/Transforms/InstCombine/loadstore-alignment.ll b/test/Transforms/InstCombine/loadstore-alignment.ll index ff34017..9fbe683 100644 --- a/test/Transforms/InstCombine/loadstore-alignment.ll +++ b/test/Transforms/InstCombine/loadstore-alignment.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | grep {, align 16} | count 14 +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @x = external global <2 x i64>, align 16 @xx = external global [13 x <2 x i64>], align 16 diff --git a/test/Transforms/InstCombine/malloc-free-delete.ll b/test/Transforms/InstCombine/malloc-free-delete.ll index fd91e44..a4b7496 100644 --- a/test/Transforms/InstCombine/malloc-free-delete.ll +++ b/test/Transforms/InstCombine/malloc-free-delete.ll @@ -1,11 +1,13 @@ -; RUN: opt < %s -instcombine -S | grep {ret i32 0} -; RUN: opt < %s -instcombine -globaldce -S | not grep malloc +; RUN: opt < %s -instcombine -globaldce -S | FileCheck %s ; PR1201 define i32 @main(i32 %argc, i8** %argv) { %c_19 = alloca i8* ; <i8**> [#uses=2] %malloc_206 = malloc i8, i32 10 ; <i8*> [#uses=1] +; CHECK-NOT: malloc store i8* %malloc_206, i8** %c_19 %tmp_207 = load i8** %c_19 ; <i8*> [#uses=1] free i8* %tmp_207 +; CHECK-NOT: free ret i32 0 +; CHECK: ret i32 0 } diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index 37f934b..b72480b 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -1,171 +1,255 @@ ; This test makes sure that these instructions are properly eliminated. ; -; RUN: opt < %s -instcombine -S | \ -; RUN: grep -v xor | not grep {or } -; END. +; RUN: opt < %s -instcombine -S | FileCheck %s define i32 @test1(i32 %A) { - %B = or i32 %A, 0 ; <i32> [#uses=1] + %B = or i32 %A, 0 ret i32 %B +; CHECK: @test1 +; CHECK: ret i32 %A } define i32 @test2(i32 %A) { - %B = or i32 %A, -1 ; <i32> [#uses=1] + %B = or i32 %A, -1 ret i32 %B +; CHECK: @test2 +; CHECK: ret i32 -1 } define i8 @test2a(i8 %A) { - %B = or i8 %A, -1 ; <i8> [#uses=1] + %B = or i8 %A, -1 ret i8 %B +; CHECK: @test2a +; CHECK: ret i8 -1 } define i1 @test3(i1 %A) { - %B = or i1 %A, false ; <i1> [#uses=1] + %B = or i1 %A, false ret i1 %B +; CHECK: @test3 +; CHECK: ret i1 %A } define i1 @test4(i1 %A) { - %B = or i1 %A, true ; <i1> [#uses=1] + %B = or i1 %A, true ret i1 %B +; CHECK: @test4 +; CHECK: ret i1 true } define i1 @test5(i1 %A) { - %B = or i1 %A, %A ; <i1> [#uses=1] + %B = or i1 %A, %A ret i1 %B +; CHECK: @test5 +; CHECK: ret i1 %A } define i32 @test6(i32 %A) { - %B = or i32 %A, %A ; <i32> [#uses=1] + %B = or i32 %A, %A ret i32 %B +; CHECK: @test6 +; CHECK: ret i32 %A } ; A | ~A == -1 define i32 @test7(i32 %A) { - %NotA = xor i32 -1, %A ; <i32> [#uses=1] - %B = or i32 %A, %NotA ; <i32> [#uses=1] + %NotA = xor i32 -1, %A + %B = or i32 %A, %NotA ret i32 %B +; CHECK: @test7 +; CHECK: ret i32 -1 } define i8 @test8(i8 %A) { - %B = or i8 %A, -2 ; <i8> [#uses=1] - %C = or i8 %B, 1 ; <i8> [#uses=1] + %B = or i8 %A, -2 + %C = or i8 %B, 1 ret i8 %C +; CHECK: @test8 +; CHECK: ret i8 -1 } ; Test that (A|c1)|(B|c2) == (A|B)|(c1|c2) define i8 @test9(i8 %A, i8 %B) { - %C = or i8 %A, 1 ; <i8> [#uses=1] - %D = or i8 %B, -2 ; <i8> [#uses=1] - %E = or i8 %C, %D ; <i8> [#uses=1] + %C = or i8 %A, 1 + %D = or i8 %B, -2 + %E = or i8 %C, %D ret i8 %E +; CHECK: @test9 +; CHECK: ret i8 -1 } define i8 @test10(i8 %A) { - %B = or i8 %A, 1 ; <i8> [#uses=1] - %C = and i8 %B, -2 ; <i8> [#uses=1] + %B = or i8 %A, 1 + %C = and i8 %B, -2 ; (X & C1) | C2 --> (X | C2) & (C1|C2) - %D = or i8 %C, -2 ; <i8> [#uses=1] + %D = or i8 %C, -2 ret i8 %D +; CHECK: @test10 +; CHECK: ret i8 -2 } define i8 @test11(i8 %A) { - %B = or i8 %A, -2 ; <i8> [#uses=1] - %C = xor i8 %B, 13 ; <i8> [#uses=1] + %B = or i8 %A, -2 + %C = xor i8 %B, 13 ; (X ^ C1) | C2 --> (X | C2) ^ (C1&~C2) - %D = or i8 %C, 1 ; <i8> [#uses=1] - %E = xor i8 %D, 12 ; <i8> [#uses=1] + %D = or i8 %C, 1 + %E = xor i8 %D, 12 ret i8 %E +; CHECK: @test11 +; CHECK: ret i8 -1 } define i32 @test12(i32 %A) { ; Should be eliminated - %B = or i32 %A, 4 ; <i32> [#uses=1] - %C = and i32 %B, 8 ; <i32> [#uses=1] + %B = or i32 %A, 4 + %C = and i32 %B, 8 ret i32 %C +; CHECK: @test12 +; CHECK: %C = and i32 %A, 8 +; CHECK: ret i32 %C } define i32 @test13(i32 %A) { - %B = or i32 %A, 12 ; <i32> [#uses=1] + %B = or i32 %A, 12 ; Always equal to 8 - %C = and i32 %B, 8 ; <i32> [#uses=1] + %C = and i32 %B, 8 ret i32 %C +; CHECK: @test13 +; CHECK: ret i32 8 } define i1 @test14(i32 %A, i32 %B) { - %C1 = icmp ult i32 %A, %B ; <i1> [#uses=1] - %C2 = icmp ugt i32 %A, %B ; <i1> [#uses=1] + %C1 = icmp ult i32 %A, %B + %C2 = icmp ugt i32 %A, %B ; (A < B) | (A > B) === A != B - %D = or i1 %C1, %C2 ; <i1> [#uses=1] + %D = or i1 %C1, %C2 ret i1 %D +; CHECK: @test14 +; CHECK: %D = icmp ne i32 %A, %B +; CHECK: ret i1 %D } define i1 @test15(i32 %A, i32 %B) { - %C1 = icmp ult i32 %A, %B ; <i1> [#uses=1] - %C2 = icmp eq i32 %A, %B ; <i1> [#uses=1] + %C1 = icmp ult i32 %A, %B + %C2 = icmp eq i32 %A, %B ; (A < B) | (A == B) === A <= B - %D = or i1 %C1, %C2 ; <i1> [#uses=1] + %D = or i1 %C1, %C2 ret i1 %D +; CHECK: @test15 +; CHECK: %D = icmp ule i32 %A, %B +; CHECK: ret i1 %D } define i32 @test16(i32 %A) { - %B = and i32 %A, 1 ; <i32> [#uses=1] + %B = and i32 %A, 1 ; -2 = ~1 - %C = and i32 %A, -2 ; <i32> [#uses=1] + %C = and i32 %A, -2 ; %D = and int %B, -1 == %B - %D = or i32 %B, %C ; <i32> [#uses=1] + %D = or i32 %B, %C ret i32 %D +; CHECK: @test16 +; CHECK: ret i32 %A } define i32 @test17(i32 %A) { - %B = and i32 %A, 1 ; <i32> [#uses=1] - %C = and i32 %A, 4 ; <i32> [#uses=1] + %B = and i32 %A, 1 + %C = and i32 %A, 4 ; %D = and int %B, 5 - %D = or i32 %B, %C ; <i32> [#uses=1] + %D = or i32 %B, %C ret i32 %D +; CHECK: @test17 +; CHECK: %D = and i32 %A, 5 +; CHECK: ret i32 %D } define i1 @test18(i32 %A) { - %B = icmp sge i32 %A, 100 ; <i1> [#uses=1] - %C = icmp slt i32 %A, 50 ; <i1> [#uses=1] + %B = icmp sge i32 %A, 100 + %C = icmp slt i32 %A, 50 ;; (A-50) >u 50 - %D = or i1 %B, %C ; <i1> [#uses=1] + %D = or i1 %B, %C ret i1 %D +; CHECK: @test18 +; CHECK: add i32 +; CHECK: %D = icmp ugt +; CHECK: ret i1 %D } define i1 @test19(i32 %A) { - %B = icmp eq i32 %A, 50 ; <i1> [#uses=1] - %C = icmp eq i32 %A, 51 ; <i1> [#uses=1] + %B = icmp eq i32 %A, 50 + %C = icmp eq i32 %A, 51 ;; (A-50) < 2 - %D = or i1 %B, %C ; <i1> [#uses=1] + %D = or i1 %B, %C ret i1 %D +; CHECK: @test19 +; CHECK: add i32 +; CHECK: %D = icmp ult +; CHECK: ret i1 %D } define i32 @test20(i32 %x) { - %y = and i32 %x, 123 ; <i32> [#uses=1] - %z = or i32 %y, %x ; <i32> [#uses=1] + %y = and i32 %x, 123 + %z = or i32 %y, %x ret i32 %z +; CHECK: @test20 +; CHECK: ret i32 %x } define i32 @test21(i32 %tmp.1) { - %tmp.1.mask1 = add i32 %tmp.1, 2 ; <i32> [#uses=1] - %tmp.3 = and i32 %tmp.1.mask1, -2 ; <i32> [#uses=1] - %tmp.5 = and i32 %tmp.1, 1 ; <i32> [#uses=1] + %tmp.1.mask1 = add i32 %tmp.1, 2 + %tmp.3 = and i32 %tmp.1.mask1, -2 + %tmp.5 = and i32 %tmp.1, 1 ;; add tmp.1, 2 - %tmp.6 = or i32 %tmp.5, %tmp.3 ; <i32> [#uses=1] + %tmp.6 = or i32 %tmp.5, %tmp.3 ret i32 %tmp.6 +; CHECK: @test21 +; CHECK: add i32 %{{[^,]*}}, 2 +; CHECK: ret i32 } define i32 @test22(i32 %B) { - %ELIM41 = and i32 %B, 1 ; <i32> [#uses=1] - %ELIM7 = and i32 %B, -2 ; <i32> [#uses=1] - %ELIM5 = or i32 %ELIM41, %ELIM7 ; <i32> [#uses=1] + %ELIM41 = and i32 %B, 1 + %ELIM7 = and i32 %B, -2 + %ELIM5 = or i32 %ELIM41, %ELIM7 ret i32 %ELIM5 +; CHECK: @test22 +; CHECK: ret i32 %B } define i16 @test23(i16 %A) { - %B = lshr i16 %A, 1 ; <i16> [#uses=1] + %B = lshr i16 %A, 1 ;; fold or into xor - %C = or i16 %B, -32768 ; <i16> [#uses=1] - %D = xor i16 %C, 8193 ; <i16> [#uses=1] + %C = or i16 %B, -32768 + %D = xor i16 %C, 8193 ret i16 %D +; CHECK: @test23 +; CHECK: %B = lshr i16 %A, 1 +; CHECK: %D = xor i16 %B, -24575 +; CHECK: ret i16 %D +} + +; PR1738 +define i1 @test24(double %X, double %Y) { + %tmp9 = fcmp uno double %X, 0.000000e+00 ; <i1> [#uses=1] + %tmp13 = fcmp uno double %Y, 0.000000e+00 ; <i1> [#uses=1] + %bothcond = or i1 %tmp13, %tmp9 ; <i1> [#uses=1] + ret i1 %bothcond + +; CHECK: @test24 +; CHECK: %bothcond = fcmp uno double %Y, %X ; <i1> [#uses=1] +; CHECK: ret i1 %bothcond +} + +; PR3266 & PR5276 +define i1 @test25(i32 %A, i32 %B) { + %C = icmp eq i32 %A, 0 + %D = icmp eq i32 %B, 57 + %E = or i1 %C, %D + %F = xor i1 %E, -1 + ret i1 %F + +; CHECK: @test25 +; CHECK: icmp ne i32 %A, 0 +; CHECK-NEXT: icmp ne i32 %B, 57 +; CHECK-NEXT: %F = and i1 +; CHECK-NEXT: ret i1 %F } diff --git a/test/Transforms/InstCombine/phi.ll b/test/Transforms/InstCombine/phi.ll index 24eca72..b73ce3f 100644 --- a/test/Transforms/InstCombine/phi.ll +++ b/test/Transforms/InstCombine/phi.ll @@ -1,44 +1,53 @@ ; This test makes sure that these instructions are properly eliminated. ; -; RUN: opt < %s -instcombine -S | not grep phi +; RUN: opt < %s -instcombine -S | FileCheck %s define i32 @test1(i32 %A, i1 %b) { BB0: br i1 %b, label %BB1, label %BB2 -BB1: ; preds = %BB0 +BB1: ; Combine away one argument PHI nodes - %B = phi i32 [ %A, %BB0 ] ; <i32> [#uses=1] + %B = phi i32 [ %A, %BB0 ] ret i32 %B -BB2: ; preds = %BB0 +BB2: ret i32 %A +; CHECK: @test1 +; CHECK: BB1: +; CHECK-NEXT: ret i32 %A } define i32 @test2(i32 %A, i1 %b) { BB0: br i1 %b, label %BB1, label %BB2 -BB1: ; preds = %BB0 +BB1: br label %BB2 -BB2: ; preds = %BB1, %BB0 +BB2: ; Combine away PHI nodes with same values - %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ] ; <i32> [#uses=1] + %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ] ret i32 %B +; CHECK: @test2 +; CHECK: BB2: +; CHECK-NEXT: ret i32 %A } define i32 @test3(i32 %A, i1 %b) { BB0: br label %Loop -Loop: ; preds = %Loop, %BB0 +Loop: ; PHI has same value always. - %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ] ; <i32> [#uses=2] + %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ] br i1 %b, label %Loop, label %Exit -Exit: ; preds = %Loop +Exit: ret i32 %B +; CHECK: @test3 +; CHECK: Exit: +; CHECK-NEXT: ret i32 %A } define i32 @test4(i1 %b) { @@ -48,11 +57,14 @@ BB0: Loop: ; preds = %L2, %Loop ; PHI has same value always. - %B = phi i32 [ %B, %L2 ], [ %B, %Loop ] ; <i32> [#uses=2] + %B = phi i32 [ %B, %L2 ], [ %B, %Loop ] br i1 %b, label %L2, label %Loop L2: ; preds = %Loop br label %Loop +; CHECK: @test4 +; CHECK: Loop: +; CHECK-NEXT: br i1 %b } define i32 @test5(i32 %A, i1 %b) { @@ -61,26 +73,35 @@ BB0: Loop: ; preds = %Loop, %BB0 ; PHI has same value always. - %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ] ; <i32> [#uses=1] + %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ] br i1 %b, label %Loop, label %Exit Exit: ; preds = %Loop ret i32 %B +; CHECK: @test5 +; CHECK: Loop: +; CHECK-NEXT: br i1 %b +; CHECK: Exit: +; CHECK-NEXT: ret i32 %A } -define i32 @test6(i32 %A, i1 %b) { +define i32 @test6(i16 %A, i1 %b) { BB0: - %X = bitcast i32 %A to i32 ; <i32> [#uses=1] + %X = zext i16 %A to i32 br i1 %b, label %BB1, label %BB2 -BB1: ; preds = %BB0 - %Y = bitcast i32 %A to i32 ; <i32> [#uses=1] +BB1: + %Y = zext i16 %A to i32 br label %BB2 -BB2: ; preds = %BB1, %BB0 +BB2: ;; Suck casts into phi - %B = phi i32 [ %X, %BB0 ], [ %Y, %BB1 ] ; <i32> [#uses=1] + %B = phi i32 [ %X, %BB0 ], [ %Y, %BB1 ] ret i32 %B +; CHECK: @test6 +; CHECK: BB2: +; CHECK: zext i16 %A to i32 +; CHECK-NEXT: ret i32 } define i32 @test7(i32 %A, i1 %b) { @@ -89,12 +110,15 @@ BB0: Loop: ; preds = %Loop, %BB0 ; PHI is dead. - %B = phi i32 [ %A, %BB0 ], [ %C, %Loop ] ; <i32> [#uses=1] - %C = add i32 %B, 123 ; <i32> [#uses=1] + %B = phi i32 [ %A, %BB0 ], [ %C, %Loop ] + %C = add i32 %B, 123 br i1 %b, label %Loop, label %Exit Exit: ; preds = %Loop ret i32 0 +; CHECK: @test7 +; CHECK: Loop: +; CHECK-NEXT: br i1 %b } define i32* @test8({ i32, i32 } *%A, i1 %b) { @@ -110,6 +134,91 @@ BB2: ;; Suck GEPs into phi %B = phi i32* [ %X, %BB0 ], [ %Y, %BB1 ] ret i32* %B +; CHECK: @test8 +; CHECK-NOT: phi +; CHECK: BB2: +; CHECK-NEXT: %B = getelementptr +; CHECK-NEXT: ret i32* %B +} + +define i32 @test9(i32* %A, i32* %B) { +entry: + %c = icmp eq i32* %A, null + br i1 %c, label %bb1, label %bb + +bb: + %C = load i32* %B, align 1 + br label %bb2 + +bb1: + %D = load i32* %A, align 1 + br label %bb2 + +bb2: + %E = phi i32 [ %C, %bb ], [ %D, %bb1 ] + ret i32 %E +; CHECK: @test9 +; CHECK: bb2: +; CHECK-NEXT: phi i32* [ %B, %bb ], [ %A, %bb1 ] +; CHECK-NEXT: %E = load i32* %{{[^,]*}}, align 1 +; CHECK-NEXT: ret i32 %E + } +define i32 @test10(i32* %A, i32* %B) { +entry: + %c = icmp eq i32* %A, null + br i1 %c, label %bb1, label %bb + +bb: + %C = load i32* %B, align 16 + br label %bb2 + +bb1: + %D = load i32* %A, align 32 + br label %bb2 + +bb2: + %E = phi i32 [ %C, %bb ], [ %D, %bb1 ] + ret i32 %E +; CHECK: @test10 +; CHECK: bb2: +; CHECK-NEXT: phi i32* [ %B, %bb ], [ %A, %bb1 ] +; CHECK-NEXT: %E = load i32* %{{[^,]*}}, align 16 +; CHECK-NEXT: ret i32 %E +} + + +; PR1777 +declare i1 @test11a() + +define i1 @test11() { +entry: + %a = alloca i32 + %i = ptrtoint i32* %a to i32 + %b = call i1 @test11a() + br i1 %b, label %one, label %two + +one: + %x = phi i32 [%i, %entry], [%y, %two] + %c = call i1 @test11a() + br i1 %c, label %two, label %end + +two: + %y = phi i32 [%i, %entry], [%x, %one] + %d = call i1 @test11a() + br i1 %d, label %one, label %end + +end: + %f = phi i32 [ %x, %one], [%y, %two] + ; Change the %f to %i, and the optimizer suddenly becomes a lot smarter + ; even though %f must equal %i at this point + %g = inttoptr i32 %f to i32* + store i32 10, i32* %g + %z = call i1 @test11a() + ret i1 %z +; CHECK: @test11 +; CHECK-NOT: phi i32 +; CHECK: ret i1 %z +} diff --git a/test/Transforms/InstCombine/preserve-sminmax.ll b/test/Transforms/InstCombine/preserve-sminmax.ll index dbfd56a..00232cc 100644 --- a/test/Transforms/InstCombine/preserve-sminmax.ll +++ b/test/Transforms/InstCombine/preserve-sminmax.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | grep { i32 \[%\]sd, \[\[:alnum:\]\]* \\?1\\>} | count 4 +; RUN: opt < %s -instcombine -S | FileCheck %s ; Instcombine normally would fold the sdiv into the comparison, ; making "icmp slt i32 %h, 2", but in this case the sdiv has @@ -13,6 +13,11 @@ define i32 @foo(i32 %h) { ret i32 %r } +; CHECK: %sd = sdiv i32 %h, 2 +; CHECK: %t = icmp slt i32 %sd, 1 +; CHECK: %r = select i1 %t, i32 %sd, i32 1 +; CHECK: ret i32 %r + define i32 @bar(i32 %h) { %sd = sdiv i32 %h, 2 %t = icmp sgt i32 %sd, 1 @@ -20,3 +25,8 @@ define i32 @bar(i32 %h) { ret i32 %r } +; CHECK: %sd = sdiv i32 %h, 2 +; CHECK: %t = icmp sgt i32 %sd, 1 +; CHECK: %r = select i1 %t, i32 %sd, i32 1 +; CHECK: ret i32 %r + diff --git a/test/Transforms/InstCombine/ptr-int-cast.ll b/test/Transforms/InstCombine/ptr-int-cast.ll index 2f64d8b..c7ae689 100644 --- a/test/Transforms/InstCombine/ptr-int-cast.ll +++ b/test/Transforms/InstCombine/ptr-int-cast.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S > %t +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define i1 @test1(i32 *%x) nounwind { entry: diff --git a/test/Transforms/InstCombine/store.ll b/test/Transforms/InstCombine/store.ll index d6f916d..314441e 100644 --- a/test/Transforms/InstCombine/store.ll +++ b/test/Transforms/InstCombine/store.ll @@ -1,11 +1,13 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: grep -v {store.*,.*null} | not grep store +; RUN: opt < %s -instcombine -S | FileCheck %s define void @test1(i32* %P) { store i32 undef, i32* %P store i32 123, i32* undef store i32 124, i32* null ret void +; CHECK: @test1( +; CHECK-NEXT: store i32 undef, i32* null +; CHECK-NEXT: ret void } define void @test2(i32* %P) { @@ -13,5 +15,70 @@ define void @test2(i32* %P) { %Y = add i32 %X, 0 ; <i32> [#uses=1] store i32 %Y, i32* %P ret void +; CHECK: @test2 +; CHECK-NEXT: ret void +} + +;; Simple sinking tests + +; "if then else" +define i32 @test3(i1 %C) { + %A = alloca i32 + br i1 %C, label %Cond, label %Cond2 + +Cond: + store i32 -987654321, i32* %A + br label %Cont + +Cond2: + store i32 47, i32* %A + br label %Cont + +Cont: + %V = load i32* %A + ret i32 %V +; CHECK: @test3 +; CHECK-NOT: alloca +; CHECK: Cont: +; CHECK-NEXT: %storemerge = phi i32 [ 47, %Cond2 ], [ -987654321, %Cond ] +; CHECK-NEXT: ret i32 %storemerge +} + +; "if then" +define i32 @test4(i1 %C) { + %A = alloca i32 + store i32 47, i32* %A + br i1 %C, label %Cond, label %Cont + +Cond: + store i32 -987654321, i32* %A + br label %Cont + +Cont: + %V = load i32* %A + ret i32 %V +; CHECK: @test4 +; CHECK-NOT: alloca +; CHECK: Cont: +; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %0 ] +; CHECK-NEXT: ret i32 %storemerge +} + +; "if then" +define void @test5(i1 %C, i32* %P) { + store i32 47, i32* %P, align 1 + br i1 %C, label %Cond, label %Cont + +Cond: + store i32 -987654321, i32* %P, align 1 + br label %Cont + +Cont: + ret void +; CHECK: @test5 +; CHECK: Cont: +; CHECK-NEXT: %storemerge = phi i32 +; CHECK-NEXT: store i32 %storemerge, i32* %P, align 1 +; CHECK-NEXT: ret void } diff --git a/test/Transforms/InstCombine/sub.ll b/test/Transforms/InstCombine/sub.ll index bd7a700..ba28910 100644 --- a/test/Transforms/InstCombine/sub.ll +++ b/test/Transforms/InstCombine/sub.ll @@ -1,148 +1,250 @@ -; This test makes sure that these instructions are properly eliminated. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +; Optimize subtracts. ; -; RUN: opt < %s -instcombine -S | \ -; RUN: grep -v {sub i32 %Cok, %Bok} | grep -v {sub i32 0, %Aok} | not grep sub +; RUN: opt < %s -instcombine -S | FileCheck %s define i32 @test1(i32 %A) { - %B = sub i32 %A, %A ; <i32> [#uses=1] + %B = sub i32 %A, %A ret i32 %B +; CHECK: @test1 +; CHECK: ret i32 0 } define i32 @test2(i32 %A) { - %B = sub i32 %A, 0 ; <i32> [#uses=1] + %B = sub i32 %A, 0 ret i32 %B +; CHECK: @test2 +; CHECK: ret i32 %A } define i32 @test3(i32 %A) { - %B = sub i32 0, %A ; <i32> [#uses=1] - %C = sub i32 0, %B ; <i32> [#uses=1] + %B = sub i32 0, %A + %C = sub i32 0, %B ret i32 %C +; CHECK: @test3 +; CHECK: ret i32 %A } define i32 @test4(i32 %A, i32 %x) { - %B = sub i32 0, %A ; <i32> [#uses=1] - %C = sub i32 %x, %B ; <i32> [#uses=1] + %B = sub i32 0, %A + %C = sub i32 %x, %B ret i32 %C +; CHECK: @test4 +; CHECK: %C = add i32 %x, %A +; CHECK: ret i32 %C } -define i32 @test5(i32 %A, i32 %Bok, i32 %Cok) { - %D = sub i32 %Bok, %Cok ; <i32> [#uses=1] - %E = sub i32 %A, %D ; <i32> [#uses=1] +define i32 @test5(i32 %A, i32 %B, i32 %C) { + %D = sub i32 %B, %C + %E = sub i32 %A, %D ret i32 %E +; CHECK: @test5 +; CHECK: %D = sub i32 %C, %B +; CHECK: %E = add +; CHECK: ret i32 %E } define i32 @test6(i32 %A, i32 %B) { - %C = and i32 %A, %B ; <i32> [#uses=1] - %D = sub i32 %A, %C ; <i32> [#uses=1] + %C = and i32 %A, %B + %D = sub i32 %A, %C ret i32 %D +; CHECK: @test6 +; CHECK-NEXT: xor i32 %B, -1 +; CHECK-NEXT: %D = and i32 +; CHECK-NEXT: ret i32 %D } define i32 @test7(i32 %A) { - %B = sub i32 -1, %A ; <i32> [#uses=1] + %B = sub i32 -1, %A ret i32 %B +; CHECK: @test7 +; CHECK: %B = xor i32 %A, -1 +; CHECK: ret i32 %B } define i32 @test8(i32 %A) { - %B = mul i32 9, %A ; <i32> [#uses=1] - %C = sub i32 %B, %A ; <i32> [#uses=1] + %B = mul i32 9, %A + %C = sub i32 %B, %A ret i32 %C +; CHECK: @test8 +; CHECK: %C = shl i32 %A, 3 +; CHECK: ret i32 %C } define i32 @test9(i32 %A) { - %B = mul i32 3, %A ; <i32> [#uses=1] - %C = sub i32 %A, %B ; <i32> [#uses=1] + %B = mul i32 3, %A + %C = sub i32 %A, %B ret i32 %C +; CHECK: @test9 +; CHECK: %C = mul i32 %A, -2 +; CHECK: ret i32 %C } define i32 @test10(i32 %A, i32 %B) { - %C = sub i32 0, %A ; <i32> [#uses=1] - %D = sub i32 0, %B ; <i32> [#uses=1] - %E = mul i32 %C, %D ; <i32> [#uses=1] + %C = sub i32 0, %A + %D = sub i32 0, %B + %E = mul i32 %C, %D ret i32 %E +; CHECK: @test10 +; CHECK: %E = mul i32 %A, %B +; CHECK: ret i32 %E } -define i32 @test10.upgrd.1(i32 %A) { - %C = sub i32 0, %A ; <i32> [#uses=1] - %E = mul i32 %C, 7 ; <i32> [#uses=1] +define i32 @test10a(i32 %A) { + %C = sub i32 0, %A + %E = mul i32 %C, 7 ret i32 %E +; CHECK: @test10a +; CHECK: %E = mul i32 %A, -7 +; CHECK: ret i32 %E } define i1 @test11(i8 %A, i8 %B) { - %C = sub i8 %A, %B ; <i8> [#uses=1] - %cD = icmp ne i8 %C, 0 ; <i1> [#uses=1] + %C = sub i8 %A, %B + %cD = icmp ne i8 %C, 0 ret i1 %cD +; CHECK: @test11 +; CHECK: %cD = icmp ne i8 %A, %B +; CHECK: ret i1 %cD } define i32 @test12(i32 %A) { - %B = ashr i32 %A, 31 ; <i32> [#uses=1] - %C = sub i32 0, %B ; <i32> [#uses=1] + %B = ashr i32 %A, 31 + %C = sub i32 0, %B ret i32 %C +; CHECK: @test12 +; CHECK: %C = lshr i32 %A, 31 +; CHECK: ret i32 %C } define i32 @test13(i32 %A) { - %B = lshr i32 %A, 31 ; <i32> [#uses=1] - %C = sub i32 0, %B ; <i32> [#uses=1] + %B = lshr i32 %A, 31 + %C = sub i32 0, %B ret i32 %C +; CHECK: @test13 +; CHECK: %C = ashr i32 %A, 31 +; CHECK: ret i32 %C } define i32 @test14(i32 %A) { - %B = lshr i32 %A, 31 ; <i32> [#uses=1] - %C = bitcast i32 %B to i32 ; <i32> [#uses=1] - %D = sub i32 0, %C ; <i32> [#uses=1] + %B = lshr i32 %A, 31 + %C = bitcast i32 %B to i32 + %D = sub i32 0, %C ret i32 %D +; CHECK: @test14 +; CHECK: %D = ashr i32 %A, 31 +; CHECK: ret i32 %D } define i32 @test15(i32 %A, i32 %B) { - %C = sub i32 0, %A ; <i32> [#uses=1] - %D = srem i32 %B, %C ; <i32> [#uses=1] + %C = sub i32 0, %A + %D = srem i32 %B, %C ret i32 %D +; CHECK: @test15 +; CHECK: %D = srem i32 %B, %A +; CHECK: ret i32 %D } define i32 @test16(i32 %A) { - %X = sdiv i32 %A, 1123 ; <i32> [#uses=1] - %Y = sub i32 0, %X ; <i32> [#uses=1] + %X = sdiv i32 %A, 1123 + %Y = sub i32 0, %X ret i32 %Y +; CHECK: @test16 +; CHECK: %Y = sdiv i32 %A, -1123 +; CHECK: ret i32 %Y } ; Can't fold subtract here because negation it might oveflow. ; PR3142 -define i32 @test17(i32 %Aok) { - %B = sub i32 0, %Aok ; <i32> [#uses=1] - %C = sdiv i32 %B, 1234 ; <i32> [#uses=1] +define i32 @test17(i32 %A) { + %B = sub i32 0, %A + %C = sdiv i32 %B, 1234 ret i32 %C +; CHECK: @test17 +; CHECK: %B = sub i32 0, %A +; CHECK: %C = sdiv i32 %B, 1234 +; CHECK: ret i32 %C } define i64 @test18(i64 %Y) { - %tmp.4 = shl i64 %Y, 2 ; <i64> [#uses=1] - %tmp.12 = shl i64 %Y, 2 ; <i64> [#uses=1] - %tmp.8 = sub i64 %tmp.4, %tmp.12 ; <i64> [#uses=1] + %tmp.4 = shl i64 %Y, 2 + %tmp.12 = shl i64 %Y, 2 + %tmp.8 = sub i64 %tmp.4, %tmp.12 ret i64 %tmp.8 +; CHECK: @test18 +; CHECK: ret i64 0 } define i32 @test19(i32 %X, i32 %Y) { - %Z = sub i32 %X, %Y ; <i32> [#uses=1] - %Q = add i32 %Z, %Y ; <i32> [#uses=1] + %Z = sub i32 %X, %Y + %Q = add i32 %Z, %Y ret i32 %Q +; CHECK: @test19 +; CHECK: ret i32 %X } define i1 @test20(i32 %g, i32 %h) { - %tmp.2 = sub i32 %g, %h ; <i32> [#uses=1] - %tmp.4 = icmp ne i32 %tmp.2, %g ; <i1> [#uses=1] + %tmp.2 = sub i32 %g, %h + %tmp.4 = icmp ne i32 %tmp.2, %g ret i1 %tmp.4 +; CHECK: @test20 +; CHECK: %tmp.4 = icmp ne i32 %h, 0 +; CHECK: ret i1 %tmp.4 } define i1 @test21(i32 %g, i32 %h) { - %tmp.2 = sub i32 %g, %h ; <i32> [#uses=1] - %tmp.4 = icmp ne i32 %tmp.2, %g ; <i1> [#uses=1] - ret i1 %tmp.4 + %tmp.2 = sub i32 %g, %h + %tmp.4 = icmp ne i32 %tmp.2, %g + ret i1 %tmp.4 +; CHECK: @test21 +; CHECK: %tmp.4 = icmp ne i32 %h, 0 +; CHECK: ret i1 %tmp.4 } ; PR2298 -define i8 @test22(i32 %a, i32 %b) zeroext nounwind { - %tmp2 = sub i32 0, %a ; <i32> [#uses=1] - %tmp4 = sub i32 0, %b ; <i32> [#uses=1] - %tmp5 = icmp eq i32 %tmp2, %tmp4 ; <i1> [#uses=1] - %retval89 = zext i1 %tmp5 to i8 ; <i8> [#uses=1] - ret i8 %retval89 +define i1 @test22(i32 %a, i32 %b) zeroext nounwind { + %tmp2 = sub i32 0, %a + %tmp4 = sub i32 0, %b + %tmp5 = icmp eq i32 %tmp2, %tmp4 + ret i1 %tmp5 +; CHECK: @test22 +; CHECK: %tmp5 = icmp eq i32 %a, %b +; CHECK: ret i1 %tmp5 +} + +; rdar://7362831 +define i32 @test23(i8* %P, i64 %A){ + %B = getelementptr inbounds i8* %P, i64 %A + %C = ptrtoint i8* %B to i64 + %D = trunc i64 %C to i32 + %E = ptrtoint i8* %P to i64 + %F = trunc i64 %E to i32 + %G = sub i32 %D, %F + ret i32 %G +; CHECK: @test23 +; CHECK: %A1 = trunc i64 %A to i32 +; CHECK: ret i32 %A1 +} + +define i64 @test24(i8* %P, i64 %A){ + %B = getelementptr inbounds i8* %P, i64 %A + %C = ptrtoint i8* %B to i64 + %E = ptrtoint i8* %P to i64 + %G = sub i64 %C, %E + ret i64 %G +; CHECK: @test24 +; CHECK-NEXT: ret i64 %A +} + +define i64 @test24a(i8* %P, i64 %A){ + %B = getelementptr inbounds i8* %P, i64 %A + %C = ptrtoint i8* %B to i64 + %E = ptrtoint i8* %P to i64 + %G = sub i64 %E, %C + ret i64 %G +; CHECK: @test24a +; CHECK-NEXT: sub i64 0, %A +; CHECK-NEXT: ret i64 } diff --git a/test/Transforms/JumpThreading/no-irreducible-loops.ll b/test/Transforms/JumpThreading/no-irreducible-loops.ll index b4d4418..97276b0 100644 --- a/test/Transforms/JumpThreading/no-irreducible-loops.ll +++ b/test/Transforms/JumpThreading/no-irreducible-loops.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -jump-threading -loop-rotate -instcombine -indvars -loop-unroll -simplifycfg -S > %t +; RUN: opt < %s -jump-threading -loop-rotate -instcombine -indvars -loop-unroll -simplifycfg -S -verify-dom-info -verify-loop-info > %t ; RUN: grep {volatile store} %t | count 3 ; RUN: not grep {br label} %t diff --git a/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll index 7810309..723440f 100644 --- a/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll +++ b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll @@ -1,15 +1,23 @@ -; RUN: opt < %s -licm -enable-licm-constant-variables -S | grep -A 1 entry | grep load.*@a +; RUN: opt < %s -licm -enable-licm-constant-variables -S | FileCheck %s + @a = external constant float* define void @test(i32 %count) { entry: br label %forcond +; CHECK: %tmp3 = load float** @a +; CHECK: br label %forcond + forcond: %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ] %cmp = icmp ult i32 %i.0, %count br i1 %cmp, label %forbody, label %afterfor +; CHECK: %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ] +; CHECK: %cmp = icmp ult i32 %i.0, %count +; CHECK: br i1 %cmp, label %forbody, label %afterfor + forbody: %tmp3 = load float** @a %arrayidx = getelementptr float* %tmp3, i32 %i.0 @@ -18,6 +26,14 @@ forbody: %inc = add i32 %i.0, 1 br label %forcond +; CHECK: %arrayidx = getelementptr float* %tmp3, i32 %i.0 +; CHECK: %tmp7 = uitofp i32 %i.0 to float +; CHECK: store float %tmp7, float* %arrayidx +; CHECK: %inc = add i32 %i.0, 1 +; CHECK: br label %forcond + afterfor: ret void } + +; CHECK: ret void diff --git a/test/Transforms/LICM/Preserve-LCSSA.ll b/test/Transforms/LICM/Preserve-LCSSA.ll index 24c4ad1..832d762 100644 --- a/test/Transforms/LICM/Preserve-LCSSA.ll +++ b/test/Transforms/LICM/Preserve-LCSSA.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output +; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output -verify-loop-info -verify-dom-info define i32 @stringSearch_Clib(i32 %count) { entry: diff --git a/test/Transforms/LoopDeletion/multiple-exit-conditions.ll b/test/Transforms/LoopDeletion/multiple-exit-conditions.ll new file mode 100644 index 0000000..87f8f46 --- /dev/null +++ b/test/Transforms/LoopDeletion/multiple-exit-conditions.ll @@ -0,0 +1,27 @@ +; RUN: opt < %s -loop-deletion -S | FileCheck %s + +; ScalarEvolution can prove the loop iteration is finite, even though +; it can't represent the exact trip count as an expression. That's +; good enough to let the loop be deleted. + +; CHECK: entry: +; CHECK-NEXT: br label %return + +; CHECK: return: +; CHECK-NEXT: ret void + +define void @foo(i64 %n, i64 %m) nounwind { +entry: + br label %bb + +bb: + %x.0 = phi i64 [ 0, %entry ], [ %t0, %bb ] + %t0 = add i64 %x.0, 1 + %t1 = icmp slt i64 %x.0, %n + %t3 = icmp sgt i64 %x.0, %m + %t4 = and i1 %t1, %t3 + br i1 %t4, label %bb, label %return + +return: + ret void +} diff --git a/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll b/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll index 3e170dc..7036d2d 100644 --- a/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll +++ b/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate | llvm-dis +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output ; PR3408 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/Transforms/LoopRotate/LRCrash-1.ll b/test/Transforms/LoopRotate/LRCrash-1.ll index 7d148e7..f16dd04 100644 --- a/test/Transforms/LoopRotate/LRCrash-1.ll +++ b/test/Transforms/LoopRotate/LRCrash-1.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 } diff --git a/test/Transforms/LoopRotate/LRCrash-2.ll b/test/Transforms/LoopRotate/LRCrash-2.ll index e117c11..0a10989 100644 --- a/test/Transforms/LoopRotate/LRCrash-2.ll +++ b/test/Transforms/LoopRotate/LRCrash-2.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output define void @findAllPairs() { entry: diff --git a/test/Transforms/LoopRotate/LRCrash-3.ll b/test/Transforms/LoopRotate/LRCrash-3.ll index 617dd8e..79f21fb 100644 --- a/test/Transforms/LoopRotate/LRCrash-3.ll +++ b/test/Transforms/LoopRotate/LRCrash-3.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output define void @_ZN9Classfile4readEv() { entry: diff --git a/test/Transforms/LoopRotate/LRCrash-4.ll b/test/Transforms/LoopRotate/LRCrash-4.ll index b2f3224..7d35c16 100644 --- a/test/Transforms/LoopRotate/LRCrash-4.ll +++ b/test/Transforms/LoopRotate/LRCrash-4.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output define void @InterpretSEIMessage(i8* %msg) { entry: diff --git a/test/Transforms/LoopRotate/LRCrash-5.ll b/test/Transforms/LoopRotate/LRCrash-5.ll index 7b6085d..6643cc1 100644 --- a/test/Transforms/LoopRotate/LRCrash-5.ll +++ b/test/Transforms/LoopRotate/LRCrash-5.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9" %struct.NSArray = type { %struct.NSObject } diff --git a/test/Transforms/LoopRotate/PhiRename-1.ll b/test/Transforms/LoopRotate/PhiRename-1.ll index fe7eaf9..a7326fa 100644 --- a/test/Transforms/LoopRotate/PhiRename-1.ll +++ b/test/Transforms/LoopRotate/PhiRename-1.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -S | not grep {\\\[ .tmp224} +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -S | not grep {\\\[ .tmp224} ; END. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll b/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll index b0d31bd..a1aa21b 100644 --- a/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll +++ b/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -disable-output +; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output ; ModuleID = 'PhiSelfRefernce-1.bc' define void @snrm2(i32 %incx) { diff --git a/test/Transforms/LoopRotate/pr2639.ll b/test/Transforms/LoopRotate/pr2639.ll index 96f87d5..da9a3a2 100644 --- a/test/Transforms/LoopRotate/pr2639.ll +++ b/test/Transforms/LoopRotate/pr2639.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-deletion -loop-rotate -disable-output +; RUN: opt < %s -loop-deletion -loop-rotate -verify-dom-info -verify-loop-info -disable-output ; PR 2639 %struct.HexxagonMove = type { i8, i8, i32 } diff --git a/test/Transforms/LoopRotate/preserve-scev.ll b/test/Transforms/LoopRotate/preserve-scev.ll index 9eedaa4..7bd2232 100644 --- a/test/Transforms/LoopRotate/preserve-scev.ll +++ b/test/Transforms/LoopRotate/preserve-scev.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-rotate -loop-reduce -disable-output +; RUN: opt < %s -loop-rotate -loop-reduce -verify-dom-info -verify-loop-info -disable-output define fastcc void @foo() nounwind { BB: diff --git a/test/Transforms/LoopSimplify/merge-exits.ll b/test/Transforms/LoopSimplify/merge-exits.ll index 45f506a..0e15f08 100644 --- a/test/Transforms/LoopSimplify/merge-exits.ll +++ b/test/Transforms/LoopSimplify/merge-exits.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S > %t +; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t ; RUN: not grep sext %t ; RUN: grep {phi i64} %t | count 1 diff --git a/test/Transforms/Mem2Reg/crash.ll b/test/Transforms/Mem2Reg/crash.ll index ce795aa..655549f 100644 --- a/test/Transforms/Mem2Reg/crash.ll +++ b/test/Transforms/Mem2Reg/crash.ll @@ -1,12 +1,12 @@ ; RUN: opt < %s -mem2reg -S ; PR5023 -declare i32 @bar() +declare i32 @test1f() -define i32 @foo() { +define i32 @test1() { entry: %whichFlag = alloca i32 - %A = invoke i32 @bar() + %A = invoke i32 @test1f() to label %invcont2 unwind label %lpad86 invcont2: @@ -22,3 +22,20 @@ lpad86: } + + +define i32 @test2() { +entry: + %whichFlag = alloca i32 + br label %bb15 + +bb15: + %B = load i32* %whichFlag + ret i32 %B + +invcont2: + %C = load i32* %whichFlag + store i32 %C, i32* %whichFlag + br label %bb15 +} + diff --git a/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll index 13205e6..38a7271 100644 --- a/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll +++ b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy.} +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %a = type { i32 } %b = type { float } diff --git a/test/Transforms/MemCpyOpt/align.ll b/test/Transforms/MemCpyOpt/align.ll index a9d0337..47df380 100644 --- a/test/Transforms/MemCpyOpt/align.ll +++ b/test/Transforms/MemCpyOpt/align.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -S -memcpyopt | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; The resulting memset is only 4-byte aligned, despite containing ; a 16-byte alignmed store in the middle. diff --git a/test/Transforms/SCCP/crash.ll b/test/Transforms/SCCP/crash.ll new file mode 100644 index 0000000..e34eaca --- /dev/null +++ b/test/Transforms/SCCP/crash.ll @@ -0,0 +1,24 @@ +; RUN: opt %s -sccp -S +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" + +define void @test1(i8 %arg) { +entry: + br i1 undef, label %return, label %bb + +bb: + br label %bb34 + +bb23: + %c = icmp eq i8 %arg, undef + br i1 %c, label %bb34, label %bb23 + +bb34: + %Kind.1 = phi i32 [ undef, %bb ], [ %ins174, %bb23 ] + %mask173 = or i32 %Kind.1, 7 + %ins174 = and i32 %mask173, -249 + br label %bb23 + +return: + ret void +} diff --git a/test/Transforms/SCCP/ipsccp-basic.ll b/test/Transforms/SCCP/ipsccp-basic.ll index d3584d1..e369920 100644 --- a/test/Transforms/SCCP/ipsccp-basic.ll +++ b/test/Transforms/SCCP/ipsccp-basic.ll @@ -127,10 +127,80 @@ B: ; CHECK: define i64 @test5b() ; CHECK: A: ; CHECK-NEXT: %c = call i64 @test5c(%0 %a) -; CHECK-NEXT: ret i64 %c +; CHECK-NEXT: ret i64 5 define internal i64 @test5c({i64,i64} %a) { %b = extractvalue {i64,i64} %a, 0 ret i64 %b } + +;;======================== test6 + +define i64 @test6a() { + ret i64 0 +} + +define i64 @test6b() { + %a = call i64 @test6a() + ret i64 %a +} +; CHECK: define i64 @test6b +; CHECK: ret i64 0 + +;;======================== test7 + + +%T = type {i32,i32} + +define internal {i32, i32} @test7a(i32 %A) { + %X = add i32 1, %A + %mrv0 = insertvalue %T undef, i32 %X, 0 + %mrv1 = insertvalue %T %mrv0, i32 %A, 1 + ret %T %mrv1 +; CHECK: @test7a +; CHECK-NEXT: %mrv0 = insertvalue %T undef, i32 18, 0 +; CHECK-NEXT: %mrv1 = insertvalue %T %mrv0, i32 17, 1 +} + +define i32 @test7b() { + %X = call {i32, i32} @test7a(i32 17) + %Y = extractvalue {i32, i32} %X, 0 + %Z = add i32 %Y, %Y + ret i32 %Z +; CHECK: define i32 @test7b +; CHECK-NEXT: call %T @test7a(i32 17) +; CHECK-NEXT: ret i32 36 +} + +;;======================== test8 + + +define internal {} @test8a(i32 %A, i32* %P) { + store i32 %A, i32* %P + ret {} {} +; CHECK: @test8a +; CHECK-NEXT: store i32 5, +; CHECK-NEXT: ret +} + +define void @test8b(i32* %P) { + %X = call {} @test8a(i32 5, i32* %P) + ret void +; CHECK: define void @test8b +; CHECK-NEXT: call { } @test8a +; CHECK-NEXT: ret void +} + +;;======================== test9 + +@test9g = internal global { } zeroinitializer + +define void @test9() { +entry: + %local_foo = alloca { } + load { }* @test9g + store { } %0, { }* %local_foo + ret void +} + diff --git a/test/Transforms/SCCP/loadtest.ll b/test/Transforms/SCCP/loadtest.ll index fd82aef..add2af4 100644 --- a/test/Transforms/SCCP/loadtest.ll +++ b/test/Transforms/SCCP/loadtest.ll @@ -1,5 +1,6 @@ ; This test makes sure that these instructions are properly constant propagated. -; + +target datalayout = "e-p:32:32" ; RUN: opt < %s -sccp -S | not grep load @@ -20,7 +21,13 @@ define float @test2() { define i32 @test3() { %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 0, i32 0 ; <i32*> [#uses=1] - %B = load i32* %A ; <i32> [#uses=1] + %B = load i32* %A ret i32 %B } +define i8 @test4() { + %A = bitcast i32* @X to i8* + %B = load i8* %A + ret i8 %B +} + diff --git a/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll b/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll index 824e249..7116199 100644 --- a/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll +++ b/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -instcombine -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; Test that an array is not incorrectly deconstructed. diff --git a/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll b/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll index 4655d14..99c9fb9 100644 --- a/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll +++ b/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @func(<4 x float> %v0, <4 x float> %v1) nounwind { %vsiidx = alloca [2 x <4 x i32>], align 16 ; <[2 x <4 x i32>]*> [#uses=3] diff --git a/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll b/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll index 3ebafd0..87a08b7 100644 --- a/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll +++ b/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll @@ -4,6 +4,7 @@ ; values. This checks of scalarrepl splits up the struct and array properly. ; RUN: opt < %s -scalarrepl -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @foo() { %target = alloca { i32, i32 } ; <{ i32, i32 }*> [#uses=1] diff --git a/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll b/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll index e89be5a..e32e683 100644 --- a/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll +++ b/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll @@ -5,6 +5,7 @@ ; RUN: opt < %s -scalarrepl -S > %t ; RUN: cat %t | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %struct.two = type <{ < 2 x i8 >, i16 }> diff --git a/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll b/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll index d6eb75b..526457b 100644 --- a/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll +++ b/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll @@ -2,6 +2,7 @@ ; is only known to access it with 1-byte alignment. ; RUN: opt < %s -scalarrepl -S | grep {store i16 1, .*, align 1} ; PR3720 +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %struct.st = type { i16 } diff --git a/test/Transforms/ScalarRepl/DifferingTypes.ll b/test/Transforms/ScalarRepl/DifferingTypes.ll index eb56824..933c47f 100644 --- a/test/Transforms/ScalarRepl/DifferingTypes.ll +++ b/test/Transforms/ScalarRepl/DifferingTypes.ll @@ -3,6 +3,7 @@ ; depending on the endianness of the target... ; RUN: opt < %s -scalarrepl -S | \ ; RUN: not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @testfunc(i32 %i, i8 %j) { %I = alloca i32 ; <i32*> [#uses=3] diff --git a/test/Transforms/ScalarRepl/arraytest.ll b/test/Transforms/ScalarRepl/arraytest.ll index 2f68af8..06a928c 100644 --- a/test/Transforms/ScalarRepl/arraytest.ll +++ b/test/Transforms/ScalarRepl/arraytest.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @test() { %X = alloca [4 x i32] ; <[4 x i32]*> [#uses=1] diff --git a/test/Transforms/ScalarRepl/basictest.ll b/test/Transforms/ScalarRepl/basictest.ll index a43243c..a26b62d 100644 --- a/test/Transforms/ScalarRepl/basictest.ll +++ b/test/Transforms/ScalarRepl/basictest.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @test() { %X = alloca { i32, float } ; <{ i32, float }*> [#uses=1] diff --git a/test/Transforms/ScalarRepl/bitfield-sroa.ll b/test/Transforms/ScalarRepl/bitfield-sroa.ll index 6b3d414..3728658 100644 --- a/test/Transforms/ScalarRepl/bitfield-sroa.ll +++ b/test/Transforms/ScalarRepl/bitfield-sroa.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca ; rdar://6532315 +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %t = type { { i32, i16, i8, i8 } } define i8 @foo(i64 %A) { diff --git a/test/Transforms/ScalarRepl/copy-aggregate.ll b/test/Transforms/ScalarRepl/copy-aggregate.ll index 26f007b..2992413 100644 --- a/test/Transforms/ScalarRepl/copy-aggregate.ll +++ b/test/Transforms/ScalarRepl/copy-aggregate.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca ; PR3290 +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ;; Store of integer to whole alloca struct. define i32 @test1(i64 %V) nounwind { diff --git a/test/Transforms/ScalarRepl/debuginfo.ll b/test/Transforms/ScalarRepl/debuginfo.ll index 903b1a2..6b8422c 100644 --- a/test/Transforms/ScalarRepl/debuginfo.ll +++ b/test/Transforms/ScalarRepl/debuginfo.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } diff --git a/test/Transforms/ScalarRepl/load-store-aggregate.ll b/test/Transforms/ScalarRepl/load-store-aggregate.ll index 9ea3895..c5008ac 100644 --- a/test/Transforms/ScalarRepl/load-store-aggregate.ll +++ b/test/Transforms/ScalarRepl/load-store-aggregate.ll @@ -1,6 +1,7 @@ ; This testcase shows that scalarrepl is able to replace struct alloca's which ; are directly loaded from or stored to (using the first class aggregates ; feature). +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; RUN: opt < %s -scalarrepl -S > %t ; RUN: cat %t | not grep alloca diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/ScalarRepl/memcpy-from-global.ll index 38a2ca0..8152785 100644 --- a/test/Transforms/ScalarRepl/memcpy-from-global.ll +++ b/test/Transforms/ScalarRepl/memcpy-from-global.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -scalarrepl -S | not grep {call.*memcpy} +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" @C.0.1248 = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1] define float @grad4(i32 %hash, float %x, float %y, float %z, float %w) { diff --git a/test/Transforms/ScalarRepl/not-a-vector.ll b/test/Transforms/ScalarRepl/not-a-vector.ll index 7eba7c0..f873456 100644 --- a/test/Transforms/ScalarRepl/not-a-vector.ll +++ b/test/Transforms/ScalarRepl/not-a-vector.ll @@ -1,6 +1,7 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca ; RUN: opt < %s -scalarrepl -S | not grep {7 x double} ; RUN: opt < %s -scalarrepl -instcombine -S | grep {ret double %B} +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define double @test(double %A, double %B) { %ARR = alloca [7 x i64] diff --git a/test/Transforms/ScalarRepl/union-fp-int.ll b/test/Transforms/ScalarRepl/union-fp-int.ll index 0e1cd23..8b7e50d 100644 --- a/test/Transforms/ScalarRepl/union-fp-int.ll +++ b/test/Transforms/ScalarRepl/union-fp-int.ll @@ -2,6 +2,7 @@ ; RUN: not grep alloca ; RUN: opt < %s -scalarrepl -S | \ ; RUN: grep {bitcast.*float.*i32} +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define i32 @test(float %X) { %X_addr = alloca float ; <float*> [#uses=2] diff --git a/test/Transforms/ScalarRepl/union-packed.ll b/test/Transforms/ScalarRepl/union-packed.ll index 63752c8..b272abf 100644 --- a/test/Transforms/ScalarRepl/union-packed.ll +++ b/test/Transforms/ScalarRepl/union-packed.ll @@ -2,6 +2,7 @@ ; RUN: not grep alloca ; RUN: opt < %s -scalarrepl -S | \ ; RUN: grep bitcast +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define <4 x i32> @test(<4 x float> %X) { %X_addr = alloca <4 x float> ; <<4 x float>*> [#uses=2] diff --git a/test/Transforms/ScalarRepl/vector_memcpy.ll b/test/Transforms/ScalarRepl/vector_memcpy.ll index 3af79bc..decbd30 100644 --- a/test/Transforms/ScalarRepl/vector_memcpy.ll +++ b/test/Transforms/ScalarRepl/vector_memcpy.ll @@ -1,6 +1,7 @@ ; RUN: opt < %s -scalarrepl -S > %t ; RUN: grep {ret <16 x float> %A} %t ; RUN: grep {ret <16 x float> zeroinitializer} %t +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define <16 x float> @foo(<16 x float> %A) nounwind { %tmp = alloca <16 x float>, align 16 diff --git a/test/Transforms/ScalarRepl/vector_promote.ll b/test/Transforms/ScalarRepl/vector_promote.ll index 0284b3d..4f875b0 100644 --- a/test/Transforms/ScalarRepl/vector_promote.ll +++ b/test/Transforms/ScalarRepl/vector_promote.ll @@ -1,5 +1,6 @@ ; RUN: opt < %s -scalarrepl -S | not grep alloca ; RUN: opt < %s -scalarrepl -S | grep {load <4 x float>} +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" define void @test(<4 x float>* %F, float %f) { entry: diff --git a/test/Transforms/SimplifyCFG/basictest.ll b/test/Transforms/SimplifyCFG/basictest.ll index 468b6ed..a829e03 100644 --- a/test/Transforms/SimplifyCFG/basictest.ll +++ b/test/Transforms/SimplifyCFG/basictest.ll @@ -21,5 +21,10 @@ BB1: ; preds = %0, %0 } - - +define void @test4() { +entry: + br label %return +return: + ret void +} +@test4g = global i8* blockaddress(@test4, %return) diff --git a/test/Transforms/SimplifyCFG/duplicate-phis.ll b/test/Transforms/SimplifyCFG/duplicate-phis.ll new file mode 100644 index 0000000..a1e5113 --- /dev/null +++ b/test/Transforms/SimplifyCFG/duplicate-phis.ll @@ -0,0 +1,21 @@ +; RUN: opt < %s -instcombine -simplifycfg -S | grep { = phi } | count 1 + +; instcombine should sort the PHI operands so that simplifycfg can see the +; duplicate and remove it. + +define i32 @foo(i1 %t) { +entry: + call void @bar() + br i1 %t, label %true, label %false, +true: + call void @bar() + br label %false +false: + %a = phi i32 [ 2, %true ], [ 5, %entry ] + %b = phi i32 [ 5, %entry ], [ 2, %true ] + call void @bar() + %c = add i32 %a, %b + ret i32 %c +} + +declare void @bar() diff --git a/test/lit.cfg b/test/lit.cfg index 7eac5c6..1965615 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -76,6 +76,7 @@ for line in open(os.path.join(config.llvm_obj_root, 'test', 'site.exp')): site_exp[m.group(1)] = m.group(2) # Add substitutions. +config.substitutions.append(('%llvmgcc_only', site_exp['llvmgcc'])) for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', 'bugpoint_topts']: |
