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| author | dim <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
| commit | aa45f148926e3461a1fd8b10c990f0a51a908cc9 (patch) | |
| tree | 909310b2e05119d1d6efda049977042abbb58bb1 /test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll | |
| parent | 169d2bd06003c39970bc94c99669a34b61bb7e45 (diff) | |
| download | FreeBSD-src-aa45f148926e3461a1fd8b10c990f0a51a908cc9.zip FreeBSD-src-aa45f148926e3461a1fd8b10c990f0a51a908cc9.tar.gz | |
Vendor import of llvm tags/RELEASE_33/final r183502 (effectively, 3.3
release):
http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_33/final@183502
Diffstat (limited to 'test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll')
| -rw-r--r-- | test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll b/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll index 452d0df..f904a8e 100644 --- a/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll +++ b/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll @@ -19,19 +19,19 @@ entry: for.body: ; preds = %for.body.for.body_crit_edge, %entry %indvars.iv.reload = load i64* %indvars.iv.reg2mem %arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv.reload - %0 = load i32* %arrayidx, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %0 = load i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !3 %arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv.reload - %1 = load i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %1 = load i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %idxprom3 = sext i32 %1 to i64 %arrayidx4 = getelementptr inbounds i32* %a, i64 %idxprom3 - store i32 %0, i32* %arrayidx4, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + store i32 %0, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !3 %indvars.iv.next = add i64 %indvars.iv.reload, 1 ; A new store without the parallel metadata here: store i64 %indvars.iv.next, i64* %indvars.iv.next.reg2mem %indvars.iv.next.reload1 = load i64* %indvars.iv.next.reg2mem %arrayidx6 = getelementptr inbounds i32* %b, i64 %indvars.iv.next.reload1 - %2 = load i32* %arrayidx6, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 - store i32 %2, i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %2 = load i32* %arrayidx6, align 4, !llvm.mem.parallel_loop_access !3 + store i32 %2, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %indvars.iv.next.reload = load i64* %indvars.iv.next.reg2mem %lftr.wideiv = trunc i64 %indvars.iv.next.reload to i32 %exitcond = icmp eq i32 %lftr.wideiv, 512 @@ -46,7 +46,4 @@ for.end: ; preds = %for.body ret void } -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} !3 = metadata !{metadata !3} |
