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author | dim <dim@FreeBSD.org> | 2013-04-08 18:45:10 +0000 |
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committer | dim <dim@FreeBSD.org> | 2013-04-08 18:45:10 +0000 |
commit | c72c57c9e9b69944e3e009cd5e209634839581d3 (patch) | |
tree | 4fc2f184c499d106f29a386c452b49e5197bf63d /test/CodeGen/mips-constraints-mem.c | |
parent | 5b20025c30d23d521e12c1f33ec8fa6b821952cd (diff) | |
download | FreeBSD-src-c72c57c9e9b69944e3e009cd5e209634839581d3.zip FreeBSD-src-c72c57c9e9b69944e3e009cd5e209634839581d3.tar.gz |
Vendor import of clang trunk r178860:
http://llvm.org/svn/llvm-project/cfe/trunk@178860
Diffstat (limited to 'test/CodeGen/mips-constraints-mem.c')
-rw-r--r-- | test/CodeGen/mips-constraints-mem.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/mips-constraints-mem.c b/test/CodeGen/mips-constraints-mem.c new file mode 100644 index 0000000..ea6bcaf --- /dev/null +++ b/test/CodeGen/mips-constraints-mem.c @@ -0,0 +1,26 @@ +// RUN: %clang -target mipsel-unknown-linux -S -o - -emit-llvm %s \ +// RUN: | FileCheck %s + +// This checks that the frontend will accept inline asm memory constraints. + +int foo() +{ + + // 'R': An address that can be used in a non-macro load or stor' + // This test will result in the higher and lower nibbles being + // switched due to the lwl/lwr instruction pairs. + // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R"(i32* %{{[0-9,a-f]+}}) #1, !srcloc !0 + + int c = 0xffbbccdd; + + int *p = &c; + int out = 0; + + __asm volatile ( + "lwl %0, 1 + %1\n\t" + "lwr %0, 2 + %1\n\t" + : "=r"(out) + : "R"(*p) + ); + return 0; +} |