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author | rdivacky <rdivacky@FreeBSD.org> | 2009-10-14 17:57:32 +0000 |
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committer | rdivacky <rdivacky@FreeBSD.org> | 2009-10-14 17:57:32 +0000 |
commit | cd749a9c07f1de2fb8affde90537efa4bc3e7c54 (patch) | |
tree | b21f6de4e08b89bb7931806bab798fc2a5e3a686 /test/CodeGen/X86/vshift-1.ll | |
parent | 72621d11de5b873f1695f391eb95f0b336c3d2d4 (diff) | |
download | FreeBSD-src-cd749a9c07f1de2fb8affde90537efa4bc3e7c54.zip FreeBSD-src-cd749a9c07f1de2fb8affde90537efa4bc3e7c54.tar.gz |
Update llvm to r84119.
Diffstat (limited to 'test/CodeGen/X86/vshift-1.ll')
-rw-r--r-- | test/CodeGen/X86/vshift-1.ll | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll index d7a20e4..ae845e0 100644 --- a/test/CodeGen/X86/vshift-1.ll +++ b/test/CodeGen/X86/vshift-1.ll @@ -1,13 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f -; RUN: grep psllq %t | count 2 -; RUN: grep pslld %t | count 2 -; RUN: grep psllw %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: +; CHECK: shift1a: +; CHECK: psllq %shl = shl <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %shl, <2 x i64>* %dst ret void @@ -15,6 +14,9 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: +; CHECK: shift1b: +; CHECK: movd +; CHECK-NEXT: psllq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1 %shl = shl <2 x i64> %val, %1 @@ -25,6 +27,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: +; CHECK: shift2a: +; CHECK: pslld %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 > store <4 x i32> %shl, <4 x i32>* %dst ret void @@ -32,6 +36,9 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: movd +; CHECK-NEXT: pslld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -43,13 +50,20 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: +; CHECK: shift3a: +; CHECK: psllw %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %shl, <8 x i16>* %dst ret void } +; Make sure the shift amount is properly zero extended. define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: movd +; CHECK-NEXT: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 |