diff options
| author | dim <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
| commit | 721c201bd55ffb73cb2ba8d39e0570fa38c44e15 (patch) | |
| tree | eacfc83d988e4b9d11114387ae7dc41243f2a363 /test/CodeGen/X86/phys-reg-local-regalloc.ll | |
| parent | 2b2816e083a455f7a656ae88b0fd059d1688bb36 (diff) | |
| download | FreeBSD-src-721c201bd55ffb73cb2ba8d39e0570fa38c44e15.zip FreeBSD-src-721c201bd55ffb73cb2ba8d39e0570fa38c44e15.tar.gz | |
Vendor import of llvm trunk r161861:
http://llvm.org/svn/llvm-project/llvm/trunk@161861
Diffstat (limited to 'test/CodeGen/X86/phys-reg-local-regalloc.ll')
| -rw-r--r-- | test/CodeGen/X86/phys-reg-local-regalloc.ll | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/test/CodeGen/X86/phys-reg-local-regalloc.ll b/test/CodeGen/X86/phys-reg-local-regalloc.ll index 8b9ea17..37eca1c 100644 --- a/test/CodeGen/X86/phys-reg-local-regalloc.ll +++ b/test/CodeGen/X86/phys-reg-local-regalloc.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=fast | FileCheck %s -; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=fast | FileCheck %s -; CHECKed instructions should be the same with or without -O0. +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 | FileCheck %s +; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast | FileCheck %s +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 | FileCheck -check-prefix=ATOM %s +; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling. @.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] @@ -15,6 +16,19 @@ entry: ; CHECK: movl %ebx, 40(%esp) ; CHECK-NOT: movl ; CHECK: addl %ebx, %eax + +; On Intel Atom the scheduler moves a movl instruction +; used for the printf call to follow movl 24(%esp), %eax +; ATOM: movl 24(%esp), %eax +; ATOM: movl +; ATOM: movl %eax, 36(%esp) +; ATOM-NOT: movl +; ATOM: movl 28(%esp), %ebx +; ATOM-NOT: movl +; ATOM: movl %ebx, 40(%esp) +; ATOM-NOT: movl +; ATOM: addl %ebx, %eax + %retval = alloca i32 ; <i32*> [#uses=2] %"%ebx" = alloca i32 ; <i32*> [#uses=1] %"%eax" = alloca i32 ; <i32*> [#uses=2] |
