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| author | dim <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
| commit | cbb70ce070d220642b038ea101d9c0f9fbf860d6 (patch) | |
| tree | d2b61ce94e654cb01a254d2195259db5f9cc3f3c /test/CodeGen/X86/conditional-indecrement.ll | |
| parent | 4ace901e87dac5bbbac78ed325e75462e48e386e (diff) | |
| download | FreeBSD-src-cbb70ce070d220642b038ea101d9c0f9fbf860d6.zip FreeBSD-src-cbb70ce070d220642b038ea101d9c0f9fbf860d6.tar.gz | |
Vendor import of llvm trunk r126079:
http://llvm.org/svn/llvm-project/llvm/trunk@126079
Diffstat (limited to 'test/CodeGen/X86/conditional-indecrement.ll')
| -rw-r--r-- | test/CodeGen/X86/conditional-indecrement.ll | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/test/CodeGen/X86/conditional-indecrement.ll b/test/CodeGen/X86/conditional-indecrement.ll new file mode 100644 index 0000000..a3a0c39 --- /dev/null +++ b/test/CodeGen/X86/conditional-indecrement.ll @@ -0,0 +1,89 @@ +; RUN: llc -march=x86 < %s | FileCheck %s + +define i32 @test1(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test1: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test2(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test2: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test3(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test3: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test4(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test4: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test5(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test5: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} + +define i32 @test6(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test6: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test7(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test7: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test8(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test8: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} |
