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| author | dim <dim@FreeBSD.org> | 2011-05-02 19:34:44 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2011-05-02 19:34:44 +0000 |
| commit | 2b066988909948dc3d53d01760bc2d71d32f3feb (patch) | |
| tree | fc5f365fb9035b2d0c622bbf06c9bbe8627d7279 /test/CodeGen/ARM/prefetch.ll | |
| parent | c80ac9d286b8fcc6d1ee5d76048134cf80aa9edc (diff) | |
| download | FreeBSD-src-2b066988909948dc3d53d01760bc2d71d32f3feb.zip FreeBSD-src-2b066988909948dc3d53d01760bc2d71d32f3feb.tar.gz | |
Vendor import of llvm trunk r130700:
http://llvm.org/svn/llvm-project/llvm/trunk@130700
Diffstat (limited to 'test/CodeGen/ARM/prefetch.ll')
| -rw-r--r-- | test/CodeGen/ARM/prefetch.ll | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll index 895b27b..95f082a 100644 --- a/test/CodeGen/ARM/prefetch.ll +++ b/test/CodeGen/ARM/prefetch.ll @@ -1,10 +1,15 @@ ; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld -; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2 -; RUN: llc < %s -march=arm -mattr=+v7a,+mp | FileCheck %s -check-prefix=ARM-MP +; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2 +; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP ; rdar://8601536 define void @t1(i8* %ptr) nounwind { entry: +; ARM: t1: +; ARM-NOT: pldw [r0] +; ARM: pld [r0] + ; ARM-MP: t1: ; ARM-MP: pldw [r0] ; ARM-MP: pld [r0] @@ -19,8 +24,8 @@ entry: define void @t2(i8* %ptr) nounwind { entry: -; ARM-MP: t2: -; ARM-MP: pld [r0, #1023] +; ARM: t2: +; ARM: pld [r0, #1023] ; THUMB2: t2: ; THUMB2: pld [r0, #1023] @@ -31,8 +36,8 @@ entry: define void @t3(i32 %base, i32 %offset) nounwind { entry: -; ARM-MP: t3: -; ARM-MP: pld [r0, r1, lsr #2] +; ARM: t3: +; ARM: pld [r0, r1, lsr #2] ; THUMB2: t3: ; THUMB2: lsrs r1, r1, #2 @@ -46,8 +51,8 @@ entry: define void @t4(i32 %base, i32 %offset) nounwind { entry: -; ARM-MP: t4: -; ARM-MP: pld [r0, r1, lsl #2] +; ARM: t4: +; ARM: pld [r0, r1, lsl #2] ; THUMB2: t4: ; THUMB2: pld [r0, r1, lsl #2] |
