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| author | dim <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
| commit | 1fc08f5e9ef733ef1ce6f363fecedc2260e78974 (patch) | |
| tree | 19c69a04768629f2d440944b71cbe90adae0b615 /test/CodeGen/ARM/fast-isel-ldr-str-arm.ll | |
| parent | 07637c87f826cdf411f0673595e9bc92ebd793f2 (diff) | |
| download | FreeBSD-src-1fc08f5e9ef733ef1ce6f363fecedc2260e78974.zip FreeBSD-src-1fc08f5e9ef733ef1ce6f363fecedc2260e78974.tar.gz | |
Vendor import of llvm trunk r154661:
http://llvm.org/svn/llvm-project/llvm/trunk@r154661
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-ldr-str-arm.ll')
| -rw-r--r-- | test/CodeGen/ARM/fast-isel-ldr-str-arm.ll | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/fast-isel-ldr-str-arm.ll b/test/CodeGen/ARM/fast-isel-ldr-str-arm.ll new file mode 100644 index 0000000..dfb8c53 --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-ldr-str-arm.ll @@ -0,0 +1,55 @@ +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=ARM + +define i32 @t1(i32* nocapture %ptr) nounwind readonly { +entry: +; ARM: t1 + %add.ptr = getelementptr inbounds i32* %ptr, i32 1 + %0 = load i32* %add.ptr, align 4 +; ARM: ldr r{{[0-9]}}, [r0, #4] + ret i32 %0 +} + +define i32 @t2(i32* nocapture %ptr) nounwind readonly { +entry: +; ARM: t2 + %add.ptr = getelementptr inbounds i32* %ptr, i32 63 + %0 = load i32* %add.ptr, align 4 +; ARM: ldr.w r{{[0-9]}}, [r0, #252] + ret i32 %0 +} + +define zeroext i16 @t3(i16* nocapture %ptr) nounwind readonly { +entry: +; ARM: t3 + %add.ptr = getelementptr inbounds i16* %ptr, i16 1 + %0 = load i16* %add.ptr, align 4 +; ARM: ldrh r{{[0-9]}}, [r0, #2] + ret i16 %0 +} + +define zeroext i16 @t4(i16* nocapture %ptr) nounwind readonly { +entry: +; ARM: t4 + %add.ptr = getelementptr inbounds i16* %ptr, i16 63 + %0 = load i16* %add.ptr, align 4 +; ARM: ldrh.w r{{[0-9]}}, [r0, #126] + ret i16 %0 +} + +define zeroext i8 @t5(i8* nocapture %ptr) nounwind readonly { +entry: +; ARM: t5 + %add.ptr = getelementptr inbounds i8* %ptr, i8 1 + %0 = load i8* %add.ptr, align 4 +; ARM: ldrb r{{[0-9]}}, [r0, #1] + ret i8 %0 +} + +define zeroext i8 @t6(i8* nocapture %ptr) nounwind readonly { +entry: +; ARM: t6 + %add.ptr = getelementptr inbounds i8* %ptr, i8 63 + %0 = load i8* %add.ptr, align 4 +; ARM: ldrb.w r{{[0-9]}}, [r0, #63] + ret i8 %0 +} |
